From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A178C7EE23 for ; Sun, 4 Jun 2023 16:05:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229449AbjFDQFI (ORCPT ); Sun, 4 Jun 2023 12:05:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46346 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230005AbjFDQFH (ORCPT ); Sun, 4 Jun 2023 12:05:07 -0400 Received: from lobo.ruivo.org (lobo.ruivo.org [173.14.175.98]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 56352DE for ; Sun, 4 Jun 2023 09:05:05 -0700 (PDT) Received: by lobo.ruivo.org (Postfix, from userid 1011) id 43BAB529B3; Sun, 4 Jun 2023 12:05:02 -0400 (EDT) Received: from jake.ruivo.org (bob.qemu.ruivo [192.168.72.19]) by lobo.ruivo.org (Postfix) with ESMTPA id EEABD5260A; Sun, 4 Jun 2023 12:04:42 -0400 (EDT) Received: by jake.ruivo.org (Postfix, from userid 1000) id E12EC220074; Sun, 4 Jun 2023 12:04:42 -0400 (EDT) Date: Sun, 4 Jun 2023 12:04:42 -0400 From: Aristeu Rozanski To: "Luck, Tony" Cc: Borislav Petkov , "linux-edac@vger.kernel.org" , Aristeu Rozanski Subject: Re: [PATCH] mce: prevent concurrent polling of MCE events Message-ID: <20230604160442.GN4090740@cathedrallabs.org> References: <20230515143225.GC4090740@cathedrallabs.org> <20230515145227.GGZGJHKyH9sAfToD03@fat_crate.local> <20230515183050.GJZGJ6Wsmr4Yf/H5Ps@fat_crate.local> <20230515194423.GKZGKLl+8mJiLoJAp1@fat_crate.local> <20230523141523.GL4090740@cathedrallabs.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230523141523.GL4090740@cathedrallabs.org> User-Agent: Mutt/2.2.9 (2022-11-12) Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org On Tue, May 23, 2023 at 10:15:23AM -0400, Aristeu Rozanski wrote: > On Mon, May 15, 2023 at 08:07:10PM +0000, Luck, Tony wrote: > > I disabled CMCI for debugging reasons. Aristeu needs to comment on > > his use case. > > Got an answer from them. They disable it in two lines of products > (one uses IceLake, the other uses Sapphire Rapids) and in these lines > they can use thresholding to signal UCNA without signaling any corrected > events and it won't work with CMCI enabled. They did make Intel aware of > it (maybe you heard details about it? If not I can get them in contact with > you) but it's not certain if this can be fixed or not. Tony? -- Aristeu