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From: Serge Semin <fancer.lancer@gmail.com>
To: Michal Simek <michal.simek@amd.com>,
	Alexander Stein <alexander.stein@ew.tq-group.com>,
	Borislav Petkov <bp@alien8.de>, Tony Luck <tony.luck@intel.com>,
	James Morse <james.morse@arm.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Robert Richter <rric@kernel.org>
Cc: Serge Semin <fancer.lancer@gmail.com>,
	Punnaiah Choudary Kalluri  <punnaiah.choudary.kalluri@xilinx.com>,
	Dinh Nguyen <dinguyen@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v4 10/20] EDAC/synopsys: Drop struct ecc_error_info.blknr field
Date: Wed, 20 Sep 2023 22:10:34 +0300	[thread overview]
Message-ID: <20230920191059.28395-11-fancer.lancer@gmail.com> (raw)
In-Reply-To: <20230920191059.28395-1-fancer.lancer@gmail.com>

Even though the ECC(C|U)ADDR1 CSR description indeed says it's a "Block
number" in the DW uMCTL2 DDRC IP-core databooks, the corresponding
register field is named as ECC(C|U)ADDR1.ecc_(un)corr_col (which means ECC
(un)corrected column) and in the rest of the document it's referred as the
SDRAM address column. Thus use the already available ecc_error_info.col
field to read the column number to and drop the questionable
ecc_error_info.blknr field for good.

Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
---
 drivers/edac/synopsys_edac.c | 21 +++++++++------------
 1 file changed, 9 insertions(+), 12 deletions(-)

diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
index 0c6441719215..f2bcc3f79bf2 100644
--- a/drivers/edac/synopsys_edac.c
+++ b/drivers/edac/synopsys_edac.c
@@ -174,7 +174,7 @@
 #define ECC_CEADDR0_RNK_MASK		BIT(24)
 #define ECC_CEADDR1_BNKGRP_MASK		0x3000000
 #define ECC_CEADDR1_BNKNR_MASK		0x70000
-#define ECC_CEADDR1_BLKNR_MASK		0xFFF
+#define ECC_CEADDR1_COL_MASK		0xFFF
 #define ECC_CEADDR1_BNKGRP_SHIFT	24
 #define ECC_CEADDR1_BNKNR_SHIFT		16
 
@@ -272,7 +272,6 @@
  * @bitpos:	Bit position.
  * @data:	Data causing the error.
  * @bankgrpnr:	Bank group number.
- * @blknr:	Block number.
  */
 struct ecc_error_info {
 	u32 row;
@@ -281,7 +280,6 @@ struct ecc_error_info {
 	u32 bitpos;
 	u32 data;
 	u32 bankgrpnr;
-	u32 blknr;
 };
 
 /**
@@ -434,7 +432,7 @@ static int zynqmp_get_error_info(struct synps_edac_priv *priv)
 					ECC_CEADDR1_BNKNR_SHIFT;
 	p->ceinfo.bankgrpnr = (regval &	ECC_CEADDR1_BNKGRP_MASK) >>
 					ECC_CEADDR1_BNKGRP_SHIFT;
-	p->ceinfo.blknr = (regval & ECC_CEADDR1_BLKNR_MASK);
+	p->ceinfo.col = (regval & ECC_CEADDR1_COL_MASK);
 	p->ceinfo.data = readl(base + ECC_CSYND0_OFST);
 	edac_dbg(2, "ECCCSYN0: 0x%08X ECCCSYN1: 0x%08X ECCCSYN2: 0x%08X\n",
 		 readl(base + ECC_CSYND0_OFST), readl(base + ECC_CSYND1_OFST),
@@ -450,7 +448,7 @@ static int zynqmp_get_error_info(struct synps_edac_priv *priv)
 					ECC_CEADDR1_BNKGRP_SHIFT;
 	p->ueinfo.bank = (regval & ECC_CEADDR1_BNKNR_MASK) >>
 					ECC_CEADDR1_BNKNR_SHIFT;
-	p->ueinfo.blknr = (regval & ECC_CEADDR1_BLKNR_MASK);
+	p->ueinfo.col = (regval & ECC_CEADDR1_COL_MASK);
 	p->ueinfo.data = readl(base + ECC_UESYND0_OFST);
 out:
 	spin_lock_irqsave(&priv->reglock, flags);
@@ -481,10 +479,9 @@ static void handle_error(struct mem_ctl_info *mci, struct synps_ecc_status *p)
 		pinf = &p->ceinfo;
 		if (priv->p_data->quirks & DDR_ECC_INTR_SUPPORT) {
 			snprintf(priv->message, SYNPS_EDAC_MSG_SIZE,
-				 "DDR ECC error type:%s Row %d Bank %d BankGroup Number %d Block Number %d Bit Position: %d Data: 0x%08x",
-				 "CE", pinf->row, pinf->bank,
-				 pinf->bankgrpnr, pinf->blknr,
-				 pinf->bitpos, pinf->data);
+				 "DDR ECC error type:%s Row %d Col %d Bank %d BankGroup Number %d Bit Position: %d Data: 0x%08x",
+				 "CE", pinf->row, pinf->col, pinf->bank,
+				 pinf->bankgrpnr, pinf->bitpos, pinf->data);
 		} else {
 			snprintf(priv->message, SYNPS_EDAC_MSG_SIZE,
 				 "DDR ECC error type:%s Row %d Bank %d Col %d Bit Position: %d Data: 0x%08x",
@@ -501,9 +498,9 @@ static void handle_error(struct mem_ctl_info *mci, struct synps_ecc_status *p)
 		pinf = &p->ueinfo;
 		if (priv->p_data->quirks & DDR_ECC_INTR_SUPPORT) {
 			snprintf(priv->message, SYNPS_EDAC_MSG_SIZE,
-				 "DDR ECC error type :%s Row %d Bank %d BankGroup Number %d Block Number %d",
-				 "UE", pinf->row, pinf->bank,
-				 pinf->bankgrpnr, pinf->blknr);
+				 "DDR ECC error type :%s Row %d Col %d Bank %d BankGroup Number %d",
+				 "UE", pinf->row, pinf->col, pinf->bank,
+				 pinf->bankgrpnr);
 		} else {
 			snprintf(priv->message, SYNPS_EDAC_MSG_SIZE,
 				 "DDR ECC error type :%s Row %d Bank %d Col %d ",
-- 
2.41.0


  parent reply	other threads:[~2023-09-20 19:12 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-20 19:10 [PATCH v4 00/20] EDAC/mc/synopsys: Various fixes and cleanups Serge Semin
2023-09-20 19:10 ` [PATCH v4 01/20] EDAC/synopsys: Fix ECC status data and IRQ disable race condition Serge Semin
2023-09-20 19:10 ` [PATCH v4 02/20] EDAC/synopsys: Fix generic device type detection procedure Serge Semin
2023-09-20 19:10 ` [PATCH v4 03/20] EDAC/synopsys: Fix mci->scrub_cap field setting Serge Semin
2023-09-20 19:10 ` [PATCH v4 04/20] EDAC/synopsys: Drop erroneous ADDRMAP4.addrmap_col_b10 parse Serge Semin
2023-09-20 19:10 ` [PATCH v4 05/20] EDAC/synopsys: Fix reading errors count before ECC status Serge Semin
2023-09-20 19:10 ` [PATCH v4 06/20] EDAC/synopsys: Fix misleading IRQ self-cleared quirk flag Serge Semin
2023-09-20 19:10 ` [PATCH v4 07/20] EDAC/synopsys: Use platform device devm ioremap method Serge Semin
2023-09-20 19:10 ` [PATCH v4 08/20] EDAC/synopsys: Drop internal CE and UE counters Serge Semin
2023-09-20 19:10 ` [PATCH v4 09/20] EDAC/synopsys: Drop local to_mci() macro definition Serge Semin
2023-09-20 19:10 ` Serge Semin [this message]
2023-09-20 19:10 ` [PATCH v4 11/20] EDAC/synopsys: Shorten out struct ecc_error_info.bankgrpnr field name Serge Semin
2023-09-20 19:10 ` [PATCH v4 12/20] EDAC/synopsys: Drop redundant info from the error messages Serge Semin
2023-09-20 19:10 ` [PATCH v4 13/20] EDAC/mc: Init DIMM labels in MC registration method Serge Semin
2023-09-20 19:10 ` [PATCH v4 14/20] EDAC/mc: Add generic unique MC index allocation procedure Serge Semin
2023-09-20 19:10 ` [PATCH v4 15/20] EDAC/mc: Re-use " Serge Semin
2023-09-20 19:10 ` [PATCH v4 16/20] EDAC/synopsys: Detach Zynq A05 DDRC support to separate driver Serge Semin
2023-09-21 11:26   ` kernel test robot
2023-09-21 19:32     ` Serge Semin
2023-09-20 19:10 ` [PATCH v4 17/20] EDAC/synopsys: Drop unused platform-specific setup API Serge Semin
2023-09-20 19:10 ` [PATCH v4 18/20] EDAC/synopsys: Unify CSRs macro declarations Serge Semin
2023-09-20 19:10 ` [PATCH v4 19/20] EDAC/synopsys: Unify struct/macro/function prefixes Serge Semin
2023-09-20 19:10 ` [PATCH v4 20/20] EDAC/synopsys: Convert to using BIT/GENMASK/FIELD_x macros Serge Semin

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