[PATCH v4 10/18] EDAC/synopsys: Get corrected bit position

[Serge Semin <fancer.lancer@gmail.com>]

Since the DQ-bus width is now available in the driver it can be utilized
to calculate the exact bit-position corrected by the ECC engine for any
Synopsys memory controller setup. A corrected error syndrome is exposed by
the ECCSTAT.corrected_bit_num field. A particular erroneous bit position
is described in the lookup table [1] which also contains a dependency
between the field value and the DQ-bus widths. The syndrome values table
basically represents a standard lookup table for the Hamming
(64,8)/(32,7)/(16,6) codes (the error-correcting bits placed at the
power-of-two positions) except that the zero value means error in the
ecc[0] bit.

So using the offsets from that table introduce a new inline method
snps_get_bitpos() which would provide the actual CE bit-position. The
method will be called if a corrected error is detected.

[1] DesignWare® Cores Enhanced Universal DDR Memory Controller (uMCTL2)
    Databook, Version 3.91a, October 2020, p.426-427

Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
---
 drivers/edac/synopsys_edac.c | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
index e10778cead63..e08cb30b7a7d 100644
--- a/drivers/edac/synopsys_edac.c
+++ b/drivers/edac/synopsys_edac.c
@@ -10,6 +10,7 @@
 #include <linux/bits.h>
 #include <linux/edac.h>
 #include <linux/fs.h>
+#include <linux/log2.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/seq_file.h>
@@ -301,6 +302,7 @@ struct snps_ddrc_info {
  * @col:	Column number.
  * @bank:	Bank number.
  * @bankgrp:	Bank group number.
+ * @syndrome:	Error syndrome.
  * @bitpos:	Bit position.
  * @data:	Data causing the error.
  */
@@ -309,6 +311,7 @@ struct snps_ecc_error_info {
 	u32 col;
 	u32 bank;
 	u32 bankgrp;
+	u32 syndrome;
 	u32 bitpos;
 	u32 data;
 };
@@ -359,6 +362,27 @@ struct snps_edac_priv {
 #endif
 };
 
+/**
+ * snps_get_bitpos - Get DQ-bus corrected bit position.
+ * @syndrome:	Error syndrome.
+ * @dq_width:	Controller DQ-bus width.
+ *
+ * Return: actual corrected DQ-bus bit position starting from 0.
+ */
+static inline u32 snps_get_bitpos(u32 syndrome, enum snps_dq_width dq_width)
+{
+	/* ecc[0] bit */
+	if (syndrome == 0)
+		return BITS_PER_BYTE << dq_width;
+
+	/* ecc[1:x] bit */
+	if (is_power_of_2(syndrome))
+		return (BITS_PER_BYTE << dq_width) + ilog2(syndrome) + 1;
+
+	/* data[0:y] bit */
+	return syndrome - ilog2(syndrome) - 2;
+}
+
 /**
  * snps_get_error_info - Get the current ECC error info.
  * @priv:	DDR memory controller private instance data.
@@ -379,7 +403,7 @@ static int snps_get_error_info(struct snps_edac_priv *priv)
 	if (!regval)
 		return 1;
 
-	p->ceinfo.bitpos = FIELD_GET(ECC_STAT_BITNUM_MASK, regval);
+	p->ceinfo.syndrome = FIELD_GET(ECC_STAT_BITNUM_MASK, regval);
 
 	regval = readl(base + ECC_ERRCNT_OFST);
 	p->ce_cnt = FIELD_GET(ECC_ERRCNT_CECNT_MASK, regval);
@@ -387,6 +411,8 @@ static int snps_get_error_info(struct snps_edac_priv *priv)
 	if (!p->ce_cnt)
 		goto ue_err;
 
+	p->ceinfo.bitpos = snps_get_bitpos(p->ceinfo.syndrome, priv->info.dq_width);
+
 	regval = readl(base + ECC_CEADDR0_OFST);
 	p->ceinfo.row = FIELD_GET(ECC_CEADDR0_ROW_MASK, regval);
 
-- 
2.41.0