From: Bjorn Helgaas <helgaas@kernel.org>
To: Mario Limonciello <mario.limonciello@amd.com>
Cc: Yazen Ghannam <yazen.ghannam@amd.com>,
linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
tony.luck@intel.com, x86@kernel.org, avadhut.naik@amd.com,
john.allen@amd.com, bhelgaas@google.com,
Shyam-sundar.S-k@amd.com, richard.gong@amd.com,
jdelvare@suse.com, linux@roeck-us.net, clemens@ladisch.de,
hdegoede@redhat.com, ilpo.jarvinen@linux.intel.com,
linux-pci@vger.kernel.org, linux-hwmon@vger.kernel.org,
platform-driver-x86@vger.kernel.org,
naveenkrishna.chatradhi@amd.com, carlos.bilbao.osdev@gmail.com
Subject: Re: [PATCH 00/16] AMD NB and SMN rework
Date: Thu, 24 Oct 2024 16:47:53 -0500 [thread overview]
Message-ID: <20241024214753.GA1005373@bhelgaas> (raw)
In-Reply-To: <0018d26a-ffd5-42fc-8cc4-9e689834a808@amd.com>
On Thu, Oct 24, 2024 at 04:20:35PM -0500, Mario Limonciello wrote:
> On 10/24/2024 16:06, Bjorn Helgaas wrote:
> > On Thu, Oct 24, 2024 at 03:08:41PM -0500, Mario Limonciello wrote:
> > > On 10/24/2024 12:46, Bjorn Helgaas wrote:
> > > > On Thu, Oct 24, 2024 at 12:01:59PM -0400, Yazen Ghannam wrote:
> > > > > On Wed, Oct 23, 2024 at 12:59:28PM -0500, Bjorn Helgaas wrote:
> > > > > > On Wed, Oct 23, 2024 at 05:21:34PM +0000, Yazen Ghannam wrote:
> > > ...
> >
> > > > > > The use of pci_get_slot() and pci_get_domain_bus_and_slot() is not
> > > > > > ideal since all those pci_get_*() interfaces are kind of ugly in my
> > > > > > opinion, and using them means we have to encode topology details in
> > > > > > the kernel. But this still seems like a big improvement.
> > > > >
> > > > > Thanks for the feedback. Hopefully, we'll come to some improved
> > > > > solution. :)
> > > > >
> > > > > Can you please elaborate on your concern? Is it about saying "thing X is
> > > > > always at SBDF A:B:C.D" or something else?
> > > >
> > > > "Thing X is always at SBDF A:B:C.D" is one big reason. "A:B:C.D" says
> > > > nothing about the actual functionality of the device. A PCI
> > > > Vendor/Device ID or a PNP ID identifies the device programming model
> > > > independent of its geographical location. Inferring the functionality
> > > > and programming model from the location is a maintenance issue because
> > > > hardware may change the address.
> > > >
> > > > PCI bus numbers are under software control, so in general it's not
> > > > safe to rely on them, although in this case these devices are probably
> > > > on root buses where the bus number is either fixed or determined by
> > > > BIOS configuration of the host bridge.
> > > >
> > > > I don't like the pci_get_*() functions because they break the driver
> > > > model. The usual .probe() model binds a device to a driver, which
> > > > essentially means the driver owns the device and its resources, and
> > > > the driver and doesn't have to worry about other code interfering.
> > >
> > > Are you suggesting that perhaps we should be introducing amd_smn (patch 10)
> > > as a PCI driver that binds "to the root device" instead?
> >
> > I don't know any of the specifics, so I can't really opine on that.
> >
> > The PCI specs envision that a Vendor/Device ID defines the programming
> > model of the device, and you would only use a new Device ID when that
> > programming model changes.
> >
> > Of course, vendors like to define a new set of Device IDs for every
> > new chipset even when no driver changes are required, so even if a new
> > SMN works exactly the same as in previous chipsets, you're probably
> > back to having to add a new Device ID for every new chipset.
>
> Yeah; this I believe is why we're here today and trying to find something
> more manageable (IE this series).
Another alternative would be an ACPI device where you can use the same
_HID (or at least a _CID) for all the chipsets.
> > The Subsystem Vendor ID and Subsystem ID exist to solve a similar
> > problem (sort of in reverse). If AMD could allocate a Subsystem ID
> > for this SMN programming model and use that same ID in every chipset,
> > you could make a pci_driver.id_table entry that would match them all,
> > e.g.,
> >
> > .vendor = PCI_VENDOR_ID_AMD,
> > .device = PCI_ANY_ID,
> > .subvendor = PCI_VENDOR_ID_AMD,
> > .subdevice = PCI_SUBSYSTEM_AMD_SMN,
> >
> > (pci_device_id.subdevice is misnamed; the spec calls it "Subsystem ID")
>
> Isn't the subsystem ID based typically upon the platform it's
> running on? For example I seem to recall on Dell systems it's used
> the value that was in the SBMIOS ProductSKU field here (IoW not
> something AMD would control).
Right, it is typically based on the platform; that's why I said "in
reverse." I think all these devices are integrated into the chipset,
so I'm speculating that platform vendors would have no need (maybe
even no way) to use the Subsystem ID. But maybe that's not the case.
> I mean I guess maybe we could do a:
>
> .vendor = PCI_VENDOR_ID_AMD,
> .device = PCI_ANY_ID,
> .class = PCI_CLASS_BRIDGE_HOST << 8
>
> And then in probe() figure out if it's the right one, but that's still
> pretty ugly, eh?
I think there are some drivers that do this, and it's not completely
terrible. The probe() can just return failure if it doesn't want the
device.
Bjorn
next prev parent reply other threads:[~2024-10-24 21:47 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-23 17:21 [PATCH 00/16] AMD NB and SMN rework Yazen Ghannam
2024-10-23 17:21 ` [PATCH 01/16] x86/mce/amd: Remove shared threshold bank plumbing Yazen Ghannam
2024-10-23 17:21 ` [PATCH 02/16] x86/amd_nb: Restrict init function to AMD-based systems Yazen Ghannam
2024-10-31 8:09 ` Zhuo, Qiuxu
2024-10-31 10:36 ` Borislav Petkov
2024-10-31 11:50 ` Zhuo, Qiuxu
2024-10-31 13:11 ` Borislav Petkov
2024-10-23 17:21 ` [PATCH 03/16] x86/amd_nb: Clean up early_is_amd_nb() Yazen Ghannam
2024-10-25 15:58 ` Borislav Petkov
2024-10-29 14:39 ` Yazen Ghannam
2024-10-29 15:08 ` Borislav Petkov
2024-10-29 16:15 ` Luck, Tony
2024-10-30 14:21 ` Yazen Ghannam
2024-10-31 0:53 ` Sohil Mehta
2024-10-31 10:34 ` [PATCH] x86/cpufeature: Document cpu_feature_enabled() as the default to use Borislav Petkov
2024-10-31 18:26 ` Sohil Mehta
2024-10-31 19:15 ` Borislav Petkov
2024-11-05 19:59 ` Dave Hansen
2024-10-31 10:24 ` [PATCH 03/16] x86/amd_nb: Clean up early_is_amd_nb() Borislav Petkov
2024-10-23 17:21 ` [PATCH 04/16] x86: Start moving AMD Node functionality out of AMD_NB Yazen Ghannam
2024-10-23 17:21 ` [PATCH 05/16] x86/amd_nb: Simplify function 4 search Yazen Ghannam
2024-10-31 11:15 ` Borislav Petkov
2024-10-23 17:21 ` [PATCH 06/16] x86/amd_nb: Simplify root device search Yazen Ghannam
2024-10-31 7:52 ` Zhuo, Qiuxu
2024-10-31 10:08 ` Ilpo Järvinen
2024-10-31 13:10 ` Zhuo, Qiuxu
2024-10-31 15:34 ` Yazen Ghannam
2024-10-31 15:42 ` Ilpo Järvinen
2024-10-31 15:45 ` Yazen Ghannam
2024-10-31 11:20 ` Borislav Petkov
2024-10-31 15:29 ` Yazen Ghannam
2024-10-23 17:21 ` [PATCH 07/16] x86/amd_nb: Use topology info to get AMD node count Yazen Ghannam
2024-10-23 17:21 ` [PATCH 08/16] x86/amd_nb: Simplify function 3 search Yazen Ghannam
2024-10-23 17:21 ` [PATCH 09/16] x86/amd_nb, x86/amd_node: Simplify amd_pci_dev_to_node_id() Yazen Ghannam
2024-11-04 14:23 ` Borislav Petkov
2024-11-05 14:54 ` Yazen Ghannam
2024-10-23 17:21 ` [PATCH 10/16] x86/amd_nb: Move SMN access code to a new amd_smn driver Yazen Ghannam
2024-11-04 14:29 ` Borislav Petkov
2024-11-05 14:58 ` Yazen Ghannam
2024-11-05 19:42 ` Borislav Petkov
2024-10-23 17:21 ` [PATCH 11/16] x86/amd_smn: Fixup __amd_smn_rw() Yazen Ghannam
2024-11-04 14:32 ` Borislav Petkov
2024-11-05 14:59 ` Yazen Ghannam
2024-10-23 17:21 ` [PATCH 12/16] x86/amd_smn: Remove dependency on AMD_NB Yazen Ghannam
2024-10-23 17:21 ` [PATCH 13/16] x86/amd_smn: Use defines for register offsets Yazen Ghannam
2024-10-23 17:21 ` [PATCH 14/16] x86/amd_smn, platform/x86/amd/hsmp: Have HSMP use SMN Yazen Ghannam
2024-10-24 13:23 ` Ilpo Järvinen
2024-10-24 16:06 ` Yazen Ghannam
2024-10-25 13:39 ` Ilpo Järvinen
2024-10-23 17:21 ` [PATCH 15/16] x86/amd_smn: Add SMN offsets to exclusive region access Yazen Ghannam
2024-10-23 17:21 ` [PATCH 16/16] x86/amd_smn: Add support for debugfs access to SMN registers Yazen Ghannam
2024-11-05 19:21 ` Borislav Petkov
2024-11-05 19:46 ` Mario Limonciello
2024-11-05 19:53 ` Borislav Petkov
2024-11-05 19:56 ` Mario Limonciello
2024-11-05 19:59 ` Borislav Petkov
2024-11-05 20:53 ` Mario Limonciello
2024-10-23 17:59 ` [PATCH 00/16] AMD NB and SMN rework Bjorn Helgaas
2024-10-24 16:01 ` Yazen Ghannam
2024-10-24 17:46 ` Bjorn Helgaas
2024-10-24 20:08 ` Mario Limonciello
2024-10-24 21:06 ` Bjorn Helgaas
2024-10-24 21:20 ` Mario Limonciello
2024-10-24 21:47 ` Bjorn Helgaas [this message]
2024-10-31 16:22 ` Yazen Ghannam
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