From: Yazen Ghannam <yazen.ghannam@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
tony.luck@intel.com, x86@kernel.org
Subject: Re: [PATCH] x86/mce/amd, EDAC/mce_amd: Add new SMCA bank types
Date: Mon, 2 Mar 2026 09:22:55 -0500 [thread overview]
Message-ID: <20260302142255.GA145106@yaz-khff2.amd.com> (raw)
In-Reply-To: <20260228150447.GCaaMED_7sbC3OvDsL@fat_crate.local>
On Sat, Feb 28, 2026 at 04:04:47PM +0100, Borislav Petkov wrote:
> On Mon, Feb 02, 2026 at 05:21:58PM +0000, Yazen Ghannam wrote:
> > Recognize new SMCA bank types and include their short names for sysfs
> > and long names for decoding.
> >
> > Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
> > ---
> > arch/x86/include/asm/mce.h | 11 +++++++++++
> > arch/x86/kernel/cpu/mce/amd.c | 21 +++++++++++++++++++++
> > drivers/edac/mce_amd.c | 10 ++++++++++
> > 3 files changed, 42 insertions(+)
> >
> > diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
> > index 2d98886de09a..6e1f10ca053f 100644
> > --- a/arch/x86/include/asm/mce.h
> > +++ b/arch/x86/include/asm/mce.h
> > @@ -370,13 +370,24 @@ enum smca_bank_types {
> > SMCA_NBIO, /* Northbridge IO Unit */
> > SMCA_PCIE, /* PCI Express Unit */
> > SMCA_PCIE_V2,
> > + SMCA_MPRAS, /* MP for RAS */
> > SMCA_XGMI_PCS, /* xGMI PCS Unit */
> > + SMCA_SSBDCI, /* Die to Die Interconnect */
> > SMCA_NBIF, /* NBIF Unit */
> > SMCA_SHUB, /* System HUB Unit */
> > SMCA_SATA, /* SATA Unit */
> > SMCA_USB, /* USB Unit */
> > + SMCA_MPDACC, /* MP for Data Acceleration */
> > + SMCA_MPM, /* Microprocessor Manageability Core */
> > + SMCA_MPASP, /* AMD Secure Processor */
> > + SMCA_MPASP_V2,
> > + SMCA_MPART, /* AMD Root of Trust Microprocessor */
> > + SMCA_DACC_FE, /* Data Acceleration Front-end */
> > + SMCA_DACC_BE, /* Data Acceleration Back-end */
> > SMCA_USR_DP, /* Ultra Short Reach Data Plane Controller */
> > SMCA_USR_CP, /* Ultra Short Reach Control Plane Controller */
> > + SMCA_EDDR5CMN, /* eDDR5 CMN */
> > + SMCA_PCIE_PL, /* PCIe Link */
> > SMCA_GMI_PCS, /* GMI PCS Unit */
> > SMCA_XGMI_PHY, /* xGMI PHY Unit */
> > SMCA_WAFL_PHY, /* WAFL PHY Unit */
>
> That ordering looks rather random. Does it matter which enum number a bank
> type is? If not, let's sort them alphabetically for easier reading...
>
> In the remaining places too.
>
The ordering is based on the HWID_MCATYPE() tuple. The intent is to keep
those in numerical order for easy reference with documentation.
See: smca_hwid_mcatypes[]
Thanks,
Yazen
next prev parent reply other threads:[~2026-03-02 14:23 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-02 17:21 [PATCH] x86/mce/amd, EDAC/mce_amd: Add new SMCA bank types Yazen Ghannam
2026-02-28 15:04 ` Borislav Petkov
2026-03-02 14:22 ` Yazen Ghannam [this message]
2026-03-03 15:38 ` Borislav Petkov
2026-03-04 15:04 ` Yazen Ghannam
2026-03-04 16:39 ` Borislav Petkov
2026-03-04 18:02 ` Yazen Ghannam
2026-03-04 20:24 ` Borislav Petkov
-- strict thread matches above, loose matches on Subject: below --
2021-05-01 16:16 [PATCH] x86/MCE/AMD, " Muralidhara M K
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