Re: [PATCH] x86/mce/amd, EDAC/mce_amd: Add new SMCA bank types

Yazen Ghannam
2026-03-04T18:02:31Z

On Wed, Mar 04, 2026 at 05:39:53PM +0100, Borislav Petkov wrote:
> On Wed, Mar 04, 2026 at 10:04:02AM -0500, Yazen Ghannam wrote:
> > We can re-sort them. Still want to have them alphabetically?
>
> I'm not sure how yet - all I'm trying to say is that random order is kinda
> suboptimal when having to look at the code.
>
> Alphabetically probably sounds ok because you have 0xb0 ones, for example,
> which belong to different banks which makes me think that the hwid in
> HWID_MCATYPE(hwid, mcatype) is perhaps arbitrary and not very important.

The HWID and McaType are defined in the hardware. The name/enum is
arbitrary, and we use those for convenience.

Some of the HWID represent a group of IP, e.g. 0xb0 is (so far) used for
Core banks, 0x2e for Fabric, etc.

So far we haven't needed to use HWID on its own. Though I had a patch to
check for a "memory controller" type by HWID=0x96.

https://lore.kernel.org/all/20231118193248.1296798-6-yazen.ghannam@amd.com/

Though maybe you mean "sorting based on HWID/McaType" is not important?
I agree.

>
> And perhaps we can work better with alphabetically sorted IP names...
>
> Rite?
>
> > I can re-sort in a pre-patch before adding the new ones.
>
> Yeah, makes sense.
>

Okay, I'll work on it.

Thanks,
Yazen