From: Dinh Nguyen <dinguyen@kernel.org>
To: bp@alien8.de, tony.luck@intel.com
Cc: dinguyen@kernel.org, rounakdas2025@gmail.com,
niravkumar.l.rabara@altera.com, linux-edac@vger.kernel.org,
linux-kernel@vger.kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
devicetree@vger.kernel.org
Subject: [PATCH 1/4] dt-bindings: edac: altera: agilex5: document new edac support
Date: Mon, 20 Jul 2026 15:14:22 -0500 [thread overview]
Message-ID: <20260720201425.1538771-2-dinguyen@kernel.org> (raw)
In-Reply-To: <20260720201425.1538771-1-dinguyen@kernel.org>
The Agilex5 EDAC module supports ECC on a few additional peripherals. Along
with support for ocram, ethernet and USB, the Agilex5 EDAC adds support for
SDM QSPI, CRAM SEU and IO96B.
The Agilex5 EDAC also exposes up to 7 named interrupts on the manager
node. global_sbe and global_dbe are aggregate single/double-bit error
interrupts that fan-out through the manager's IRQ domain to the child
peripheral ECCs. The remaining named interrupts are routed directly from
dedicated controllers (IO96B memory controllers and Secure Device Manager)
to the GIC.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
.../edac/altr,socfpga-ecc-manager.yaml | 23 ++++++++++++++++++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml b/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml
index 136e8fccd429a..2ccb0f2163185 100644
--- a/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml
+++ b/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml
@@ -22,6 +22,9 @@ properties:
- items:
- const: altr,socfpga-s10-ecc-manager
- const: altr,socfpga-a10-ecc-manager
+ - items:
+ - const: altr,socfpga-agilex5-ecc-manager
+ - const: altr,socfpga-a10-ecc-manager
- const: altr,socfpga-a10-ecc-manager
- const: altr,socfpga-ecc-manager
@@ -33,7 +36,25 @@ properties:
interrupts:
minItems: 1
- maxItems: 2
+ items:
+ - description: Global single-bit error
+ - description: Global double-bit error
+ - description: IO96B0 DRAM controller error
+ - description: IO96B1 DRAM controller error
+ - description: SDM QSPI single-bit error
+ - description: SDM QSPI double-bit error
+ - description: SDM single-event
+
+ interrupt-names:
+ minItems: 1
+ items:
+ - const: global_sbe
+ - const: global_dbe
+ - const: io96b0
+ - const: io96b1
+ - const: sdm_qspi_sbe
+ - const: sdm_qspi_dbe
+ - const: sdm_seu
interrupt-controller: true
--
2.42.0.411.g813d9a9188
next prev parent reply other threads:[~2026-07-20 20:14 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-20 20:14 [PATCH 0/4] EDAC/altera: Add support for Agilex5 platform Dinh Nguyen
2026-07-20 20:14 ` Dinh Nguyen [this message]
2026-07-20 20:14 ` [PATCH 2/4] EDAC/altera: use flag to differentiate 64-bit platforms Dinh Nguyen
2026-07-20 20:14 ` [PATCH 3/4] EDAC/altera: Add support for Agilex5 ECC manager Dinh Nguyen
2026-07-20 20:14 ` [PATCH 4/4] arm64: dts: socfpga: agilex5: add support for the " Dinh Nguyen
2026-07-20 20:33 ` [PATCH 0/4] EDAC/altera: Add support for Agilex5 platform Borislav Petkov
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