Re: [PATCH v4] x86/mce: Reset stale per-bank state between bank scans

[Yazen Ghannam <yazen.ghannam@amd.com>]

On Wed, Oct 14, 2026 at 01:01:39PM +0000, Eirik Bøe wrote:
> From: Eirik Bøe <git@optocloud.no>
> 
> machine_check_poll() and __mc_scan_banks() reuse a single
> struct mce_hw_err across the whole bank scan. The record is zeroed
> once before the loop; each iteration then resets only MISC and ADDR.
> Four more fields are written conditionally inside the loop and never
> cleared again, so a later bank inherits them.
> 
> On SMCA, mce_read_aux() writes SYND and synd1/synd2 only when
> MCI_STATUS_SYNDV is set, so a bank without SYNDV is printed with the
> syndromes of an earlier bank in the same scan. Decoders are expected
> to ignore them when SYNDV is clear, so the stale values are cosmetic.
> 
> A stale m->kflags has two effects on a later bank:
> 
>   - smca_should_log_poll_error() sets MCE_CHECK_DFR_REGS when an
>     error was taken from MCA_DESTAT. A later bank with ADDRV then
>     reads MCx_DEADDR instead of MCA_ADDR, and amd_clear_bank()
>     returns before clearing MCA_STATUS, so that bank is logged a
>     second time.
> 
>   - mce_default_notifier() prints only when m->kflags is empty, so
>     unless print_all is set, a bank that inherits the bit is not
>     printed by the notifier chain.
> 
> Factor the per-bank clearing into mce_clear_hw_err_fields() and call
> it from both loops. Reset the vendor union as a whole so later
> additions are covered.
> 
> Found by code inspection; not reproduced on hardware.
> 
> Fixes: db819d60f672 ("x86/mce: Add support for new MCA_SYND register")
> Fixes: d4fca1358ea9 ("x86/MCE/AMD: Add support for new MCA_SYND{1,2} registers")
> Fixes: 7cb735d7c0cb ("x86/mce: Unify AMD DFR handler with MCA Polling")
> Suggested-by: Yazen Ghannam <yazen.ghannam@amd.com>
> Signed-off-by: Eirik Bøe <git@optocloud.no>
> ---
> 

Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com>

Thanks,
Yazen