From: Dan Williams <dan.j.williams@intel.com>
To: Jane Chu <jane.chu@oracle.com>,
Dan Williams <dan.j.williams@intel.com>,
"tony.luck@intel.com" <tony.luck@intel.com>,
"bp@alien8.de" <bp@alien8.de>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"mingo@redhat.com" <mingo@redhat.com>,
"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
"x86@kernel.org" <x86@kernel.org>,
"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"hch@lst.de" <hch@lst.de>,
"nvdimm@lists.linux.dev" <nvdimm@lists.linux.dev>
Subject: Re: [PATCH v5] x86/mce: retrieve poison range from hardware
Date: Mon, 1 Aug 2022 14:20:39 -0700 [thread overview]
Message-ID: <62e843a6ecf08_304402944b@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <e3234907-df27-f0d4-ef63-ee1ec9808f54@oracle.com>
Jane Chu wrote:
> On 8/1/2022 9:44 AM, Dan Williams wrote:
> > Jane Chu wrote:
> >> With Commit 7917f9cdb503 ("acpi/nfit: rely on mce->misc to determine
> >> poison granularity") that changed nfit_handle_mce() callback to report
> >> badrange according to 1ULL << MCI_MISC_ADDR_LSB(mce->misc), it's been
> >> discovered that the mce->misc LSB field is 0x1000 bytes, hence injecting
> >> 2 back-to-back poisons and the driver ends up logging 8 badblocks,
> >> because 0x1000 bytes is 8 512-byte.
> >>
> >> Dan Williams noticed that apei_mce_report_mem_error() hardcode
> >> the LSB field to PAGE_SHIFT instead of consulting the input
> >> struct cper_sec_mem_err record. So change to rely on hardware whenever
> >> support is available.
> >>
> >> Link: https://lore.kernel.org/r/7ed50fd8-521e-cade-77b1-738b8bfb8502@oracle.com
> >>
> >> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
> >> Signed-off-by: Jane Chu <jane.chu@oracle.com>
> >> ---
> >> arch/x86/kernel/cpu/mce/apei.c | 14 +++++++++++++-
> >> 1 file changed, 13 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/arch/x86/kernel/cpu/mce/apei.c b/arch/x86/kernel/cpu/mce/apei.c
> >> index 717192915f28..2c7ea0ba9dd7 100644
> >> --- a/arch/x86/kernel/cpu/mce/apei.c
> >> +++ b/arch/x86/kernel/cpu/mce/apei.c
> >> @@ -29,15 +29,27 @@
> >> void apei_mce_report_mem_error(int severity, struct cper_sec_mem_err *mem_err)
> >> {
> >> struct mce m;
> >> + int lsb = PAGE_SHIFT;
> >>
> >> if (!(mem_err->validation_bits & CPER_MEM_VALID_PA))
> >> return;
> >>
> >> + /*
> >> + * Even if the ->validation_bits are set for address mask,
> >> + * to be extra safe, check and reject an error radius '0',
> >> + * and fallback to the default page size.
> >> + */
> >> + if (mem_err->validation_bits & CPER_MEM_VALID_PA_MASK) {
> >> + lsb = __ffs64(mem_err->physical_addr_mask);
> >> + if (lsb == 1)
> >
> > This was the reason I recommended hweight64 and min_not_zero() as
> > hweight64 does not have the undefined behavior. However, an even better
> > option is to just do:
> >
> > find_first_bit(&mem_err->physical_addr_mask, PAGE_SHIFT)
> >
> > ...as that trims the result to the PAGE_SHIFT max and handles the zero
> > case.
>
> Thanks Dan! However it looks like find_first_bit() could call into
> __ffs(x) which has the same limitation as __ffs64(x), as Tony pointed out.
Not quite, no. __ffs() behavior is *undefined* if the input is zero.
find_first_bit() is *defined* and returns @size is the input is zero.
Which is the behavior this wants to default to PAGE_SHIFT in the absence
of any smaller granularity information.
next prev parent reply other threads:[~2022-08-01 21:20 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-30 6:17 [PATCH v5] x86/mce: retrieve poison range from hardware Jane Chu
2022-08-01 15:58 ` Luck, Tony
2022-08-01 20:31 ` Jane Chu
2022-08-01 16:44 ` Dan Williams
2022-08-01 20:34 ` Jane Chu
2022-08-01 21:20 ` Dan Williams [this message]
2022-08-01 22:01 ` Jane Chu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=62e843a6ecf08_304402944b@dwillia2-xfh.jf.intel.com.notmuch \
--to=dan.j.williams@intel.com \
--cc=bp@alien8.de \
--cc=dave.hansen@linux.intel.com \
--cc=hch@lst.de \
--cc=jane.chu@oracle.com \
--cc=linux-edac@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=nvdimm@lists.linux.dev \
--cc=tglx@linutronix.de \
--cc=tony.luck@intel.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox