* [PATCH] edac: say "TILEGx" not "TILEPro" for the tilegx edac driver
From: Chris Metcalf @ 2012-03-30 22:58 UTC (permalink / raw)
To: linux-kernel, bluesmoke-devel
This is just an aesthetic change but it was silly to say TILEPro
when booting up on the tilegx architecture.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
---
drivers/edac/tile_edac.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/drivers/edac/tile_edac.c b/drivers/edac/tile_edac.c
index 1d5cf06..e99d009 100644
--- a/drivers/edac/tile_edac.c
+++ b/drivers/edac/tile_edac.c
@@ -145,7 +145,11 @@ static int __devinit tile_edac_mc_probe(struct platform_device *pdev)
mci->edac_ctl_cap = EDAC_FLAG_SECDED;
mci->mod_name = DRV_NAME;
+#ifdef __tilegx__
+ mci->ctl_name = "TILEGx_Memory_Controller";
+#else
mci->ctl_name = "TILEPro_Memory_Controller";
+#endif
mci->dev_name = dev_name(&pdev->dev);
mci->edac_check = tile_edac_check;
--
1.6.5.2
^ permalink raw reply related
* Re: [PATCH] [trivial] edac: Fix document URLs
From: Mauro Carvalho Chehab @ 2012-03-28 16:13 UTC (permalink / raw)
To: Masanari Iida
Cc: bluesmoke-devel, linux-edac, trivial, linux-kernel, Doug Thompson
In-Reply-To: <1332944196-18524-1-git-send-email-standby24x7@gmail.com>
Em 28-03-2012 11:16, Masanari Iida escreveu:
> URLs for Memory controller's datasheet are "page not found".
> Fix them to correct URLs.
I remember I validated a few of those links in the patchset that
is fixing the EDAC core.
I'll apply this one on my tree, of course for the hunks that don't
conflict with the ones I've already fixed.
Thanks,
Mauro.
>
> Signed-off-by: Masanari Iida <standby24x7@gmail.com>
>
> Cc: Doug Thompson <dougthompson@xmission.com>
> Cc: Mauro Carvalho Chehab <mchehab@redhat.com>
> ---
> drivers/edac/i5000_edac.c | 2 +-
> drivers/edac/i5100_edac.c | 2 +-
> drivers/edac/i5400_edac.c | 2 +-
> drivers/edac/i7300_edac.c | 2 +-
> 4 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c
> index a2680d8..9656802 100644
> --- a/drivers/edac/i5000_edac.c
> +++ b/drivers/edac/i5000_edac.c
> @@ -10,7 +10,7 @@
> * This module is based on the following document:
> *
> * Intel 5000X Chipset Memory Controller Hub (MCH) - Datasheet
> - * http://developer.intel.com/design/chipsets/datashts/313070.htm
> + * http://www.intel.com/content/dam/doc/datasheet/5000x-chipset-memory-controller-hub-datasheet.pdf
> *
> */
>
> diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c
> index 2e23547..13b0c2f 100644
> --- a/drivers/edac/i5100_edac.c
> +++ b/drivers/edac/i5100_edac.c
> @@ -7,7 +7,7 @@
> * This module is based on the following document:
> *
> * Intel 5100X Chipset Memory Controller Hub (MCH) - Datasheet
> - * http://download.intel.com/design/chipsets/datashts/318378.pdf
> + * http://www.intel.com/content/dam/doc/datasheet/5100-memory-controller-hub-chipset-datasheet.pdf
> *
> * The intel 5100 has two independent channels. EDAC core currently
> * can not reflect this configuration so instead the chip-select
> diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c
> index 67ec962..41560c1 100644
> --- a/drivers/edac/i5400_edac.c
> +++ b/drivers/edac/i5400_edac.c
> @@ -16,7 +16,7 @@
> * This module is based on the following document:
> *
> * Intel 5400 Chipset Memory Controller Hub (MCH) - Datasheet
> - * http://developer.intel.com/design/chipsets/datashts/313070.htm
> + * http://www.intel.com/content/dam/doc/datasheet/5400-chipset-memory-controller-hub-datasheet.pdf
> *
> */
>
> diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c
> index 3bafa3b..48ffe3b 100644
> --- a/drivers/edac/i7300_edac.c
> +++ b/drivers/edac/i7300_edac.c
> @@ -10,7 +10,7 @@
> * Red Hat Inc. http://www.redhat.com
> *
> * Intel 7300 Chipset Memory Controller Hub (MCH) - Datasheet
> - * http://www.intel.com/Assets/PDF/datasheet/318082.pdf
> + * http://www.intel.com/content/dam/doc/datasheet/7300-chipset-memory-controller-hub-datasheet.pdf
> *
> * TODO: The chipset allow checking for PCI Express errors also. Currently,
> * the driver covers only memory error errors
^ permalink raw reply
* [PATCH] [trivial] edac: Fix document URLs
From: Masanari Iida @ 2012-03-28 14:16 UTC (permalink / raw)
To: bluesmoke-devel, linux-edac
Cc: trivial, linux-kernel, Masanari Iida, Doug Thompson,
Mauro Carvalho Chehab
URLs for Memory controller's datasheet are "page not found".
Fix them to correct URLs.
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Cc: Doug Thompson <dougthompson@xmission.com>
Cc: Mauro Carvalho Chehab <mchehab@redhat.com>
---
drivers/edac/i5000_edac.c | 2 +-
drivers/edac/i5100_edac.c | 2 +-
drivers/edac/i5400_edac.c | 2 +-
drivers/edac/i7300_edac.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c
index a2680d8..9656802 100644
--- a/drivers/edac/i5000_edac.c
+++ b/drivers/edac/i5000_edac.c
@@ -10,7 +10,7 @@
* This module is based on the following document:
*
* Intel 5000X Chipset Memory Controller Hub (MCH) - Datasheet
- * http://developer.intel.com/design/chipsets/datashts/313070.htm
+ * http://www.intel.com/content/dam/doc/datasheet/5000x-chipset-memory-controller-hub-datasheet.pdf
*
*/
diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c
index 2e23547..13b0c2f 100644
--- a/drivers/edac/i5100_edac.c
+++ b/drivers/edac/i5100_edac.c
@@ -7,7 +7,7 @@
* This module is based on the following document:
*
* Intel 5100X Chipset Memory Controller Hub (MCH) - Datasheet
- * http://download.intel.com/design/chipsets/datashts/318378.pdf
+ * http://www.intel.com/content/dam/doc/datasheet/5100-memory-controller-hub-chipset-datasheet.pdf
*
* The intel 5100 has two independent channels. EDAC core currently
* can not reflect this configuration so instead the chip-select
diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c
index 67ec962..41560c1 100644
--- a/drivers/edac/i5400_edac.c
+++ b/drivers/edac/i5400_edac.c
@@ -16,7 +16,7 @@
* This module is based on the following document:
*
* Intel 5400 Chipset Memory Controller Hub (MCH) - Datasheet
- * http://developer.intel.com/design/chipsets/datashts/313070.htm
+ * http://www.intel.com/content/dam/doc/datasheet/5400-chipset-memory-controller-hub-datasheet.pdf
*
*/
diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c
index 3bafa3b..48ffe3b 100644
--- a/drivers/edac/i7300_edac.c
+++ b/drivers/edac/i7300_edac.c
@@ -10,7 +10,7 @@
* Red Hat Inc. http://www.redhat.com
*
* Intel 7300 Chipset Memory Controller Hub (MCH) - Datasheet
- * http://www.intel.com/Assets/PDF/datasheet/318082.pdf
+ * http://www.intel.com/content/dam/doc/datasheet/7300-chipset-memory-controller-hub-datasheet.pdf
*
* TODO: The chipset allow checking for PCI Express errors also. Currently,
* the driver covers only memory error errors
--
1.7.10.rc2.19.gfae9d
^ permalink raw reply related
* [PATCH 13/60] edac: remove the second argument of k[un]map_atomic()
From: Cong Wang @ 2012-02-10 5:39 UTC (permalink / raw)
To: linux-kernel; +Cc: Andrew Morton, Cong Wang, Doug Thompson, bluesmoke-devel
In-Reply-To: <1328852421-19678-1-git-send-email-amwang@redhat.com>
Signed-off-by: Cong Wang <amwang@redhat.com>
---
drivers/edac/edac_mc.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c
index ca6c04d..da09cd7 100644
--- a/drivers/edac/edac_mc.c
+++ b/drivers/edac/edac_mc.c
@@ -620,13 +620,13 @@ static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
if (PageHighMem(pg))
local_irq_save(flags);
- virt_addr = kmap_atomic(pg, KM_BOUNCE_READ);
+ virt_addr = kmap_atomic(pg);
/* Perform architecture specific atomic scrub operation */
atomic_scrub(virt_addr + offset, size);
/* Unmap and complete */
- kunmap_atomic(virt_addr, KM_BOUNCE_READ);
+ kunmap_atomic(virt_addr);
if (PageHighMem(pg))
local_irq_restore(flags);
--
1.7.7.6
^ permalink raw reply related
* [PATCH] ARM: add EDAC atomic_scrub function
From: Rob Herring @ 2011-12-02 14:08 UTC (permalink / raw)
To: linux-arm-kernel, bluesmoke-devel; +Cc: Rob Herring
From: Rob Herring <rob.herring@calxeda.com>
Add support for architecture specific EDAC atomic_scrub to ARM. Only ARMv6+
is implemented as ldrex/strex instructions are needed. Supporting EDAC on
ARMv5 or earlier is unlikely at this point anyway.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/include/asm/edac.h | 48 +++++++++++++++++++++++++++++++++++++++++++
1 files changed, 48 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/edac.h
diff --git a/arch/arm/include/asm/edac.h b/arch/arm/include/asm/edac.h
new file mode 100644
index 0000000..0df7a2c
--- /dev/null
+++ b/arch/arm/include/asm/edac.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2011 Calxeda, Inc.
+ * Based on PPC version Copyright 2007 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef ASM_EDAC_H
+#define ASM_EDAC_H
+/*
+ * ECC atomic, DMA, SMP and interrupt safe scrub function.
+ * Implements the per arch atomic_scrub() that EDAC use for software
+ * ECC scrubbing. It reads memory and then writes back the original
+ * value, allowing the hardware to detect and correct memory errors.
+ */
+static inline void atomic_scrub(void *va, u32 size)
+{
+#if __LINUX_ARM_ARCH__ >= 6
+ unsigned int *virt_addr = va;
+ unsigned int temp, temp2;
+ unsigned int i;
+
+ for (i = 0; i < size / sizeof(*virt_addr); i++, virt_addr++) {
+ /* Very carefully read and write to memory atomically
+ * so we are interrupt, DMA and SMP safe.
+ */
+ __asm__ __volatile__("\n"
+ "1: ldrex %0, [%2]\n"
+ " strex %1, %0, [%2]\n"
+ " teq %1, #0\n"
+ " bne 1b\n"
+ : "=&r"(temp), "=&r"(temp2)
+ : "r"(virt_addr)
+ : "cc");
+ }
+#endif
+}
+
+#endif
--
1.7.5.4
^ permalink raw reply related
* [PATCH 13/62] edac: remove the second argument of k[un]map_atomic()
From: Cong Wang @ 2011-11-27 5:26 UTC (permalink / raw)
To: linux-kernel; +Cc: akpm, Cong Wang, Doug Thompson, bluesmoke-devel
In-Reply-To: <1322371662-26166-1-git-send-email-amwang@redhat.com>
Signed-off-by: Cong Wang <amwang@redhat.com>
---
drivers/edac/edac_mc.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c
index d69144a..08dff48 100644
--- a/drivers/edac/edac_mc.c
+++ b/drivers/edac/edac_mc.c
@@ -621,13 +621,13 @@ static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
if (PageHighMem(pg))
local_irq_save(flags);
- virt_addr = kmap_atomic(pg, KM_BOUNCE_READ);
+ virt_addr = kmap_atomic(pg);
/* Perform architecture specific atomic scrub operation */
atomic_scrub(virt_addr + offset, size);
/* Unmap and complete */
- kunmap_atomic(virt_addr, KM_BOUNCE_READ);
+ kunmap_atomic(virt_addr);
if (PageHighMem(pg))
local_irq_restore(flags);
--
1.7.4.4
^ permalink raw reply related
* Re: linux-next: Tree for Oct 25 (sb_edac.c)
From: Randy Dunlap @ 2011-10-26 18:47 UTC (permalink / raw)
To: Stephen Rothwell
Cc: linux-next, LKML, Linus, bluesmoke-devel, Mauro Carvalho Chehab
In-Reply-To: <20111025203628.40a1b8a475e32053aa34dabe@canb.auug.org.au>
On 10/25/11 02:36, Stephen Rothwell wrote:
> Hi all,
sb_edac.c:(.text.unlikely+0x8370): undefined reference to `x86_mce_decoder_chain'
sb_edac.c:(.text.unlikely+0x87aa): undefined reference to `x86_mce_decoder_chain'
when CONFIG_X86_MCE is not enabled.
--
~Randy
*** Remember to use Documentation/SubmitChecklist when testing your code ***
^ permalink raw reply
* The closing of the bluesmoke email list via sourceforge
From: Doug Thompson @ 2011-06-21 23:29 UTC (permalink / raw)
To: bluesmoke
[-- Attachment #1.1: Type: text/plain, Size: 521 bytes --]
After all this time, I am finally shutdown the bluesmoke mailing list via sourceforge.
For some time we have had a kernel level email list: linux-edac@vger.kernel.org
so if you which to read and/or submit information on EDAC now, utilize that new email list address.
This bluesmoke list will shortly be stopped. I know get a huge amount of spam on this old address
thanks
doug thompson
(Yes, I am alive and less busy now trying to generate a living. I think I can get back into my
EDAC support role)
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_______________________________________________
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bluesmoke-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/bluesmoke-devel
^ permalink raw reply
* Re: Interpreting EDAC errors
From: Borislav Petkov @ 2011-06-20 10:15 UTC (permalink / raw)
To: Kevin Bowling; +Cc: bluesmoke-devel
In-Reply-To: <BANLkTimvzEFi0cBFU_Zc-H2eKFXc_gV9_g@mail.gmail.com>
On Mon, Jun 20, 2011 at 04:31:43AM -0400, Kevin Bowling wrote:
> > * you have one singe-bit error which got corrected by the memory
> > controller on 4 DIMMs and over the current system uptime so I wouldn't
> > worry too much. I would monitor the DIMMs though and take action only if
> > those error rates start to grow over time.
>
> The system is readily throwing these single-bit errors every 1-2 days
> across reboots.
>
> This machine has an identical twin at the same site that is not
> exhibiting this problem and is even running a bit hotter internally.
> The RAM for these machines came in a large tray so I would guess they
> are the same batch.
>
> I've run EDAC on many systems and never seen one this chatty. I
> recall reading literature in the past that DRAM errors should be a bit
> more rare than this. I'm suspecting the motherboard since it's across
> so many DIMMs. It does scare me to say the least as this box will be
> part of a mission critical system.
A very simple test would be to take out the DIMMs and stick them in the
identical twin. I have the funny feeling that this might not be that
easy, logistically :).
> > You have 4 8G DIMMs per node but I don't know they rank
> > count so please take the below with a grain of salt. Wait,
> > http://www.alldatasheet.com/datasheet-pdf/pdf/332888/HYNIX/HMT31GR7BFR4C-H9.html
> > says that yours are actually dual-ranked.
>
> Looking at the dmesg output, I agree; dual-ranked.
>
> > Btw, kernel dmesg output of EDAC should help to pinpoint them better.
>
> [ 9.086759] EDAC MC: Ver: 2.1.0 Apr 11 2011
> [ 9.100467] EDAC amd64_edac: v3.3.0
> [ 9.100576] EDAC amd64: DRAM ECC enabled.
> [ 9.100587] EDAC amd64: F10h detected (node 0).
> [ 9.100607] EDAC MC: DCT0 chip selects:
> [ 9.100608] EDAC amd64: MC: 0: 0MB 1: 0MB
> [ 9.100610] EDAC amd64: MC: 2: 4096MB 3: 4096MB
> [ 9.100612] EDAC amd64: MC: 4: 0MB 5: 0MB
> [ 9.100614] EDAC amd64: MC: 6: 0MB 7: 0MB
> [ 9.100615] EDAC MC: DCT1 chip selects:
> [ 9.100616] EDAC amd64: MC: 0: 0MB 1: 0MB
> [ 9.100618] EDAC amd64: MC: 2: 4096MB 3: 4096MB
> [ 9.100619] EDAC amd64: MC: 4: 0MB 5: 0MB
> [ 9.100621] EDAC amd64: MC: 6: 0MB 7: 0MB
> [ 9.100622] EDAC amd64: using x8 syndromes.
> [ 9.100624] EDAC amd64: MCT channel count: 2
> [ 9.100649] EDAC amd64: CS2: Registered DDR3 RAM
> [ 9.100651] EDAC amd64: CS3: Registered DDR3 RAM
> [ 9.100671] EDAC MC0: Giving out device to 'amd64_edac' 'F10h': DEV
> 0000:00:18.2
> [ 9.100778] EDAC amd64: DRAM ECC enabled.
> [ 9.100820] EDAC amd64: F10h detected (node 1).
> [ 9.100853] EDAC MC: DCT0 chip selects:
> [ 9.100855] EDAC amd64: MC: 0: 0MB 1: 0MB
> [ 9.100857] EDAC amd64: MC: 2: 4096MB 3: 4096MB
> [ 9.100859] EDAC amd64: MC: 4: 0MB 5: 0MB
> [ 9.100860] EDAC amd64: MC: 6: 0MB 7: 0MB
> [ 9.100862] EDAC MC: DCT1 chip selects:
> [ 9.100863] EDAC amd64: MC: 0: 0MB 1: 0MB
> [ 9.100865] EDAC amd64: MC: 2: 4096MB 3: 4096MB
> [ 9.100866] EDAC amd64: MC: 4: 0MB 5: 0MB
> [ 9.100868] EDAC amd64: MC: 6: 0MB 7: 0MB
> [ 9.100869] EDAC amd64: using x8 syndromes.
> [ 9.100871] EDAC amd64: MCT channel count: 2
> [ 9.100903] EDAC amd64: CS2: Registered DDR3 RAM
> [ 9.100905] EDAC amd64: CS3: Registered DDR3 RAM
> [ 9.100932] EDAC MC1: Giving out device to 'amd64_edac' 'F10h': DEV
> 0000:00:19.2
> [ 9.101050] EDAC amd64: DRAM ECC enabled.
> [ 9.101091] EDAC amd64: F10h detected (node 2).
> [ 9.101125] EDAC MC: DCT0 chip selects:
> [ 9.101127] EDAC amd64: MC: 0: 0MB 1: 0MB
> [ 9.101129] EDAC amd64: MC: 2: 4096MB 3: 4096MB
> [ 9.101131] EDAC amd64: MC: 4: 0MB 5: 0MB
> [ 9.101132] EDAC amd64: MC: 6: 0MB 7: 0MB
> [ 9.101134] EDAC MC: DCT1 chip selects:
> [ 9.101135] EDAC amd64: MC: 0: 0MB 1: 0MB
> [ 9.101137] EDAC amd64: MC: 2: 4096MB 3: 4096MB
> [ 9.101138] EDAC amd64: MC: 4: 0MB 5: 0MB
> [ 9.101140] EDAC amd64: MC: 6: 0MB 7: 0MB
> [ 9.101141] EDAC amd64: using x8 syndromes.
> [ 9.101143] EDAC amd64: MCT channel count: 2
> [ 9.101180] EDAC amd64: CS2: Registered DDR3 RAM
> [ 9.101182] EDAC amd64: CS3: Registered DDR3 RAM
> [ 9.101221] EDAC MC2: Giving out device to 'amd64_edac' 'F10h': DEV
> 0000:00:1a.2
> [ 9.101337] EDAC amd64: DRAM ECC enabled.
> [ 9.101383] EDAC amd64: F10h detected (node 3).
> [ 9.101424] EDAC MC: DCT0 chip selects:
> [ 9.101426] EDAC amd64: MC: 0: 0MB 1: 0MB
> [ 9.101428] EDAC amd64: MC: 2: 4096MB 3: 4096MB
> [ 9.101430] EDAC amd64: MC: 4: 0MB 5: 0MB
> [ 9.101431] EDAC amd64: MC: 6: 0MB 7: 0MB
> [ 9.101433] EDAC MC: DCT1 chip selects:
> [ 9.101434] EDAC amd64: MC: 0: 0MB 1: 0MB
> [ 9.101436] EDAC amd64: MC: 2: 4096MB 3: 4096MB
> [ 9.101437] EDAC amd64: MC: 4: 0MB 5: 0MB
> [ 9.101439] EDAC amd64: MC: 6: 0MB 7: 0MB
> [ 9.101440] EDAC amd64: using x8 syndromes.
> [ 9.101442] EDAC amd64: MCT channel count: 2
> [ 9.101495] EDAC amd64: CS2: Registered DDR3 RAM
> [ 9.101497] EDAC amd64: CS3: Registered DDR3 RAM
> [ 9.101533] EDAC MC3: Giving out device to 'amd64_edac' 'F10h': DEV
> 0000:00:1b.2
> [ 9.101622] EDAC PCI0: Giving out device to module 'amd64_edac'
> controller 'EDAC PCI controller': DEV '0000:00:18.2' (POLLED)
>
> [282601.860098] [Hardware Error]:
> MC4_STATUS[Over|CE|MiscV|-|AddrV|CECC]: 0xdc7f400097080813
> [282601.863567] [Hardware Error]: Northbridge Error (node 1): DRAM ECC
> error detected on the NB.
> [282601.867178] EDAC amd64 MC1: CE ERROR_ADDRESS= 0x81fc93d00
> [282601.869445] EDAC MC1: CE page 0x81fc93, offset 0xd00, grain 0,
> syndrome 0x97fe, row 2, channel 0, label "": amd64_edac
> [282601.869452] [Hardware Error]: cache level: L3/GEN, mem/io: MEM,
> mem-tx: RD, part-proc: SRC (no timeout)
right, socket 0, internal node 1, first DIMM, looks probably P1_DIMM3A
> [282601.873529] Disabling lock debugging due to kernel taint
> [282601.873535] [Hardware Error]: Machine check events logged
> [321603.500128] [Hardware Error]: MC4_STATUS[-|CE|MiscV|-|AddrV|CECC]:
> 0x9c00c10004080a13
> [321603.503484] [Hardware Error]: Northbridge Error (node 2): DRAM ECC
> error detected on the NB.
> [321603.507096] EDAC amd64 MC2: CE ERROR_ADDRESS= 0x85a8eec40
> [321603.509362] EDAC MC2: CE page 0x85a8ee, offset 0xc40, grain 0,
> syndrome 0x401, row 3, channel 1, label "": amd64_edac
> [321603.509369] [Hardware Error]: cache level: L3/GEN, mem/io: MEM,
> mem-tx: RD, part-proc: RES (no timeout)
socket 1 (second socket), internal node 0, second DIMM, probably P2_DIMM2A.
> [321603.513450] [Hardware Error]: Machine check events logged
> [402125.606309] audit_printk_skb: 36 callbacks suppressed
> [402125.606318] type=1400 audit(1308314274.325:23): apparmor="STATUS"
> operation="profile_replace" name="/usr/sbin/libvirtd" pid=14994
> comm="apparmor_parser"
> [402125.644372] type=1400 audit(1308314274.365:24): apparmor="STATUS"
> operation="profile_replace" name="/usr/lib/libvirt/virt-aa-helper"
> pid=14996 comm="apparmor_parser"
> [492000.040077] [Hardware Error]:
> MC4_STATUS[Over|CE|MiscV|-|AddrV|CECC]: 0xdc7840001e080a13
> [492000.043538] [Hardware Error]: Northbridge Error (node 0): DRAM ECC
> error detected on the NB.
> [492000.047150] EDAC amd64 MC0: CE ERROR_ADDRESS= 0x3fcec0040
> [492000.049415] EDAC MC0: CE page 0x3fcec0, offset 0x40, grain 0,
> syndrome 0x1ef0, row 3, channel 0, label "": amd64_edac
> [492000.049422] [Hardware Error]: cache level: L3/GEN, mem/io: MEM,
> mem-tx: RD, part-proc: RES (no timeout)
socket 0, internal node 0, first DIMM, probably P1_DIMM1A
> [492000.053499] [Hardware Error]: Machine check events logged
> [547053.500095] [Hardware Error]:
> MC4_STATUS[Over|CE|MiscV|-|AddrV|CECC]: 0xdc41c10077080a13
> [547053.503561] [Hardware Error]: Northbridge Error (node 2): DRAM ECC
> error detected on the NB.
> [547053.507172] EDAC amd64 MC2: CE ERROR_ADDRESS= 0xbff5c9600
> [547053.581042] EDAC MC2: CE page 0xbff5c9, offset 0x600, grain 0,
> syndrome 0x7783, row 3, channel 0, label "": amd64_edac
> [547053.581049] [Hardware Error]: cache level: L3/GEN, mem/io: MEM,
> mem-tx: RD, part-proc: RES (no timeout)
> [547053.730417] [Hardware Error]: Machine check events logged
socket 1, internal node 0, first DIMM, P2_DIMM1A maybe
Again, please digest with a grain of salt.
I'll add more helpful printks to the driver as an interim solution -
something similar to the decodings above - before we start dumping the
silkscreen labels straightaway.
HTH.
--
Regards/Gruss,
Boris.
Advanced Micro Devices GmbH
Einsteinring 24, 85609 Dornach
GM: Alberto Bozzo
Reg: Dornach, Landkreis Muenchen
HRB Nr. 43632 WEEE Registernr: 129 19551
------------------------------------------------------------------------------
EditLive Enterprise is the world's most technically advanced content
authoring tool. Experience the power of Track Changes, Inline Image
Editing and ensure content is compliant with Accessibility Checking.
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^ permalink raw reply
* Re: Interpreting EDAC errors
From: Kevin Bowling @ 2011-06-20 8:31 UTC (permalink / raw)
To: Borislav Petkov; +Cc: bluesmoke-devel@lists.sourceforge.net
In-Reply-To: <20110620073422.GB9070@aftab>
On Mon, Jun 20, 2011 at 12:34 AM, Borislav Petkov <bp@amd64.org> wrote:
> Hi,
>
> On Mon, Jun 20, 2011 at 12:57:26AM -0400, Kevin Bowling wrote:
>> Hello,
>>
>> I've been seeing the following errors from the EDAC system. I'm not
>> quite sure how to associate the output from edac-util to physical
>> DIMMs. How do we account for multi-rank DIMMs, interleaving, NUMA,
>> etc?
>
> Judging by the mainboard, this is a dual socket Magny-Cours. A couple of
> things:
Correct.
> * interpreting DRAM ECC errors is still suboptimal and we're working on
> it, I'll try to come up with an interim solution to make the decoded
> error info a bit more understandable.
Ok, glad the confusion wasn't solely my own ignorance :p
> * you have one singe-bit error which got corrected by the memory
> controller on 4 DIMMs and over the current system uptime so I wouldn't
> worry too much. I would monitor the DIMMs though and take action only if
> those error rates start to grow over time.
The system is readily throwing these single-bit errors every 1-2 days
across reboots.
This machine has an identical twin at the same site that is not
exhibiting this problem and is even running a bit hotter internally.
The RAM for these machines came in a large tray so I would guess they
are the same batch.
I've run EDAC on many systems and never seen one this chatty. I
recall reading literature in the past that DRAM errors should be a bit
more rare than this. I'm suspecting the motherboard since it's across
so many DIMMs. It does scare me to say the least as this box will be
part of a mission critical system.
> You have 4 8G DIMMs per node but I don't know they rank
> count so please take the below with a grain of salt. Wait,
> http://www.alldatasheet.com/datasheet-pdf/pdf/332888/HYNIX/HMT31GR7BFR4C-H9.html
> says that yours are actually dual-ranked.
Looking at the dmesg output, I agree; dual-ranked.
> Btw, kernel dmesg output of EDAC should help to pinpoint them better.
[ 9.086759] EDAC MC: Ver: 2.1.0 Apr 11 2011
[ 9.100467] EDAC amd64_edac: v3.3.0
[ 9.100576] EDAC amd64: DRAM ECC enabled.
[ 9.100587] EDAC amd64: F10h detected (node 0).
[ 9.100607] EDAC MC: DCT0 chip selects:
[ 9.100608] EDAC amd64: MC: 0: 0MB 1: 0MB
[ 9.100610] EDAC amd64: MC: 2: 4096MB 3: 4096MB
[ 9.100612] EDAC amd64: MC: 4: 0MB 5: 0MB
[ 9.100614] EDAC amd64: MC: 6: 0MB 7: 0MB
[ 9.100615] EDAC MC: DCT1 chip selects:
[ 9.100616] EDAC amd64: MC: 0: 0MB 1: 0MB
[ 9.100618] EDAC amd64: MC: 2: 4096MB 3: 4096MB
[ 9.100619] EDAC amd64: MC: 4: 0MB 5: 0MB
[ 9.100621] EDAC amd64: MC: 6: 0MB 7: 0MB
[ 9.100622] EDAC amd64: using x8 syndromes.
[ 9.100624] EDAC amd64: MCT channel count: 2
[ 9.100649] EDAC amd64: CS2: Registered DDR3 RAM
[ 9.100651] EDAC amd64: CS3: Registered DDR3 RAM
[ 9.100671] EDAC MC0: Giving out device to 'amd64_edac' 'F10h': DEV
0000:00:18.2
[ 9.100778] EDAC amd64: DRAM ECC enabled.
[ 9.100820] EDAC amd64: F10h detected (node 1).
[ 9.100853] EDAC MC: DCT0 chip selects:
[ 9.100855] EDAC amd64: MC: 0: 0MB 1: 0MB
[ 9.100857] EDAC amd64: MC: 2: 4096MB 3: 4096MB
[ 9.100859] EDAC amd64: MC: 4: 0MB 5: 0MB
[ 9.100860] EDAC amd64: MC: 6: 0MB 7: 0MB
[ 9.100862] EDAC MC: DCT1 chip selects:
[ 9.100863] EDAC amd64: MC: 0: 0MB 1: 0MB
[ 9.100865] EDAC amd64: MC: 2: 4096MB 3: 4096MB
[ 9.100866] EDAC amd64: MC: 4: 0MB 5: 0MB
[ 9.100868] EDAC amd64: MC: 6: 0MB 7: 0MB
[ 9.100869] EDAC amd64: using x8 syndromes.
[ 9.100871] EDAC amd64: MCT channel count: 2
[ 9.100903] EDAC amd64: CS2: Registered DDR3 RAM
[ 9.100905] EDAC amd64: CS3: Registered DDR3 RAM
[ 9.100932] EDAC MC1: Giving out device to 'amd64_edac' 'F10h': DEV
0000:00:19.2
[ 9.101050] EDAC amd64: DRAM ECC enabled.
[ 9.101091] EDAC amd64: F10h detected (node 2).
[ 9.101125] EDAC MC: DCT0 chip selects:
[ 9.101127] EDAC amd64: MC: 0: 0MB 1: 0MB
[ 9.101129] EDAC amd64: MC: 2: 4096MB 3: 4096MB
[ 9.101131] EDAC amd64: MC: 4: 0MB 5: 0MB
[ 9.101132] EDAC amd64: MC: 6: 0MB 7: 0MB
[ 9.101134] EDAC MC: DCT1 chip selects:
[ 9.101135] EDAC amd64: MC: 0: 0MB 1: 0MB
[ 9.101137] EDAC amd64: MC: 2: 4096MB 3: 4096MB
[ 9.101138] EDAC amd64: MC: 4: 0MB 5: 0MB
[ 9.101140] EDAC amd64: MC: 6: 0MB 7: 0MB
[ 9.101141] EDAC amd64: using x8 syndromes.
[ 9.101143] EDAC amd64: MCT channel count: 2
[ 9.101180] EDAC amd64: CS2: Registered DDR3 RAM
[ 9.101182] EDAC amd64: CS3: Registered DDR3 RAM
[ 9.101221] EDAC MC2: Giving out device to 'amd64_edac' 'F10h': DEV
0000:00:1a.2
[ 9.101337] EDAC amd64: DRAM ECC enabled.
[ 9.101383] EDAC amd64: F10h detected (node 3).
[ 9.101424] EDAC MC: DCT0 chip selects:
[ 9.101426] EDAC amd64: MC: 0: 0MB 1: 0MB
[ 9.101428] EDAC amd64: MC: 2: 4096MB 3: 4096MB
[ 9.101430] EDAC amd64: MC: 4: 0MB 5: 0MB
[ 9.101431] EDAC amd64: MC: 6: 0MB 7: 0MB
[ 9.101433] EDAC MC: DCT1 chip selects:
[ 9.101434] EDAC amd64: MC: 0: 0MB 1: 0MB
[ 9.101436] EDAC amd64: MC: 2: 4096MB 3: 4096MB
[ 9.101437] EDAC amd64: MC: 4: 0MB 5: 0MB
[ 9.101439] EDAC amd64: MC: 6: 0MB 7: 0MB
[ 9.101440] EDAC amd64: using x8 syndromes.
[ 9.101442] EDAC amd64: MCT channel count: 2
[ 9.101495] EDAC amd64: CS2: Registered DDR3 RAM
[ 9.101497] EDAC amd64: CS3: Registered DDR3 RAM
[ 9.101533] EDAC MC3: Giving out device to 'amd64_edac' 'F10h': DEV
0000:00:1b.2
[ 9.101622] EDAC PCI0: Giving out device to module 'amd64_edac'
controller 'EDAC PCI controller': DEV '0000:00:18.2' (POLLED)
[282601.860098] [Hardware Error]:
MC4_STATUS[Over|CE|MiscV|-|AddrV|CECC]: 0xdc7f400097080813
[282601.863567] [Hardware Error]: Northbridge Error (node 1): DRAM ECC
error detected on the NB.
[282601.867178] EDAC amd64 MC1: CE ERROR_ADDRESS= 0x81fc93d00
[282601.869445] EDAC MC1: CE page 0x81fc93, offset 0xd00, grain 0,
syndrome 0x97fe, row 2, channel 0, label "": amd64_edac
[282601.869452] [Hardware Error]: cache level: L3/GEN, mem/io: MEM,
mem-tx: RD, part-proc: SRC (no timeout)
[282601.873529] Disabling lock debugging due to kernel taint
[282601.873535] [Hardware Error]: Machine check events logged
[321603.500128] [Hardware Error]: MC4_STATUS[-|CE|MiscV|-|AddrV|CECC]:
0x9c00c10004080a13
[321603.503484] [Hardware Error]: Northbridge Error (node 2): DRAM ECC
error detected on the NB.
[321603.507096] EDAC amd64 MC2: CE ERROR_ADDRESS= 0x85a8eec40
[321603.509362] EDAC MC2: CE page 0x85a8ee, offset 0xc40, grain 0,
syndrome 0x401, row 3, channel 1, label "": amd64_edac
[321603.509369] [Hardware Error]: cache level: L3/GEN, mem/io: MEM,
mem-tx: RD, part-proc: RES (no timeout)
[321603.513450] [Hardware Error]: Machine check events logged
[402125.606309] audit_printk_skb: 36 callbacks suppressed
[402125.606318] type=1400 audit(1308314274.325:23): apparmor="STATUS"
operation="profile_replace" name="/usr/sbin/libvirtd" pid=14994
comm="apparmor_parser"
[402125.644372] type=1400 audit(1308314274.365:24): apparmor="STATUS"
operation="profile_replace" name="/usr/lib/libvirt/virt-aa-helper"
pid=14996 comm="apparmor_parser"
[492000.040077] [Hardware Error]:
MC4_STATUS[Over|CE|MiscV|-|AddrV|CECC]: 0xdc7840001e080a13
[492000.043538] [Hardware Error]: Northbridge Error (node 0): DRAM ECC
error detected on the NB.
[492000.047150] EDAC amd64 MC0: CE ERROR_ADDRESS= 0x3fcec0040
[492000.049415] EDAC MC0: CE page 0x3fcec0, offset 0x40, grain 0,
syndrome 0x1ef0, row 3, channel 0, label "": amd64_edac
[492000.049422] [Hardware Error]: cache level: L3/GEN, mem/io: MEM,
mem-tx: RD, part-proc: RES (no timeout)
[492000.053499] [Hardware Error]: Machine check events logged
[547053.500095] [Hardware Error]:
MC4_STATUS[Over|CE|MiscV|-|AddrV|CECC]: 0xdc41c10077080a13
[547053.503561] [Hardware Error]: Northbridge Error (node 2): DRAM ECC
error detected on the NB.
[547053.507172] EDAC amd64 MC2: CE ERROR_ADDRESS= 0xbff5c9600
[547053.581042] EDAC MC2: CE page 0xbff5c9, offset 0x600, grain 0,
syndrome 0x7783, row 3, channel 0, label "": amd64_edac
[547053.581049] [Hardware Error]: cache level: L3/GEN, mem/io: MEM,
mem-tx: RD, part-proc: RES (no timeout)
[547053.730417] [Hardware Error]: Machine check events logged
>
>> root@PM-LAS-PROD-0:~# edac-util
>> mc0: csrow3: ch0: 1 Corrected Errors
>
> This should be P1_DIMM1A if your DIMMs are quadranked, P1_DIMM2A if
> dual-ranked.
>
>> mc1: csrow2: ch0: 1 Corrected Errors
>
> P1_DIMM3A or P1_DIMM4A as above. Also, I'm assuming that the increasing
> nomenclature in the silkscreen labeling is mapping the memory
> controllers in the same way, i.e.:
>
> mc0 -> 1A, 2A
> mc1 -> 3A, 4A
>
>> mc2: csrow3: ch0: 1 Corrected Errors
>> mc2: csrow3: ch1: 1 Corrected Errors
>
> This looks like P2_DIMM3A
>
> So, yeah, it is suboptimal and it needs fixing, I know.
>
> HTH.
>
> --
> Regards/Gruss,
> Boris.
>
> Advanced Micro Devices GmbH
> Einsteinring 24, 85609 Dornach
> GM: Alberto Bozzo
> Reg: Dornach, Landkreis Muenchen
> HRB Nr. 43632 WEEE Registernr: 129 19551
>
------------------------------------------------------------------------------
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authoring tool. Experience the power of Track Changes, Inline Image
Editing and ensure content is compliant with Accessibility Checking.
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^ permalink raw reply
* Re: Interpreting EDAC errors
From: Borislav Petkov @ 2011-06-20 7:34 UTC (permalink / raw)
To: Kevin Bowling; +Cc: bluesmoke-devel@lists.sourceforge.net
In-Reply-To: <BANLkTin-O8co99AnG+KT3+CUGmgaudRvYA@mail.gmail.com>
Hi,
On Mon, Jun 20, 2011 at 12:57:26AM -0400, Kevin Bowling wrote:
> Hello,
>
> I've been seeing the following errors from the EDAC system. I'm not
> quite sure how to associate the output from edac-util to physical
> DIMMs. How do we account for multi-rank DIMMs, interleaving, NUMA,
> etc?
Judging by the mainboard, this is a dual socket Magny-Cours. A couple of
things:
* interpreting DRAM ECC errors is still suboptimal and we're working on
it, I'll try to come up with an interim solution to make the decoded
error info a bit more understandable.
* you have one singe-bit error which got corrected by the memory
controller on 4 DIMMs and over the current system uptime so I wouldn't
worry too much. I would monitor the DIMMs though and take action only if
those error rates start to grow over time.
You have 4 8G DIMMs per node but I don't know they rank
count so please take the below with a grain of salt. Wait,
http://www.alldatasheet.com/datasheet-pdf/pdf/332888/HYNIX/HMT31GR7BFR4C-H9.html
says that yours are actually dual-ranked.
Btw, kernel dmesg output of EDAC should help to pinpoint them better.
> root@PM-LAS-PROD-0:~# edac-util
> mc0: csrow3: ch0: 1 Corrected Errors
This should be P1_DIMM1A if your DIMMs are quadranked, P1_DIMM2A if
dual-ranked.
> mc1: csrow2: ch0: 1 Corrected Errors
P1_DIMM3A or P1_DIMM4A as above. Also, I'm assuming that the increasing
nomenclature in the silkscreen labeling is mapping the memory
controllers in the same way, i.e.:
mc0 -> 1A, 2A
mc1 -> 3A, 4A
> mc2: csrow3: ch0: 1 Corrected Errors
> mc2: csrow3: ch1: 1 Corrected Errors
This looks like P2_DIMM3A
So, yeah, it is suboptimal and it needs fixing, I know.
HTH.
--
Regards/Gruss,
Boris.
Advanced Micro Devices GmbH
Einsteinring 24, 85609 Dornach
GM: Alberto Bozzo
Reg: Dornach, Landkreis Muenchen
HRB Nr. 43632 WEEE Registernr: 129 19551
------------------------------------------------------------------------------
EditLive Enterprise is the world's most technically advanced content
authoring tool. Experience the power of Track Changes, Inline Image
Editing and ensure content is compliant with Accessibility Checking.
http://p.sf.net/sfu/ephox-dev2dev
^ permalink raw reply
* Interpreting EDAC errors
From: Kevin Bowling @ 2011-06-20 4:57 UTC (permalink / raw)
To: bluesmoke-devel
Hello,
I've been seeing the following errors from the EDAC system. I'm not
quite sure how to associate the output from edac-util to physical
DIMMs. How do we account for multi-rank DIMMs, interleaving, NUMA,
etc?
Any help would be greatly appreciated.
Regards,
Kevin
root@PM-LAS-PROD-0:~# edac-util
mc0: csrow3: ch0: 1 Corrected Errors
mc1: csrow2: ch0: 1 Corrected Errors
mc2: csrow3: ch0: 1 Corrected Errors
mc2: csrow3: ch1: 1 Corrected Errors
root@PM-LAS-PROD-0:~# edac-ctl --mainboard
edac-ctl: mainboard: Supermicro H8DGU
root@PM-LAS-PROD-0:~# dmidecode -t memory
# dmidecode 2.9
SMBIOS 2.6 present.
Handle 0x0011, DMI type 16, 15 bytes
Physical Memory Array
Location: System Board Or Motherboard
Use: System Memory
Error Correction Type: Multi-bit ECC
Maximum Capacity: Unknown
Error Information Handle: Not Provided
Number Of Devices: 8
Handle 0x0013, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0011
Error Information Handle: Not Provided
Total Width: Unknown
Data Width: Unknown
Size: No Module Installed
Form Factor: <OUT OF SPEC>
Set: None
Locator: P1_DIMM1B
Bank Locator: BANK0
Type: Unknown
Type Detail: None
Speed: Unknown
Manufacturer: Manufacturer00
Serial Number: SerNum00
Asset Tag: AssetTagNum0
Part Number: ModulePartNumber00
Handle 0x0015, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0011
Error Information Handle: Not Provided
Total Width: 72 bits
Data Width: 64 bits
Size: 8192 MB
Form Factor: DIMM
Set: None
Locator: P1_DIMM1A
Bank Locator: BANK1
Type: <OUT OF SPEC>
Type Detail: Synchronous
Speed: 1333 MHz (0.8 ns)
Manufacturer: Hyundai
Serial Number: C0073434
Asset Tag: AssetTagNum1
Part Number: HMT31GR7BFR4C-H9
Handle 0x0017, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0011
Error Information Handle: Not Provided
Total Width: Unknown
Data Width: Unknown
Size: No Module Installed
Form Factor: <OUT OF SPEC>
Set: None
Locator: P1_DIMM2B
Bank Locator: BANK2
Type: Unknown
Type Detail: None
Speed: Unknown
Manufacturer: Manufacturer02
Serial Number: SerNum02
Asset Tag: AssetTagNum2
Part Number: ModulePartNumber02
Handle 0x0019, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0011
Error Information Handle: Not Provided
Total Width: 72 bits
Data Width: 64 bits
Size: 8192 MB
Form Factor: DIMM
Set: None
Locator: P1_DIMM2A
Bank Locator: BANK3
Type: <OUT OF SPEC>
Type Detail: Synchronous
Speed: 1333 MHz (0.8 ns)
Manufacturer: Hyundai
Serial Number: 5A1F440F
Asset Tag: AssetTagNum3
Part Number: HMT31GR7BFR4C-H9
Handle 0x001B, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0011
Error Information Handle: Not Provided
Total Width: Unknown
Data Width: Unknown
Size: No Module Installed
Form Factor: <OUT OF SPEC>
Set: None
Locator: P1_DIMM3B
Bank Locator: BANK4
Type: Unknown
Type Detail: None
Speed: Unknown
Manufacturer: Manufacturer04
Serial Number: SerNum04
Asset Tag: AssetTagNum4
Part Number: ModulePartNumber04
Handle 0x001D, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0011
Error Information Handle: Not Provided
Total Width: 72 bits
Data Width: 64 bits
Size: 8192 MB
Form Factor: DIMM
Set: None
Locator: P1_DIMM3A
Bank Locator: BANK5
Type: <OUT OF SPEC>
Type Detail: Synchronous
Speed: 1333 MHz (0.8 ns)
Manufacturer: Hyundai
Serial Number: 7BEB1017
Asset Tag: AssetTagNum5
Part Number: HMT31GR7BFR4C-H9
Handle 0x001F, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0011
Error Information Handle: Not Provided
Total Width: Unknown
Data Width: Unknown
Size: No Module Installed
Form Factor: <OUT OF SPEC>
Set: None
Locator: P1_DIMM4B
Bank Locator: BANK6
Type: Unknown
Type Detail: None
Speed: Unknown
Manufacturer: Manufacturer06
Serial Number: SerNum06
Asset Tag: AssetTagNum6
Part Number: ModulePartNumber06
Handle 0x0021, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0011
Error Information Handle: Not Provided
Total Width: 72 bits
Data Width: 64 bits
Size: 8192 MB
Form Factor: DIMM
Set: None
Locator: P1_DIMM4A
Bank Locator: BANK7
Type: <OUT OF SPEC>
Type Detail: Synchronous
Speed: 1333 MHz (0.8 ns)
Manufacturer: Hyundai
Serial Number: E6CCC22E
Asset Tag: AssetTagNum7
Part Number: HMT31GR7BFR4C-H9
Handle 0x0023, DMI type 16, 15 bytes
Physical Memory Array
Location: System Board Or Motherboard
Use: System Memory
Error Correction Type: Multi-bit ECC
Maximum Capacity: Unknown
Error Information Handle: Not Provided
Number Of Devices: 8
Handle 0x0025, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0023
Error Information Handle: Not Provided
Total Width: Unknown
Data Width: Unknown
Size: No Module Installed
Form Factor: <OUT OF SPEC>
Set: None
Locator: P2_DIMM1B
Bank Locator: BANK8
Type: Unknown
Type Detail: None
Speed: Unknown
Manufacturer: Manufacturer08
Serial Number: SerNum08
Asset Tag: AssetTagNum8
Part Number: ModulePartNumber08
Handle 0x0027, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0023
Error Information Handle: Not Provided
Total Width: 72 bits
Data Width: 64 bits
Size: 8192 MB
Form Factor: DIMM
Set: None
Locator: P2_DIMM1A
Bank Locator: BANK9
Type: <OUT OF SPEC>
Type Detail: Synchronous
Speed: 1333 MHz (0.8 ns)
Manufacturer: Hyundai
Serial Number: 651FC40F
Asset Tag: AssetTagNum9
Part Number: HMT31GR7BFR4C-H9
Handle 0x0029, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0023
Error Information Handle: Not Provided
Total Width: Unknown
Data Width: Unknown
Size: No Module Installed
Form Factor: <OUT OF SPEC>
Set: None
Locator: P2_DIMM2B
Bank Locator: BANK10
Type: Unknown
Type Detail: None
Speed: Unknown
Manufacturer: Manufacturer10
Serial Number: SerNum10
Asset Tag: AssetTagNum10
Part Number: ModulePartNumber10
Handle 0x002B, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0023
Error Information Handle: Not Provided
Total Width: 72 bits
Data Width: 64 bits
Size: 8192 MB
Form Factor: DIMM
Set: None
Locator: P2_DIMM2A
Bank Locator: BANK11
Type: <OUT OF SPEC>
Type Detail: Synchronous
Speed: 1333 MHz (0.8 ns)
Manufacturer: Hyundai
Serial Number: 841F440F
Asset Tag: AssetTagNum11
Part Number: HMT31GR7BFR4C-H9
Handle 0x002D, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0023
Error Information Handle: Not Provided
Total Width: Unknown
Data Width: Unknown
Size: No Module Installed
Form Factor: <OUT OF SPEC>
Set: None
Locator: P2_DIMM3B
Bank Locator: BANK12
Type: Unknown
Type Detail: None
Speed: Unknown
Manufacturer: Manufacturer12
Serial Number: SerNum12
Asset Tag: AssetTagNum12
Part Number: ModulePartNumber12
Handle 0x002F, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0023
Error Information Handle: Not Provided
Total Width: 72 bits
Data Width: 64 bits
Size: 8192 MB
Form Factor: DIMM
Set: None
Locator: P2_DIMM3A
Bank Locator: BANK13
Type: <OUT OF SPEC>
Type Detail: Synchronous
Speed: 1333 MHz (0.8 ns)
Manufacturer: Hyundai
Serial Number: 771F940F
Asset Tag: AssetTagNum13
Part Number: HMT31GR7BFR4C-H9
Handle 0x0031, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0023
Error Information Handle: Not Provided
Total Width: Unknown
Data Width: Unknown
Size: No Module Installed
Form Factor: <OUT OF SPEC>
Set: None
Locator: P2_DIMM4B
Bank Locator: BANK14
Type: Unknown
Type Detail: None
Speed: Unknown
Manufacturer: Manufacturer14
Serial Number: SerNum14
Asset Tag: AssetTagNum14
Part Number: ModulePartNumber14
Handle 0x0033, DMI type 17, 28 bytes
Memory Device
Array Handle: 0x0023
Error Information Handle: Not Provided
Total Width: 72 bits
Data Width: 64 bits
Size: 8192 MB
Form Factor: DIMM
Set: None
Locator: P2_DIMM4A
Bank Locator: BANK15
Type: <OUT OF SPEC>
Type Detail: Synchronous
Speed: 1333 MHz (0.8 ns)
Manufacturer: Hyundai
Serial Number: 881F540F
Asset Tag: AssetTagNum15
Part Number: HMT31GR7BFR4C-H9
------------------------------------------------------------------------------
EditLive Enterprise is the world's most technically advanced content
authoring tool. Experience the power of Track Changes, Inline Image
Editing and ensure content is compliant with Accessibility Checking.
http://p.sf.net/sfu/ephox-dev2dev
^ permalink raw reply
* Re: [PATCH RESEND]Remove a warning for drivers/edac/i82975x_edac.c
From: Arvind R @ 2011-06-12 15:50 UTC (permalink / raw)
To: Connor Hansen; +Cc: Randy Dunlap, linux-kernel, ravi, bluesmoke-devel
In-Reply-To: <BANLkTi=ATS_ULg2egLZrG9B9NAbq6887Yg@mail.gmail.com>
Hi,
My system is broken currently, so I'm unable to check:(
But the foll. patch should fix the problem for 64 and 32 bits AND work
correct wrt.
to error-info. Would be glad if can check, please.
--- linux-2.6.39.1.orig/drivers/edac/i82975x_edac.c 2011-05-19 09:36:34 +0530
+++ linux-2.6.39.1/drivers/edac/i82975x_edac.c 2011-06-12 21:03:37 +0530
@@ -294,12 +294,12 @@
}
page = (unsigned long) info->eap;
- if (info->xeap & 1)
- page |= 0x100000000ul;
chan = page & 1;
- page >>= 1;
offst = page & ((1 << PAGE_SHIFT) - 1);
- page >>= PAGE_SHIFT;
+ page >>= 1;
+ if (info->xeap & 1)
+ page |= 0x80000000;
+ page >>= (PAGE_SHIFT - 1);
row = edac_mc_find_csrow_by_page(mci, page);
if (info->errsts & 0x0002)
- arvind
^ permalink raw reply
* Re: [PATCH RESEND]Remove a warning for drivers/edac/i82975x_edac.c
From: Connor Hansen @ 2011-06-10 6:42 UTC (permalink / raw)
To: Randy Dunlap, linux-kernel, arvino55; +Cc: ravi, bluesmoke-devel
In-Reply-To: <20110610052047.GB3643@gmail.com>
My system is 64bit, thus not showing a warning
adding cc to maintainer, and dev list
2011/6/9 Harry Wei <jiaweiwei.xiyou@gmail.com>:
> On Thu, Jun 09, 2011 at 10:37:47AM -0700, Randy Dunlap wrote:
>> On Thu, 9 Jun 2011 11:04:13 +0800 Harry Wei wrote:
>>
>> > - page = (unsigned long) info->eap;
>> > + page = (unsigned long long) info->eap;
>>
>> But page is still unsigned long, not unsigned long long...
> Yup, but if we can define a 'unsigned long long' type?
>>
>> > if (info->xeap & 1)
>> > - page |= 0x100000000ul;
>> > + page |= 0x100000000ull;
>>
>> and just making this second change fixes the warning.
> I will try my best. Can anyone give some other comments?
>>
>> I don't know what the right answer is, but this patch does not look
>> complete to me.
> I will try to give a v2.
>>
>> Back in April there was a discussion about this warning message and the
>> conclusion was that this driver should be replaced. See
>> https://lkml.org/lkml/2011/4/21/232 and its replies.
>> But we seem to be having problems reaching the EDAC subsystem maintainer
>> (again cc-ed).
> You have not got a exact conclusion about this warning.
> Maybe Arvind knows more about this warning.(cc'ed)
>
>
> Thanks
> Harry Wei
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
>
older convo for new cc's
On Thu, 9 Jun 2011 11:04:13 +0800 Harry Wei wrote:
> From: Harry Wei <harryxiyou@gmail.com>
>
> When i compile 2.6.39.1, a warning shows like below.
> This patch can fix the warning. And i works well with
> my PC.
>
> [...]
> CC [M] drivers/edac/e752x_edac.o
> CC [M] drivers/edac/i82875p_edac.o
> CC [M] drivers/edac/i82975x_edac.o
> drivers/edac/i82975x_edac.c: In function ���i82975x_process_error_info���:
> drivers/edac/i82975x_edac.c:298: warning: integer constant is too large for ���unsigned long��� type
> CC [M] drivers/edac/i3000_edac.o
> CC [M] drivers/edac/i3200_edac.o
> CC [M] drivers/edac/x38_edac.o
> CC [M] drivers/edac/i82860_edac.o
> [...]
>
>
> Signed-off-by: Harry Wei <harryxiyou@gmail.com>
> Index: prj/drivers/edac/i82975x_edac.c
> ===================================================================
> --- prj.orig/drivers/edac/i82975x_edac.c 2011-06-04 10:09:55.351174516 +0800
> +++ prj/drivers/edac/i82975x_edac.c 2011-06-04 10:10:30.875168437 +0800
> @@ -293,9 +293,9 @@
> info->errsts = info->errsts2;
> }
>
> - page = (unsigned long) info->eap;
> + page = (unsigned long long) info->eap;
But page is still unsigned long, not unsigned long long...
> if (info->xeap & 1)
> - page |= 0x100000000ul;
> + page |= 0x100000000ull;
and just making this second change fixes the warning.
I don't know what the right answer is, but this patch does not look
complete to me.
Back in April there was a discussion about this warning message and the
conclusion was that this driver should be replaced. See
https://lkml.org/lkml/2011/4/21/232 and its replies.
But we seem to be having problems reaching the EDAC subsystem maintainer
(again cc-ed).
> chan = page & 1;
> page >>= 1;
> offst = page & ((1 << PAGE_SHIFT) - 1);
> --
---
~Randy
*** Remember to use Documentation/SubmitChecklist when testing your code ***
- Show quoted text -
^ permalink raw reply
* Re: [PATCH]Remove a warning for drivers/edac/i82975x_edac.c
From: Randy Dunlap @ 2011-06-06 20:36 UTC (permalink / raw)
To: Harry Wei; +Cc: greg, ravi, linux-kernel, akpm, bluesmoke-devel
In-Reply-To: <20110604022151.GA2475@gmail.com>
On Sat, 4 Jun 2011 10:22:21 +0800 Harry Wei wrote:
> From: Harry Wei <harryxiyou@gmail.com>
>
> When i compile 2.6.39.1, a warning shows like below.
> This patch can fix the warning. And i works well with
> my PC.
Hi Harry,
Does "works well with my PC" mean that you boot-tested this patch
or just compile-tested it?
and if you boot-tested it, do you have hardware that actually
exercises this code path?
> [...]
> CC [M] drivers/edac/e752x_edac.o
> CC [M] drivers/edac/i82875p_edac.o
> CC [M] drivers/edac/i82975x_edac.o
> drivers/edac/i82975x_edac.c: In function ���i82975x_process_error_info���:
> drivers/edac/i82975x_edac.c:298: warning: integer constant is too large for ���unsigned long��� type
> CC [M] drivers/edac/i3000_edac.o
> CC [M] drivers/edac/i3200_edac.o
> CC [M] drivers/edac/x38_edac.o
> CC [M] drivers/edac/i82860_edac.o
> [...]
>
> Signed-off-by: Harry Wei <harryxiyou@gmail.com>
>
> Index: prj/drivers/edac/i82975x_edac.c
> ===================================================================
> --- prj.orig/drivers/edac/i82975x_edac.c 2011-06-04 10:09:55.351174516 +0800
> +++ prj/drivers/edac/i82975x_edac.c 2011-06-04 10:10:30.875168437 +0800
> @@ -293,9 +293,9 @@
> info->errsts = info->errsts2;
> }
>
> - page = (unsigned long) info->eap;
> + page = (unsigned long long) info->eap;
but page is still declared as unsigned long. should it be unsigned long long?
> if (info->xeap & 1)
> - page |= 0x100000000ul;
> + page |= 0x100000000ull;
> chan = page & 1;
> page >>= 1;
> offst = page & ((1 << PAGE_SHIFT) - 1);
---
~Randy
*** Remember to use Documentation/SubmitChecklist when testing your code ***
------------------------------------------------------------------------------
Simplify data backup and recovery for your virtual environment with vRanger.
Installation's a snap, and flexible recovery options mean your data is safe,
secure and there when you need it. Discover what all the cheering's about.
Get your free trial download today.
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_______________________________________________
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bluesmoke-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/bluesmoke-devel
^ permalink raw reply
* [PATCH 1/2] ppc/85xx: create a platform node for PCI EDAC device
From: Dmitry Eremin-Solenikov @ 2011-06-04 10:42 UTC (permalink / raw)
To: bluesmoke-devel, linuxppc-dev, Benjamin Herrenschmidt,
Paul Mackerras
In-Reply-To: <20110602124823.3b814b3f@schlenkerla.am.freescale.net>
As a device for pci node isn't created, create a special platform_device
for PCI EDAC device on MPC85xx.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
---
arch/powerpc/sysdev/fsl_pci.c | 28 ++++++++++++++++++++++++++++
1 files changed, 28 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 68ca929..2498229 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -381,6 +381,34 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
return 0;
}
+static int __init fsl_add_pci_err(void)
+{
+ struct device_node *np;
+
+ /* Only PCI, not PCI Express! */
+ for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") {
+ struct resource r[2] = {};
+
+ if (of_address_to_resource(np, 0, &r[0])) {
+ printk(KERN_WARNING
+ "Can't get register base for PCI EDAC!\n");
+ continue;
+ }
+ r[0].start += 0xe00;
+
+ if (of_irq_to_resource(np, 0, &r[1]) == NO_IRQ) {
+ printk(KERN_WARNING
+ "Can't get irq for PCI EDAC!\n");
+ continue;
+ }
+ platform_device_register_simple("mpc85xx_pci_err", -1,
+ r, ARRAY_SIZE(r));
+ }
+
+ return 0;
+}
+device_initcall(fsl_add_pci_err);
+
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8548E, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8548, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8543E, quirk_fsl_pcie_header);
--
1.7.4.4
------------------------------------------------------------------------------
Simplify data backup and recovery for your virtual environment with vRanger.
Installation's a snap, and flexible recovery options mean your data is safe,
secure and there when you need it. Discover what all the cheering's about.
Get your free trial download today.
http://p.sf.net/sfu/quest-dev2dev2
^ permalink raw reply related
* [PATCH]Remove a warning for drivers/edac/i82975x_edac.c
From: Harry Wei @ 2011-06-04 2:22 UTC (permalink / raw)
To: linux-kernel; +Cc: ravi, arvino55, bluesmoke-devel, greg, akpm
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=unknown-8bit, Size: 1236 bytes --]
From: Harry Wei <harryxiyou@gmail.com>
When i compile 2.6.39.1, a warning shows like below.
This patch can fix the warning. And i works well with
my PC.
[...]
CC [M] drivers/edac/e752x_edac.o
CC [M] drivers/edac/i82875p_edac.o
CC [M] drivers/edac/i82975x_edac.o
drivers/edac/i82975x_edac.c: In function ���i82975x_process_error_info���:
drivers/edac/i82975x_edac.c:298: warning: integer constant is too large for ���unsigned long��� type
CC [M] drivers/edac/i3000_edac.o
CC [M] drivers/edac/i3200_edac.o
CC [M] drivers/edac/x38_edac.o
CC [M] drivers/edac/i82860_edac.o
[...]
Signed-off-by: Harry Wei <harryxiyou@gmail.com>
Index: prj/drivers/edac/i82975x_edac.c
===================================================================
--- prj.orig/drivers/edac/i82975x_edac.c 2011-06-04 10:09:55.351174516 +0800
+++ prj/drivers/edac/i82975x_edac.c 2011-06-04 10:10:30.875168437 +0800
@@ -293,9 +293,9 @@
info->errsts = info->errsts2;
}
- page = (unsigned long) info->eap;
+ page = (unsigned long long) info->eap;
if (info->xeap & 1)
- page |= 0x100000000ul;
+ page |= 0x100000000ull;
chan = page & 1;
page >>= 1;
offst = page & ((1 << PAGE_SHIFT) - 1);
^ permalink raw reply
* Re: [PATCH 1/2] ppc/85xx: create a platform node for PCI EDAC device
From: Scott Wood @ 2011-06-02 17:48 UTC (permalink / raw)
To: Dmitry Eremin-Solenikov
Cc: Benjamin Herrenschmidt, linuxppc-dev, bluesmoke-devel,
Paul Mackerras
In-Reply-To: <1307017502-3965-1-git-send-email-dbaryshkov@gmail.com>
On Thu, 2 Jun 2011 16:25:02 +0400
Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> wrote:
> As a device for pci node isn't created, create a special platform_device
> for PCI EDAC device on MPC85xx.
>
> Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
> ---
> arch/powerpc/sysdev/fsl_pci.c | 33 +++++++++++++++++++++++++++++++++
> 1 files changed, 33 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
> index 68ca929..0e37259 100644
> --- a/arch/powerpc/sysdev/fsl_pci.c
> +++ b/arch/powerpc/sysdev/fsl_pci.c
> @@ -381,6 +381,39 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
> return 0;
> }
>
> +int __init fsl_add_pci_err(void)
> +{
> + struct device_node *np;
> +
> + for_each_node_by_type(np, "pci") {
> + /* Only PCI, not PCI Express! */
> + if (of_device_is_compatible(np, "fsl,mpc8540-pci")) {
> + struct resource r[2];
> +
> + r[0].parent = NULL;
> + r[1].parent = NULL;
> +
> + if (of_address_to_resource(np, 0, &r[0])) {
> + printk(KERN_WARNING
> + "Can't get register base for PCI EDAC!\n");
> + continue;
> + }
> + r[0].start += 0xe00;
> +
> + if (of_irq_to_resource(np, 0, &r[1]) == NO_IRQ) {
> + printk(KERN_WARNING
> + "Can't get irq for PCI EDAC!\n");
> + continue;
> + }
> + platform_device_register_simple("mpc85xx_pci_err", -1,
> + r, ARRAY_SIZE(r));
> + }
> + }
This use of device_type is deprecated -- use for_each_compatible_node().
-Scott
------------------------------------------------------------------------------
Simplify data backup and recovery for your virtual environment with vRanger.
Installation's a snap, and flexible recovery options mean your data is safe,
secure and there when you need it. Discover what all the cheering's about.
Get your free trial download today.
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^ permalink raw reply
* RE: [PATCH 1/2] ppc/85xx: create a platform node for PCI EDAC device
From: David Laight @ 2011-06-02 15:15 UTC (permalink / raw)
To: Anton Vorontsov, Dmitry Eremin-Solenikov
Cc: Paul Mackerras, linuxppc-dev, bluesmoke-devel
In-Reply-To: <20110602151413.GA6590@oksana.dev.rtsoft.ru>
> > +int __init fsl_add_pci_err(void)
>
> static :-)
and why __ ?
aren't such names reserved in the C language for some purpose.
David
^ permalink raw reply
* Re: [PATCH 1/2] ppc/85xx: create a platform node for PCI EDAC device
From: Anton Vorontsov @ 2011-06-02 15:14 UTC (permalink / raw)
To: Dmitry Eremin-Solenikov; +Cc: linuxppc-dev, bluesmoke-devel, Paul Mackerras
In-Reply-To: <1307017502-3965-1-git-send-email-dbaryshkov@gmail.com>
On Thu, Jun 02, 2011 at 04:25:02PM +0400, Dmitry Eremin-Solenikov wrote:
> As a device for pci node isn't created, create a special platform_device
> for PCI EDAC device on MPC85xx.
>
> Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
> ---
> arch/powerpc/sysdev/fsl_pci.c | 33 +++++++++++++++++++++++++++++++++
> 1 files changed, 33 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
> index 68ca929..0e37259 100644
> --- a/arch/powerpc/sysdev/fsl_pci.c
> +++ b/arch/powerpc/sysdev/fsl_pci.c
> @@ -381,6 +381,39 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
> return 0;
> }
>
> +int __init fsl_add_pci_err(void)
static :-)
> +{
> + struct device_node *np;
> +
> + for_each_node_by_type(np, "pci") {
> + /* Only PCI, not PCI Express! */
> + if (of_device_is_compatible(np, "fsl,mpc8540-pci")) {
> + struct resource r[2];
How about '= {};' initializer instead of the '= NULL's down below?
> +
> + r[0].parent = NULL;
> + r[1].parent = NULL;
Thanks,
--
Anton Vorontsov
Email: cbouatmailru@gmail.com
^ permalink raw reply
* [PATCH 1/2] ppc/85xx: create a platform node for PCI EDAC device
From: Dmitry Eremin-Solenikov @ 2011-06-02 12:25 UTC (permalink / raw)
To: bluesmoke-devel, linuxppc-dev, Benjamin Herrenschmidt,
Paul Mackerras
In-Reply-To: <20110601114823.2e57c691@schlenkerla.am.freescale.net>
As a device for pci node isn't created, create a special platform_device
for PCI EDAC device on MPC85xx.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
---
arch/powerpc/sysdev/fsl_pci.c | 33 +++++++++++++++++++++++++++++++++
1 files changed, 33 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 68ca929..0e37259 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -381,6 +381,39 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
return 0;
}
+int __init fsl_add_pci_err(void)
+{
+ struct device_node *np;
+
+ for_each_node_by_type(np, "pci") {
+ /* Only PCI, not PCI Express! */
+ if (of_device_is_compatible(np, "fsl,mpc8540-pci")) {
+ struct resource r[2];
+
+ r[0].parent = NULL;
+ r[1].parent = NULL;
+
+ if (of_address_to_resource(np, 0, &r[0])) {
+ printk(KERN_WARNING
+ "Can't get register base for PCI EDAC!\n");
+ continue;
+ }
+ r[0].start += 0xe00;
+
+ if (of_irq_to_resource(np, 0, &r[1]) == NO_IRQ) {
+ printk(KERN_WARNING
+ "Can't get irq for PCI EDAC!\n");
+ continue;
+ }
+ platform_device_register_simple("mpc85xx_pci_err", -1,
+ r, ARRAY_SIZE(r));
+ }
+ }
+
+ return 0;
+}
+device_initcall(fsl_add_pci_err);
+
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8548E, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8548, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8543E, quirk_fsl_pcie_header);
--
1.7.4.4
------------------------------------------------------------------------------
Simplify data backup and recovery for your virtual environment with vRanger.
Installation's a snap, and flexible recovery options mean your data is safe,
secure and there when you need it. Data protection magic?
Nope - It's vRanger. Get your free trial download today.
http://p.sf.net/sfu/quest-sfdev2dev
^ permalink raw reply related
* Re: [PATCH 1/2] ppc/85xx: create a platform node for PCI EDAC device
From: Scott Wood @ 2011-06-01 16:48 UTC (permalink / raw)
To: Dmitry Eremin-Solenikov
Cc: Paul Mackerras, Anton Vorontsov, linuxppc-dev, bluesmoke-devel
In-Reply-To: <BANLkTi=xFcZRd4x1FQSKJzmt3A7_tZs+sQ@mail.gmail.com>
On Wed, 1 Jun 2011 18:55:35 +0400
Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> wrote:
> On 6/1/11, Anton Vorontsov <avorontsov@mvista.com> wrote:
> > On Wed, Jun 01, 2011 at 04:28:11PM +0400, Dmitry Eremin-Solenikov wrote:
> > [...]
> > Also, why not add this call to the fsl_add_bridge(), so you
> > won't need to touch board files at all.
>
> Because fsl_add_bridge is called too early, so allocation
> of platform device fails.
That doesn't seem like a good reason for putting more stuff in board
files that isn't board-specific. Why not just make fsl_add_pci_err() an
initcall? It already only works when a compatible device tree node is
found. Is there any case where a board would not want this PCI code to be
used, even if the device tree node is present? If so, fsl_add_bridge could
set a flag that fsl_add_pci_err() could check -- but I doubt it's needed.
-Scott
------------------------------------------------------------------------------
Simplify data backup and recovery for your virtual environment with vRanger.
Installation's a snap, and flexible recovery options mean your data is safe,
secure and there when you need it. Data protection magic?
Nope - It's vRanger. Get your free trial download today.
http://p.sf.net/sfu/quest-sfdev2dev
^ permalink raw reply
* [PATCH 1/2] ppc/85xx: create a platform node for PCI EDAC device
From: Dmitry Eremin-Solenikov @ 2011-06-01 16:08 UTC (permalink / raw)
To: bluesmoke-devel, linuxppc-dev, Benjamin Herrenschmidt,
Paul Mackerras
In-Reply-To: <20110601145911.GA30312@oksana.dev.rtsoft.ru>
As a device for pci node isn't created, create a special platform_device
for PCI EDAC device on MPC85xx.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
---
arch/powerpc/platforms/85xx/ksi8560.c | 2 +
arch/powerpc/platforms/85xx/mpc8536_ds.c | 2 +
arch/powerpc/platforms/85xx/mpc85xx_ads.c | 2 +
arch/powerpc/platforms/85xx/mpc85xx_cds.c | 2 +
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 2 +
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 4 +++
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 2 +
arch/powerpc/platforms/85xx/p1022_ds.c | 2 +
arch/powerpc/platforms/85xx/sbc8548.c | 2 +
arch/powerpc/platforms/85xx/sbc8560.c | 2 +
arch/powerpc/platforms/85xx/socrates.c | 2 +
arch/powerpc/platforms/85xx/stx_gp3.c | 2 +
arch/powerpc/platforms/85xx/tqm85xx.c | 2 +
arch/powerpc/platforms/85xx/xes_mpc85xx.c | 2 +
arch/powerpc/sysdev/fsl_pci.c | 30 +++++++++++++++++++++++++++++
arch/powerpc/sysdev/fsl_pci.h | 5 ++++
16 files changed, 65 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c b/arch/powerpc/platforms/85xx/ksi8560.c
index c46f935..288fc4686 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -228,6 +228,8 @@ static int __init declare_of_platform_devices(void)
{
of_platform_bus_probe(NULL, of_bus_ids, NULL);
+ fsl_add_pci_err();
+
return 0;
}
machine_device_initcall(ksi8560, declare_of_platform_devices);
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index f79f2f1..cfcbd88 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -114,6 +114,8 @@ static struct of_device_id __initdata mpc8536_ds_ids[] = {
static int __init mpc8536_ds_publish_devices(void)
{
+ fsl_add_pci_err();
+
return of_platform_bus_probe(NULL, mpc8536_ds_ids, NULL);
}
machine_device_initcall(mpc8536_ds, mpc8536_ds_publish_devices);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 3b2c9bb..6af50d4 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -235,6 +235,8 @@ static int __init declare_of_platform_devices(void)
{
of_platform_bus_probe(NULL, of_bus_ids, NULL);
+ fsl_add_pci_err();
+
return 0;
}
machine_device_initcall(mpc85xx_ads, declare_of_platform_devices);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 6299a2a..2785c75 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -341,6 +341,8 @@ static struct of_device_id __initdata of_bus_ids[] = {
static int __init declare_of_platform_devices(void)
{
+ fsl_add_pci_err();
+
return of_platform_bus_probe(NULL, of_bus_ids, NULL);
}
machine_device_initcall(mpc85xx_cds, declare_of_platform_devices);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index c7b97f7..2d0a138 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -228,6 +228,8 @@ static struct of_device_id __initdata mpc85xxds_ids[] = {
static int __init mpc85xxds_publish_devices(void)
{
+ fsl_add_pci_err();
+
return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL);
}
machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 747d1ee..2ff879a 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -455,6 +455,8 @@ static int __init mpc85xx_publish_devices(void)
if (machine_is(mpc8569_mds))
simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio");
+ fsl_add_pci_err();
+
of_platform_bus_probe(NULL, mpc85xx_ids, NULL);
mpc85xx_publish_qe_devices();
@@ -463,6 +465,8 @@ static int __init mpc85xx_publish_devices(void)
static int __init p1021_publish_devices(void)
{
+ fsl_add_pci_err();
+
of_platform_bus_probe(NULL, p1021_ids, NULL);
mpc85xx_publish_qe_devices();
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index 088f30b..511a86c 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -118,6 +118,8 @@ static struct of_device_id __initdata mpc85xxrdb_ids[] = {
static int __init mpc85xxrdb_publish_devices(void)
{
+ fsl_add_pci_err();
+
return of_platform_bus_probe(NULL, mpc85xxrdb_ids, NULL);
}
machine_device_initcall(p2020_rdb, mpc85xxrdb_publish_devices);
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index 7eb5c40..249f302 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -326,6 +326,8 @@ static struct of_device_id __initdata p1022_ds_ids[] = {
static int __init p1022_ds_publish_devices(void)
{
+ fsl_add_pci_err();
+
return of_platform_bus_probe(NULL, p1022_ds_ids, NULL);
}
machine_device_initcall(p1022_ds, p1022_ds_publish_devices);
diff --git a/arch/powerpc/platforms/85xx/sbc8548.c b/arch/powerpc/platforms/85xx/sbc8548.c
index ecdd8c0..f3dcd88 100644
--- a/arch/powerpc/platforms/85xx/sbc8548.c
+++ b/arch/powerpc/platforms/85xx/sbc8548.c
@@ -162,6 +162,8 @@ static int __init declare_of_platform_devices(void)
{
of_platform_bus_probe(NULL, of_bus_ids, NULL);
+ fsl_add_pci_err();
+
return 0;
}
machine_device_initcall(sbc8548, declare_of_platform_devices);
diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c
index d2dfd46..6abdda7 100644
--- a/arch/powerpc/platforms/85xx/sbc8560.c
+++ b/arch/powerpc/platforms/85xx/sbc8560.c
@@ -222,6 +222,8 @@ static int __init declare_of_platform_devices(void)
{
of_platform_bus_probe(NULL, of_bus_ids, NULL);
+ fsl_add_pci_err();
+
return 0;
}
machine_device_initcall(sbc8560, declare_of_platform_devices);
diff --git a/arch/powerpc/platforms/85xx/socrates.c b/arch/powerpc/platforms/85xx/socrates.c
index 747d8fb..d1546a3 100644
--- a/arch/powerpc/platforms/85xx/socrates.c
+++ b/arch/powerpc/platforms/85xx/socrates.c
@@ -104,6 +104,8 @@ static struct of_device_id __initdata socrates_of_bus_ids[] = {
static int __init socrates_publish_devices(void)
{
+ fsl_add_pci_err();
+
return of_platform_bus_probe(NULL, socrates_of_bus_ids, NULL);
}
machine_device_initcall(socrates, socrates_publish_devices);
diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c
index 5387e9f..b5bf6b0 100644
--- a/arch/powerpc/platforms/85xx/stx_gp3.c
+++ b/arch/powerpc/platforms/85xx/stx_gp3.c
@@ -154,6 +154,8 @@ static int __init declare_of_platform_devices(void)
{
of_platform_bus_probe(NULL, of_bus_ids, NULL);
+ fsl_add_pci_err();
+
return 0;
}
machine_device_initcall(stx_gp3, declare_of_platform_devices);
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c
index 325de77..88d8bb8 100644
--- a/arch/powerpc/platforms/85xx/tqm85xx.c
+++ b/arch/powerpc/platforms/85xx/tqm85xx.c
@@ -183,6 +183,8 @@ static int __init declare_of_platform_devices(void)
{
of_platform_bus_probe(NULL, of_bus_ids, NULL);
+ fsl_add_pci_err();
+
return 0;
}
machine_device_initcall(tqm85xx, declare_of_platform_devices);
diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/powerpc/platforms/85xx/xes_mpc85xx.c
index 0125604..3771a2c 100644
--- a/arch/powerpc/platforms/85xx/xes_mpc85xx.c
+++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c
@@ -187,6 +187,8 @@ static struct of_device_id __initdata xes_mpc85xx_ids[] = {
static int __init xes_mpc85xx_publish_devices(void)
{
+ fsl_add_pci_err();
+
return of_platform_bus_probe(NULL, xes_mpc85xx_ids, NULL);
}
machine_device_initcall(xes_mpc8572, xes_mpc85xx_publish_devices);
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 68ca929..8c64b91 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -381,6 +381,36 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
return 0;
}
+void __init fsl_add_pci_err(void)
+{
+ struct device_node *np;
+
+ for_each_node_by_type(np, "pci") {
+ /* Only PCI, not PCI Express! */
+ if (of_device_is_compatible(np, "fsl,mpc8540-pci")) {
+ struct resource r[2];
+
+ r[0].parent = NULL;
+ r[1].parent = NULL;
+
+ if (of_address_to_resource(np, 0, &r[0])) {
+ printk(KERN_WARNING
+ "Can't get register base for PCI EDAC!\n");
+ continue;
+ }
+ r[0].start += 0xe00;
+
+ if (of_irq_to_resource(np, 0, &r[1]) == NO_IRQ) {
+ printk(KERN_WARNING
+ "Can't get irq for PCI EDAC!\n");
+ continue;
+ }
+ platform_device_register_simple("mpc85xx_pci_err", -1,
+ r, ARRAY_SIZE(r));
+ }
+ }
+}
+
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8548E, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8548, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8543E, quirk_fsl_pcie_header);
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index a39ed5c..e7abc37 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -92,6 +92,11 @@ extern int fsl_add_bridge(struct device_node *dev, int is_primary);
extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);
extern int mpc83xx_add_bridge(struct device_node *dev);
u64 fsl_pci_immrbar_base(struct pci_controller *hose);
+#ifdef CONFIG_PCI
+void fsl_add_pci_err(void);
+#else
+static inline void fsl_add_pci_err(void) {}
+#endif
#endif /* __POWERPC_FSL_PCI_H */
#endif /* __KERNEL__ */
--
1.7.4.4
------------------------------------------------------------------------------
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^ permalink raw reply related
* Re: [PATCH 1/2] ppc/85xx: create a platform node for PCI EDAC device
From: Anton Vorontsov @ 2011-06-01 14:59 UTC (permalink / raw)
To: Dmitry Eremin-Solenikov; +Cc: linuxppc-dev, bluesmoke-devel, Paul Mackerras
In-Reply-To: <BANLkTi=xFcZRd4x1FQSKJzmt3A7_tZs+sQ@mail.gmail.com>
On Wed, Jun 01, 2011 at 06:55:35PM +0400, Dmitry Eremin-Solenikov wrote:
> On 6/1/11, Anton Vorontsov <avorontsov@mvista.com> wrote:
> > On Wed, Jun 01, 2011 at 04:28:11PM +0400, Dmitry Eremin-Solenikov wrote:
> > [...]
> >> --- a/arch/powerpc/sysdev/fsl_pci.h
> >> +++ b/arch/powerpc/sysdev/fsl_pci.h
> >> @@ -92,6 +92,7 @@ extern int fsl_add_bridge(struct device_node *dev, int
> >> is_primary);
> >> extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);
> >> extern int mpc83xx_add_bridge(struct device_node *dev);
> >> u64 fsl_pci_immrbar_base(struct pci_controller *hose);
> >> +int fsl_add_pci_err(void);
> >
> > With
> >
> > #ifdef CONFIG_PCI
> > int fsl_add_pci_err(void);
> > #else
> > static inline int fsl_add_pci_err(void) { return -ENODEV; }
> > #endif
> >
> > You won't need endless ifdefs in the board files:
>
> OK, will redo this patch.
Btw, if you don't check return value of fsl_add_pci_err(), then
it would probably make sense to return void. And if you do
check it somewhere, be sure to include linux/errno.h for
-ENODEV. :-)
Thanks,
--
Anton Vorontsov
Email: cbouatmailru@gmail.com
^ permalink raw reply
* Re: [PATCH 1/2] ppc/85xx: create a platform node for PCI EDAC device
From: Dmitry Eremin-Solenikov @ 2011-06-01 14:55 UTC (permalink / raw)
To: Anton Vorontsov
Cc: Benjamin Herrenschmidt, linuxppc-dev, bluesmoke-devel,
Paul Mackerras
In-Reply-To: <20110601132519.GA16125@oksana.dev.rtsoft.ru>
On 6/1/11, Anton Vorontsov <avorontsov@mvista.com> wrote:
> On Wed, Jun 01, 2011 at 04:28:11PM +0400, Dmitry Eremin-Solenikov wrote:
> [...]
>> --- a/arch/powerpc/sysdev/fsl_pci.h
>> +++ b/arch/powerpc/sysdev/fsl_pci.h
>> @@ -92,6 +92,7 @@ extern int fsl_add_bridge(struct device_node *dev, int
>> is_primary);
>> extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);
>> extern int mpc83xx_add_bridge(struct device_node *dev);
>> u64 fsl_pci_immrbar_base(struct pci_controller *hose);
>> +int fsl_add_pci_err(void);
>
> With
>
> #ifdef CONFIG_PCI
> int fsl_add_pci_err(void);
> #else
> static inline int fsl_add_pci_err(void) { return -ENODEV; }
> #endif
>
> You won't need endless ifdefs in the board files:
OK, will redo this patch.
>
> #ifdef CONFIG_PCI
> fsl_add_pci_err();
> #endif
>
> Also, why not add this call to the fsl_add_bridge(), so you
> won't need to touch board files at all.
Because fsl_add_bridge is called too early, so allocation
of platform device fails.
--
With best wishes
Dmitry
------------------------------------------------------------------------------
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Installation's a snap, and flexible recovery options mean your data is safe,
secure and there when you need it. Data protection magic?
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^ permalink raw reply
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