From: Yazen Ghannam <yazen.ghannam@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
Smita.KoralahalliChannabasappa@amd.com, muralidhara.mk@amd.com,
naveenkrishna.chatradhi@amd.com
Subject: Re: [PATCH 06/18] EDAC/amd64: Add prep_chip_selects() into pvt->ops
Date: Thu, 19 May 2022 14:42:55 +0000 [thread overview]
Message-ID: <YoZXb44DCGDMYqtg@yaz-fattaah> (raw)
In-Reply-To: <YoSp3cSoAo4SkkfQ@zn.tnic>
On Wed, May 18, 2022 at 10:10:05AM +0200, Borislav Petkov wrote:
> On Mon, May 09, 2022 at 02:55:22PM +0000, Yazen Ghannam wrote:
> > From: Muralidhara M K <muralidhara.mk@amd.com>
> >
> > GPU Nodes will need to set the number of available Chip Selects, i.e.
> > Base and Mask values, differently than existing systems. A function
> > pointer should be used rather than introduce another branching condition.
>
> Yeah, it looks to me like all that detection logic should be split
> eventually. Looking at read_mc_regs(), it has
>
> if (pvt->umc) {
> __read_mc_regs_df(pvt);
>
> goto skip;
> }
>
> at the top, then a whole bunch of legacy stuff and then at the skip
> label some common stuff...
>
> Another thing you could consider is to have common functionality carved
> out into helpers with "common" in the name and then call those from both
> UMC and DCT paths. Perhaps that'll help keep the init paths sane. That
> is, short of splitting this driver.
>
> We did the splitting for Intel and there we have a common, librarized
> code which gets linked into a couple of drivers. You don't have to do
> this too - just putting it out there as an alternative.
>
> The per-family function pointers design could be good too, if done
> right. The advantage being, you have a single driver for all, yadda
> yadda...
>
Yep, I've actually considered splitting this driver. But I think at this point
it'd be best to keep what we have, and then write a new driver if and when a
major change happens in future platforms.
> > Prepare for this by adding prep_chip_selects() to pvt->ops and set it
> > as needed based on currently supported systems.
> >
> > Use a "umc" prefix for modern systems, since these use Unified Memory
> > Controllers (UMCs).
> >
> > Use a "dct" prefix for newly-defined legacy functions, since these
> > systems use DRAM Controllers (DCTs).
> >
> > Signed-off-by: Muralidhara M K <muralidhara.mk@amd.com>
> > Signed-off-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com>
>
> What does Naveen's SOB mean here? Co-developed-by perhaps?
>
Yes, that's right. Sorry I missed it. I'll include it in the next revision.
Thanks,
Yazen
next prev parent reply other threads:[~2022-05-19 14:43 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-09 14:55 [PATCH 00/18] AMD64 EDAC Cleanup and Refactor Yazen Ghannam
2022-05-09 14:55 ` [PATCH 01/18] EDAC/amd64: Don't set up EDAC PCI control on Family 17h+ Yazen Ghannam
2022-05-09 14:55 ` [PATCH 02/18] EDAC/amd64: Remove scrub rate control for Family 17h and later Yazen Ghannam
2022-05-11 10:26 ` Borislav Petkov
2022-05-12 14:19 ` Yazen Ghannam
2022-05-09 14:55 ` [PATCH 03/18] EDAC/amd64: Remove PCI Function 6 Yazen Ghannam
2022-05-09 14:55 ` [PATCH 04/18] EDAC/amd64: Remove PCI Function 0 Yazen Ghannam
2022-05-11 10:34 ` Borislav Petkov
2022-05-12 14:34 ` Yazen Ghannam
2022-05-13 9:56 ` Borislav Petkov
2022-05-09 14:55 ` [PATCH 05/18] EDAC/amd64: Merge struct amd64_family_type into struct amd64_pvt Yazen Ghannam
2022-05-13 15:21 ` Borislav Petkov
2022-05-09 14:55 ` [PATCH 06/18] EDAC/amd64: Add prep_chip_selects() into pvt->ops Yazen Ghannam
2022-05-18 8:10 ` Borislav Petkov
2022-05-19 14:42 ` Yazen Ghannam [this message]
2022-05-09 14:55 ` [PATCH 07/18] EDAC/amd64: Add read_base_mask() " Yazen Ghannam
2022-05-09 14:55 ` [PATCH 08/18] EDAC/amd64: Add determine_memory_type() " Yazen Ghannam
2022-05-09 14:55 ` [PATCH 09/18] EDAC/amd64: Add get_ecc_sym_sz() " Yazen Ghannam
2022-05-09 14:55 ` [PATCH 10/18] EDAC/amd64: Add read_mc_regs() " Yazen Ghannam
2022-05-18 11:02 ` Borislav Petkov
2022-05-09 14:55 ` [PATCH 11/18] EDAC/amd64: Add ecc_enabled() " Yazen Ghannam
2022-05-09 14:55 ` [PATCH 12/18] EDAC/amd64: Add determine_edac_cap() " Yazen Ghannam
2022-06-20 16:21 ` Borislav Petkov
2022-06-22 16:10 ` Yazen Ghannam
2022-05-09 14:55 ` [PATCH 13/18] EDAC/amd64: Add determine_edac_ctl_cap() " Yazen Ghannam
2022-05-09 14:55 ` [PATCH 14/18] EDAC/amd64: Add setup_mci_misc_attrs() " Yazen Ghannam
2022-05-09 14:55 ` [PATCH 15/18] EDAC/amd64: Add init_csrows() " Yazen Ghannam
2022-05-09 14:55 ` [PATCH 16/18] EDAC/amd64: Add dump_misc_regs() " Yazen Ghannam
2022-05-09 14:55 ` [PATCH 17/18] EDAC/amd64: Add get_cs_mode() " Yazen Ghannam
2022-05-09 14:55 ` [PATCH 18/18] EDAC/amd64: Add get_err_info() " Yazen Ghannam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YoZXb44DCGDMYqtg@yaz-fattaah \
--to=yazen.ghannam@amd.com \
--cc=Smita.KoralahalliChannabasappa@amd.com \
--cc=bp@alien8.de \
--cc=linux-edac@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=muralidhara.mk@amd.com \
--cc=naveenkrishna.chatradhi@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox