Re: [RESEND PATCH] i5000_edac: fix slot number passed to determine_mtr()

[Borislav Petkov <bp@alien8.de>]

On Thu, Sep 22, 2022 at 09:46:59AM -0400, Aristeu Rozanski wrote:
> I'm only fixing a out of bounds access, on purpose.
> Look at 64e1fdaf55d6 and the new version of determine_mtr().

I have been looking at that one. And I'm questioning it:

"The logic there is broken: it basically creates two csrows for each
DIMM and assumes that all DIMM's are dual rank."

That commit message doesn't explain why this assumption is wrong.

Furthermore, "If single rank memories are found, they'll be marked with
0 bytes."

So this looks to me like this commit is breaking dual-ranked DIMMs
configs in order to fix single-ranked ones.

> And this is the reason why I decided to not do it. We do have the hardware
> but last time I checked none of them had functional EINJ.

You don't need EINJ - there's arch/x86/kernel/cpu/mce/inject.c with
which you can do sw-only injection to test the decoding paths.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette