From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: "Shenhar, Talel" <talel@amazon.com>, bp@alien8.de
Cc: talelshenhar@gmail.com, shellykz@amazon.com,
linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: RFC on drivers/memory vs drivers/edac memory mapping for DDR Controller
Date: Tue, 3 Jan 2023 15:24:26 +0100 [thread overview]
Message-ID: <add4e548-c7cd-741d-90e5-5c7c9ec7284f@linaro.org> (raw)
In-Reply-To: <07109746-6fba-8c66-069b-b5982f460d76@amazon.com>
On 03/01/2023 14:47, Shenhar, Talel wrote:
> So how would you have the DT described and how would driver/s look like
> for cases that the unit registers are split interchangeably?
>
>>
>> You did not Cc relevant here mailing addresses (DT and Rob), so this
>> discussion might miss their feedback.
>>
>> How the drivers map IO address space is independent question and should
>> not determine the hardware description. You want to say that hardware
>> changes depending on OS? One OS means hardware is like that and on other
>> OS it's different?
BTW, you nicely skipped points of my email which are a bit
inconvenient,e.g. how you want to tie DTS and bindings to one specific
driver implementation and ignore the rest...
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-01-03 14:25 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-02 12:17 RFC on drivers/memory vs drivers/edac memory mapping for DDR Controller Shenhar, Talel
2023-01-02 12:47 ` Krzysztof Kozlowski
2023-01-02 13:44 ` Shenhar, Talel
2023-01-02 13:59 ` Krzysztof Kozlowski
2023-01-02 16:21 ` Shenhar, Talel
2023-01-02 16:25 ` Krzysztof Kozlowski
2023-01-03 13:12 ` Shenhar, Talel
2023-01-03 13:23 ` Krzysztof Kozlowski
2023-01-03 13:47 ` Shenhar, Talel
2023-01-03 14:02 ` Krzysztof Kozlowski
2023-01-03 14:24 ` Krzysztof Kozlowski [this message]
2023-01-03 14:34 ` Shenhar, Talel
2023-01-02 13:43 ` Borislav Petkov
2023-01-02 16:14 ` Shenhar, Talel
2023-01-02 16:23 ` Borislav Petkov
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