Re: [PATCH] x86/mce: Fix build warning after MSR-interface switch

["Jürgen Groß" <jgross@suse.com>]

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On 17.07.26 11:28, Ingo Molnar wrote:
> 
> * Juergen Gross <jgross@suse.com> wrote:
> 
>> The recent switch to 64-bit MSR interfaces introduced a build warning.
>>
>> Fix it.
>>
>> Fixes: cff219368bd0 ("x86/mce: Stop using 32-bit MSR interfaces")
>> Reported-by: kernel test robot <lkp@intel.com>
>> Closes: https://lore.kernel.org/oe-kbuild-all/202607031726.ZOwu4snu-lkp@intel.com/
>> Signed-off-by: Juergen Gross <jgross@suse.com>
>> ---
>> Said patch is in tip only right now, so this patch could either be added
>> on top or be folded into the original patch.
>> ---
>>   arch/x86/kernel/cpu/mce/p5.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/kernel/cpu/mce/p5.c b/arch/x86/kernel/cpu/mce/p5.c
>> index eb99f384d747..3c2b6cc918b1 100644
>> --- a/arch/x86/kernel/cpu/mce/p5.c
>> +++ b/arch/x86/kernel/cpu/mce/p5.c
>> @@ -44,7 +44,7 @@ noinstr void pentium_machine_check(struct pt_regs *regs)
>>   /* Set up machine check reporting for processors with Intel style MCE: */
>>   void intel_p5_mcheck_init(struct cpuinfo_x86 *c)
>>   {
>> -	u64 q;
>> +	u64 __maybe_unused q;
> 
> Could we just fix the API to always assign 'q', instead of this
> ugly & vague annotation?

q is always assigned. I believe the problem is that it is never read.

OTOH this problem can be fixed easily after patch 31 of this series. I can send
a V2 of patch 32 to just drop the assignment to q. This will be possible as
rdmsrq() will be a function then, and not a macro requiring a variable being
passed as parameter.


Juergen

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