Re: [PATCH] EDAC/altera: Use correct width with writes to INTTEST register.

[Matthew Gerlach <matthew.gerlach@altera.com>]

On 5/29/25 8:41 AM, Borislav Petkov wrote:
> On Tue, May 27, 2025 at 07:57:07AM -0700, Matthew Gerlach wrote:
> > From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> > 
> > On SoCFPGA platform INTTEST register only supports 16-bit write based on
> > the HW design, writing 32-bit to INTTEST register triggers SError to CPU.
> > Use 16-bit write for INITTEST register.
>
> For the future, please run this text through AI so that it can massage the
> formulations into proper English:
Great suggestion! With hindsight it should be an obvious suggestion.
>
>      On the SoCFPGA platform, the INTTEST register supports only 16-bit writes.
>      A 32-bit write triggers an SError to the CPU so do 16-bit accesses only.
>
> > Fixes: c7b4be8db8bc ("EDAC, altera: Add Arria10 OCRAM ECC support")
> > Cc: stable@kernel.org
> > Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> > Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com>
> > ---
> >  drivers/edac/altera_edac.c | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
>
> Applied, thanks.

Thanks,

Matthew

>