From: Tyler Baicar <tbaicar@codeaurora.org>
To: christoffer.dall@linaro.org, marc.zyngier@arm.com,
pbonzini@redhat.com, rkrcmar@redhat.com, linux@armlinux.org.uk,
catalin.marinas@arm.com, will.deacon@arm.com, rjw@rjwysocki.net,
lenb@kernel.org, matt@codeblueprint.co.uk,
robert.moore@intel.com, lv.zheng@intel.com, mark.rutland@arm.com,
james.morse@arm.com, akpm@linux-foundation.org,
sandeepa.s.prabhu@gmail.com, shijie.huang@arm.com,
paul.gortmaker@windriver.com, tomasz.nowicki@linaro.org,
fu.wei@linaro.org, rostedt@goodmis.org, bristot@redhat.com,
linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, Dkvm@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org,
linux-efi@vger.kernel.org, devel@acpica.org
Cc: Tyler Baicar <tbaicar@codeaurora.org>,
"Jonathan (Zhixiong) Zhang" <zjzhang@codeaurora.org>,
Naveen Kaje <nkaje@codeaurora.org>
Subject: [PATCH V3 04/10] arm64: exception: handle Synchronous External Abort
Date: Fri, 7 Oct 2016 15:31:16 -0600 [thread overview]
Message-ID: <1475875882-2604-5-git-send-email-tbaicar@codeaurora.org> (raw)
In-Reply-To: <1475875882-2604-1-git-send-email-tbaicar@codeaurora.org>
SEA exceptions are often caused by an uncorrected hardware
error, and are handled when data abort and instruction abort
exception classes have specific values for their Fault Status
Code.
When SEA occurs, before killing the process, go through
the handlers registered in the notification list.
Update fault_info[] with specific SEA faults so that the
new SEA handler is used.
Signed-off-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
Signed-off-by: Tyler Baicar <tbaicar@codeaurora.org>
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
---
arch/arm64/include/asm/system_misc.h | 13 ++++++++
arch/arm64/mm/fault.c | 58 +++++++++++++++++++++++++++++-------
2 files changed, 61 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/include/asm/system_misc.h b/arch/arm64/include/asm/system_misc.h
index 57f110b..90daf4a 100644
--- a/arch/arm64/include/asm/system_misc.h
+++ b/arch/arm64/include/asm/system_misc.h
@@ -64,4 +64,17 @@ extern void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
#endif /* __ASSEMBLY__ */
+/*
+ * The functions below are used to register and unregister callbacks
+ * that are to be invoked when a Synchronous External Abort (SEA)
+ * occurs. An SEA is raised by certain fault status codes that have
+ * either data or instruction abort as the exception class, and
+ * callbacks may be registered to parse or handle such hardware errors.
+ *
+ * Registered callbacks are run in an interrupt/atomic context. They
+ * are not allowed to block or sleep.
+ */
+int sea_register_handler_chain(struct notifier_block *nb);
+void sea_unregister_handler_chain(struct notifier_block *nb);
+
#endif /* __ASM_SYSTEM_MISC_H */
diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
index 05d2bd7..81cb7ad 100644
--- a/arch/arm64/mm/fault.c
+++ b/arch/arm64/mm/fault.c
@@ -39,6 +39,22 @@
#include <asm/pgtable.h>
#include <asm/tlbflush.h>
+/*
+ * GHES SEA handler code may register a notifier call here to
+ * handle HW error record passed from platform.
+ */
+static ATOMIC_NOTIFIER_HEAD(sea_handler_chain);
+
+int sea_register_handler_chain(struct notifier_block *nb)
+{
+ return atomic_notifier_chain_register(&sea_handler_chain, nb);
+}
+
+void sea_unregister_handler_chain(struct notifier_block *nb)
+{
+ atomic_notifier_chain_unregister(&sea_handler_chain, nb);
+}
+
static const char *fault_name(unsigned int esr);
#ifdef CONFIG_KPROBES
@@ -480,6 +496,28 @@ static int do_bad(unsigned long addr, unsigned int esr, struct pt_regs *regs)
return 1;
}
+/*
+ * This abort handler deals with Synchronous External Abort.
+ * It calls notifiers, and then returns "fault".
+ */
+static int do_sea(unsigned long addr, unsigned int esr, struct pt_regs *regs)
+{
+ struct siginfo info;
+
+ atomic_notifier_call_chain(&sea_handler_chain, 0, NULL);
+
+ pr_err("Synchronous External Abort: %s (0x%08x) at 0x%016lx\n",
+ fault_name(esr), esr, addr);
+
+ info.si_signo = SIGBUS;
+ info.si_errno = 0;
+ info.si_code = 0;
+ info.si_addr = (void __user *)addr;
+ arm64_notify_die("", regs, &info, esr);
+
+ return 0;
+}
+
static const struct fault_info {
int (*fn)(unsigned long addr, unsigned int esr, struct pt_regs *regs);
int sig;
@@ -502,22 +540,22 @@ static const struct fault_info {
{ do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" },
{ do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" },
{ do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" },
- { do_bad, SIGBUS, 0, "synchronous external abort" },
+ { do_sea, SIGBUS, 0, "synchronous external abort" },
{ do_bad, SIGBUS, 0, "unknown 17" },
{ do_bad, SIGBUS, 0, "unknown 18" },
{ do_bad, SIGBUS, 0, "unknown 19" },
- { do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
- { do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
- { do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
- { do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
- { do_bad, SIGBUS, 0, "synchronous parity error" },
+ { do_sea, SIGBUS, 0, "level 0 SEA (trans tbl walk)" },
+ { do_sea, SIGBUS, 0, "level 1 SEA (trans tbl walk)" },
+ { do_sea, SIGBUS, 0, "level 2 SEA (trans tbl walk)" },
+ { do_sea, SIGBUS, 0, "level 3 SEA (trans tbl walk)" },
+ { do_sea, SIGBUS, 0, "synchronous parity or ECC err" },
{ do_bad, SIGBUS, 0, "unknown 25" },
{ do_bad, SIGBUS, 0, "unknown 26" },
{ do_bad, SIGBUS, 0, "unknown 27" },
- { do_bad, SIGBUS, 0, "synchronous parity error (translation table walk)" },
- { do_bad, SIGBUS, 0, "synchronous parity error (translation table walk)" },
- { do_bad, SIGBUS, 0, "synchronous parity error (translation table walk)" },
- { do_bad, SIGBUS, 0, "synchronous parity error (translation table walk)" },
+ { do_sea, SIGBUS, 0, "level 0 synch parity error" },
+ { do_sea, SIGBUS, 0, "level 1 synch parity error" },
+ { do_sea, SIGBUS, 0, "level 2 synch parity error" },
+ { do_sea, SIGBUS, 0, "level 3 synch parity error" },
{ do_bad, SIGBUS, 0, "unknown 32" },
{ do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" },
{ do_bad, SIGBUS, 0, "unknown 34" },
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2016-10-07 21:31 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-07 21:31 [PATCH V3 00/10] Add UEFI 2.6 and ACPI 6.1 updates for RAS on ARM64 Tyler Baicar
2016-10-07 21:31 ` [PATCH V3 01/10] acpi: apei: read ack upon ghes record consumption Tyler Baicar
2016-10-12 15:39 ` Punit Agrawal
2016-10-13 13:49 ` Baicar, Tyler
2016-10-07 21:31 ` [PATCH V3 02/10] ras: acpi/apei: cper: generic error data entry v3 per ACPI 6.1 Tyler Baicar
2016-10-11 17:28 ` Suzuki K Poulose
2016-10-12 22:10 ` Baicar, Tyler
2016-10-13 8:50 ` Suzuki K Poulose
2016-10-13 19:37 ` Baicar, Tyler
[not found] ` <912acc88-fbaf-2576-8048-1fcc67439600-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-10-14 16:28 ` Suzuki K Poulose
2016-10-14 16:39 ` Mark Rutland
2016-10-11 18:52 ` Russell King - ARM Linux
[not found] ` <20161011185236.GC1041-l+eeeJia6m9URfEZ8mYm6t73F7V6hmMc@public.gmane.org>
2016-10-12 22:18 ` Baicar, Tyler
2016-10-07 21:31 ` Tyler Baicar [this message]
2016-10-12 17:46 ` [PATCH V3 04/10] arm64: exception: handle Synchronous External Abort Punit Agrawal
2016-10-13 13:56 ` Baicar, Tyler
2016-10-07 21:31 ` [PATCH V3 06/10] acpi: apei: panic OS with fatal error status block Tyler Baicar
2016-10-13 13:00 ` Suzuki K Poulose
2016-10-13 23:34 ` Baicar, Tyler
2016-10-07 21:31 ` [PATCH V3 08/10] ras: acpi / apei: generate trace event for unrecognized CPER section Tyler Baicar
2016-10-13 10:54 ` Punit Agrawal
2016-10-13 20:15 ` Baicar, Tyler
[not found] ` <1475875882-2604-1-git-send-email-tbaicar-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-10-07 21:31 ` [PATCH V3 03/10] efi: parse ARMv8 processor error Tyler Baicar
2016-10-07 21:31 ` [PATCH V3 05/10] acpi: apei: handle SEA notification type for ARMv8 Tyler Baicar
2016-10-12 18:00 ` Punit Agrawal
2016-10-13 14:03 ` Baicar, Tyler
2016-10-14 9:39 ` Punit Agrawal
2016-10-18 12:44 ` Hanjun Guo
[not found] ` <496ddac3-a220-fd42-5ca1-3d0fb0238907-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-10-19 16:59 ` Abdulhamid, Harb
2016-10-23 9:13 ` Hanjun Guo
[not found] ` <1475875882-2604-6-git-send-email-tbaicar-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-10-18 13:04 ` Hanjun Guo
[not found] ` <57c81498-78f1-8aac-01b1-b5445415d822-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-10-19 17:12 ` Abdulhamid, Harb
2016-10-07 21:31 ` [PATCH V3 07/10] efi: print unrecognized CPER section Tyler Baicar
2016-10-07 21:31 ` [PATCH V3 09/10] trace, ras: add ARM processor error trace event Tyler Baicar
2016-10-07 21:39 ` Steven Rostedt
2016-10-12 21:23 ` Baicar, Tyler
2016-10-07 21:31 ` [PATCH V3 10/10] arm64: KVM: add guest SEA support Tyler Baicar
2016-10-13 13:14 ` Punit Agrawal
[not found] ` <87h98gs853.fsf-Z9gB6HwUD+TZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
2016-10-13 20:14 ` Baicar, Tyler
2016-10-14 9:38 ` Punit Agrawal
2016-10-14 21:58 ` Baicar, Tyler
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