From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ingo Molnar Subject: Re: [PATCH 1/2] x86/efi: Map EFI memmap entries in-order at runtime Date: Sun, 27 Sep 2015 08:50:45 +0200 Message-ID: <20150927065044.GA26125@gmail.com> References: <1443218539-7610-1-git-send-email-matt@codeblueprint.co.uk> <1443218539-7610-2-git-send-email-matt@codeblueprint.co.uk> <20150926055643.GA25877@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Andy Lutomirski Cc: Matt Fleming , Thomas Gleixner , "H. Peter Anvin" , Matt Fleming , "linux-kernel@vger.kernel.org" , "linux-efi@vger.kernel.org" , "Lee, Chun-Yi" , Borislav Petkov , Leif Lindholm , Peter Jones , James Bottomley , Matthew Garrett , Dave Young , stable , Ard Biesheuvel , Linus Torvalds , Borislav Petkov , Andy Lutomirski , Denys Vlasenko , Brian Gerst , Andrew Morton List-Id: linux-efi@vger.kernel.org * Andy Lutomirski wrote: > On Fri, Sep 25, 2015 at 10:56 PM, Ingo Molnar wrote: > > > > So this commit worries me. > > > > This bug is a good find, and the fix is obviously needed and urgent, but I'm not > > sure about the implementation at all. (I've Cc:-ed a few more x86 low level > > gents.) > > > > * Matt Fleming wrote: > >> + /* > >> + * Starting in UEFI v2.5 the EFI_PROPERTIES_TABLE > >> + * config table feature requires us to map all entries > >> + * in the same order as they appear in the EFI memory > >> + * map. That is to say, entry N must have a lower > >> + * virtual address than entry N+1. This is because the > >> + * firmware toolchain leaves relative references in > >> + * the code/data sections, which are split and become > >> + * separate EFI memory regions. Mapping things > >> + * out-of-order leads to the firmware accessing > >> + * unmapped addresses. > >> + * > > I'm clearly missing something. What is EFI doing that it doesn't care how big > the gap between sections is but it still requires them to be in order? It's not > as though x86_64 has an addressing mode that allows only non-negative offsets. It appears the problem is that what we think to be 'different sections' are in reality smaller parts of the same section. Any relative address calculation will be broken if we don't preserve the relative positions of these sections/sub-sections. Any CPU that supports addition is affected, it doesn't need any special addressing modes. Thanks, Ingo