From: Usama Arif <usamaarif642@gmail.com>
To: dwmw@amazon.co.uk, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, dave.hansen@linux.intel.com, ardb@kernel.org,
hpa@zytor.com
Cc: x86@kernel.org, apopple@nvidia.com, thuth@redhat.com,
nik.borisov@suse.com, kas@kernel.org,
linux-kernel@vger.kernel.org, linux-efi@vger.kernel.org,
kernel-team@meta.com, Usama Arif <usamaarif642@gmail.com>,
Michael van der Westhuizen <rmikey@meta.com>,
Tobias Fleig <tfleig@meta.com>
Subject: [PATCH 3/3] x86/mm: Move _PAGE_BIT_NOPTISHADOW from bit 58 to bit 9
Date: Wed, 22 Oct 2025 23:06:27 +0100 [thread overview]
Message-ID: <20251022220755.1026144-4-usamaarif642@gmail.com> (raw)
In-Reply-To: <20251022220755.1026144-1-usamaarif642@gmail.com>
Kexec from a kernel with 5-level page tables to one with 4-level page
tables is broken because bits above the physical address width are not
properly masked by the target kernel. This issue was particularly triggered
by _PAGE_BIT_NOPTISHADOW, which uses _PAGE_BIT_SOFTW5 (bit 58).
The ideal fix would be to mask the upper bits properly in all kernels.
However, this is not feasible due to:
- The logistical challenge of patching all older kernels in production
- The patch not being applicable for live patching
Instead, move _PAGE_BIT_NOPTISHADOW to use _PAGE_BIT_SOFTW1 (bit 9),
which is already masked by older kernels using PAGE_MASK. This is safe
as the other users of _PAGE_BIT_SOFTW1 (_PAGE_BIT_SPECIAL and
_PAGE_BIT_CPA_TEST) are only used for leaf entries, while
_PAGE_BIT_NOPTISHADOW is used for PGD and P4D entries only.
Fixes: d0ceea662d45 ("x86/mm: Add _PAGE_NOPTISHADOW bit to avoid updating userspace page tables")
Co-developed-by: Kiryl Shutsemau <kas@kernel.org>
Signed-off-by: Kiryl Shutsemau <kas@kernel.org>
Signed-off-by: Usama Arif <usamaarif642@gmail.com>
Reported-by: Michael van der Westhuizen <rmikey@meta.com>
Reported-by: Tobias Fleig <tfleig@meta.com>
---
arch/x86/include/asm/pgtable_types.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
index 2ec250ba467e2..616e928d87973 100644
--- a/arch/x86/include/asm/pgtable_types.h
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -29,6 +29,8 @@
#define _PAGE_BIT_PKEY_BIT3 62 /* Protection Keys, bit 4/4 */
#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
+/* _PAGE_BIT_SPECIAL and _PAGE_BIT_CPA_TEST only used for leaf entries */
+#define _PAGE_BIT_NOPTISHADOW _PAGE_BIT_SOFTW1
#define _PAGE_BIT_SPECIAL _PAGE_BIT_SOFTW1
#define _PAGE_BIT_CPA_TEST _PAGE_BIT_SOFTW1
#define _PAGE_BIT_UFFD_WP _PAGE_BIT_SOFTW2 /* userfaultfd wrprotected */
@@ -37,11 +39,9 @@
#ifdef CONFIG_X86_64
#define _PAGE_BIT_SAVED_DIRTY _PAGE_BIT_SOFTW5 /* Saved Dirty bit (leaf) */
-#define _PAGE_BIT_NOPTISHADOW _PAGE_BIT_SOFTW5 /* No PTI shadow (root PGD) */
#else
/* Shared with _PAGE_BIT_UFFD_WP which is not supported on 32 bit */
#define _PAGE_BIT_SAVED_DIRTY _PAGE_BIT_SOFTW2 /* Saved Dirty bit (leaf) */
-#define _PAGE_BIT_NOPTISHADOW _PAGE_BIT_SOFTW2 /* No PTI shadow (root PGD) */
#endif
/* If _PAGE_BIT_PRESENT is clear, we use these: */
--
2.47.3
next prev parent reply other threads:[~2025-10-22 22:08 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-22 22:06 [PATCH 0/3] x86: Fix kexec 5-level to 4-level paging transition Usama Arif
2025-10-22 22:06 ` [PATCH 1/3] x86/boot: Fix page table access in " Usama Arif
2025-10-22 23:16 ` Dave Hansen
2025-10-22 23:49 ` Usama Arif
2025-10-25 21:50 ` H. Peter Anvin
2025-10-23 17:43 ` kernel test robot
2025-10-24 8:07 ` kernel test robot
2025-10-22 22:06 ` [PATCH 2/3] efi/libstub: " Usama Arif
2025-10-23 14:13 ` Ard Biesheuvel
2025-10-23 14:28 ` Kiryl Shutsemau
2025-10-22 22:06 ` Usama Arif [this message]
2025-10-22 23:35 ` [PATCH 3/3] x86/mm: Move _PAGE_BIT_NOPTISHADOW from bit 58 to bit 9 Dave Hansen
2025-10-22 23:58 ` Usama Arif
2025-10-23 14:05 ` Dave Hansen
2025-10-23 14:24 ` Kiryl Shutsemau
2025-10-23 15:12 ` Dave Hansen
2025-10-23 15:25 ` Kiryl Shutsemau
2025-10-23 22:15 ` Usama Arif
2025-10-22 22:25 ` [PATCH 0/3] x86: Fix kexec 5-level to 4-level paging transition Usama Arif
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20251022220755.1026144-4-usamaarif642@gmail.com \
--to=usamaarif642@gmail.com \
--cc=apopple@nvidia.com \
--cc=ardb@kernel.org \
--cc=bp@alien8.de \
--cc=dave.hansen@linux.intel.com \
--cc=dwmw@amazon.co.uk \
--cc=hpa@zytor.com \
--cc=kas@kernel.org \
--cc=kernel-team@meta.com \
--cc=linux-efi@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=nik.borisov@suse.com \
--cc=rmikey@meta.com \
--cc=tfleig@meta.com \
--cc=tglx@linutronix.de \
--cc=thuth@redhat.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox