From: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
To: Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Shiju Jose <shiju.jose@huawei.com>
Cc: Yazen Ghannam <yazen.ghannam@amd.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Dave Jiang <dave.jiang@intel.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ard Biesheuvel <ardb@kernel.org>,
linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-cxl@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>
Subject: Re: [PATCH v4 7/7] cxl/memdev: Register for and process CPER events
Date: Mon, 18 Dec 2023 10:17:57 -0800 [thread overview]
Message-ID: <4cb5c275-566c-9414-7088-1e91378a409a@amd.com> (raw)
In-Reply-To: <20231215-cxl-cper-v4-7-01b6dab44fcd@intel.com>
On 12/15/2023 3:26 PM, Ira Weiny wrote:
> If the firmware has configured CXL event support to be firmware first
> the OS can process those events through CPER records. The CXL layer has
> unique DPA to HPA knowledge and standard event trace parsing in place.
>
> CPER records contain Bus, Device, Function information which can be used
> to identify the PCI device which is sending the event.
>
> Change pci driver registration to include registration for a CXL CPER
> notifier to process the events through the trace subsystem.
>
> Define and use scoped based management to simplify the handling of the
> pci device object.
>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>
>
> ---
[snip]
> + switch (event_type) {
> + case CXL_CPER_EVENT_GEN_MEDIA:
> + trace_cxl_general_media(cxlmd, type, &gen_media_event_uuid,
> + &event->gen_media);
> + break;
> + case CXL_CPER_EVENT_DRAM:
> + trace_cxl_dram(cxlmd, type, &dram_event_uuid, &event->dram);
> + break;
> + case CXL_CPER_EVENT_MEM_MODULE:
> + trace_cxl_memory_module(cxlmd, type, &mem_mod_event_uuid,
> + &event->mem_module);
> + break;
> + }
> +}
Is default case needed here?
> +EXPORT_SYMBOL_NS_GPL(cxl_event_trace_record, CXL);
> +
> +static void __cxl_event_trace_record(const struct cxl_memdev *cxlmd,
> + enum cxl_event_log_type type,
> + struct cxl_event_record_raw *record)
> {
> union cxl_event *evt = &record->event;
> uuid_t *id = &record->id;
> @@ -965,8 +986,8 @@ static void cxl_mem_get_records_log(struct cxl_memdev_state *mds,
> break;
>
> for (i = 0; i < nr_rec; i++)
> - cxl_event_trace_record(cxlmd, type,
> - &payload->records[i]);
> + __cxl_event_trace_record(cxlmd, type,
> + &payload->records[i]);
>
> if (payload->flags & CXL_GET_EVENT_FLAG_OVERFLOW)
> trace_cxl_overflow(cxlmd, type, payload);
> diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
> index e5d770e26e02..e7e9508fecac 100644
> --- a/drivers/cxl/cxlmem.h
> +++ b/drivers/cxl/cxlmem.h
> @@ -802,6 +802,10 @@ void set_exclusive_cxl_commands(struct cxl_memdev_state *mds,
> void clear_exclusive_cxl_commands(struct cxl_memdev_state *mds,
> unsigned long *cmds);
> void cxl_mem_get_event_records(struct cxl_memdev_state *mds, u32 status);
> +void cxl_event_trace_record(const struct cxl_memdev *cxlmd,
> + enum cxl_event_log_type type,
> + enum cxl_event_type event_type,
> + union cxl_event *event);
> int cxl_set_timestamp(struct cxl_memdev_state *mds);
> int cxl_poison_state_init(struct cxl_memdev_state *mds);
> int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len,
> diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
> index 0155fb66b580..638275569d63 100644
> --- a/drivers/cxl/pci.c
> +++ b/drivers/cxl/pci.c
> @@ -1,5 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0-only
> /* Copyright(c) 2020 Intel Corporation. All rights reserved. */
> +#include <asm-generic/unaligned.h>
> #include <linux/io-64-nonatomic-lo-hi.h>
> #include <linux/moduleparam.h>
> #include <linux/module.h>
> @@ -969,6 +970,58 @@ static struct pci_driver cxl_pci_driver = {
> },
> };
>
> +#define CXL_EVENT_HDR_FLAGS_REC_SEVERITY GENMASK(1, 0)
> +static void cxl_cper_event_call(enum cxl_event_type ev_type,
> + struct cxl_cper_event_rec *rec)
> +{
> + struct cper_cxl_event_devid *device_id = &rec->hdr.device_id;
> + struct pci_dev *pdev __free(pci_dev_put) = NULL;
> + struct cxl_dev_state *cxlds = NULL;
> + enum cxl_event_log_type log_type;
> + unsigned int devfn;
> + u32 hdr_flags;
> +
> + devfn = PCI_DEVFN(device_id->device_num, device_id->func_num);
> + pdev = pci_get_domain_bus_and_slot(device_id->segment_num,
> + device_id->bus_num, devfn);
> + if (!pdev)
> + return;
> +
> + guard(device)(&pdev->dev);
> + if (pdev->driver == &cxl_pci_driver)
> + cxlds = pci_get_drvdata(pdev);
> + if (!cxlds)
> + return;
> +
> + /* Fabricate a log type */
> + hdr_flags = get_unaligned_le24(rec->event.generic.hdr.flags);
> + log_type = FIELD_GET(CXL_EVENT_HDR_FLAGS_REC_SEVERITY, hdr_flags);
> +
> + cxl_event_trace_record(cxlds->cxlmd, log_type, ev_type, &rec->event);
Currently, when I run this, I see two trace events printed. One from
here, and another as a non_standard_event from ghes. I think both should
be unified?
I remember Dan pointing out to me this when I sent decoding for protocol
errors and its still pending on me for protocol errors.
Thanks,
Smita
> +}
> +
> +static int __init cxl_pci_driver_init(void)
> +{
> + int rc;
> +
> + rc = pci_register_driver(&cxl_pci_driver);
> + if (rc)
> + return rc;
> +
> + rc = cxl_cper_register_notifier(cxl_cper_event_call);
> + if (rc)
> + pci_unregister_driver(&cxl_pci_driver);
> +
> + return rc;
> +}
> +
> +static void __exit cxl_pci_driver_exit(void)
> +{
> + cxl_cper_unregister_notifier(cxl_cper_event_call);
> + pci_unregister_driver(&cxl_pci_driver);
> +}
> +
> +module_init(cxl_pci_driver_init);
> +module_exit(cxl_pci_driver_exit);
> MODULE_LICENSE("GPL v2");
> -module_pci_driver(cxl_pci_driver);
> MODULE_IMPORT_NS(CXL);
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 60ca768bc867..290d0a2651b2 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -1170,6 +1170,7 @@ int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
> u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
> struct pci_dev *pci_dev_get(struct pci_dev *dev);
> void pci_dev_put(struct pci_dev *dev);
> +DEFINE_FREE(pci_dev_put, struct pci_dev *, if (_T) pci_dev_put(_T))
> void pci_remove_bus(struct pci_bus *b);
> void pci_stop_and_remove_bus_device(struct pci_dev *dev);
> void pci_stop_and_remove_bus_device_locked(struct pci_dev *dev);
> @@ -1871,6 +1872,7 @@ void pci_cfg_access_unlock(struct pci_dev *dev);
> void pci_dev_lock(struct pci_dev *dev);
> int pci_dev_trylock(struct pci_dev *dev);
> void pci_dev_unlock(struct pci_dev *dev);
> +DEFINE_GUARD(pci_dev, struct pci_dev *, pci_dev_lock(_T), pci_dev_unlock(_T))
>
> /*
> * PCI domain support. Sometimes called PCI segment (eg by ACPI),
>
next prev parent reply other threads:[~2023-12-18 18:18 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-15 23:26 [PATCH v4 0/7] efi/cxl-cper: Report CPER CXL component events through trace events Ira Weiny
2023-12-15 23:26 ` [PATCH v4 1/7] cxl/trace: Pass uuid explicitly to event traces Ira Weiny
2023-12-15 23:26 ` [PATCH v4 2/7] cxl/events: Promote CXL event structures to a core header Ira Weiny
2023-12-15 23:26 ` [PATCH v4 3/7] cxl/events: Create common event UUID defines Ira Weiny
2023-12-15 23:26 ` [PATCH v4 4/7] cxl/events: Separate UUID from event structures Ira Weiny
2023-12-15 23:26 ` [PATCH v4 5/7] cxl/events: Create a CXL event union Ira Weiny
2023-12-15 23:26 ` [PATCH v4 6/7] firmware/efi: Process CXL Component Events Ira Weiny
2023-12-18 18:13 ` Smita Koralahalli
2023-12-18 20:24 ` Dan Williams
2023-12-19 15:43 ` Ira Weiny
2023-12-19 14:24 ` Jonathan Cameron
2023-12-19 18:01 ` Ira Weiny
2023-12-15 23:26 ` [PATCH v4 7/7] cxl/memdev: Register for and process CPER events Ira Weiny
2023-12-18 18:17 ` Smita Koralahalli [this message]
2023-12-18 20:56 ` Dan Williams
2023-12-19 16:58 ` Ira Weiny
2023-12-19 17:17 ` Ira Weiny
2023-12-19 14:37 ` Jonathan Cameron
2023-12-19 23:27 ` Ira Weiny
2023-12-19 23:36 ` Dan Williams
2023-12-20 0:29 ` Ira Weiny
2024-01-03 10:41 ` Jonathan Cameron
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