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From: Ira Weiny <ira.weiny@intel.com>
To: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>,
	<linux-efi@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-cxl@vger.kernel.org>
Cc: Ard Biesheuvel <ardb@kernel.org>,
	Alison Schofield <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	"Ira Weiny" <ira.weiny@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Yazen Ghannam <yazen.ghannam@amd.com>,
	Terry Bowman <terry.bowman@amd.com>,
	"Smita Koralahalli" <Smita.KoralahalliChannabasappa@amd.com>
Subject: Re: [PATCH v6 6/6] cxl/pci: Add trace logging for CXL PCIe Port RAS errors
Date: Fri, 24 Jan 2025 10:36:58 -0600	[thread overview]
Message-ID: <6793c1aa8d1ab_9882e29476@iweiny-mobl.notmuch> (raw)
In-Reply-To: <20250123084421.127697-7-Smita.KoralahalliChannabasappa@amd.com>

Smita Koralahalli wrote:
> The CXL drivers use kernel trace functions for logging endpoint and
> Restricted CXL host (RCH) Downstream Port RAS errors. Similar functionality
> is required for CXL Root Ports, CXL Downstream Switch Ports, and CXL
> Upstream Switch Ports.
> 
> Introduce trace logging functions for both RAS correctable and
> uncorrectable errors specific to CXL PCIe Ports. Use them to trace
> FW-First Protocol errors.
> 
> Co-developed-by: Terry Bowman <terry.bowman@amd.com>
> Signed-off-by: Terry Bowman <terry.bowman@amd.com>
> Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>

Reviewed-by: Ira Weiny <ira.weiny@intel.com>

  reply	other threads:[~2025-01-24 16:37 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-23  8:44 [PATCH v6 0/6] acpi/ghes, cper, cxl: Process CXL CPER Protocol errors Smita Koralahalli
2025-01-23  8:44 ` [PATCH v6 1/6] efi/cper, cxl: Prefix protocol error struct and function names with cxl_ Smita Koralahalli
2025-02-04  0:12   ` Fan Ni
2025-02-05 19:17   ` Gregory Price
2025-01-23  8:44 ` [PATCH v6 2/6] efi/cper, cxl: Make definitions and structures global Smita Koralahalli
2025-02-04  0:16   ` Fan Ni
2025-02-05 19:16   ` Gregory Price
2025-02-06 10:54     ` Jonathan Cameron
2025-02-06 16:14       ` Gregory Price
2025-02-06 17:14         ` Konstantin Ryabitsev
2025-02-06 17:32           ` Gregory Price
2025-01-23  8:44 ` [PATCH v6 3/6] efi/cper, cxl: Remove cper_cxl.h Smita Koralahalli
2025-02-04  0:20   ` Fan Ni
2025-02-05 19:18   ` Gregory Price
2025-01-23  8:44 ` [PATCH v6 4/6] acpi/ghes, cper: Recognize and cache CXL Protocol errors Smita Koralahalli
2025-02-03 18:59   ` Luck, Tony
2025-02-05 19:35     ` Gregory Price
2025-02-05 22:21   ` Dan Williams
2025-07-22 19:24   ` "invalid agent type: 1" in " Marc Herbert
2025-07-23  7:13     ` Marc Herbert
2025-07-24 14:49       ` Fabio M. De Francesco
2025-07-25 11:04         ` Jonathan Cameron
2025-07-28 15:01       ` dan.j.williams
2025-07-28 16:25     ` Koralahalli Channabasappa, Smita
2025-07-29  5:41       ` Marc Herbert
2025-07-29 15:52         ` Koralahalli Channabasappa, Smita
2025-07-29 17:39           ` dan.j.williams
2025-01-23  8:44 ` [PATCH v6 5/6] acpi/ghes, cxl/pci: Process CXL CPER Protocol Errors Smita Koralahalli
2025-02-03 19:03   ` Luck, Tony
2025-02-12 21:04     ` Koralahalli Channabasappa, Smita
2025-02-05 19:50   ` Gregory Price
2025-02-05 22:58   ` Dan Williams
2025-02-12 20:57     ` Koralahalli Channabasappa, Smita
2025-01-23  8:44 ` [PATCH v6 6/6] cxl/pci: Add trace logging for CXL PCIe Port RAS errors Smita Koralahalli
2025-01-24 16:36   ` Ira Weiny [this message]
2025-02-05 20:01   ` Gregory Price
2025-02-05 23:06   ` Dan Williams
2025-02-03 17:09 ` [PATCH v6 0/6] acpi/ghes, cper, cxl: Process CXL CPER Protocol errors Dave Jiang
2025-02-06 18:38 ` Dave Jiang

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