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From: Dave Hansen <dave.hansen@intel.com>
To: "Luck, Tony" <tony.luck@intel.com>,
	"Mehta, Sohil" <sohil.mehta@intel.com>,
	"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
	Dave Hansen <dave.hansen@linux.intel.com>
Cc: Jonathan Corbet <corbet@lwn.net>, Ingo Molnar <mingo@kernel.org>,
	Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
	Daniel Sneddon <daniel.sneddon@linux.intel.com>,
	"Huang, Kai" <kai.huang@intel.com>,
	Sandipan Das <sandipan.das@amd.com>,
	Breno Leitao <leitao@debian.org>,
	"Edgecombe, Rick P" <rick.p.edgecombe@intel.com>,
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	Vegard Nossum <vegard.nossum@oracle.com>,
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	Yian Chen <yian.chen@intel.com>,
	Andy Lutomirski <luto@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	"x86@kernel.org" <x86@kernel.org>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Ard Biesheuvel <ardb@kernel.org>,
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	Josh Poimboeuf <jpoimboe@kernel.org>,
	Xiongwei Song <xiongwei.song@windriver.com>,
	"Li, Xin3" <xin3.li@intel.com>,
	"Mike Rapoport (IBM)" <rppt@kernel.org>,
	Brijesh Singh <brijesh.singh@amd.com>,
	Michael Roth <michael.roth@amd.com>,
	Alexey Kardashevskiy <aik@amd.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>
Subject: Re: [PATCHv6 01/16] x86/cpu: Enumerate the LASS feature bits
Date: Mon, 23 Jun 2025 09:42:34 -0700	[thread overview]
Message-ID: <8f0913d7-9e77-41e0-91e2-17ca2454b296@intel.com> (raw)
In-Reply-To: <SJ1PR11MB6083AE2EF85FB5D2FE39D4F0FC79A@SJ1PR11MB6083.namprd11.prod.outlook.com>

On 6/23/25 09:25, Luck, Tony wrote:
>>> functions. But, the difference in usage between both of them seems very
>>> subtle. Could this be easily misused?
>>
>> Logically there are two completely different things:
>>
>>       1. Touching userspace
>>       2. Touching the lower half of the address space
>>
>> If it's only userspace in the lower half of the address space, then
>> there's no controversy. But the problem obviously occurs when you want
>> to touch kernel mappings in the lower half of the address space.
> 
> Why does the kernel create the mappings to poke kernel text
> for ALTERNATIVE patching in the lower half of the address space?
> 
> Instead of special "we really to want to access the lower addresses"
> code, wouldn't it be easier to map the "poke" virtual addresses in normal
> kernel upper-half space?

The upper half of the address space is shared kernel space, right? Every
PGD has identical contents in the upper half. So if we create a mapping
there,everybody get access to it. Every mm can access it. Every
*process* can access it. It still has kernel permissions of course, but
it's still a place that everybody can get at.

The lower half is *ONLY* accessible to the local mm. In this case, only
the text poking mm. It's a natural, safe, place to create a mapping that
you want to be private and not be exploited.

So, doing it in the upper half is risky.

If we *wanted*, we could have a non-shared PGD entry in the top half of
the address space. But we'd need to reserve its address space and all
that jazz. I'm not sure it's any better than just disabling LASS
enforcement for a moment.

  reply	other threads:[~2025-06-23 16:42 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-20 13:53 [PATCHv6 00/16] x86: Enable Linear Address Space Separation support Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 01/16] x86/cpu: Enumerate the LASS feature bits Kirill A. Shutemov
2025-06-20 15:25   ` Dave Hansen
2025-06-20 15:36   ` Xin Li
2025-06-20 17:31     ` Kirill A. Shutemov
2025-06-20 23:46       ` Xin Li
2025-06-21  0:45         ` H. Peter Anvin
2025-06-21  0:50           ` H. Peter Anvin
2025-06-23 17:40             ` Xin Li
2025-06-24  2:04               ` H. Peter Anvin
2025-06-24  4:57                 ` Xin Li
2025-06-24  5:11                   ` Xin Li
2025-06-20 16:02   ` Randy Dunlap
2025-06-20 16:12     ` Xin Li
2025-06-20 16:16       ` Randy Dunlap
2025-06-20 16:35   ` Borislav Petkov
2025-06-20 17:33     ` Kirill A. Shutemov
2025-06-20 18:29       ` Borislav Petkov
2025-06-23  8:17         ` Kirill A. Shutemov
2025-06-23 10:21           ` Borislav Petkov
2025-06-23 13:42             ` Kirill A. Shutemov
2025-06-26 15:18               ` Borislav Petkov
2025-06-26 16:07                 ` Borislav Petkov
2025-06-26 17:21                   ` Dave Hansen
2025-06-27 10:25                     ` Kirill A. Shutemov
2025-06-27 10:43                       ` Borislav Petkov
2025-06-27 13:57                       ` Dave Hansen
2025-06-20 18:14   ` Sohil Mehta
2025-06-20 18:24     ` Dave Hansen
2025-06-20 23:10       ` Sohil Mehta
2025-06-23 16:25       ` Luck, Tony
2025-06-23 16:42         ` Dave Hansen [this message]
2025-06-23 23:13           ` Luck, Tony
2025-06-23 23:36             ` H. Peter Anvin
2025-06-24  0:10               ` Luck, Tony
2025-06-24  2:03                 ` H. Peter Anvin
2025-06-25 18:51     ` H. Peter Anvin
2025-06-20 13:53 ` [PATCHv6 02/16] x86/asm: Introduce inline memcpy and memset Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 03/16] x86/alternatives: Disable LASS when patching kernel alternatives Kirill A. Shutemov
2025-06-20 15:33   ` Dave Hansen
2025-06-20 17:18     ` Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 04/16] x86/efi: Move runtime service initialization to arch/x86 Kirill A. Shutemov
2025-06-20 15:35   ` Dave Hansen
2025-06-20 17:42     ` Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 05/16] x86/cpu: Defer CR pinning setup until after EFI initialization Kirill A. Shutemov
2025-06-20 15:44   ` Dave Hansen
2025-06-20 13:53 ` [PATCHv6 06/16] efi: Disable LASS around set_virtual_address_map() EFI call Kirill A. Shutemov
2025-06-20 15:55   ` Dave Hansen
2025-06-20 17:50     ` Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 07/16] x86/vsyscall: Reorganize the #PF emulation code Kirill A. Shutemov
2025-06-20 18:43   ` Dave Hansen
2025-06-20 23:08     ` Andrew Cooper
2025-06-20 23:18       ` Sohil Mehta
2025-06-20 23:29         ` Andrew Cooper
2025-06-20 23:21       ` Dave Hansen
2025-06-21  3:35         ` H. Peter Anvin
2025-06-23 12:41         ` Kirill A. Shutemov
2025-06-23 12:46           ` Andrew Cooper
2025-06-23 15:32           ` Dave Hansen
2025-06-23 15:45             ` Andrew Cooper
2025-06-24 11:37             ` Kirill A. Shutemov
2025-06-24 14:11               ` Dave Hansen
2025-06-24 14:59                 ` [PATCH] x86/vsyscall: Do not require X86_PF_INSTR to emulate vsyscall Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 08/16] x86/traps: Consolidate user fixups in exc_general_protection() Kirill A. Shutemov
2025-06-20 14:47   ` Dave Hansen
2025-06-20 13:53 ` [PATCHv6 09/16] x86/vsyscall: Add vsyscall emulation for #GP Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 10/16] x86/vsyscall: Disable LASS if vsyscall mode is set to EMULATE Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 11/16] x86/cpu: Set LASS CR4 bit as pinning sensitive Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 12/16] x86/traps: Communicate a LASS violation in #GP message Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 13/16] x86/traps: Handle LASS thrown #SS Kirill A. Shutemov
2025-06-20 15:20   ` Xin Li
2025-06-20 17:53     ` Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 14/16] x86/cpu: Make LAM depend on LASS Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 15/16] x86/cpu: Enable LASS during CPU initialization Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 16/16] x86: Re-enable Linear Address Masking Kirill A. Shutemov
2025-06-20 15:38 ` [PATCHv6 00/16] x86: Enable Linear Address Space Separation support Dave Hansen
2025-06-20 22:04   ` Andrew Cooper
2025-06-20 22:29     ` H. Peter Anvin
2025-06-20 22:43     ` H. Peter Anvin
2025-06-20 22:46     ` Dave Hansen

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