From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D92FC35677 for ; Thu, 27 Feb 2020 16:53:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3F201246A0 for ; Thu, 27 Feb 2020 16:53:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582822417; bh=FCpEczpISHL8j03AAQqFyL4qGLGWBbexvzcAmi6nUKw=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=qVcGyOrhv4v+3/OQmS8OpuG5fh8gWQ3n2uH2dxdYDO5bVvT/T/Ozauh9b2NS8RMgr xAyErgPupxTPT37i1EQ/Ou/VnX4tzl7qRmacOSjpJNOPHs2szjqTO+cVcueIl5z/nK 8/XiW2ZNFd9QRBD9RBoNhCgrD983j1MhzQ5wcyWU= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730470AbgB0Qxg (ORCPT ); Thu, 27 Feb 2020 11:53:36 -0500 Received: from mail.kernel.org ([198.145.29.99]:37390 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727211AbgB0Qxg (ORCPT ); Thu, 27 Feb 2020 11:53:36 -0500 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 0F9BE2469F; Thu, 27 Feb 2020 16:53:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582822415; bh=FCpEczpISHL8j03AAQqFyL4qGLGWBbexvzcAmi6nUKw=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=wW7QVVDuMTfXdNeCfIsChW07MzXyoK8XLlBGOtXMiWqPA7GvXvbVyJF2pfGTDUiXV qrP5uc7DkE4+yIAgI5O6cDDbwWeovrEAqIG5Zn8fBYP/dOK1eQb/y4U1mM4+li6Iey WBsVateRyNYB1kT4FU/kWhYy40szzoMrTUqQjMfU= Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1j7MPl-008VgO-9G; Thu, 27 Feb 2020 16:53:33 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Thu, 27 Feb 2020 16:53:33 +0000 From: Marc Zyngier To: Ard Biesheuvel Cc: Linus Walleij , Linux ARM , linux-efi , Russell King , Nicolas Pitre , Catalin Marinas , Tony Lindgren Subject: Re: [PATCH v4 0/5] ARM: decompressor: use by-VA cache maintenance for v7 cores In-Reply-To: References: <20200226165738.11201-1-ardb@kernel.org> <91023d8f118440439cf55847a6bc43c2@kernel.org> Message-ID: X-Sender: maz@kernel.org User-Agent: Roundcube Webmail/1.3.10 X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: ardb@kernel.org, linus.walleij@linaro.org, linux-arm-kernel@lists.infradead.org, linux-efi@vger.kernel.org, linux@armlinux.org.uk, nico@fluxnic.net, catalin.marinas@arm.com, tony@atomide.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Sender: linux-efi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-efi@vger.kernel.org On 2020-02-27 16:47, Ard Biesheuvel wrote: > On Thu, 27 Feb 2020 at 17:01, Marc Zyngier wrote: >> >> On 2020-02-27 10:11, Linus Walleij wrote: >> > On Wed, Feb 26, 2020 at 5:57 PM Ard Biesheuvel wrote: >> > >> >> So instead, switch to the by-VA cache maintenance that the >> >> architecture >> >> requires for v7 and later (and ARM1176, as a side effect). >> >> >> >> Changes since v3: >> >> - ensure that the region that is cleaned after self-relocation of the >> >> zImage >> >> covers the appended DTB, if present >> >> >> >> Apologies to Linus, but due to this change, I decided not to take your >> >> Tested-by into account, and I would appreciate it if you could retest >> >> this version of the series? Thanks. >> > >> > No problem, I have tested it on the following: >> > >> > - ARMv7 Cortex A9 x 2 Qualcomm APQ8060 DragonBoard >> > - ARM PB11MPCore (4 x 1176) >> >> >> >> The ARM11MPCore isn't a bunch of 1176s glued together. It is actually >> a >> very >> different CPU, designed by a different team. >> >> >> > > It still takes the same code path in the cache routines, afaict: > - the architecture field in the main id register == 0xf, so it uses > __armv7_mmu_cache_flush > - ID_MMFR1[19:16] == 0x2, so it does not take the 'hierarchical' code > path which is modified by these patches Absolutely. From a SW perspective, this is treated in a similar way as ARM1176. The underlying HW is very different though... Thanks, M. -- Jazz is not dead. It just smells funny...