Re: [PATCHv6 01/16] x86/cpu: Enumerate the LASS feature bits

Kirill A. Shutemov
2025-06-27T10:25:25Z

On Thu, Jun 26, 2025 at 10:21:23AM -0700, Dave Hansen wrote:
> On 6/26/25 09:07, Borislav Petkov wrote:
> >> Makes more sense?
> > I meant this crap, ofc:
> >
> > switch (bug) {
> > case X86_BUG_CPU_MELTDOWN:
> > if (boot_cpu_has(X86_FEATURE_PTI))
> > return sysfs_emit(buf, "Mitigation: PTI\n");
> >
> > This should say "Mitigation: LASS" if LASS is enabled...
> >
> > Which begs the question: how do LASS and PTI interact now?
>
> Maybe my babbling about LASS mitigation Meltdown was ill considered. It
> seems that I've just muddied the waters.
>
> All the real LASS-capable hardware also has RDCL_NO=1 which is the
> _actual_ x86 Meltdown mitigation. Those systems are not vulnerable to
> Meltdown in the first place.
>
> They should say: "Not affected" for Meltdown, both before and after LASS.

Right. To best of my knowledge, SLAM is the only known vulnerability LASS
fixes directly so far.

So, we want an entry for SLAM?

I don't think it is very useful as we don't allow LAM if LASS is missing.

--
Kiryl Shutsemau / Kirill A. Shutemov