From mboxrd@z Thu Jan 1 00:00:00 1970 From: Denys Vlasenko Subject: [PATCH 3/23] make section names compatible with -ffunction-sections -fdata-sections: arm Date: Wed, 2 Jul 2008 02:34:26 +0200 Message-ID: <200807020234.26755.vda.linux@googlemail.com> Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Return-path: DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=domainkey-signature:received:received:from:to:subject:date :user-agent:cc:mime-version:content-disposition:content-type :content-transfer-encoding:message-id; bh=/oEN9AmonfWZSiNhb7GHNE9dIX85YGS4tKquj6V2JbY=; b=idjwzikcY2EoceS3OFCph//ZN5Wk7UyWCz/eT6+U8/fcaaAjsMnBkvA+EXzFfSrwpr Nzt56a95butFzHUwEYOuoqHJlvm910s+I2ZUU/eN8ybu9Lw4LeaDbRWQqAkGokUGNOlw Ijwnfi88neASdjglAfkRY+bbWdLGsl72vOZBo= Content-Disposition: inline Sender: linux-embedded-owner@vger.kernel.org List-ID: Content-Type: text/plain; charset="us-ascii" To: linux-arch@vger.kernel.org Cc: Russell King , David Howells , Ralf Baechle , Lennert Buytenhek , Josh Boyer , Paul Mackerras , David Woodhouse , Andi Kleen , torvalds@linux-foundation.org, akpm@linux-foundation.org, Paul Gortmaker , linux-embedded@vger.kernel.org, linux-kernel@vger.kernel.org, Tim Bird , Martin Schwidefsky , Dave Miller The purpose of this patch is to make kernel buildable with "gcc -ffunction-sections -fdata-sections". This patch fixes arm architecture. Signed-off-by: Denys Vlasenko -- vda --- 0.org/arch/arm/kernel/head-nommu.S Wed Jul 2 00:40:39 2008 +++ 1.fixname/arch/arm/kernel/head-nommu.S Wed Jul 2 00:44:22 2008 @@ -33,7 +33,7 @@ * numbers for r1. * */ - .section ".text.head", "ax" + .section ".head.text", "ax" .type stext, %function ENTRY(stext) msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode --- 0.org/arch/arm/kernel/head.S Wed Jul 2 00:40:39 2008 +++ 1.fixname/arch/arm/kernel/head.S Wed Jul 2 00:44:22 2008 @@ -74,7 +74,7 @@ * crap here - that's what the boot loader (or in extreme, well justified * circumstances, zImage) is for. */ - .section ".text.head", "ax" + .section ".head.text", "ax" .type stext, %function ENTRY(stext) msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode --- 0.org/arch/arm/kernel/init_task.c Wed Jul 2 00:40:39 2008 +++ 1.fixname/arch/arm/kernel/init_task.c Wed Jul 2 00:45:57 2008 @@ -30,7 +30,7 @@ * The things we do for performance.. */ union thread_union init_thread_union - __attribute__((__section__(".data.init_task"))) = + __attribute__((__section__(".init_task.data"))) = { INIT_THREAD_INFO(init_task) }; /* --- 0.org/arch/arm/kernel/vmlinux.lds.S Wed Jul 2 00:40:39 2008 +++ 1.fixname/arch/arm/kernel/vmlinux.lds.S Wed Jul 2 00:46:03 2008 @@ -23,10 +23,10 @@ #else . = PAGE_OFFSET + TEXT_OFFSET; #endif - .text.head : { + .head.text : { _stext = .; _sinittext = .; - *(.text.head) + *(.head.text) } .init : { /* Init code and data */ @@ -65,8 +65,8 @@ #endif . = ALIGN(4096); __per_cpu_start = .; - *(.data.percpu) - *(.data.percpu.shared_aligned) + *(.percpu.data) + *(.percpu.shared_aligned.data) __per_cpu_end = .; #ifndef CONFIG_XIP_KERNEL __init_begin = _stext; @@ -125,7 +125,7 @@ * first, the init task union, aligned * to an 8192 byte boundary. */ - *(.data.init_task) + *(.init_task.data) #ifdef CONFIG_XIP_KERNEL . = ALIGN(4096); @@ -137,7 +137,7 @@ . = ALIGN(4096); __nosave_begin = .; - *(.data.nosave) + *(.nosave.data) . = ALIGN(4096); __nosave_end = .; @@ -145,7 +145,7 @@ * then the cacheline aligned data */ . = ALIGN(32); - *(.data.cacheline_aligned) + *(.cacheline_aligned.data) /* * The exception fixup table (might need resorting at runtime) --- 0.org/arch/arm/mm/proc-v6.S Wed Jul 2 00:40:40 2008 +++ 1.fixname/arch/arm/mm/proc-v6.S Wed Jul 2 00:44:28 2008 @@ -164,7 +164,7 @@ .asciz "ARMv6-compatible processor" .align - .section ".text.init", #alloc, #execinstr + .section ".init.text", #alloc, #execinstr /* * __v6_setup --- 0.org/arch/arm/mm/proc-v7.S Wed Jul 2 00:40:40 2008 +++ 1.fixname/arch/arm/mm/proc-v7.S Wed Jul 2 00:44:28 2008 @@ -146,7 +146,7 @@ .ascii "ARMv7 Processor" .align - .section ".text.init", #alloc, #execinstr + .section ".init.text", #alloc, #execinstr /* * __v7_setup --- 0.org/arch/arm/mm/tlb-v6.S Wed Jul 2 00:40:40 2008 +++ 1.fixname/arch/arm/mm/tlb-v6.S Wed Jul 2 00:44:28 2008 @@ -87,7 +87,7 @@ mcr p15, 0, r2, c7, c5, 4 @ prefetch flush mov pc, lr - .section ".text.init", #alloc, #execinstr + .section ".init.text", #alloc, #execinstr .type v6wbi_tlb_fns, #object ENTRY(v6wbi_tlb_fns) --- 0.org/arch/arm/mm/tlb-v7.S Wed Jul 2 00:40:40 2008 +++ 1.fixname/arch/arm/mm/tlb-v7.S Wed Jul 2 00:44:28 2008 @@ -78,7 +78,7 @@ isb mov pc, lr - .section ".text.init", #alloc, #execinstr + .section ".init.text", #alloc, #execinstr .type v7wbi_tlb_fns, #object ENTRY(v7wbi_tlb_fns)