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From: Hugo Villeneuve <hugo@hugovil.com>
To: Thiago Galesi <thiagogalesi@gmail.com>
Cc: Florian Fainelli <florian@openwrt.org>,
	linux-kernel@vger.kernel.org, linux-embedded@vger.kernel.org
Subject: Re: FPGA programming driver architecture
Date: Fri, 9 Jan 2009 10:07:25 -0500	[thread overview]
Message-ID: <20090109100725.77a07e74.hugo@hugovil.com> (raw)
In-Reply-To: <82ecf08e0901081414u15af3c2dy9c88a242db024dc7@mail.gmail.com>

On Thu, 8 Jan 2009 20:14:36 -0200
"Thiago Galesi" <thiagogalesi@gmail.com> wrote:

> > > > Hi,
> > > > I have written some code to program a FPGA in Linux, for two
> > > > different types of boards: one uses a serial interface (SPI) and
> > > > the second a parallel interface. I have been able to sucessfully
> > > > program both boards. I'm now trying to clean my code and make it
> > > > more generic, as well as better in line with the Linux driver
> > > > model.
> 
> Considering the several FPGA models available and ways to program it,
> I guess the important thing to consider is what can be made generic.
> (that is what will become fpgaload)

I have a pretty good idea of what goes into the core and
what goes into the specific interface modules (spi, parallel, etc).

> Also, there may be cases where after FPGA is programmed it "becomes a
> device" (PCI or whatever)

This is exactly the case for my board, but it doesn´t change anything
to the programming side of things, apart for the fact that the FPGA
must be configured before using any in-FPGA PCI bus for example.

> > > - fpgaload-core which contains all the code that can be shared
> > > between the drivers like requesting firmware, providing sysfs
> > > attributes,
> > > - fpgaload-spi would handle the low-level SPI connection
> > > - fpgaload-par would handle the low-level parallel connection
> 
> I think this maybe split into three layers (maybe)
> 
> 1 - low level connection: paralell / spi / i2c / whatever
> 2 - vendor: xylinx, altera, etc
> 3 - generic stuff
> 
> Take a look at the MTD and SPI drivers and how they split things

I think that for the moment, I will focus on implementing the core
module and the parallel/SPI interfaces only. Later we may want to add
more fonctionality (vendors, JTAG, etc).

But for now, my main problem is that I need to have some insight on how
I actually implement the different modules:

Bus driver?
class driver?
platform driver?

Can anybody give some advice on that?

Thank-you, Hugo.

---------------
Hugo Villeneuve
www.hugovil.com
---------------

  parent reply	other threads:[~2009-01-09 15:07 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20081212150314.6ea24996.hugo@hugovil.com>
2008-12-13 12:58 ` FPGA programming driver architecture Florian Fainelli
2008-12-15 18:16   ` Hugo Villeneuve
2009-01-08 20:18   ` Hugo Villeneuve
2009-01-08 22:14     ` Thiago Galesi
2009-01-08 22:47       ` Leon Woestenberg
2009-01-08 22:57         ` Florian Fainelli
2009-01-08 23:07           ` Leon Woestenberg
2009-01-09  3:14             ` Duane Ellis
2009-01-09 12:24               ` Alexander Clouter
2009-01-09 15:07       ` Hugo Villeneuve [this message]
2009-01-09 23:40         ` Hans J. Koch

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