* Re: PATCH [0/3]: Simplify the kernel build by removing perl.
From: Alexander Neundorf @ 2009-01-16 7:28 UTC (permalink / raw)
To: Embedded Linux mailing list
In-Reply-To: <200901160011.11679.rob@landley.net>
On Friday 16 January 2009 07:11:09 Rob Landley wrote:
...
> P.S. I still hope autoconf dies off and the world wakes up and moves away
> from that.
Parts of it did already :-)
In KDE we switched to CMake, getting rid of automake, autoconf, libtool and
m4, and many of those developers now bring CMake into other projects they are
working on.
Still, the configure (or cmake) step remains, and it remains non-parallel, it
is much harder to parallelize than the build itself.
Alex
^ permalink raw reply
* Re: PATCH [0/3]: Simplify the kernel build by removing perl.
From: Valdis.Kletnieks @ 2009-01-16 14:54 UTC (permalink / raw)
To: Rob Landley
Cc: Jamie Lokier, Paul Mundt, Sam Ravnborg, Mark A. Miller,
Bernd Petrovitsch, Leon Woestenberg, H. Peter Anvin,
Embedded Linux mailing list, linux-kernel, Andrew Morton
In-Reply-To: <200901160011.11679.rob@landley.net>
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On Fri, 16 Jan 2009 00:11:09 CST, Rob Landley said:
> P.S. I still hope autoconf dies off and the world wakes up and moves away
> from that. And from makefiles for that matter. But in the meantime, I can
> work around it with enough effort.
What do you propose autoconf and makefiles get replaced by?
% wc pidgin/configure*
34287 118303 1004074 pidgin/configure
2499 7684 81532 pidgin/configure.ac
Which you rather code, 2.5K lines of autoconf or 35K lines of configure
script? As long as there's enough diversity to require configure scripts,
there's going to be a demand for an autoconf-ish feature to ease writing them.
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^ permalink raw reply
* Re: PATCH [0/3]: Simplify the kernel build by removing perl.
From: Rob Landley @ 2009-01-16 21:54 UTC (permalink / raw)
To: Valdis.Kletnieks, Embedded Linux mailing list; +Cc: Sam Ravnborg, linux-kernel
In-Reply-To: <15458.1232117682@turing-police.cc.vt.edu>
On Friday 16 January 2009 08:54:42 Valdis.Kletnieks@vt.edu wrote:
> On Fri, 16 Jan 2009 00:11:09 CST, Rob Landley said:
> > P.S. I still hope autoconf dies off and the world wakes up and moves
> > away from that. And from makefiles for that matter. But in the
> > meantime, I can work around it with enough effort.
>
> What do you propose autoconf and makefiles get replaced by?
At a first guess, meaningful standards and an acknowledgement that Linux is a
platform in its own right? Between the two of them, that's 90% of your
problem right there.
Not a new issue, here's a link from 2002:
http://news.cnet.com/2100-1001-950180.html
And here's a multi-vendor effort at a standards group (the 86open project to
definite a Unix binary standard for x86 processors) dissolving itself way back
in 1999 with a declaration that the Linux binary format already was an open
standard and other unixes should just use things like lxrun to support that:
http://www.telly.org/86open/
Also, it would be nice if configure steps could stop entangling 1) users
providing preferences (command line options like --prefix or most of the --
enable and --disable flags) for which things like kconfig might make more
sense, 2) probe for installed packages like zlib and enabling optional support
if found, 3) questions like "does my build environment provide strlcpy()".
Turning that into a big hairball does not help keep things simple.
> % wc pidgin/configure*
> 34287 118303 1004074 pidgin/configure
> 2499 7684 81532 pidgin/configure.ac
>
> Which you rather code, 2.5K lines of autoconf or 35K lines of configure
> script?
I consider it a false dichotomy. I prefer "neither", and have seen it done
successfully many times.
I've never built pidgin from source, but I've got the output of the binutils
build in a log file. How many of these tests are actually necessary on any
Linux system:
checking for C compiler default output file name... a.out
checking whether the C compiler works... yes
checking for suffix of object files... o
checking whether gcc accepts -g... yes
checking for library containing strerror... none required
checking how to run the C preprocessor... gcc -E
checking whether build environment is sane... yes
checking whether gcc and cc understand -c and -o together... yes
checking for an ANSI C-conforming const... yes
checking for inline... inline
It just goes on and on and on like this. Tests like "checking whether byte
ordering is bigendian... no" means "Either I didn't know endian.h existed, or
I don't trust it to be there". How about the long stretches checking for the
existence of header files specified by posix? Or this gem:
checking for gawk... no
checking for mawk... no
checking for nawk... no
checking for awk... awk
(If you can use awk, when is it _not_ there? Probable answer: there was some
broken version on irix back in 1992 with zero remaining seats today, and they
never went back to clean anything out of the makefile because "simplifying the
build" and "autoconf" do not go together, and because you can't sanely
regression test against build environments nobody has anymore.)
This argument is a can of worms, and the linux-kernel list probably isn't the
best place for it. However, "install mingw on windows instead of trying to
get your thing to build under Visual Studio" is a decent support strategy.
Tinycc and Intel's icc both implemented gcc extensions to build the kernel,
and the kernel's been removing such extensions where c99 versions are
available since then. Things like uClibc implement standards and copy glibc
extensions that are actually used.
In the era of open source, it's now a viable strategy to specify, document,
and require a standardized build environment. The way to make that build
environment portable is to keep it simple and standardized, not to create a
tower of #ifdefs testing the output of a huge environment probing shell
script.
Rob
^ permalink raw reply
* RE: ramfs/tmpfs for application partition
From: Jacob Avraham @ 2009-01-17 9:39 UTC (permalink / raw)
To: Leisner, Martin, linux-embedded@vger.kernel.org
In-Reply-To: <556445368AFA1C438794ABDA8901891C0A5A0C8E@USA0300MS03.na.xerox.net>
>
> Not sure I fully understand....
>
> You basically want two blobs -- the initramfs and the application?
>
Yes, I want to keep on the flash a stable, rarely changed, OS image, which is in initramfs
format, and another application image, which is changing frequently.
> You can expand the initramfs by copying to it...so you mount the
> application and run a script to copy it to initramfs before running it.
>
When you say 'you mount the application' it means that the application
image on the flash has to be in some filesystem format, right? Like cramfs?
On the other hand, if I want the application directory tree to reside
in memory (and handle application persistency needs via the JFFS2 partition),
maybe all I need is to keep a compressed tar image of the application on the flash,
and untar it into /my/application/partition, which will be in initramfs?
So I don't need to create another tmpfs filesystem as suggested in another post?
Is there a better way to handle this?
> marty
>
> >
> > Hi,
> >
> > I have a system with 128M RAM and a flash partitioned so that 10M
> is
> > dedicated to initramfs image,
> > 6M to application partition. And another 6M for JFFS2.
> > As I have plenty of RAM, I'd like to have my application directory
> > mounted on RAM, from a pre-populated
> > filesystem that resides in the 6M application partition.
> > So basically I want to use the same mechanism as initramfs, but
> mounted
> > on /my/app/partition instead of root.
> > Does it make sense? How do I go about and do that?
> >
> >
> > Jacob Avraham
> >
************************************************************************************
This footnote confirms that this email message has been scanned by
PineApp Mail-SeCure for the presence of malicious code, vandals & computer viruses.
************************************************************************************
^ permalink raw reply
* Re: PATCH [0/3]: Simplify the kernel build by removing perl.
From: Jamie Lokier @ 2009-01-17 9:51 UTC (permalink / raw)
To: Rob Landley
Cc: Valdis.Kletnieks, Embedded Linux mailing list, Sam Ravnborg,
linux-kernel
In-Reply-To: <200901161554.02054.rob@landley.net>
Rob Landley wrote:
> On Friday 16 January 2009 08:54:42 Valdis.Kletnieks@vt.edu wrote:
> > On Fri, 16 Jan 2009 00:11:09 CST, Rob Landley said:
> > > P.S. I still hope autoconf dies off and the world wakes up and moves
> > > away from that. And from makefiles for that matter. But in the
> > > meantime, I can work around it with enough effort.
> >
> > What do you propose autoconf and makefiles get replaced by?
>
> I've never built pidgin from source, but I've got the output of the binutils
> build in a log file.
> How many of these tests are actually necessary on an Linux system:
None, but then it's not a Linux-only program that you're compiling.
(Nor is it Linux-in-2009-only).
If you _know_ you're running on Linux from a particular era, you can
provide a config.cache file with the correct answers already filled in.
I agree that Autoconf sucks (I've written enough sucking Autoconf
macros myself, I hate it), but the tough part is providing a suitable
replacement when you still want portable source code.
> It just goes on and on and on like this. Tests like "checking
> whether byte ordering is bigendian... no" means "Either I didn't
> know endian.h existed, or I don't trust it to be there". How about
> the long stretches checking for the existence of header files
> specified by posix?
You seem to be arguing for "let's make all our programs Linux-specific
(and Glibc-specific in many cases)". Given all the problems you've
seen with cross-compiling, let alone compiling for different OS
platforms, that seems a little odd.
-- Jamie
^ permalink raw reply
* [RFC 2.6.28 1/2] gpiolib: add set/get batch v4
From: Jaya Kumar @ 2009-01-17 9:57 UTC (permalink / raw)
Cc: David Brownell, Eric Miao, Paulius Zaleckas, Geert Uytterhoeven,
Sam Ravnborg, linux-arm-kernel, linux-fbdev-devel, linux-kernel,
linux-embedded, Jaya Kumar
Hi friends,
This is v4 of batch support for gpiolib. Thanks to David Brownell, Eric Miao,
David Hylands, Robin, Ben, Jamie and others for prior feedback. The post for
v3 summarized the previous discussion. Since then the changes I've made are:
- split the patches into generic and arch specific
- optimizing the empty mask case
- adjusting the API to add error returns
- documenting this optional API in gpio.txt
- cleanup of the commenting
Please let me know your thoughts and feedback.
Thanks,
jaya
Cc: David Brownell <david-b@pacbell.net>
Cc: Eric Miao <eric.miao@marvell.com>
Cc: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: linux-arm-kernel@lists.arm.linux.org.uk
Cc: linux-fbdev-devel@lists.sourceforge.net
Cc: linux-kernel@vger.kernel.org
Cc: linux-embedded@vger.kernel.org
Signed-off-by: Jaya Kumar <jayakumar.lkml@gmail.com>
---
Documentation/gpio.txt | 60 ++++++++
drivers/gpio/Kconfig | 5 +
drivers/gpio/gpiolib.c | 323 ++++++++++++++++++++++++++++++++++++++++++++
include/asm-generic/gpio.h | 19 +++-
4 files changed, 406 insertions(+), 1 deletions(-)
diff --git a/Documentation/gpio.txt b/Documentation/gpio.txt
index b1b9887..d7e5fe9 100644
--- a/Documentation/gpio.txt
+++ b/Documentation/gpio.txt
@@ -185,6 +185,66 @@ and not to need spinlocks. Such optimized calls can make bitbanging
applications a lot more efficient (in both space and time) than spending
dozens of instructions on subroutine calls.
+[OPTIONAL] Spinlock-Safe GPIO Batch access
+------------------------------------------
+The original GPIO API implements single bit access to GPIO pins. Some
+drivers for devices that treat GPIO as a mechanism for bulk data transfer
+may find the performance of the single bit API to be inadequate. In this
+scenario, the user can consider enabling the batch access API. This API is
+as follows:
+
+ /* BATCH GPIO INPUT */
+int gpio_get_batch(unsigned gpio, u32 bitmask, int maskwidth, u32 *result);
+
+The following examples help explain how this function is to be used.
+ Q: How to get gpio pins 0 through 7? (8 bits)
+ A: gpio_get_batch(gpio=0, bitmask=0xFF, width=8, &result) result=0xnn
+ Q: How to get gpio pins 58 through 73? (16 bits)
+ A: gpio_get_batch(gpio=58, bitmask=0xFFFF, width=16, &result) result=0xnnnn
+ Q: How to get gpio pins 16 through 47? (32 bits)
+ A: gpio_get_batch(offset=16, bitmask=0xFFFFFFFF, width=32, &result)
+ A: result=0xnnnnnnnn
+
+ /* BATCH GPIO OUTPUT */
+int gpio_set_batch(unsigned gpio, u32 values, u32 bitmask, int maskwidth);
+
+The following examples help explain how this function is to be used.
+ Q: How to set gpio pins 0 through 7 to all 0? (8 bits)
+ A: gpio_set_batch(gpio=0, values=0x0, bitmask=0xFF, width=8);
+ Q: How to set gpio pins 58 through 73 to all 1? (16 bits)
+ A: gpio_set_batch(gpio=58, values=0xFFFF, bitmask=0xFFFF, width=16);
+ Q: How to set gpio pins 16 through 47 to 0xCAFEC001? (32 bits)
+ A: gpio_set_batch(gpio=16, values=0xCAFEC001, bitmask=0xFFFFFFFF, width=32);
+
+The following example shows the use of the batch API and a comparison with
+the original single bit API:
+
+Original input method which loops through a set of pins:
+- for (i = 0; i <= (DB15_GPIO_PIN - DB0_GPIO_PIN) ; i++)
+- res |= (gpio_get_value(DB0_GPIO_PIN + i)) ? (1 << i) : 0;
+
+Batch input method:
++ u16 val;
++ err = gpio_get_batch(DB0_GPIO_PIN, 0xFFFF, 16, &val);
+
+Original output method:
+- for (i = 0; i <= (DB15_GPIO_PIN - DB0_GPIO_PIN) ; i++)
+- gpio_set_value(DB0_GPIO_PIN + i, (data >> i) & 0x01);
+Batch output method:
++ int err;
++ err = gpio_set_batch(DB0_GPIO_PIN, data, 0xFFFF, 16);
+
+Using these calls for GPIOs that can't safely be accessed without sleeping
+(see below) is an error.
+
+Platform-specific implementations are encouraged to optimize the two
+calls by checking if the batch get/set requested can be achieved within the
+platform's fast path access to gpio registers. For example, if the starting
+gpio and width of bits to be written is contained within a single register
+then the platform specific implementation may choose to execute it. If the
+request is more complex, then the platform specific implementation can
+choose to call upon the platform independent __gpio_get/set_batch functions
+which are able to cross gpio_chip boundaries.
GPIO access that may sleep
--------------------------
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 3d25654..474070b 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -37,6 +37,11 @@ menuconfig GPIOLIB
if GPIOLIB
+config GPIOLIB_BATCH
+ bool "Batch GPIO support"
+ help
+ Say Y here to add the capability to batch set/get GPIOs.
+
config DEBUG_GPIO
bool "Debug GPIO calls"
depends on DEBUG_KERNEL
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 35e7aea..a9cf75e 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -643,6 +643,323 @@ static inline void gpiochip_unexport(struct gpio_chip *chip)
#endif /* CONFIG_GPIO_SYSFS */
+#ifdef CONFIG_GPIOLIB_BATCH
+/**
+ * __generic_gpio_set_batch() - Set batch of gpio pins in provided gpio_chip.
+ * @chip: gpio_chip containing this set of pins
+ * @offset: starting gpio pin
+ * @values: values to assign including masked bits
+ * @bitmask: the bitmask to be applied to values
+ * @width: the width of the bitmask
+ * Context: any
+ *
+ * This provides a generic platform independent set_batch capability.
+ * It invokes the associated gpio_chip.set() method to actually set the
+ * value. gpio_chip-s that don't implement their own optimized
+ * set_batch function are assigned this function as a default.
+ *
+ * The following examples help explain how this function works.
+ * Q: How to set gpio pins at offset 0 through 7 to all 0? (8 bits)
+ * A: offset=0, values=0x0, bitmask=0xFF, width=8
+ * Q: How to set gpio pins at offset 26 through 31 to all 1? (6 bits)
+ * A: offset=26, values=0x3F, bitmask=0x3F, width=6
+ * Q: How to set gpio pins at offset 16 through 31 to 0xCAFE? (16 bits)
+ * A: offset=16, values=0xCAFE, bitmask=0xFFFF, width=16
+ * Q: Why isn't width calculated from the mask here?
+ * A: This function is intended to be called repetitively and doing the
+ * bit shift looping to calculate the width here would be an undesirable
+ * penalty. Instead, the width is provided by the caller, thus avoiding
+ * the performance penalty since it is a fixed value known by the caller.
+ *
+ * Returns a negative errno if the caller supplied bad data, such as
+ * offset or width in excess of this chips gpio. Otherwise, we return zero
+ * as a success code.
+ */
+static int __generic_gpio_set_batch(struct gpio_chip *chip, unsigned offset,
+ u32 values, u32 bitmask, int width)
+{
+ int i;
+ int value;
+ u32 mask;
+
+ /*
+ * If the caller attempted to exceed the number of gpios that
+ * are in this chip, then we flag that as an invalid value for
+ * either the offset or the width supplied.
+ */
+ if (offset + width > chip->ngpio)
+ return -EINVAL;
+
+ /*
+ * We start the loop and continue till we reach the width
+ * of the bitmask that is provided to us.
+ */
+ for (i = 0; i < width; i++) {
+ /*
+ * If this bit is enabled by the bitmask then
+ * we perform the set. If it is disabled we leave
+ * it alone.
+ */
+ mask = 1 << i;
+ if (bitmask & mask) {
+ value = values & mask;
+ chip->set(chip, offset + i, value);
+ }
+ }
+
+ return 0;
+}
+
+/**
+ * __generic_gpio_get_batch() - Get batch of gpio pins in provided gpio_chip.
+ * @chip: gpio_chip containing this set of pins
+ * @offset: starting gpio pin
+ * @values: values to assign including masked bits
+ * @bitmask: the bitmask to be applied to values
+ * @width: the width of the bitmask
+ * @result: the result to be returned
+ * Context: any
+ *
+ * This provides a generic platform independent get_batch capability.
+ * It invokes the associated gpio_chip.get() method to actually set the
+ * value. gpio_chip-s that don't implement their own optimized
+ * get_batch function are assigned this function as a default.
+ *
+ * The following examples help explain how this function works.
+ * Q: How to get gpio pins at offset 0 through 7? (8 bits)
+ * A: offset=0, bitmask=0xFF, width=8, result=0xnn
+ * Q: How to get gpio pins at offset 26 through 31? (6 bits)
+ * A: offset=26, bitmask=0x3F, width=6, result=0xnn
+ * Q: How to get gpio pins at offset 16 through 31? (16 bits)
+ * A: offset=16, bitmask=0xFFFF, width=16, result=0xnnnn
+ * Q: Why isn't width calculated from the mask here?
+ * A: This function is intended to be called repetitively and doing the
+ * bit shift looping to calculate the width here would be an undesirable
+ * penalty. Instead, the width is provided by the caller, thus avoiding
+ * the performance penalty since it is a fixed value known by the caller.
+ *
+ * Returns a negative errno if the caller supplied bad data, such as
+ * offset or width in excess of this chips gpio. Otherwise, we return zero
+ * as a success code.
+ * Context: any
+ */
+static int __generic_gpio_get_batch(struct gpio_chip *chip, unsigned offset,
+ u32 bitmask, int width, u32 *result)
+{
+ int i;
+ u32 mask;
+ u32 values = 0;
+
+ /*
+ * If the caller attempted to exceed the number of gpios that
+ * are in this chip, then we flag that as an invalid value for
+ * either the offset or the width supplied.
+ */
+ if (offset + width > chip->ngpio)
+ return -EINVAL;
+
+ /*
+ * We start the loop and continue till we reach the width
+ * of the bitmask that is provided to us.
+ */
+ for (i = 0; i < width; i++) {
+ /*
+ * If this bit is enabled by the bitmask then
+ * we perform the get. If it is disabled we leave
+ * it alone thus leaving it as 0 because we initialized
+ * values.
+ */
+ mask = 1 << i;
+ if (bitmask & mask) {
+ if (chip->get(chip, offset + i))
+ values |= mask;
+ }
+ }
+
+ *result = values;
+ return 0;
+}
+
+/**
+ * __gpio_set_batch() - set batch of gpio pins across multiple gpio_chip-s
+ * @gpio: starting gpio pin
+ * @values: values to assign including masked bits
+ * @bitmask: the bitmask to be applied to values
+ * @bitwidth: the width of the bitmask
+ * Context: any
+ *
+ * This function is platform independent and uses the starting gpio and
+ * bitwidth information to iterate through the set of required gpio_chips
+ * to use their set_batch capability in order to set a batch of gpio pins.
+ * This function handles going across gpio_chip boundaries. It is intended
+ * to be called from arch/mach specific code if they detect that the caller
+ * requires functionality outside the fast-path.
+ *
+ * The following examples help explain how this function is to be used.
+ * Q: How to set gpio pins 0 through 7 to all 0? (8 bits)
+ * A: gpio=0, values=0x0, bitmask=0xFF, width=8
+ * Q: How to set gpio pins 58 through 73 to all 1? (16 bits)
+ * A: gpio=58, values=0xFFFF, bitmask=0xFFFF, width=16
+ * Q: How to set gpio pins 16 through 47 to 0xCAFEC001? (32 bits)
+ * A: offset=16, values=0xCAFEC001, bitmask=0xFFFFFFFF, width=32
+ * Q: Why isn't width calculated from the mask here?
+ * A: This function is intended to be called repetitively and doing the
+ * bit shift looping to calculate the width here would be an undesirable
+ * penalty. Instead, the width is provided by the caller, thus avoiding
+ * the performance penalty since it is a fixed value known by the caller.
+ *
+ * Returns a negative errno if the caller supplied bad data, such as
+ * gpio or width in excess of the platforms max gpio. Otherwise, we return
+ * zero as a success code.
+ *
+ */
+int __gpio_set_batch(unsigned gpio, u32 values, u32 bitmask, int bitwidth)
+{
+ struct gpio_chip *chip;
+ int i = 0;
+ int value, width, remwidth;
+ u32 mask;
+ int ret;
+
+ /*
+ * If the caller attempted to exceed the number of gpios that
+ * are available here, then we flag that as an invalid value for
+ * either the gpio or the width supplied.
+ */
+ if ((bitwidth > 32) || (gpio + bitwidth > ARCH_NR_GPIOS))
+ return -EINVAL;
+
+ do {
+ chip = gpio_to_chip(gpio + i);
+ WARN_ON(extra_checks && chip->can_sleep);
+
+ value = values >> i; /* shift off the used data bits */
+
+ /* Work out the remaining width in this chip. */
+ remwidth = ((chip->base + (int) chip->ngpio) -
+ ((int) gpio + i));
+
+ /*
+ * Check if the remaining bits to be handled are less than
+ * the remaining width in this chip.
+ */
+ width = min(bitwidth, remwidth);
+
+ /* Shift off the used mask bits. */
+ mask = bitmask >> i;
+
+ /* Now adjust mask by width of this set. */
+ mask &= ((1 << width) - 1);
+
+ /* If the mask is empty, then we can skip this chip. */
+ if (mask) {
+ ret = chip->set_batch(chip, gpio + i - chip->base,
+ value, mask, width);
+ if (ret)
+ return ret;
+ }
+
+ /* deduct the used bits from our todolist */
+ i += width;
+ bitwidth -= width;
+ } while (bitwidth);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(__gpio_set_batch);
+
+/**
+ * __gpio_get_batch() - get batch of gpio pins across multiple gpio_chip-s
+ * @gpio: starting gpio pin
+ * @bitmask: the bitmask to be applied to values
+ * @bitwidth: the width of the bitmask
+ * @result: returned values
+ * Context: any
+ *
+ * This function is platform independent and uses the starting gpio and
+ * bitwidth information to iterate through the set of required gpio_chips
+ * to use their get_batch capability in order to get a batch of gpio pins.
+ * This function handles going across gpio_chip boundaries. It is intended
+ * to be called from arch/mach specific code if they detect that the caller
+ * requires functionality outside the fast-path.
+ *
+ * The following examples help explain how this function is to be used.
+ * Q: How to get gpio pins 0 through 7? (8 bits)
+ * A: gpio=0, bitmask=0xFF, width=8, result=0xnn
+ * Q: How to get gpio pins 58 through 73? (16 bits)
+ * A: gpio=58, bitmask=0xFFFF, width=16, result=0xnnnn
+ * Q: How to get gpio pins 16 through 47? (32 bits)
+ * A: offset=16, bitmask=0xFFFFFFFF, width=32, result=0xnnnnnnnn
+ * Q: Why isn't width calculated from the mask here?
+ * A: This function is intended to be called repetitively and doing the
+ * bit shift looping to calculate the width here would be an undesirable
+ * penalty. Instead, the width is provided by the caller, thus avoiding
+ * the performance penalty since it is a fixed value known by the caller.
+ *
+ * Returns a negative errno if the caller supplied bad data, such as
+ * gpio or width in excess of the platforms max gpio. Otherwise, we return
+ * zero as a success code
+ *
+ */
+int __gpio_get_batch(unsigned gpio, u32 bitmask, int bitwidth, u32 *result)
+{
+ struct gpio_chip *chip;
+ int i = 0;
+ int width, remwidth;
+ u32 mask;
+ u32 values = 0;
+ u32 value;
+ int ret;
+
+ /*
+ * If the caller attempted to exceed the number of gpios that
+ * are available here, then we flag that as an invalid value for
+ * either the gpio or the width supplied.
+ */
+ if ((bitwidth > 32) || (gpio + bitwidth > ARCH_NR_GPIOS))
+ return -EINVAL;
+
+ do {
+ chip = gpio_to_chip(gpio + i);
+ WARN_ON(extra_checks && chip->can_sleep);
+
+ /* Work out the remaining width in this chip. */
+ remwidth = ((chip->base + (int) chip->ngpio) -
+ ((int) gpio + i));
+
+ /*
+ * Check if the remaining bits to be handled are less than
+ * the remaining width in this chip.
+ */
+ width = min(bitwidth, remwidth);
+
+ /* shift off the used mask bits */
+ mask = bitmask >> i;
+ /* now adjust mask by width of get */
+ mask &= ((1 << width) - 1);
+
+ /* If the mask is empty, then we can skip this chip. */
+ if (mask) {
+ ret = chip->get_batch(chip, gpio + i - chip->base,
+ mask, width, &value);
+ if (ret)
+ return ret;
+
+ /* shift result back into correct position */
+ values |= value << i;
+ }
+
+ /* deduct the used bits from our todolist */
+ i += width;
+ bitwidth -= width;
+ } while (bitwidth);
+
+ *result = values;
+ return 0;
+}
+EXPORT_SYMBOL_GPL(__gpio_get_batch);
+#endif
+
/**
* gpiochip_add() - register a gpio_chip
* @chip: the chip to register, with chip->base initialized
@@ -683,6 +1000,12 @@ int gpiochip_add(struct gpio_chip *chip)
}
chip->base = base;
}
+#ifdef CONFIG_GPIOLIB_BATCH
+ if (!chip->set_batch)
+ chip->set_batch = __generic_gpio_set_batch;
+ if (!chip->get_batch)
+ chip->get_batch = __generic_gpio_get_batch;
+#endif
/* these GPIO numbers must not be managed by another gpio_chip */
for (id = base; id < base + chip->ngpio; id++) {
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index 81797ec..29478d2 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -44,6 +44,10 @@ struct module;
* returns either the value actually sensed, or zero
* @direction_output: configures signal "offset" as output, or returns error
* @set: assigns output value for signal "offset"
+ * @set_batch: batch assigns output values for signals starting at
+ * "offset" with mask in "bitmask" all within this gpio_chip
+ * @get_batch: batch fetches values for consecutive signals starting at
+ * "offset" with mask in "bitmask" all within this gpio_chip
* @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
* implementation may not sleep
* @dbg_show: optional routine to show contents in debugfs; default code
@@ -84,7 +88,14 @@ struct gpio_chip {
unsigned offset, int value);
void (*set)(struct gpio_chip *chip,
unsigned offset, int value);
-
+#ifdef CONFIG_GPIOLIB_BATCH
+ int (*set_batch)(struct gpio_chip *chip,
+ unsigned offset, u32 values,
+ u32 bitmask, int width);
+ int (*get_batch)(struct gpio_chip *chip,
+ unsigned offset, u32 bitmask,
+ int width, u32 *result);
+#endif
int (*to_irq)(struct gpio_chip *chip,
unsigned offset);
@@ -124,6 +135,12 @@ extern void gpio_set_value_cansleep(unsigned gpio, int value);
*/
extern int __gpio_get_value(unsigned gpio);
extern void __gpio_set_value(unsigned gpio, int value);
+#ifdef CONFIG_GPIOLIB_BATCH
+extern int __gpio_set_batch(unsigned gpio, u32 values, u32 bitmask,
+ int bitwidth);
+extern int __gpio_get_batch(unsigned gpio, u32 bitmask, int bitwidth,
+ u32 *result);
+#endif
extern int __gpio_cansleep(unsigned gpio);
--
1.5.2.3
^ permalink raw reply related
* [RFC 2.6.28 2/2] mach-pxa: add and use batch set/get gpio
From: Jaya Kumar @ 2009-01-17 9:57 UTC (permalink / raw)
Cc: David Brownell, Eric Miao, Paulius Zaleckas, Geert Uytterhoeven,
Sam Ravnborg, linux-arm-kernel, linux-fbdev-devel, linux-kernel,
linux-embedded, Jaya Kumar
In-Reply-To: <12321862383405-git-send-email-jayakumar.lkml@gmail.com>
This patch adds support for pxa specific batch set/get of gpio. This
is exported to gpiolib via the gpio_chip interface and then used within
am300epd.c
Cc: David Brownell <david-b@pacbell.net>
Cc: Eric Miao <eric.miao@marvell.com>
Cc: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: linux-arm-kernel@lists.arm.linux.org.uk
Cc: linux-fbdev-devel@lists.sourceforge.net
Cc: linux-kernel@vger.kernel.org
Cc: linux-embedded@vger.kernel.org
Signed-off-by: Jaya Kumar <jayakumar.lkml@gmail.com>
---
arch/arm/mach-pxa/Kconfig | 1 +
arch/arm/mach-pxa/am300epd.c | 23 ++++++------
arch/arm/mach-pxa/gpio.c | 63 +++++++++++++++++++++++++++++++++
arch/arm/mach-pxa/include/mach/gpio.h | 48 +++++++++++++++++++++++++
4 files changed, 124 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index f844425..1b3e631 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -41,6 +41,7 @@ config GUMSTIX_AM200EPD
bool "Enable AM200EPD board support"
config GUMSTIX_AM300EPD
+ select GPIOLIB_BATCH
bool "Enable AM300EPD board support"
endchoice
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c
index 4bd10a1..c065368 100644
--- a/arch/arm/mach-pxa/am300epd.c
+++ b/arch/arm/mach-pxa/am300epd.c
@@ -187,24 +187,25 @@ static void am300_cleanup(struct broadsheetfb_par *par)
static u16 am300_get_hdb(struct broadsheetfb_par *par)
{
- u16 res = 0;
- int i;
-
- for (i = 0; i <= (DB15_GPIO_PIN - DB0_GPIO_PIN) ; i++)
- res |= (gpio_get_value(DB0_GPIO_PIN + i)) ? (1 << i) : 0;
+ int err;
+ u32 val;
- return res;
+ err = gpio_get_batch(DB0_GPIO_PIN, 0xFFFF, 16, &val);
+ if (err) {
+ dev_err(&am300_device->dev, "get failed: %d\n", err);
+ return 0;
+ }
+ return (u16) val;
}
static void am300_set_hdb(struct broadsheetfb_par *par, u16 data)
{
- int i;
-
- for (i = 0; i <= (DB15_GPIO_PIN - DB0_GPIO_PIN) ; i++)
- gpio_set_value(DB0_GPIO_PIN + i, (data >> i) & 0x01);
+ int err;
+ err = gpio_set_batch(DB0_GPIO_PIN, data, 0xFFFF, 16);
+ if (err)
+ dev_err(&am300_device->dev, "set failed: %d\n", err);
}
-
static void am300_set_ctl(struct broadsheetfb_par *par, unsigned char bit,
u8 state)
{
diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/mach-pxa/gpio.c
index 5fec1e4..46371a1 100644
--- a/arch/arm/mach-pxa/gpio.c
+++ b/arch/arm/mach-pxa/gpio.c
@@ -162,6 +162,67 @@ static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
__raw_writel(mask, pxa->regbase + GPCR_OFFSET);
}
+#ifdef CONFIG_GPIOLIB_BATCH
+/*
+ * Set output GPIO level in batches
+ */
+static int pxa_gpio_set_batch(struct gpio_chip *chip, unsigned offset,
+ u32 values, u32 bitmask, int width)
+{
+ struct pxa_gpio_chip *pxa;
+
+ /* we're guaranteed by the caller that offset + bitmask remains
+ * in this chip.
+ */
+ pxa = container_of(chip, struct pxa_gpio_chip, chip);
+
+ /* bitmask is used twice in shifted form */
+ bitmask <<= offset;
+
+ values = (values << offset) & bitmask;
+ if (values)
+ __raw_writel(values, pxa->regbase + GPSR_OFFSET);
+
+ values = ~values & bitmask;
+ if (values)
+ __raw_writel(values, pxa->regbase + GPCR_OFFSET);
+
+ return 0;
+}
+
+/*
+ * Get output GPIO level in batches
+ */
+static int pxa_gpio_get_batch(struct gpio_chip *chip, unsigned offset,
+ u32 bitmask, int width, u32 *result)
+{
+ u32 values;
+ struct pxa_gpio_chip *pxa;
+
+ /* we're guaranteed by the caller that offset + bitmask remains
+ * in this chip.
+ */
+ pxa = container_of(chip, struct pxa_gpio_chip, chip);
+
+ values = __raw_readl(pxa->regbase + GPLR_OFFSET);
+
+ /* shift the result back into original position */
+ *result = (values >> offset) & bitmask;
+ return 0;
+}
+#endif
+
+/* this is done this way so that we can insert an ifdef-able value
+ * into the following GPIO_CHIP macro
+ */
+#ifdef CONFIG_GPIOLIB_BATCH
+#define SET_BATCH_MACRO .set_batch = pxa_gpio_set_batch,
+#define GET_BATCH_MACRO .get_batch = pxa_gpio_get_batch,
+#else
+#define SET_BATCH_MACRO
+#define GET_BATCH_MACRO
+#endif
+
#define GPIO_CHIP(_n) \
[_n] = { \
.regbase = GPIO##_n##_BASE, \
@@ -173,6 +234,8 @@ static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
.set = pxa_gpio_set, \
.base = (_n) * 32, \
.ngpio = 32, \
+ SET_BATCH_MACRO \
+ GET_BATCH_MACRO \
}, \
}
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index 2c538d8..46d9022 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -56,6 +56,54 @@ static inline void gpio_set_value(unsigned gpio, int value)
}
}
+#ifdef CONFIG_GPIOLIB_BATCH
+static inline int gpio_set_batch(unsigned gpio, u32 values, u32 bitmask,
+ int bitwidth)
+{
+ int err = 0;
+ if (__builtin_constant_p(gpio) &&
+ (gpio + bitwidth < NR_BUILTIN_GPIO) &&
+ ((gpio + bitwidth) <= roundup(gpio+1, 32))) {
+ int shift;
+
+ shift = gpio % 32;
+ bitmask <<= shift;
+
+ values = (values << shift) & bitmask;
+ if (values)
+ GPSR(gpio) = values;
+
+ values = ~values & bitmask;
+ if (values)
+ GPCR(gpio) = values;
+ } else {
+ err = __gpio_set_batch(gpio, values, bitmask, bitwidth);
+ }
+ return err;
+}
+
+static inline int gpio_get_batch(unsigned gpio, u32 bitmask, int bitwidth,
+ u32 *result)
+{
+ int ret = 0;
+ if (__builtin_constant_p(gpio) &&
+ (gpio + bitwidth < NR_BUILTIN_GPIO) &&
+ ((gpio + bitwidth) <= roundup(gpio+1, 32))) {
+ int shift;
+ u32 values;
+
+ shift = gpio % 32;
+
+ values = GPLR(gpio);
+
+ *result = (values >> shift) & bitmask;
+ } else {
+ ret = __gpio_get_batch(gpio, bitmask, bitwidth, result);
+ }
+ return ret;
+}
+#endif
+
#define gpio_cansleep __gpio_cansleep
#define gpio_to_irq(gpio) IRQ_GPIO(gpio)
--
1.5.2.3
^ permalink raw reply related
* Re: ramfs/tmpfs for application partition
From: Marco @ 2009-01-17 15:55 UTC (permalink / raw)
To: Jacob Avraham; +Cc: Leisner, Martin, linux-embedded@vger.kernel.org
In-Reply-To: <FF584854D6FFE547AB2F7515A798AC3A045716A1F8@venus.imagineil.tv>
Hi Jacob,
only another idea, why do you think to use a persistant ram filesystem
(like pramfs) mounted on /my/application/partition? If you use a simple
ram you can repopulate after a power off/on the directory with a simple
untar of the archive. In this way you haven't to repopulate the
filesystem after each reboot. What do you think about it? Could it be a
solution?
Marco
Jacob Avraham ha scritto:
>> Not sure I fully understand....
>>
>> You basically want two blobs -- the initramfs and the application?
>>
> Yes, I want to keep on the flash a stable, rarely changed, OS image, which is in initramfs
> format, and another application image, which is changing frequently.
>
>> You can expand the initramfs by copying to it...so you mount the
>> application and run a script to copy it to initramfs before running it.
>>
> When you say 'you mount the application' it means that the application
> image on the flash has to be in some filesystem format, right? Like cramfs?
> On the other hand, if I want the application directory tree to reside
> in memory (and handle application persistency needs via the JFFS2 partition),
> maybe all I need is to keep a compressed tar image of the application on the flash,
> and untar it into /my/application/partition, which will be in initramfs?
> So I don't need to create another tmpfs filesystem as suggested in another post?
> Is there a better way to handle this?
>
>> marty
>>
>>> Hi,
>>>
>>> I have a system with 128M RAM and a flash partitioned so that 10M
>> is
>>> dedicated to initramfs image,
>>> 6M to application partition. And another 6M for JFFS2.
>>> As I have plenty of RAM, I'd like to have my application directory
>>> mounted on RAM, from a pre-populated
>>> filesystem that resides in the 6M application partition.
>>> So basically I want to use the same mechanism as initramfs, but
>> mounted
>>> on /my/app/partition instead of root.
>>> Does it make sense? How do I go about and do that?
>>>
>>>
>>> Jacob Avraham
>>>
>
>
>
>
>
> ************************************************************************************
> This footnote confirms that this email message has been scanned by
> PineApp Mail-SeCure for the presence of malicious code, vandals & computer viruses.
> ************************************************************************************
>
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-embedded" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* Re: PATCH [0/3]: Simplify the kernel build by removing perl.
From: Rob Landley @ 2009-01-18 1:44 UTC (permalink / raw)
To: Jamie Lokier
Cc: Valdis.Kletnieks, Embedded Linux mailing list, Sam Ravnborg,
linux-kernel
In-Reply-To: <20090117095143.GA20389@shareable.org>
On Saturday 17 January 2009 03:51:43 Jamie Lokier wrote:
> Rob Landley wrote:
> > On Friday 16 January 2009 08:54:42 Valdis.Kletnieks@vt.edu wrote:
> > > On Fri, 16 Jan 2009 00:11:09 CST, Rob Landley said:
> > > > P.S. I still hope autoconf dies off and the world wakes up and moves
> > > > away from that. And from makefiles for that matter. But in the
> > > > meantime, I can work around it with enough effort.
> > >
> > > What do you propose autoconf and makefiles get replaced by?
> >
> > I've never built pidgin from source, but I've got the output of the
> > binutils build in a log file.
> > How many of these tests are actually necessary on an Linux system:
>
> None, but then it's not a Linux-only program that you're compiling.
> (Nor is it Linux-in-2009-only).
Yeah, I noticed. It's not quite as bad as OpenSSL (where Linux support is
intentionally an afterthought), but things like "Libtool" are supposed to be a
NOP on ELF Linux and yet regularly screw up builds. (It's supposed to do
nothing, and can't manage to do it correctly. That's sad.)
> If you _know_ you're running on Linux from a particular era, you can
> provide a config.cache file with the correct answers already filled in.
And yet very few projects actually do.
As for "from a particular era", just for fun I fired up the Red Hat 9 qemu
image I keep around for this sort of thing, downloaded glibc 2.7 (the most
recent one they bothered to cut a tarball for on ftp.gnu.org and one of the
big autoconf offenders), and ran its ./configure. It died with:
configure: error:
*** These critical programs are missing or too old: gcc
*** Check the INSTALL file for required versions.
So you can't build a 2 year old version of glibc under a 6 year old version of
Linux (which was the most popular Linux version in the world when it shipped,
with about 50% market share among Linux seats). And yet glibc (one of the
FSF's flagship projects) bothers doing extensive autoconf probes. Why?
Autoconf isn't really _helping_ here...
The bottom line is that if your assumption is that you have an open source
application targeting an open source operating system, lots of the hoops you
used to have to jump through just aren't very interesting anymore.
> I agree that Autoconf sucks (I've written enough sucking Autoconf
> macros myself, I hate it), but the tough part is providing a suitable
> replacement when you still want portable source code.
Depends on your definition of "portable". The unix wars of the 80's are over;
they're pretty much all dead. Even the surviving legacy deployments of
Solaris and AIX provide Linux emulation environments. And of course FreeBSD's
done so for years:
http://www.onlamp.com/pub/a/bsd/2006/01/12/Big_Scary_Daemons.html
MacOS X and windows are still very much alive, but if you want to target those
you can either A) treat them as Posix/SUSv3 (which both _claim_ to support),
B) use cross platform libraries like SDL and opengl and program to their APIs,
C) bother to do a proper port of the thing ala
http://porting.openoffice.org/mac/ or http://www.kju-app.org/ or the way khtml
wound up in Safari.
For Windows there's Cygwin, running windows programs on Linux has Wine. Or
just qemu/kvm in either direction.
Basically, pick a standard to write to. If you want to write to posix and
SUSv4, do it. If you want to add in LSB and the Linux man pages, go for it.
But autoconf was designed for portability between Irix and HP-UX, which just
doesn't come up much anymore.
> > It just goes on and on and on like this. Tests like "checking
> > whether byte ordering is bigendian... no" means "Either I didn't
> > know endian.h existed, or I don't trust it to be there". How about
> > the long stretches checking for the existence of header files
> > specified by posix?
>
> You seem to be arguing for "let's make all our programs Linux-specific
> (and Glibc-specific in many cases)".
Checking for the existence of posix header files is Linux-specific?
I'm saying there are many standards, and you can choose to adhere to standards
like LP64 (which MacOSX, Linux, and the BSDs all support) and _say_ you do so
and achieve portability that way.
You also have "#if defined __linux__" and "#if defined __APPLE__" and so on,
so header files can do a lot of the tests that people wind up doing with
autoconf for some reason.
And there will always be platforms you're NOT portable to. (Game consoles
come to mind: your average autoconf recipe isn't going to make your program
run on a PS3, XBox 360, or Wii. Unless you load Linux on those systems first
and program for Linux.)
> Given all the problems you've
> seen with cross-compiling, let alone compiling for different OS
> platforms, that seems a little odd.
If I can't get Linux running on the hardware (which is seldom an interesting
case anymore; it's on everything from cell phones to the S390), and I can't
get a Linux emulation environment like Solaris' lxrun, aix5L, or cygwin, then
I probably want a rigidly posix environment. (Heck, even wince has celib and
gnuwince, not that I really care.)
The extra "portability" isn't even going to buy you 5% more seats these days.
It's really not that interesting. It's not that the world is homogenous now,
it's that between open source and open standards we don't need giant if/else
ladders with hundreds of tests to cover the interesting cases. And trying to
achieve portability by relying on standards is a superior approach to trying
to achieve portability via an infinite series of special case checks.
> -- Jamie
Rob
^ permalink raw reply
* Re: ramfs/tmpfs for application partition
From: Gilad Ben-Yossef @ 2009-01-18 13:55 UTC (permalink / raw)
To: Jacob Avraham; +Cc: Mike Frysinger, linux-embedded@vger.kernel.org
In-Reply-To: <FF584854D6FFE547AB2F7515A798AC3A045716A316@venus.imagineil.tv>
Jacob Avraham wrote:
> Gilad,
>
> Not out of the woods yet.
>
> I can’t just burn a tar ball straight into a raw mtd partition. When
> I’ll try to untar it, if I’ll do:
>
> tar zxf /dev/mtd6
>
> tar will read the whole mtd partition, and I don’t think it’s a good
> idea to use a raw device as tar file.
>
> So should I package the tar in a filesystem, like cramfs?
>
That's certainly possible - just make sure your tar file is smaller then
the 256Mb file limit of cramfs (if memory serves me right) - otherwise
just use squashfs.
I'll add that if you're already going to have a file system (and your
reasons seems to make sense to me) I would have just forgot about the
tar file and put the file in cramfs/squashfs to begin with and just copy
them over the initramfs during boot (something like cp -a /mnt/mtd6/* /).
> In that case, I don’t need to compress the tar file, as cramfs is
> compressed, right?
>
That is correct.
Gilad
--
Gilad Ben-Yossef
Chief Coffee Drinker
Codefidence Ltd.
The code is free, your time isn't.(TM)
Web: http://codefidence.com
Email: gilad@codefidence.com
Office: +972-8-9316883 ext. 201
Fax: +972-8-9316885
Mobile: +972-52-8260388
The Doctor: Don't worry, Reinette, just a nightmare.
Everyone has nightmares. Even monsters from under the
bed have nightmares, don't you, monster?
Reinette: What do monsters have nightmares about?
The Doctor: Me!
^ permalink raw reply
* Re: [RFC 2.6.28 1/2] gpiolib: add set/get batch v4
From: Ryan Mallon @ 2009-01-18 20:05 UTC (permalink / raw)
To: Jaya Kumar
Cc: David Brownell, Eric Miao, Paulius Zaleckas, Geert Uytterhoeven,
Sam Ravnborg, linux-arm-kernel, linux-fbdev-devel, linux-kernel,
linux-embedded
In-Reply-To: <12321862383405-git-send-email-jayakumar.lkml@gmail.com>
Jaya Kumar wrote:
> Hi friends,
>
> +
> + /* BATCH GPIO OUTPUT */
> +int gpio_set_batch(unsigned gpio, u32 values, u32 bitmask, int maskwidth);
> +
> +The following examples help explain how this function is to be used.
> + Q: How to set gpio pins 0 through 7 to all 0? (8 bits)
> + A: gpio_set_batch(gpio=0, values=0x0, bitmask=0xFF, width=8);
> + Q: How to set gpio pins 58 through 73 to all 1? (16 bits)
> + A: gpio_set_batch(gpio=58, values=0xFFFF, bitmask=0xFFFF, width=16);
> + Q: How to set gpio pins 16 through 47 to 0xCAFEC001? (32 bits)
> + A: gpio_set_batch(gpio=16, values=0xCAFEC001, bitmask=0xFFFFFFFF, width=32);
> +
Can the gpio_set_batch function be used to set non-consecutive gpios?
For example:
gpio_set_batch(0, 0x0, 0x88, 8);
To clear gpios 3 and 7? It looks like the pxa implementation will
support this, but can it be guaranteed for other architectures? If so,
can we put an example in the documentation. If not, can we make it clear
that you shouldn't do this in the documentation. Also , in the latter
case is it necessary to pass the bitmask, since it will just be ((1 <<
bitwidth) - 1)?
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon Unit 5, Amuri Park
Phone: +64 3 3779127 404 Barbadoes St
Fax: +64 3 3779135 PO Box 13 889
Email: ryan@bluewatersys.com Christchurch, 8013
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^ permalink raw reply
* Re: [RFC 2.6.28 1/2] gpiolib: add set/get batch v4
From: Jaya Kumar @ 2009-01-18 23:46 UTC (permalink / raw)
To: Ryan Mallon
Cc: David Brownell, Eric Miao, Paulius Zaleckas, Geert Uytterhoeven,
Sam Ravnborg, linux-arm-kernel, linux-fbdev-devel, linux-kernel,
linux-embedded
In-Reply-To: <49738B8C.7020404@bluewatersys.com>
On Mon, Jan 19, 2009 at 4:05 AM, Ryan Mallon <ryan@bluewatersys.com> wrote:
> Jaya Kumar wrote:
>> Hi friends,
>>
>
>> +
>> + /* BATCH GPIO OUTPUT */
>> +int gpio_set_batch(unsigned gpio, u32 values, u32 bitmask, int maskwidth);
>> +
>> +The following examples help explain how this function is to be used.
>> + Q: How to set gpio pins 0 through 7 to all 0? (8 bits)
>> + A: gpio_set_batch(gpio=0, values=0x0, bitmask=0xFF, width=8);
>> + Q: How to set gpio pins 58 through 73 to all 1? (16 bits)
>> + A: gpio_set_batch(gpio=58, values=0xFFFF, bitmask=0xFFFF, width=16);
>> + Q: How to set gpio pins 16 through 47 to 0xCAFEC001? (32 bits)
>> + A: gpio_set_batch(gpio=16, values=0xCAFEC001, bitmask=0xFFFFFFFF, width=32);
>> +
>
> Can the gpio_set_batch function be used to set non-consecutive gpios?
> For example:
>
> gpio_set_batch(0, 0x0, 0x88, 8);
>
> To clear gpios 3 and 7? It looks like the pxa implementation will
Hi Ryan,
For the first part, yes, it can do non-consecutive gpios by using the
mask. Pins 3 and 7 are handled using a 5-bit mask. You'd do
gpio_set_batch(3 <- starting pin is gpio 3, 0x0 <- clear, 0x1F <-
mask, 5 <- bit width of mask);
> support this, but can it be guaranteed for other architectures? If so,
That's a tough question. My basic answer would be yes because I've
provided the generic set_batch handler that just uses single bit sets
to achieve it. See __generic_gpio_set_batch() in patch). But if your
question is deeper, ie: can it be optimized for other architectures? ;
then I think I have to handwave a bit. I believe it can, as most of
the CPUs I've seen expose gpio via a set register and clear register
with variation between a context register to select which bank/module
of gpios is being accessed versus just having a pool of set and clear
registers (like pxa). If a CPU didn't have this and just had a blanket
gpio register then the implementation would have to first read the
previous register value (or cache it) in order to support doing the
mask.
> can we put an example in the documentation. If not, can we make it clear
Good point. I'll put it in the docs.
> that you shouldn't do this in the documentation. Also , in the latter
> case is it necessary to pass the bitmask, since it will just be ((1 <<
> bitwidth) - 1)?
Yes, it is as you have non-consecutive bits. In the above case the
mask width is 5 bits, but 3 bits are masked off, so we need the mask
so that the caller can tell us which bits are masked off.
Thanks,
jaya
^ permalink raw reply
* Re: [RFC 2.6.28 1/2] gpiolib: add set/get batch v4
From: Jaya Kumar @ 2009-01-18 23:48 UTC (permalink / raw)
To: Ryan Mallon
Cc: David Brownell, Eric Miao, Paulius Zaleckas, Geert Uytterhoeven,
Sam Ravnborg, linux-arm-kernel, linux-fbdev-devel, linux-kernel,
linux-embedded
In-Reply-To: <45a44e480901181546t140f7127hb2f2b5fbfdec8464@mail.gmail.com>
On Mon, Jan 19, 2009 at 7:46 AM, Jaya Kumar <jayakumar.lkml@gmail.com> wrote:
> On Mon, Jan 19, 2009 at 4:05 AM, Ryan Mallon <ryan@bluewatersys.com> wrote:
>> Jaya Kumar wrote:
>>> Hi friends,
>>>
>>
>>> +
>>> + /* BATCH GPIO OUTPUT */
>>> +int gpio_set_batch(unsigned gpio, u32 values, u32 bitmask, int maskwidth);
>>> +
>>> +The following examples help explain how this function is to be used.
>>> + Q: How to set gpio pins 0 through 7 to all 0? (8 bits)
>>> + A: gpio_set_batch(gpio=0, values=0x0, bitmask=0xFF, width=8);
>>> + Q: How to set gpio pins 58 through 73 to all 1? (16 bits)
>>> + A: gpio_set_batch(gpio=58, values=0xFFFF, bitmask=0xFFFF, width=16);
>>> + Q: How to set gpio pins 16 through 47 to 0xCAFEC001? (32 bits)
>>> + A: gpio_set_batch(gpio=16, values=0xCAFEC001, bitmask=0xFFFFFFFF, width=32);
>>> +
>>
>> Can the gpio_set_batch function be used to set non-consecutive gpios?
>> For example:
>>
>> gpio_set_batch(0, 0x0, 0x88, 8);
>>
>> To clear gpios 3 and 7? It looks like the pxa implementation will
>
> Hi Ryan,
>
> For the first part, yes, it can do non-consecutive gpios by using the
> mask. Pins 3 and 7 are handled using a 5-bit mask. You'd do
> gpio_set_batch(3 <- starting pin is gpio 3, 0x0 <- clear, 0x1F <-
> mask, 5 <- bit width of mask);
Correction: I meant to write 0x11 for the mask above (instead of 0x1F)
since you only want to clear the starting pin 3 and the ending pin 7
in the 5 bits. If we used 0x1F here, then we would clear all 5 bits
rather than just 3 and 7.
Thanks,
jaya
^ permalink raw reply
* Re: [RFC 2.6.28 1/2] gpiolib: add set/get batch v4
From: Ryan Mallon @ 2009-01-19 0:15 UTC (permalink / raw)
To: Jaya Kumar
Cc: David Brownell, Eric Miao, Paulius Zaleckas, Geert Uytterhoeven,
Sam Ravnborg, linux-arm-kernel, linux-fbdev-devel, linux-kernel,
linux-embedded
In-Reply-To: <45a44e480901181546t140f7127hb2f2b5fbfdec8464@mail.gmail.com>
Jaya Kumar wrote:
> On Mon, Jan 19, 2009 at 4:05 AM, Ryan Mallon <ryan@bluewatersys.com> wrote:
>> Jaya Kumar wrote:
>>> Hi friends,
>>>
>>> +
>>> + /* BATCH GPIO OUTPUT */
>>> +int gpio_set_batch(unsigned gpio, u32 values, u32 bitmask, int maskwidth);
>>> +
>>> +The following examples help explain how this function is to be used.
>>> + Q: How to set gpio pins 0 through 7 to all 0? (8 bits)
>>> + A: gpio_set_batch(gpio=0, values=0x0, bitmask=0xFF, width=8);
>>> + Q: How to set gpio pins 58 through 73 to all 1? (16 bits)
>>> + A: gpio_set_batch(gpio=58, values=0xFFFF, bitmask=0xFFFF, width=16);
>>> + Q: How to set gpio pins 16 through 47 to 0xCAFEC001? (32 bits)
>>> + A: gpio_set_batch(gpio=16, values=0xCAFEC001, bitmask=0xFFFFFFFF, width=32);
>>> +
>> Can the gpio_set_batch function be used to set non-consecutive gpios?
>> For example:
>>
>> gpio_set_batch(0, 0x0, 0x88, 8);
>>
>> To clear gpios 3 and 7? It looks like the pxa implementation will
>
> Hi Ryan,
>
> For the first part, yes, it can do non-consecutive gpios by using the
> mask. Pins 3 and 7 are handled using a 5-bit mask. You'd do
> gpio_set_batch(3 <- starting pin is gpio 3, 0x0 <- clear, 0x1F <-
> mask, 5 <- bit width of mask);
>
>> support this, but can it be guaranteed for other architectures? If so,
>
> That's a tough question. My basic answer would be yes because I've
> provided the generic set_batch handler that just uses single bit sets
> to achieve it. See __generic_gpio_set_batch() in patch). But if your
> question is deeper, ie: can it be optimized for other architectures? ;
> then I think I have to handwave a bit. I believe it can, as most of
> the CPUs I've seen expose gpio via a set register and clear register
> with variation between a context register to select which bank/module
> of gpios is being accessed versus just having a pool of set and clear
> registers (like pxa). If a CPU didn't have this and just had a blanket
> gpio register then the implementation would have to first read the
> previous register value (or cache it) in order to support doing the
> mask.
The EP93xx has a single register for reading, set and clearing the
states of gpios, so it would have to be read, masked and written. I'm
not sure if that would be quicker than doing a for-loop over the 8-bits
in the register (the EP93xx has 8 register banks of 8 gpios, each with
their own reigster set). I guess that even if it cannot be optimised for
a given architecture, then the standard for-loop method can be used. As
long as it is documented that non-consecutive setting should work so
that arch implementers can get it correct.
>> can we put an example in the documentation. If not, can we make it clear
>
> Good point. I'll put it in the docs.
Cool, thanks.
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon Unit 5, Amuri Park
Phone: +64 3 3779127 404 Barbadoes St
Fax: +64 3 3779135 PO Box 13 889
Email: ryan@bluewatersys.com Christchurch, 8013
Web: http://www.bluewatersys.com New Zealand
Freecall Australia 1800 148 751 USA 1800 261 2934
^ permalink raw reply
* Re: [RFC 2.6.28 1/2] gpiolib: add set/get batch v4
From: Uwe Kleine-König @ 2009-01-19 10:03 UTC (permalink / raw)
To: Jaya Kumar
Cc: David Brownell, Eric Miao, Paulius Zaleckas, Geert Uytterhoeven,
Sam Ravnborg, linux-arm-kernel, linux-fbdev-devel, linux-kernel,
linux-embedded
In-Reply-To: <12321862383405-git-send-email-jayakumar.lkml@gmail.com>
Hi Jaya,
On Sat, Jan 17, 2009 at 05:57:17PM +0800, Jaya Kumar wrote:
> Hi friends,
>
> This is v4 of batch support for gpiolib. Thanks to David Brownell, Eric Miao,
> David Hylands, Robin, Ben, Jamie and others for prior feedback. The post for
> v3 summarized the previous discussion. Since then the changes I've made are:
> - split the patches into generic and arch specific
IMHO this should be three patches: "gpiolib", "pxa" and "am300epd".
Well, ...
> +[OPTIONAL] Spinlock-Safe GPIO Batch access
Is it really spinlock safe in general? Or only if gpio_cansleep(gpio)
if false for each gpio to get or set?
> +static int __generic_gpio_set_batch(struct gpio_chip *chip, unsigned offset,
> + u32 values, u32 bitmask, int width)
IMHO a better name is __gpio_set_batch_generic (or
__gpiolib_set_batch_generic?), YMMV.
> +int __gpio_set_batch(unsigned gpio, u32 values, u32 bitmask, int bitwidth)
Sometimes your width parameter is called bitwidth, sometimes width. I'd
like to have that consistant.
While talking about this parameter. I don't really like it, because you
can calculate it from bitmask. In an earlier mail you write:
bitwidth (needed to iterate and map to chip ngpios) could be
calculated from bitmask, but that involves iteratively counting
bits from the mask, so we would have to do 800*600 bit counts.
Unless, we do ugly things like cache the previous bitwidth/mask
and compare against the current caller arguments. Given that the
bitwidth would typically be a fixed value, I believe it is more
intuitive for the caller to provide it, ...
I think it's easier than that. bitwidth is just fls(bitmask) which
should be efficient enough not to bother the programmer. If bitmask is
constant it's even the compiler that does the work here.
BTW, I wonder why the argument to fls has type int and not unsigned.
Best regards,
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Strasse 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply
* Re: [RFC 2.6.28 1/2] gpiolib: add set/get batch v4
From: Jaya Kumar @ 2009-01-19 14:19 UTC (permalink / raw)
To: Uwe Kleine-König
Cc: David Brownell, Eric Miao, Paulius Zaleckas, Geert Uytterhoeven,
Sam Ravnborg, linux-arm-kernel, linux-fbdev-devel, linux-kernel,
linux-embedded
In-Reply-To: <20090119100342.GA16400@pengutronix.de>
On Mon, Jan 19, 2009 at 6:03 PM, Uwe Kleine-König
<u.kleine-koenig@pengutronix.de> wrote:
> Hi Jaya,
>
> On Sat, Jan 17, 2009 at 05:57:17PM +0800, Jaya Kumar wrote:
>> Hi friends,
>>
>> This is v4 of batch support for gpiolib. Thanks to David Brownell, Eric Miao,
>> David Hylands, Robin, Ben, Jamie and others for prior feedback. The post for
>> v3 summarized the previous discussion. Since then the changes I've made are:
>> - split the patches into generic and arch specific
> IMHO this should be three patches: "gpiolib", "pxa" and "am300epd".
> Well, ...
Hi Uwe,
Ok, will do.
>
>> +[OPTIONAL] Spinlock-Safe GPIO Batch access
> Is it really spinlock safe in general? Or only if gpio_cansleep(gpio)
> if false for each gpio to get or set?
You are correct to raise this issue. It is only spinlock safe if
chip->cansleep is false. Initially, I wasn't sure what to do. The
original gpio set/get_value() just does;
WARN_ON(extra_checks && chip->can_sleep);
and it is documented as:
"
Spinlock-Safe GPIO access
-------------------------
<snip>
return zero. Also, using these calls for GPIOs that can't safely be accessed
without sleeping (see below) is an error.
"
I will change this in the batch code to return an error if can_sleep
is detected on any involved gpio_chip.
>
>> +static int __generic_gpio_set_batch(struct gpio_chip *chip, unsigned offset,
>> + u32 values, u32 bitmask, int width)
> IMHO a better name is __gpio_set_batch_generic (or
> __gpiolib_set_batch_generic?), YMMV.
Agreed. Will change.
>
>> +int __gpio_set_batch(unsigned gpio, u32 values, u32 bitmask, int bitwidth)
> Sometimes your width parameter is called bitwidth, sometimes width. I'd
> like to have that consistant.
Ok, you're right. I'll fix this.
>
> While talking about this parameter. I don't really like it, because you
> can calculate it from bitmask. In an earlier mail you write:
Agreed.
>
> bitwidth (needed to iterate and map to chip ngpios) could be
> calculated from bitmask, but that involves iteratively counting
> bits from the mask, so we would have to do 800*600 bit counts.
> Unless, we do ugly things like cache the previous bitwidth/mask
> and compare against the current caller arguments. Given that the
> bitwidth would typically be a fixed value, I believe it is more
> intuitive for the caller to provide it, ...
>
> I think it's easier than that. bitwidth is just fls(bitmask) which
> should be efficient enough not to bother the programmer. If bitmask is
> constant it's even the compiler that does the work here.
>
That is a good point. I agree that width is ugly in the main API. It
is just fls(mask) and I now realize that this is an inline so you're
right it would get taken care of by the compiler. fls is checked with
__constant_fls first. Beauty! Thanks Uwe! I'll make these changes.
Thanks,
jaya
^ permalink raw reply
* Re: [RFC 2.6.28 1/2] gpiolib: add set/get batch v4
From: Uwe Kleine-König @ 2009-01-19 17:25 UTC (permalink / raw)
To: Jaya Kumar
Cc: David Brownell, Eric Miao, Paulius Zaleckas, Geert Uytterhoeven,
Sam Ravnborg, linux-arm-kernel, linux-fbdev-devel, linux-kernel,
linux-embedded
In-Reply-To: <45a44e480901190619i18749c75jaa2d4606da251921@mail.gmail.com>
Hi Jaya,
> >> +[OPTIONAL] Spinlock-Safe GPIO Batch access
> > Is it really spinlock safe in general? Or only if gpio_cansleep(gpio)
> > if false for each gpio to get or set?
>
> You are correct to raise this issue. It is only spinlock safe if
> chip->cansleep is false. Initially, I wasn't sure what to do. The
> original gpio set/get_value() just does;
> WARN_ON(extra_checks && chip->can_sleep);
> and it is documented as:
>
> "
> Spinlock-Safe GPIO access
> -------------------------
> <snip>
> return zero. Also, using these calls for GPIOs that can't safely be accessed
> without sleeping (see below) is an error.
> "
>
> I will change this in the batch code to return an error if can_sleep
> is detected on any involved gpio_chip.
Wait, I got it wrong. I thought gpio_set_value might sleep if
chip->cansleep is true, but there are extra API functions for
cansleep-chips. So I'd do it the same way as for the non-batch
functions and just WARN_ON(extra_checks && chip->cansleep) for each
involved chip.
Later it might make sense to add the _cansleep variants.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Strasse 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply
* Re: [PATCH] mflash: remove small byteswapping function
From: MinChan Kim @ 2009-01-21 5:55 UTC (permalink / raw)
To: unsik Kim
Cc: Harvey Harrison, Heikki Orsila, linux-kernel, akpm, Alan Cox,
linux-arm-kernel, linux-embedded
In-Reply-To: <57afda040901200025q6bc1bab1id9a1e6d6eac86d17@mail.gmail.com>
This is your patch again.
If you want to review many people, don't send your patch with attach.
Pz, send your patch with inline.
You have to use scripts/checkpatch before sending to mainline.
(linux-arm and linux-embedded Cc:-ed)
> ---
> drivers/block/Kconfig | 6 +
> drivers/block/Makefile | 2 +
> drivers/block/mg_disk.c | 878 +++++++++++++++++++++++++++++++++++++++++++++++
> include/linux/mg_disk.h | 174 ++++++++++
> 4 files changed, 1060 insertions(+), 0 deletions(-)
> create mode 100644 drivers/block/mg_disk.c
> create mode 100644 include/linux/mg_disk.h
>
> diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
> index 0344a8a..cad48c8 100644
> --- a/drivers/block/Kconfig
> +++ b/drivers/block/Kconfig
> @@ -403,6 +403,12 @@ config ATA_OVER_ETH
> This driver provides Support for ATA over Ethernet block
> devices like the Coraid EtherDrive (R) Storage Blade.
>
> +config MG_DISK
> + tristate "mGine mflash, gflash support"
> + depends on ARM
> + help
> + mGine mFlash(gFlash) block device driver
> +
> config SUNVDC
> tristate "Sun Virtual Disk Client support"
> depends on SUN_LDOMS
> diff --git a/drivers/block/Makefile b/drivers/block/Makefile
> index 204332b..1694d45 100644
> --- a/drivers/block/Makefile
> +++ b/drivers/block/Makefile
> @@ -32,3 +32,5 @@ obj-$(CONFIG_BLK_DEV_UB) += ub.o
> obj-$(CONFIG_BLK_DEV_HD) += hd.o
>
> obj-$(CONFIG_XEN_BLKDEV_FRONTEND) += xen-blkfront.o
> +
> +obj-$(CONFIG_MG_DISK) += mg_disk.o
> diff --git a/drivers/block/mg_disk.c b/drivers/block/mg_disk.c
> new file mode 100644
> index 0000000..6239d01
> --- /dev/null
> +++ b/drivers/block/mg_disk.c
> @@ -0,0 +1,878 @@
> +/*
> + * drivers/block/mg_disk.c
> + *
> + * Support for the mGine m[g]flash IO mode.
> + * Based on legacy hd.c
> + *
> + * (c) 2008 mGine Co.,LTD
> + * (c) 2008 unsik Kim <donari75@gmail.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/fs.h>
> +#include <linux/blkdev.h>
> +#include <linux/hdreg.h>
> +#include <linux/interrupt.h>
> +#include <linux/platform_device.h>
> +#include <linux/mg_disk.h>
> +
> +static void mg_request(struct request_queue *);
> +
> +static void mg_dump_status(const char *msg, unsigned int stat, struct mg_host *host)
> +{
> + char *name = MG_DISK_NAME"?";
> + struct request *req;
> +
> + if (host->breq) {
> + req = elv_next_request(host->breq);
> + if (req)
> + name = req->rq_disk->disk_name;
> + }
> +
> + printk("%s: %s: status=0x%02x { ", name, msg, stat & 0xff);
> + if (stat & MG_REG_STATUS_BIT_BUSY)
> + printk("Busy ");
> + if (stat & MG_REG_STATUS_BIT_READY)
> + printk("DriveReady ");
> + if (stat & MG_REG_STATUS_BIT_WRITE_FAULT)
> + printk("WriteFault ");
> + if (stat & MG_REG_STATUS_BIT_SEEK_DONE)
> + printk("SeekComplete ");
> + if (stat & MG_REG_STATUS_BIT_DATA_REQ)
> + printk("DataRequest ");
> + if (stat & MG_REG_STATUS_BIT_CORRECTED_ERROR)
> + printk("CorrectedError ");
> + if (stat & MG_REG_STATUS_BIT_ERROR)
> + printk("Error ");
> + printk("}\n");
> + if ((stat & MG_REG_STATUS_BIT_ERROR) == 0) {
> + host->error = 0;
> + } else {
> + host->error = inb(host->dev_base + MG_REG_ERROR);
> + printk("%s: %s: error=0x%02x { ", name, msg, host->error & 0xff);
> + if (host->error & MG_REG_ERR_BBK)
> + printk("BadSector ");
> + if (host->error & MG_REG_ERR_UNC)
> + printk("UncorrectableError ");
> + if (host->error & MG_REG_ERR_IDNF)
> + printk("SectorIdNotFound ");
> + if (host->error & MG_REG_ERR_ABRT)
> + printk("DriveStatusError ");
> + if (host->error & MG_REG_ERR_AMNF)
> + printk("AddrMarkNotFound ");
> + printk("}");
> + if (host->error &
> + (MG_REG_ERR_BBK | MG_REG_ERR_UNC | MG_REG_ERR_IDNF | MG_REG_ERR_AMNF)) {
> + if (host->breq) {
> + req = elv_next_request(host->breq);
> + if (req)
> + printk(", sector=%ld", req->sector);
> + }
> +
> + }
> + printk("\n");
> + }
> +}
> +
> +static unsigned int mg_wait(struct mg_host *host, u32 expect, u32 msec)
> +{
> + u8 status;
> + u64 expire, cur_jiffies;
> +
> + host->error = MG_ERR_NONE;
> + expire = get_jiffies_64() + msecs_to_jiffies(msec);
> +
> + status = inb(host->dev_base + MG_REG_STATUS);
> + do {
> + cur_jiffies = get_jiffies_64();
> + if (status & MG_REG_STATUS_BIT_BUSY) {
> + if (expect == MG_REG_STATUS_BIT_BUSY)
> + break;
> + } else {
> + /* Check the error condition! */
> + if (status & MG_REG_STATUS_BIT_ERROR) {
> + mg_dump_status("mg_wait", status, host);
> + break;
> + }
> +
> + if (expect == MG_STAT_READY) {
> + if (MG_READY_OK(status))
> + break;
> + }
> +
> + if (expect == MG_REG_STATUS_BIT_DATA_REQ) {
> + if (status & MG_REG_STATUS_BIT_DATA_REQ) {
> + break;
> + }
> + }
> + }
> + status = inb(host->dev_base + MG_REG_STATUS);
> + } while (cur_jiffies < expire);
> +
> + if (cur_jiffies >= expire) {
> + host->error = MG_ERR_TIMEOUT;
> + }
> +
> + return host->error;
> +}
> +
> +static void mg_unexpected_intr(struct mg_host *host)
> +{
> + u32 status = inb(host->dev_base + MG_REG_STATUS);
> +
> + mg_dump_status("mg_unexpected_intr", status, host);
> +}
> +
> +static irqreturn_t mg_irq(int irq, void *dev_id)
> +{
> + struct mg_host *host = dev_id;
> + void (*handler)(struct mg_host *) = host->mg_do_intr;
> +
> + host->mg_do_intr = 0;
> + del_timer(&host->timer);
> + if (!handler)
> + handler = mg_unexpected_intr;
> + handler(host);
> + return IRQ_HANDLED;
> +}
> +
> +static void mg_ide_fixstring(u8 *s, const int bytecount)
> +{
> + u8 *p, *end = &s[bytecount & ~1]; /* bytecount must be even */
> +
> + /* convert from big-endian to host byte order */
> + for (p = s ; p != end ; p += 2)
> + be16_to_cpus((u16 *) p);
> +
> + /* strip leading blanks */
> + p = s;
> + while (s != end && *s == ' ')
> + ++s;
> + /* compress internal blanks and strip trailing blanks */
> + while (s != end && *s) {
> + if (*s++ != ' ' || (s != end && *s && *s != ' '))
> + *p++ = *(s-1);
> + }
> + /* wipe out trailing garbage */
> + while (p != end)
> + *p++ = '\0';
> +}
> +
> +static int mg_get_disk_id(struct mg_host *host)
> +{
> + u32 i;
> + s32 err;
> + u16 *id = (u16 *)&host->id_data;
> + struct mg_drv_data *prv_data = host->dev->platform_data;
> +
> + if (!prv_data->use_polling) {
> + outb(MG_REG_CTRL_INTR_DISABLE, host->dev_base + MG_REG_DRV_CTRL);
> + }
> +
> + outb(MG_CMD_ID, host->dev_base + MG_REG_COMMAND);
> + err = mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ, 3000);
> + if (!err) {
> + for (i = 0; i < (MG_SECTOR_SIZE >> 1); i++)
> + id[i] = le16_to_cpu(inw(host->dev_base + MG_BUFF_OFFSET + i * 2));
> +
> + outb(MG_CMD_RD_CONF, host->dev_base + MG_REG_COMMAND);
> + err = mg_wait(host, MG_STAT_READY, 3000);
> + if (!err) {
> + if ((host->id_data.field_valid & 1) == 0) {
> + err = MG_ERR_TRANSLATION;
> + } else {
> +#ifdef __BIG_ENDIAN
> + host->id_data.lba_capacity = (host->id_data.lba_capacity << 16) | (host->id_data.lba_capacity >> 16);
> +#endif /* __BIG_ENDIAN */
> + host->tot_sectors = host->id_data.lba_capacity;
> + mg_ide_fixstring(host->id_data.model, sizeof(host->id_data.model));
> + mg_ide_fixstring(host->id_data.serial_no, sizeof(host->id_data.serial_no));
> + mg_ide_fixstring(host->id_data.fw_rev, sizeof(host->id_data.fw_rev));
> + printk(KERN_INFO "mg_disk: model: %s\n", host->id_data.model);
> + printk(KERN_INFO "mg_disk: firm: %.8s\n", host->id_data.fw_rev);
> + printk(KERN_INFO "mg_disk: serial: %s\n", host->id_data.serial_no);
> + printk(KERN_INFO "mg_disk: %d sectors\n", host->tot_sectors);
> + }
> + }
> + }
> +
> + if (!prv_data->use_polling) {
> + outb(MG_REG_CTRL_INTR_ENABLE, host->dev_base + MG_REG_DRV_CTRL);
> + }
> +
> + return err;
> +}
> +
> +
> +static int mg_disk_init(struct mg_host *host)
> +{
> + struct mg_drv_data *prv_data = host->dev->platform_data;
> + s32 err;
> + u8 init_status;
> +
> + /* init ctrl pin */
> + if (prv_data->mg_ctrl_pin_init)
> + prv_data->mg_ctrl_pin_init();
> +
> + if (!prv_data->mg_hdrst_pin)
> + return MG_ERR_CTRL_RST;
> +
> + /* hdd rst low */
> + prv_data->mg_hdrst_pin(0);
> + err = mg_wait(host, MG_REG_STATUS_BIT_BUSY, 300);
> + if (err)
> + return err;
> +
> + /* hdd rst high */
> + prv_data->mg_hdrst_pin(1);
> + err = mg_wait(host, MG_STAT_READY, 3000);
> + if (err)
> + return err;
> +
> + /* soft reset on */
> + outb(MG_REG_CTRL_RESET |
> + (prv_data->use_polling ? MG_REG_CTRL_INTR_DISABLE : MG_REG_CTRL_INTR_ENABLE),
> + host->dev_base + MG_REG_DRV_CTRL);
> + err = mg_wait(host, MG_REG_STATUS_BIT_BUSY, 3000);
> + if (err)
> + return err;
> +
> + /* soft reset off */
> + outb(prv_data->use_polling ? MG_REG_CTRL_INTR_DISABLE : MG_REG_CTRL_INTR_ENABLE,
> + host->dev_base + MG_REG_DRV_CTRL);
> + err = mg_wait(host, MG_STAT_READY, 3000);
> + if (err)
> + return err;
> +
> + init_status = inb(host->dev_base + MG_REG_STATUS) & 0xf;
> +
> + if (init_status == 0xf)
> + return MG_ERR_INIT_STAT;
> +
> + if (prv_data->op_mode & (MG_OP_CASCADE_SYNC_RD | MG_OP_CASCADE_SYNC_WR)) {
> + outb(prv_data->burst_latcy | prv_data->burst_len, host->dev_base + MG_REG_BURST_CTRL);
> + }
> +
> + return err;
> +}
> +
> +static void mg_bad_rw_intr(struct mg_host *host)
> +{
> + struct request *req = elv_next_request(host->breq);
> + if (req != NULL) {
> + if (++req->errors >= MG_MAX_ERRORS) {
> + end_request(req, 0);
> + } else if (req->errors % MG_RESET_FREQ == 0 || host->error == MG_ERR_TIMEOUT) {
> + host->reset = 1;
> + }
> + /* Otherwise just retry */
> + }
> +}
> +
> +static unsigned int mg_out(struct mg_host *host,
> + unsigned int sect_num,
> + unsigned int sect_cnt,
> + unsigned int cmd,
> + void (*intr_addr)(struct mg_host *))
> +{
> + struct mg_drv_data *prv_data = host->dev->platform_data;
> +
> + if (mg_wait(host, MG_STAT_READY, 3000)) {
> + return host->error;
> + }
> +
> + if (!prv_data->use_polling) {
> + host->mg_do_intr = intr_addr;
> + mod_timer(&host->timer, jiffies + 3 * HZ);
> + }
> + outb((u8)sect_cnt, host->dev_base + MG_REG_SECT_CNT);
> + outb((u8)sect_num, host->dev_base + MG_REG_SECT_NUM);
> + outb((u8)(sect_num >> 8), host->dev_base + MG_REG_CYL_LOW);
> + outb((u8)(sect_num >> 16), host->dev_base + MG_REG_CYL_HIGH);
> + outb((u8)((sect_num >> 24) | MG_REG_HEAD_LBA_MODE), host->dev_base + MG_REG_DRV_HEAD);
> + outb(cmd, host->dev_base + MG_REG_COMMAND);
> + return MG_ERR_NONE;
> +}
> +
> +static void mg_read(struct request *req)
> +{
> + u32 remains, j;
> + struct mg_host *host = req->rq_disk->private_data;
> +
> + remains = req->nr_sectors;
> +
> + if (host->reset) {
> + if (mg_disk_init(host)) {
> + end_request(req, 0);
> + return;
> + }
> + host->reset = 0;
> + }
> +
> + if (mg_out(host, req->sector, req->nr_sectors, MG_CMD_RD, 0) != MG_ERR_NONE) {
> + mg_bad_rw_intr(host);
> + }
> +
> + MG_DBG("requested %d sects (from %ld), buffer=0x%p\n", remains, req->sector, req->buffer);
> +
> + while (remains) {
> + if (mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ, 3000) != MG_ERR_NONE) {
> + mg_bad_rw_intr(host);
> + return;
> + }
> + for (j = 0; j < MG_SECTOR_SIZE >> 1; j++) {
> + *(u16 *)req->buffer = inw(host->dev_base + MG_BUFF_OFFSET + (j << 1));
> + req->buffer += 2;
> + }
> +
> + req->sector++;
> + req->errors = 0;
> + remains = --req->nr_sectors;
> + --req->current_nr_sectors;
> +
> + if (req->current_nr_sectors <= 0) {
> + MG_DBG("remain : %d sects\n", remains);
> + end_request(req, 1);
> + if (remains > 0) {
> + req = elv_next_request(host->breq);
> + }
> + }
> +
> + outb(MG_CMD_RD_CONF, host->dev_base + MG_REG_COMMAND);
> + }
> +}
> +
> +static void mg_write(struct request *req)
> +{
> + u32 remains, j;
> + struct mg_host *host = req->rq_disk->private_data;
> +
> + remains = req->nr_sectors;
> +
> + if (host->reset) {
> + if (mg_disk_init(host)) {
> + end_request(req, 0);
> + return;
> + }
> + host->reset = 0;
> + }
> +
> + if (mg_out(host, req->sector, req->nr_sectors, MG_CMD_WR, 0) != MG_ERR_NONE) {
> + mg_bad_rw_intr(host);
> + return;
> + }
> +
> +
> + MG_DBG("requested %d sects (from %ld), buffer=0x%p\n", remains, req->sector, req->buffer);
> + while (remains) {
> + if (mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ, 3000) != MG_ERR_NONE) {
> + mg_bad_rw_intr(host);
> + return;
> + }
> + for (j = 0; j < MG_SECTOR_SIZE >> 1; j++) {
> + outw(*(u16 *)req->buffer, host->dev_base + MG_BUFF_OFFSET + (j << 1));
> + req->buffer += 2;
> + }
> + req->sector++;
> + remains = --req->nr_sectors;
> + --req->current_nr_sectors;
> +
> + if (req->current_nr_sectors <= 0) {
> + MG_DBG("remain : %d sects\n", remains);
> + end_request(req, 1);
> + if (remains > 0) {
> + req = elv_next_request(host->breq);
> + }
> + }
> +
> + outb(MG_CMD_WR_CONF, host->dev_base + MG_REG_COMMAND);
> + }
> +}
> +
> +static void mg_read_intr(struct mg_host *host)
> +{
> + u32 i;
> + struct request *req;
> +
> + /* check status */
> + do {
> + i = inb(host->dev_base + MG_REG_STATUS);
> + if (i & MG_REG_STATUS_BIT_BUSY)
> + break;
> + if (!MG_READY_OK(i))
> + break;
> + if (i & MG_REG_STATUS_BIT_DATA_REQ)
> + goto ok_to_read;
> + } while (0);
> + mg_dump_status("mg_read_intr", i, host);
> + mg_bad_rw_intr(host);
> + mg_request(host->breq);
> + return;
> +
> +ok_to_read:
> + /* get current segment of request */
> + req = elv_next_request(host->breq);
> +
> + /* read 1 sector */
> + for (i = 0; i < MG_SECTOR_SIZE >> 1; i++) {
> + *(u16 *)req->buffer = inw(host->dev_base + MG_BUFF_OFFSET + (i << 1));
> + req->buffer += 2;
> + }
> +
> + /* manipulate request */
> + MG_DBG("sector %ld, remaining=%ld, buffer=0x%p\n", req->sector, req->nr_sectors - 1, req->buffer);
> +
> + req->sector++;
> + req->errors = 0;
> + i = --req->nr_sectors;
> + --req->current_nr_sectors;
> +
> + /* let know if current segment done */
> + if (req->current_nr_sectors <= 0)
> + end_request(req, 1);
> +
> + /* set handler if read remains */
> + if (i > 0) {
> + host->mg_do_intr = mg_read_intr;
> + mod_timer(&host->timer, jiffies + 3 * HZ);
> + }
> +
> + /* send read confirm */
> + outb(MG_CMD_RD_CONF, host->dev_base + MG_REG_COMMAND);
> +
> + /* goto next request */
> + if (!i) {
> + mg_request(host->breq);
> + }
> +}
> +
> +static void mg_write_intr(struct mg_host *host)
> +{
> + u32 i, j;
> + u16 *buff;
> + struct request *req;
> +
> + /* get current segment of request */
> + req = elv_next_request(host->breq);
> +
> + /* check status */
> + do {
> + i = inb(host->dev_base + MG_REG_STATUS);
> + if (i & MG_REG_STATUS_BIT_BUSY)
> + break;
> + if (!MG_READY_OK(i))
> + break;
> + if ((req->nr_sectors <= 1) || (i & MG_REG_STATUS_BIT_DATA_REQ))
> + goto ok_to_write;
> + } while (0);
> + mg_dump_status("mg_write_intr", i, host);
> + mg_bad_rw_intr(host);
> + mg_request(host->breq);
> + return;
> +
> +ok_to_write:
> + /* manipulate request */
> + req->sector++;
> + i = --req->nr_sectors;
> + --req->current_nr_sectors;
> + req->buffer += MG_SECTOR_SIZE;
> +
> + /* let know if current segment or all done */
> + if (!i || (req->bio && req->current_nr_sectors <= 0))
> + end_request(req, 1);
> +
> + /* write 1 sector and set handler if remains */
> + if (i > 0) {
> + buff = (u16 *)req->buffer;
> + for (j = 0; j < MG_STORAGE_BUFFER_SIZE >> 1; j++) {
> + outw(*buff, host->dev_base + MG_BUFF_OFFSET + (j << 1));
> + buff++;
> + }
> + MG_DBG("sector %ld, remaining=%ld, buffer=0x%p\n", req->sector, req->nr_sectors, req->buffer);
> + host->mg_do_intr = mg_write_intr;
> + mod_timer(&host->timer, jiffies + 3 * HZ);
> + }
> +
> + /* send write confirm */
> + outb(MG_CMD_WR_CONF, host->dev_base + MG_REG_COMMAND);
> +
> + if (!i) {
> + mg_request(host->breq);
> + }
> +}
> +
> +void mg_times_out(unsigned long data)
> +{
> + struct mg_host *host = (struct mg_host *)data;
> + char *name;
> + struct request *req;
> +
> + req = elv_next_request(host->breq);
> + if (!req)
> + return;
> +
> + host->mg_do_intr = NULL;
> +
> + name = req->rq_disk->disk_name;
> + printk("%s: timeout\n", name);
> +
> + host->error = MG_ERR_TIMEOUT;
> + mg_bad_rw_intr(host);
> +
> + mg_request(host->breq);
> +}
> +
> +static void mg_request_poll(struct request_queue *q)
> +{
> + struct request *req;
> + struct mg_host *host;
> +
> + while ((req = elv_next_request(q)) != NULL) {
> +
> + host = req->rq_disk->private_data;
> +
> + if (blk_fs_request(req)) {
> + switch (rq_data_dir(req)) {
> + case READ:
> + mg_read(req);
> + break;
> + case WRITE:
> + mg_write(req);
> + break;
> + default:
> + printk(KERN_WARNING "%s:%d unknown command\n", __func__, __LINE__);
> + end_request(req, 0);
> + break;
> + }
> + }
> + }
> +}
> +
> +static unsigned int mg_issue_req(struct request *req,
> + struct mg_host *host,
> + unsigned int sect_num,
> + unsigned int sect_cnt)
> +{
> + u16 *buff;
> + u32 i;
> +
> + switch (rq_data_dir(req)) {
> + case READ:
> + if (mg_out(host, sect_num, sect_cnt, MG_CMD_RD, &mg_read_intr) != MG_ERR_NONE) {
> + mg_bad_rw_intr(host);
> + return host->error;
> + }
> + break;
> + case WRITE:
> + /* TODO : handler */
> + outb(MG_REG_CTRL_INTR_DISABLE, host->dev_base + MG_REG_DRV_CTRL);
> + if (mg_out(host, sect_num, sect_cnt, MG_CMD_WR, &mg_write_intr) != MG_ERR_NONE) {
> + mg_bad_rw_intr(host);
> + return host->error;
> + }
> + del_timer(&host->timer);
> + mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ, 3000);
> + outb(MG_REG_CTRL_INTR_ENABLE, host->dev_base + MG_REG_DRV_CTRL);
> + if (host->error) {
> + mg_bad_rw_intr(host);
> + return host->error;
> + }
> + buff = (u16 *)req->buffer;
> + for (i = 0; i < MG_SECTOR_SIZE >> 1; i++) {
> + outw(*buff, host->dev_base + MG_BUFF_OFFSET + (i << 1));
> + buff++;
> + }
> + mod_timer(&host->timer, jiffies + 3 * HZ);
> + outb(MG_CMD_WR_CONF, host->dev_base + MG_REG_COMMAND);
> + break;
> + default:
> + printk(KERN_WARNING "%s:%d unknown command\n", __func__, __LINE__);
> + end_request(req, 0);
> + break;
> + }
> + return MG_ERR_NONE;
> +}
> +
> +/* This function also called from IRQ context */
> +static void mg_request(struct request_queue *q)
> +{
> + struct request *req;
> + struct mg_host *host;
> + u32 sect_num, sect_cnt;
> +
> + while (1) {
> + req = elv_next_request(q);
> + if (!req)
> + return;
> +
> + host = req->rq_disk->private_data;
> +
> + /* check unwanted request call */
> + if (host->mg_do_intr)
> + return;
> +
> + del_timer(&host->timer);
> +
> + if (host->reset) {
> + if (mg_disk_init(host)) {
> + end_request(req, 0);
> + return;
> + }
> + host->reset = 0;
> + }
> +
> + sect_num = req->sector;
> + /* deal whole segments */
> + sect_cnt = req->nr_sectors;
> +
> + /* sanity check */
> + if (sect_num >= get_capacity(req->rq_disk) ||
> + ((sect_num + sect_cnt) > get_capacity(req->rq_disk))) {
> + printk(KERN_WARNING "%s: bad access: sector=%d, count=%d\n",
> + req->rq_disk->disk_name, sect_num, sect_cnt);
> + end_request(req, 0);
> + continue;
> + }
> +
> + if (!blk_fs_request(req))
> + return;
> +
> + if (!mg_issue_req(req, host, sect_num, sect_cnt))
> + return;
> + }
> +}
> +
> +static int mg_getgeo(struct block_device *bdev, struct hd_geometry *geo)
> +{
> + struct mg_host *host = bdev->bd_disk->private_data;
> +
> + geo->cylinders = host->id_data.cyls;
> + geo->heads = host->id_data.heads;
> + geo->sectors = host->id_data.sectors;
> + return 0;
> +}
> +
> +static struct block_device_operations mg_disk_ops = {
> + .getgeo = mg_getgeo
> +};
> +
> +static int mg_probe(struct platform_device *plat_dev)
> +{
> + struct mg_host *host;
> + struct resource *rsc;
> + struct mg_drv_data *prv_data = plat_dev->dev.platform_data;
> + int err = 0;
> +
> + if (!prv_data) {
> + printk(KERN_ERR "%s:%d fail (no driver_data)\n", __func__, __LINE__);
> + err = -EINVAL;
> + goto probe_err;
> + }
> +
> + /* alloc mg_host */
> + host = kmalloc(sizeof(struct mg_host), GFP_KERNEL);
> + if (!host) {
> + printk(KERN_ERR "%s:%d fail (no memory for mg_host)\n", __func__, __LINE__);
> + err = -ENOMEM;
> + goto probe_err;
> + }
> + memset(host, 0, sizeof(struct mg_host));
> + host->major = MG_DISK_MAJ;
> +
> + /* link each other */
> + prv_data->host = host;
> + host->dev = &plat_dev->dev;
> +
> + /* io remap */
> + rsc = platform_get_resource(plat_dev, IORESOURCE_MEM, 0);
> + if (!rsc) {
> + printk(KERN_ERR "%s:%d platform_get_resource fail\n", __func__, __LINE__);
> + err = -EINVAL;
> + goto probe_err_2;
> + }
> + host->dev_base = (unsigned long)ioremap(rsc->start , rsc->end + 1);
> + if (!host->dev_base) {
> + printk(KERN_ERR "%s:%d ioremap fail\n", __func__, __LINE__);
> + err = -EIO;
> + goto probe_err_2;
> + }
> + MG_DBG("dev_base = 0x%x\n", (u32)host->dev_base);
> +
> + /* disk init */
> + err = mg_disk_init(host);
> + if (err) {
> + printk(KERN_ERR "%s:%d fail (err code : %d)\n", __func__, __LINE__, err);
> + err = -EIO;
> + goto probe_err_3;
> + }
> +
> + /* get irq resource */
> + if (!prv_data->use_polling) {
> + host->irq = platform_get_irq(plat_dev, 0);
> + if (host->irq == -ENXIO) {
> + err = host->irq;
> + goto probe_err_3;
> + }
> + err = request_irq(host->irq, mg_irq, IRQF_DISABLED | IRQF_TRIGGER_RISING, MG_DEV_NAME, host);
> + if (err) {
> + printk(KERN_ERR "%s:%d fail (request_irq err=%d)\n", __func__, __LINE__, err);
> + goto probe_err_3;
> + }
> +
> + }
> +
> + /* get disk id */
> + err = mg_get_disk_id(host);
> + if (err) {
> + printk(KERN_ERR "%s:%d fail (err code : %d)\n", __func__, __LINE__, err);
> + err = -EIO;
> + goto probe_err_4;
> + }
> +
> + err = register_blkdev(host->major, MG_DISK_NAME);
> + if (err < 0) {
> + printk(KERN_ERR "%s:%d (register_blkdev) fail (err code : %d)\n", __func__, __LINE__, err);
> + goto probe_err_4;
> + }
> + err = 0;
> + if (!host->major)
> + host->major = err;
> +
> + spin_lock_init(&host->lock);
> +
> + if (prv_data->use_polling) {
> + host->breq = blk_init_queue(mg_request_poll, &host->lock);
> + } else {
> + host->breq = blk_init_queue(mg_request, &host->lock);
> + }
> +
> + if (!host->breq) {
> + err = -ENOMEM;
> + printk(KERN_ERR "%s:%d (blk_init_queue) fail\n", __func__, __LINE__);
> + goto probe_err_5;
> + }
> +
> + /* mflash is random device, thanx for the noop */
> + elevator_exit(host->breq->elevator);
> + err = elevator_init(host->breq, "noop");
> + if (err) {
> + printk(KERN_ERR "%s:%d (elevator_init) fail\n", __func__, __LINE__);
> + goto probe_err_6;
> + }
> + blk_queue_max_sectors(host->breq, MG_MAX_SECTS);
> + blk_queue_hardsect_size(host->breq, MG_SECTOR_SIZE);
> +
> + init_timer(&host->timer);
> + host->timer.function = mg_times_out;
> + host->timer.data = (unsigned long)host;
> +
> + host->gd = alloc_disk(MG_DISK_MAX_PART);
> + if (!host->gd) {
> + printk(KERN_ERR "%s:%d (alloc_disk) fail\n", __func__, __LINE__);
> + err = -ENOMEM;
> + goto probe_err_7;
> + }
> + host->gd->major = MG_DISK_MAJ;
> + host->gd->first_minor = 0;
> + host->gd->fops = &mg_disk_ops;
> + host->gd->queue = host->breq;
> + host->gd->private_data = host;
> + sprintf(host->gd->disk_name, MG_DISK_NAME"a");
> +
> + set_capacity(host->gd, host->tot_sectors);
> +
> + add_disk(host->gd);
> +
> + return err;
> +
I think below goto label enumeration is a not good.
We need to change some good style. but Now, I don't
have any good idea.
> +probe_err_7:
> + del_timer_sync(&host->timer);
> +probe_err_6:
> + blk_cleanup_queue(host->breq);
> +probe_err_5:
> + unregister_blkdev(MG_DISK_MAJ, MG_DISK_NAME);
> +probe_err_4:
> + if (!prv_data->use_polling)
> + free_irq(host->irq, host);
> +probe_err_3:
> + iounmap((void __iomem *)host->dev_base);
> +probe_err_2:
> + kfree(host);
> +probe_err:
> + return err;
> +}
> +
> +static int mg_remove(struct platform_device *plat_dev)
> +{
> + struct mg_drv_data *prv_data = plat_dev->dev.platform_data;
> + struct mg_host *host = prv_data->host;
> + int err = 0;
> +
> + /* delete timer */
> + del_timer_sync(&host->timer);
> +
> + /* remove disk */
> + if (host->gd) {
> + del_gendisk(host->gd);
> + put_disk(host->gd);
> + }
> + /* remove queue */
> + if (host->breq)
> + blk_cleanup_queue(host->breq);
> +
> + /* unregister blk device */
> + unregister_blkdev(host->major, MG_DISK_NAME);
> +
> + /* free irq */
> + if (!prv_data->use_polling)
> + free_irq(host->irq, host);
> +
> + /* unmap io */
> + if (host->dev_base)
> + iounmap((void __iomem *)host->dev_base);
> +
> + /* free mg_host */
> + if (host)
> + kfree(host);
> +
> + return err;
> +}
> +
> +static struct platform_driver mg_disk_driver = {
> + .probe = mg_probe,
> + .remove = mg_remove,
> + .driver = {
> + .name = MG_DEV_NAME,
> + .owner = THIS_MODULE,
> + }
> +};
> +
> +/****************************************************************************
> + *
> + * Module stuff
> + *
> + ****************************************************************************/
> +
> +static int __init mg_init(void)
> +{
> + printk(KERN_INFO "mGine mflash driver, (c) 2008 mGine Co.\n");
> + return platform_driver_register(&mg_disk_driver);
> +}
> +
> +static void __exit mg_exit(void)
> +{
> + printk(KERN_INFO "mflash driver : bye bye\n");
> + platform_driver_unregister(&mg_disk_driver);
> +}
> +
> +module_init(mg_init);
> +module_exit(mg_exit);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_AUTHOR("unsik Kim <donari75@gmail.com>");
> +MODULE_DESCRIPTION("mGine m[g]flash device driver");
> diff --git a/include/linux/mg_disk.h b/include/linux/mg_disk.h
> new file mode 100644
> index 0000000..df6bc04
> --- /dev/null
> +++ b/include/linux/mg_disk.h
> @@ -0,0 +1,174 @@
> +/*
> + * include/linux/mg_disk.c
> + *
> + * Support for the mGine m[g]flash IO mode.
> + * Based on legacy hd.c
> + *
> + * (c) 2008 mGine Co.,LTD
> + * (c) 2008 unsik Kim <donari75@gmail.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#ifndef __MG_DISK_H__
> +#define __MG_DISK_H__
> +
> +#include <linux/blkdev.h>
> +#include <linux/hdreg.h>
> +
> +/* name for block device */
> +#define MG_DISK_NAME "mgd"
> +/* name for platform device */
> +#define MG_DEV_NAME "mg_disk"
> +
> +#define MG_DISK_MAJ 240
> +#define MG_DISK_MAX_PART 16
> +#define MG_SECTOR_SIZE 512
> +#define MG_MAX_SECTS 256
> +
> +/* Register offsets */
> +#define MG_BUFF_OFFSET 0x8000
> +#define MG_STORAGE_BUFFER_SIZE 0x200
> +#define MG_REG_OFFSET 0xC000
> +#define MG_REG_FEATURE (MG_REG_OFFSET + 2) /* write case */
> +#define MG_REG_ERROR (MG_REG_OFFSET + 2) /* read case */
> +#define MG_REG_SECT_CNT (MG_REG_OFFSET + 4)
> +#define MG_REG_SECT_NUM (MG_REG_OFFSET + 6)
> +#define MG_REG_CYL_LOW (MG_REG_OFFSET + 8)
> +#define MG_REG_CYL_HIGH (MG_REG_OFFSET + 0xA)
> +#define MG_REG_DRV_HEAD (MG_REG_OFFSET + 0xC)
> +#define MG_REG_COMMAND (MG_REG_OFFSET + 0xE) /* write case */
> +#define MG_REG_STATUS (MG_REG_OFFSET + 0xE) /* read case */
> +#define MG_REG_DRV_CTRL (MG_REG_OFFSET + 0x10)
> +#define MG_REG_BURST_CTRL (MG_REG_OFFSET + 0x12)
> +
> +/* "Drive Select/Head Register" bit values */
> +#define MG_REG_HEAD_MUST_BE_ON 0xA0 /* These 2 bits are always on */
> +#define MG_REG_HEAD_DRIVE_MASTER (0x00 | MG_REG_HEAD_MUST_BE_ON)
> +#define MG_REG_HEAD_DRIVE_SLAVE (0x10 | MG_REG_HEAD_MUST_BE_ON)
> +#define MG_REG_HEAD_LBA_MODE (0x40 | MG_REG_HEAD_MUST_BE_ON)
> +
> +
> +/* "Device Control Register" bit values */
> +#define MG_REG_CTRL_INTR_ENABLE 0x0
> +#define MG_REG_CTRL_INTR_DISABLE (0x1<<1)
> +#define MG_REG_CTRL_RESET (0x1<<2)
> +#define MG_REG_CTRL_INTR_POLA_ACTIVE_HIGH 0x0
> +#define MG_REG_CTRL_INTR_POLA_ACTIVE_LOW (0x1<<4)
> +#define MG_REG_CTRL_DPD_POLA_ACTIVE_LOW 0x0
> +#define MG_REG_CTRL_DPD_POLA_ACTIVE_HIGH (0x1<<5)
> +#define MG_REG_CTRL_DPD_DISABLE 0x0
> +#define MG_REG_CTRL_DPD_ENABLE (0x1<<6)
> +
> +/* Status register bit */
> +#define MG_REG_STATUS_BIT_ERROR 0x01 /* error bit in status register */
> +#define MG_REG_STATUS_BIT_CORRECTED_ERROR 0x04 /* corrected error in status register */
> +#define MG_REG_STATUS_BIT_DATA_REQ 0x08 /* data request bit in status register */
> +#define MG_REG_STATUS_BIT_SEEK_DONE 0x10 /* DSC - Drive Seek Complete */
> +#define MG_REG_STATUS_BIT_WRITE_FAULT 0x20 /* DWF - Drive Write Fault */
> +#define MG_REG_STATUS_BIT_READY 0x40
> +#define MG_REG_STATUS_BIT_BUSY 0x80
> +
> +/* handy status */
> +#define MG_STAT_READY (MG_REG_STATUS_BIT_READY | MG_REG_STATUS_BIT_SEEK_DONE)
> +#define MG_READY_OK(s) (((s) & (MG_STAT_READY | \
> + (MG_REG_STATUS_BIT_BUSY | MG_REG_STATUS_BIT_WRITE_FAULT | MG_REG_STATUS_BIT_ERROR))) \
> + == MG_STAT_READY)
> +
> +/* Error register */
> +#define MG_REG_ERR_AMNF 0x01
> +#define MG_REG_ERR_ABRT 0x04
> +#define MG_REG_ERR_IDNF 0x10
> +#define MG_REG_ERR_UNC 0x40
> +#define MG_REG_ERR_BBK 0x80
> +
> +/* error code for others */
> +#define MG_ERR_NONE 0
> +#define MG_ERR_TIMEOUT 0x100
> +#define MG_ERR_INIT_STAT 0x101
> +#define MG_ERR_TRANSLATION 0x102
> +#define MG_ERR_CTRL_RST 0x103
> +
> +#define MG_MAX_ERRORS 16 /* Max read/write errors/sector */
> +#define MG_RESET_FREQ 4 /* Reset controller every 4th retry */
> +
> +/* command */
> +#define MG_CMD_RD 0x20
> +#define MG_CMD_WR 0x30
> +#define MG_CMD_SLEEP 0x99
> +#define MG_CMD_WAKEUP 0xC3
> +#define MG_CMD_ID 0xEC
> +#define MG_CMD_WR_CONF 0x3C
> +#define MG_CMD_RD_CONF 0x40
> +
> +/* private driver data */
> +struct mg_drv_data {
> + /* disk resource */
> + u32 nr_chips;
> + u32 op_mode;
> +#define MG_OP_CASCADE (1 << 0)
> +#define MG_OP_CASCADE_SYNC_RD (1 << 1)
> +#define MG_OP_CASCADE_SYNC_WR (1 << 2)
> +#define MG_OP_INTERLEAVE (1 << 3)
> +
> + u32 use_polling;
> +
> + /* synchronous mode */
> + u16 burst_latcy;
> +#define MG_BURST_LAT_4 (3 << 4)
> +#define MG_BURST_LAT_5 (4 << 4)
> +#define MG_BURST_LAT_6 (5 << 4)
> +#define MG_BURST_LAT_7 (6 << 4)
> +#define MG_BURST_LAT_8 (7 << 4)
> + u16 burst_len;
> +#define MG_BURST_LEN_4 (1 << 1)
> +#define MG_BURST_LEN_8 (2 << 1)
> +#define MG_BURST_LEN_16 (3 << 1)
> +#define MG_BURST_LEN_32 (4 << 1)
> +#define MG_BURST_LEN_CONT (0 << 1)
> +
> + /* control pin resource */
> + int (*mg_ctrl_pin_init) (void); /* initialize hdrst, wd, dpd pin to GPIO and output high */
> + void (*mg_hdrst_pin) (u8 level);
> + void (*mg_wp_pin) (u8 level);
> + void (*mg_dpd_pin) (u8 level);
> +
> + /* internally used */
> + struct mg_host *host;
> +};
> +
> +/* main structure for mflash driver */
> +struct mg_host {
> + struct device *dev;
> +
> + struct request_queue *breq;
> + spinlock_t lock;
> + struct gendisk *gd;
> +
> + struct timer_list timer;
> + void (*mg_do_intr) (struct mg_host *);
> +
> + struct hd_driveid id_data;
> + u32 tot_sectors;
> +
> + unsigned long dev_base;
> + unsigned int irq;
> +
> + u32 major;
> + u32 error;
> + u32 reset;
> +};
> +
> +/*
> + * Debugging macro and defines
> + */
> +#undef DO_MG_DEBUG
> +#ifdef DO_MG_DEBUG
> +# define MG_DBG(fmt, args...) printk(KERN_DEBUG "%s:%d "fmt, __func__, __LINE__, ##args)
> +#else /* CONFIG_MG_DEBUG */
> +# define MG_DBG(fmt, args...) do { } while (0)
> +#endif /* CONFIG_MG_DEBUG */
> +
> +#endif
> --
> 1.5.4.3
>
^ permalink raw reply
* [RFC 2.6.28 1/3] gpiolib: add batch set/get
From: Jaya Kumar @ 2009-01-25 9:54 UTC (permalink / raw)
To: jayakumar.lkml
Cc: linux-fbdev-devel, linux-embedded, Jaya Kumar, linux-kernel,
David Brownell, Paulius Zaleckas, Geert Uytterhoeven, Eric Miao,
Sam Ravnborg, linux-arm-kernel
Hi friends,
This is v5 of batch support for gpiolib. Thanks to Uwe Kleine-König,
Ryan Mallon and others for prior feedback. The changes I've made are:
- split the patches into generic, arch specific and am300epd
- adjusting the API to remove width (note, the actual API call where
width was dropped is in the arch specific code, not here.)
- updating documentation of this API in gpio.txt
- cleanup of the width, mask terms
Please let me know your thoughts and feedback.
Thanks,
jaya
Cc: David Brownell <david-b@pacbell.net>
Cc: Eric Miao <eric.miao@marvell.com>
Cc: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: linux-arm-kernel@lists.arm.linux.org.uk
Cc: linux-fbdev-devel@lists.sourceforge.net
Cc: linux-kernel@vger.kernel.org
Cc: linux-embedded@vger.kernel.org
Signed-off-by: Jaya Kumar <jayakumar.lkml@gmail.com>
---
Documentation/gpio.txt | 72 ++++++++++++
drivers/gpio/Kconfig | 5 +
drivers/gpio/gpiolib.c | 272 ++++++++++++++++++++++++++++++++++++++++++++
include/asm-generic/gpio.h | 17 +++-
4 files changed, 365 insertions(+), 1 deletions(-)
diff --git a/Documentation/gpio.txt b/Documentation/gpio.txt
index b1b9887..d249b5c 100644
--- a/Documentation/gpio.txt
+++ b/Documentation/gpio.txt
@@ -185,6 +185,78 @@ and not to need spinlocks. Such optimized calls can make bitbanging
applications a lot more efficient (in both space and time) than spending
dozens of instructions on subroutine calls.
+[OPTIONAL] Spinlock-Safe GPIO Batch access
+------------------------------------------
+The original GPIO API provides single bit access to GPIO pins. However,
+some devices treat GPIO as a mechanism for bulk data transfer. In this type
+of system, the performance of the single bit API may be inadequate. As such,
+the user can consider enabling the batch access API. The batch access API
+allows access of up-to 32-bits of GPIO at a time. This API is as follows:
+
+ /* BATCH GPIO INPUT */
+int gpio_get_batch(unsigned startpin, u32 mask, u32 *result);
+
+The following examples help explain how this function is to be used.
+ Q: How do I get gpio pins 0 through 7? (8 bits)
+ A: gpio_get_batch(startpin=0, mask=0xFF, &result) result=0xnn
+ Q: How do I get gpio pins 58 through 73? (16 bits)
+ A: gpio_get_batch(startpin=58, mask=0xFFFF, &result) result=0xnnnn
+ Q: How do I get gpio pins 16 through 47? (32 bits)
+ A: gpio_get_batch(startpin=16, mask=0xFFFFFFFF, &result)
+ A: result=0xnnnnnnnn
+ Q: How do I get non-consecutive gpio pins 5 and 9?
+ A: Use the mask to mask out 6, 7 and 8
+ A: So mask in binary is 10001 which is 0x11
+ A: gpio_get_batch(startpin=5, mask=0x11, &result)
+ A: result is in the same form, binary n000n
+
+ /* BATCH GPIO OUTPUT */
+int gpio_set_batch(unsigned startpin, u32 mask, u32 values);
+
+The following examples help explain how this function is to be used.
+ Q: How to set gpio pins 0 through 7 to all 0? (8 bits)
+ A: gpio_set_batch(startpin=0, mask=0xFF, values=0x0);
+ Q: How to set gpio pins 58 through 73 to all 1? (16 bits)
+ A: gpio_set_batch(startpin=58, mask=0xFFFF, values=0xFFFF);
+ Q: How to set gpio pins 16 through 47 to 0xCAFEC001? (32 bits)
+ A: gpio_set_batch(startpin=16, mask=0xFFFFFFFF, values=0xCAFEC001);
+ Q: How do I set non-consecutive gpio pins 5 and 9 to both 1?
+ A: Use the mask to mask out 6, 7 and 8
+ A: So mask in binary is 10001 which is 0x11
+ A: gpio_set_batch(startpin=5, mask=0x11, values=0x11)
+
+The following example shows the use of the batch API and a comparison with
+the original single bit API:
+
+Original input method which loops through a set of pins:
+ for (i = 0; i <= (DB15_GPIO_PIN - DB0_GPIO_PIN) ; i++)
+ res |= (gpio_get_value(DB0_GPIO_PIN + i)) ? (1 << i) : 0;
+
+Batch input method:
+ u32 val;
+ err = gpio_get_batch(DB0_GPIO_PIN, 0xFFFF, &val);
+
+Original output method:
+ for (i = 0; i <= (DB15_GPIO_PIN - DB0_GPIO_PIN) ; i++)
+ gpio_set_value(DB0_GPIO_PIN + i, (data >> i) & 0x01);
+
+Batch output method:
+ int err;
+ err = gpio_set_batch(DB0_GPIO_PIN, 0xFFFF, data);
+
+Using these calls for GPIOs that can't safely be accessed without sleeping
+(see below) is an error.
+
+Platform-specific implementations are encouraged to optimize the two
+calls by checking if the batch get/set requested can be achieved within the
+platform's fast path access to gpio registers. For example, if the starting
+gpio and width of bits to be written is contained within a single register
+then the platform specific implementation may choose to execute it. If the
+request is more complex, then the platform specific implementation can
+choose to call upon the platform independent __gpio_get/set_batch functions
+which are able to cross gpio_chip boundaries. Implementations are also
+encouraged to use the bitops macros. These will also optimize for use cases
+where the masks are constants.
GPIO access that may sleep
--------------------------
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 3d25654..474070b 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -37,6 +37,11 @@ menuconfig GPIOLIB
if GPIOLIB
+config GPIOLIB_BATCH
+ bool "Batch GPIO support"
+ help
+ Say Y here to add the capability to batch set/get GPIOs.
+
config DEBUG_GPIO
bool "Debug GPIO calls"
depends on DEBUG_KERNEL
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 35e7aea..12e1e30 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -643,6 +643,272 @@ static inline void gpiochip_unexport(struct gpio_chip *chip)
#endif /* CONFIG_GPIO_SYSFS */
+#ifdef CONFIG_GPIOLIB_BATCH
+/**
+ * __gpio_set_batch_generic() - Set batch of gpio pins in provided gpio_chip.
+ * @chip: gpio_chip containing this set of pins
+ * @startpin: starting gpio pin
+ * @mask: the mask to be applied to values
+ * @width: the width to the last set bit of the mask
+ * @values: values to assign including masked bits
+ * Context: any
+ *
+ * This provides a generic platform independent set_batch capability.
+ * It invokes the associated gpio_chip.set() method to actually set the
+ * value. gpio_chip-s that don't implement their own optimized
+ * set_batch function are assigned this function as a default.
+ *
+ * Returns a negative errno if the caller supplied bad data, such as
+ * startpin or width in excess of this chips gpio. Otherwise, we return zero
+ * as a success code.
+ */
+static int __gpio_set_batch_generic(struct gpio_chip *chip, unsigned startpin,
+ u32 mask, int width, u32 values)
+{
+ int i;
+ u32 pin_mask;
+ int value;
+
+ /*
+ * If the caller attempted to exceed the number of gpios that
+ * are in this chip, then we flag that as an invalid value for
+ * either the startpin or the width supplied.
+ */
+ if (startpin + width > chip->ngpio)
+ return -EINVAL;
+
+ /*
+ * We start the loop and continue till we reach the width
+ * of the mask that is provided to us.
+ */
+ for (i = 0; i < width; i++) {
+ /*
+ * If this bit is enabled by the mask then
+ * we perform the set. If it is disabled we leave
+ * it alone.
+ */
+ pin_mask = 1 << i;
+ if (mask & pin_mask) {
+ value = values & pin_mask;
+ chip->set(chip, startpin + i, value);
+ }
+ }
+
+ return 0;
+}
+
+/**
+ * __gpio_get_batch_generic() - Get batch of gpio pins in provided gpio_chip.
+ * @chip: gpio_chip containing this set of pins
+ * @startpin: starting gpio pin
+ * @mask: the mask to be applied to values
+ * @width: the width to the last set bit of the mask
+ * @result: the result to be returned
+ * Context: any
+ *
+ * This provides a generic platform independent get_batch capability.
+ * It invokes the associated gpio_chip.get() method to actually set the
+ * value. gpio_chip-s that don't implement their own optimized
+ * get_batch function are assigned this function as a default.
+ *
+ * Returns a negative errno if the caller supplied bad data, such as
+ * startpin or width in excess of this chips gpio. Otherwise, we return zero
+ * as a success code.
+ * Context: any
+ */
+static int __gpio_get_batch_generic(struct gpio_chip *chip, unsigned startpin,
+ u32 mask, int width, u32 *result)
+{
+ int i;
+ u32 pin_mask;
+ u32 values = 0;
+
+ /*
+ * If the caller attempted to exceed the number of gpios that
+ * are in this chip, then we flag that as an invalid value for
+ * either the startpin or the width supplied.
+ */
+ if (startpin + width > chip->ngpio)
+ return -EINVAL;
+
+ /*
+ * We start the loop and continue till we reach the width
+ * of the mask that is provided to us.
+ */
+ for (i = 0; i < width; i++) {
+ /*
+ * If this bit is enabled by the mask then
+ * we perform the get. If it is disabled we leave
+ * it alone thus leaving it as 0 because we initialized
+ * values.
+ */
+ pin_mask = 1 << i;
+ if (mask & pin_mask) {
+ if (chip->get(chip, startpin + i))
+ values |= pin_mask;
+ }
+ }
+
+ *result = values;
+ return 0;
+}
+
+/**
+ * __gpio_set_batch() - set batch of gpio pins across multiple gpio_chip-s
+ * @startpin: starting gpio pin
+ * @mask: the mask to be applied to values
+ * @width: the width to the last set bit of the mask
+ * @values: values to assign including masked bits
+ * Context: any
+ *
+ * This function is platform independent and uses the starting gpio and
+ * width information to iterate through the set of required gpio_chips
+ * to use their set_batch capability in order to set a batch of gpio pins.
+ * This function handles going across gpio_chip boundaries. It is intended
+ * to be called from arch/mach specific code if they detect that the caller
+ * requires functionality outside the fast-path.
+ *
+ * Returns a negative errno if the caller supplied bad data, such as
+ * startpin or width in excess of the platforms max gpio. Otherwise, we return
+ * zero as a success code.
+ *
+ */
+int __gpio_set_batch(unsigned startpin, u32 mask, int width, u32 values)
+{
+ struct gpio_chip *chip;
+ int i = 0;
+ int subwidth, remwidth;
+ u32 subvalue;
+ u32 submask;
+ int ret;
+
+ /*
+ * If the caller attempted to exceed the number of gpios that
+ * are available here, then we flag that as an invalid value for
+ * either the startpin or the width supplied.
+ */
+ if ((width > 32) || (startpin + width > ARCH_NR_GPIOS))
+ return -EINVAL;
+
+ do {
+ chip = gpio_to_chip(startpin + i);
+ WARN_ON(extra_checks && chip->can_sleep);
+
+ subvalue = values >> i; /* shift off the used data bits */
+
+ /* Work out the remaining width in this chip. */
+ remwidth = ((chip->base + (int) chip->ngpio) -
+ ((int) startpin + i));
+
+ /*
+ * Check if the remaining bits to be handled are less than
+ * the remaining width in this chip. That is the width of
+ * the subset that we are about to handle.
+ */
+ subwidth = min(width, remwidth);
+
+ /* Shift off the used mask bits. */
+ submask = mask >> i;
+
+ /* Now adjust mask by width of this subset. */
+ submask &= ((1 << subwidth) - 1);
+
+ /* If the mask is empty, then we can skip this chip. */
+ if (submask) {
+ ret = chip->set_batch(chip, startpin + i - chip->base,
+ submask, subwidth, subvalue);
+ if (ret)
+ return ret;
+ }
+
+ /* deduct the used bits from our todolist */
+ i += subwidth;
+ width -= subwidth;
+ } while (width);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(__gpio_set_batch);
+
+/**
+ * __gpio_get_batch() - get batch of gpio pins across multiple gpio_chip-s
+ * @startpin: starting gpio pin
+ * @mask: the mask to be applied to values
+ * @width: the width to the last set bit of the mask
+ * @result: returned values
+ * Context: any
+ *
+ * This function is platform independent and uses the starting gpio and
+ * width information to iterate through the set of required gpio_chips
+ * to use their get_batch capability in order to get a batch of gpio pins.
+ * This function handles going across gpio_chip boundaries. It is intended
+ * to be called from arch/mach specific code if they detect that the caller
+ * requires functionality outside the fast-path.
+ *
+ * Returns a negative errno if the caller supplied bad data, such as
+ * startpin or width in excess of the platforms max gpio. Otherwise, we return
+ * zero as a success code
+ *
+ */
+int __gpio_get_batch(unsigned startpin, u32 mask, int width, u32 *result)
+{
+ struct gpio_chip *chip;
+ int i = 0;
+ int subwidth, remwidth;
+ u32 submask;
+ u32 values = 0;
+ u32 subvalue;
+ int ret;
+
+ /*
+ * If the caller attempted to exceed the number of gpios that
+ * are available here, then we flag that as an invalid value for
+ * either the startpin or the width supplied.
+ */
+ if ((width > 32) || (startpin + width > ARCH_NR_GPIOS))
+ return -EINVAL;
+
+ do {
+ chip = gpio_to_chip(startpin + i);
+ WARN_ON(extra_checks && chip->can_sleep);
+
+ /* Work out the remaining width in this chip. */
+ remwidth = ((chip->base + (int) chip->ngpio) -
+ ((int) startpin + i));
+
+ /*
+ * Check if the remaining bits to be handled are less than
+ * the remaining width in this chip.
+ */
+ subwidth = min(width, remwidth);
+
+ /* shift off the used mask bits */
+ submask = mask >> i;
+ /* now adjust mask by width of get */
+ submask &= ((1 << width) - 1);
+
+ /* If the mask is empty, then we can skip this chip. */
+ if (submask) {
+ ret = chip->get_batch(chip, startpin + i - chip->base,
+ submask, subwidth, &subvalue);
+ if (ret)
+ return ret;
+
+ /* shift result back into correct position */
+ values |= subvalue << i;
+ }
+
+ /* deduct the used bits from our todolist */
+ i += subwidth;
+ width -= subwidth;
+ } while (width);
+
+ *result = values;
+ return 0;
+}
+EXPORT_SYMBOL_GPL(__gpio_get_batch);
+#endif
+
/**
* gpiochip_add() - register a gpio_chip
* @chip: the chip to register, with chip->base initialized
@@ -683,6 +949,12 @@ int gpiochip_add(struct gpio_chip *chip)
}
chip->base = base;
}
+#ifdef CONFIG_GPIOLIB_BATCH
+ if (!chip->set_batch)
+ chip->set_batch = __gpio_set_batch_generic;
+ if (!chip->get_batch)
+ chip->get_batch = __gpio_get_batch_generic;
+#endif
/* these GPIO numbers must not be managed by another gpio_chip */
for (id = base; id < base + chip->ngpio; id++) {
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index 81797ec..4e92ccf 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -44,6 +44,10 @@ struct module;
* returns either the value actually sensed, or zero
* @direction_output: configures signal "offset" as output, or returns error
* @set: assigns output value for signal "offset"
+ * @set_batch: batch assigns output values for signals starting at
+ * "startpin" with mask in "mask" all within this gpio_chip
+ * @get_batch: batch fetches values for consecutive signals starting at
+ * "startpin" with mask in "mask" all within this gpio_chip
* @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
* implementation may not sleep
* @dbg_show: optional routine to show contents in debugfs; default code
@@ -84,7 +88,14 @@ struct gpio_chip {
unsigned offset, int value);
void (*set)(struct gpio_chip *chip,
unsigned offset, int value);
-
+#ifdef CONFIG_GPIOLIB_BATCH
+ int (*set_batch)(struct gpio_chip *chip,
+ unsigned startpin, u32 mask,
+ int width, u32 values);
+ int (*get_batch)(struct gpio_chip *chip,
+ unsigned startpin, u32 mask,
+ int width, u32 *result);
+#endif
int (*to_irq)(struct gpio_chip *chip,
unsigned offset);
@@ -124,6 +135,10 @@ extern void gpio_set_value_cansleep(unsigned gpio, int value);
*/
extern int __gpio_get_value(unsigned gpio);
extern void __gpio_set_value(unsigned gpio, int value);
+#ifdef CONFIG_GPIOLIB_BATCH
+extern int __gpio_set_batch(unsigned gpio, u32 mask, int width, u32 values);
+extern int __gpio_get_batch(unsigned gpio, u32 mask, int width, u32 *result);
+#endif
extern int __gpio_cansleep(unsigned gpio);
--
1.5.2.3
------------------------------------------------------------------------------
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^ permalink raw reply related
* [RFC 2.6.28 2/3] mach-pxa: gpio add batch set/get
From: Jaya Kumar @ 2009-01-25 9:54 UTC (permalink / raw)
To: jayakumar.lkml
Cc: David Brownell, Eric Miao, Paulius Zaleckas, Geert Uytterhoeven,
Sam Ravnborg, linux-arm-kernel, linux-fbdev-devel, linux-kernel,
linux-embedded, Jaya Kumar
In-Reply-To: <123287728936-git-send-email-jayakumar.lkml@gmail.com>
This patch adds support for pxa specific batch set/get of gpio. This
is exported to gpiolib via the gpio_chip interface. The API used
conforms with the gpiolib batch set/get API described in
Documentation/gpio.txt.
Cc: David Brownell <david-b@pacbell.net>
Cc: Eric Miao <eric.miao@marvell.com>
Cc: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: linux-arm-kernel@lists.arm.linux.org.uk
Cc: linux-fbdev-devel@lists.sourceforge.net
Cc: linux-kernel@vger.kernel.org
Cc: linux-embedded@vger.kernel.org
Signed-off-by: Jaya Kumar <jayakumar.lkml@gmail.com>
---
arch/arm/mach-pxa/Kconfig | 1 +
arch/arm/mach-pxa/gpio.c | 63 +++++++++++++++++++++++++++++++++
arch/arm/mach-pxa/include/mach/gpio.h | 51 ++++++++++++++++++++++++++
3 files changed, 115 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index f844425..1b3e631 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -41,6 +41,7 @@ config GUMSTIX_AM200EPD
bool "Enable AM200EPD board support"
config GUMSTIX_AM300EPD
+ select GPIOLIB_BATCH
bool "Enable AM300EPD board support"
endchoice
diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/mach-pxa/gpio.c
index 5fec1e4..0e466e2 100644
--- a/arch/arm/mach-pxa/gpio.c
+++ b/arch/arm/mach-pxa/gpio.c
@@ -162,6 +162,67 @@ static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
__raw_writel(mask, pxa->regbase + GPCR_OFFSET);
}
+#ifdef CONFIG_GPIOLIB_BATCH
+/*
+ * Set output GPIO level in batches
+ */
+static int pxa_gpio_set_batch(struct gpio_chip *chip, unsigned startpin,
+ u32 mask, int width, u32 values)
+{
+ struct pxa_gpio_chip *pxa;
+
+ /* we're guaranteed by the caller that startpin + mask remains
+ * in this chip.
+ */
+ pxa = container_of(chip, struct pxa_gpio_chip, chip);
+
+ /* mask is used twice in shifted form */
+ mask <<= startpin;
+
+ values = (values << startpin) & mask;
+ if (values)
+ __raw_writel(values, pxa->regbase + GPSR_OFFSET);
+
+ values = ~values & mask;
+ if (values)
+ __raw_writel(values, pxa->regbase + GPCR_OFFSET);
+
+ return 0;
+}
+
+/*
+ * Get output GPIO level in batches
+ */
+static int pxa_gpio_get_batch(struct gpio_chip *chip, unsigned startpin,
+ u32 mask, int width, u32 *result)
+{
+ u32 values;
+ struct pxa_gpio_chip *pxa;
+
+ /* we're guaranteed by the caller that startpin + mask remains
+ * in this chip.
+ */
+ pxa = container_of(chip, struct pxa_gpio_chip, chip);
+
+ values = __raw_readl(pxa->regbase + GPLR_OFFSET);
+
+ /* shift the result back into original position */
+ *result = (values >> startpin) & mask;
+ return 0;
+}
+#endif
+
+/* this is done this way so that we can insert an ifdef-able value
+ * into the following GPIO_CHIP macro
+ */
+#ifdef CONFIG_GPIOLIB_BATCH
+#define SET_BATCH_MACRO .set_batch = pxa_gpio_set_batch,
+#define GET_BATCH_MACRO .get_batch = pxa_gpio_get_batch,
+#else
+#define SET_BATCH_MACRO
+#define GET_BATCH_MACRO
+#endif
+
#define GPIO_CHIP(_n) \
[_n] = { \
.regbase = GPIO##_n##_BASE, \
@@ -173,6 +234,8 @@ static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
.set = pxa_gpio_set, \
.base = (_n) * 32, \
.ngpio = 32, \
+ SET_BATCH_MACRO \
+ GET_BATCH_MACRO \
}, \
}
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index 2c538d8..7fa84fe 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -24,6 +24,7 @@
#ifndef __ASM_ARCH_PXA_GPIO_H
#define __ASM_ARCH_PXA_GPIO_H
+#include <linux/bitops.h>
#include <mach/pxa-regs.h>
#include <asm/irq.h>
#include <mach/hardware.h>
@@ -56,6 +57,56 @@ static inline void gpio_set_value(unsigned gpio, int value)
}
}
+#ifdef CONFIG_GPIOLIB_BATCH
+static inline int gpio_set_batch(unsigned startpin, u32 mask, u32 values)
+{
+ int err = 0;
+ int width = fls(mask);
+
+ if (__builtin_constant_p(startpin) &&
+ (startpin + width < NR_BUILTIN_GPIO) &&
+ ((startpin + width) <= roundup(startpin + 1, 32))) {
+ int shift;
+
+ shift = startpin % 32;
+ mask <<= shift;
+
+ values = (values << shift) & mask;
+ if (values)
+ GPSR(startpin) = values;
+
+ values = ~values & mask;
+ if (values)
+ GPCR(startpin) = values;
+ } else {
+ err = __gpio_set_batch(startpin, mask, width, values);
+ }
+ return err;
+}
+
+static inline int gpio_get_batch(unsigned startpin, u32 mask, u32 *result)
+{
+ int ret = 0;
+ int width = fls(mask);
+
+ if (__builtin_constant_p(startpin) &&
+ (startpin + width < NR_BUILTIN_GPIO) &&
+ ((startpin + width) <= roundup(startpin+1, 32))) {
+ int shift;
+ u32 values;
+
+ shift = startpin % 32;
+
+ values = GPLR(startpin);
+
+ *result = (values >> shift) & mask;
+ } else {
+ ret = __gpio_get_batch(startpin, mask, width, result);
+ }
+ return ret;
+}
+#endif
+
#define gpio_cansleep __gpio_cansleep
#define gpio_to_irq(gpio) IRQ_GPIO(gpio)
--
1.5.2.3
^ permalink raw reply related
* [RFC 2.6.28 3/3] mach-pxa: use batch set/get in am300epd
From: Jaya Kumar @ 2009-01-25 9:54 UTC (permalink / raw)
To: jayakumar.lkml
Cc: linux-fbdev-devel, linux-embedded, Jaya Kumar, linux-kernel,
David Brownell, Paulius Zaleckas, Geert Uytterhoeven, Eric Miao,
Sam Ravnborg, linux-arm-kernel
In-Reply-To: <123287728936-git-send-email-jayakumar.lkml@gmail.com>
This patch to am300epd uses the batch gpiolib set/get API in order
to significantly improve performance when transferring framebuffer
data.
Cc: David Brownell <david-b@pacbell.net>
Cc: Eric Miao <eric.miao@marvell.com>
Cc: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: linux-arm-kernel@lists.arm.linux.org.uk
Cc: linux-fbdev-devel@lists.sourceforge.net
Cc: linux-kernel@vger.kernel.org
Cc: linux-embedded@vger.kernel.org
Signed-off-by: Jaya Kumar <jayakumar.lkml@gmail.com>
---
arch/arm/mach-pxa/am300epd.c | 23 ++++++++++++-----------
1 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c
index 4bd10a1..237e3be 100644
--- a/arch/arm/mach-pxa/am300epd.c
+++ b/arch/arm/mach-pxa/am300epd.c
@@ -187,24 +187,25 @@ static void am300_cleanup(struct broadsheetfb_par *par)
static u16 am300_get_hdb(struct broadsheetfb_par *par)
{
- u16 res = 0;
- int i;
-
- for (i = 0; i <= (DB15_GPIO_PIN - DB0_GPIO_PIN) ; i++)
- res |= (gpio_get_value(DB0_GPIO_PIN + i)) ? (1 << i) : 0;
+ int err;
+ u32 val;
- return res;
+ err = gpio_get_batch(DB0_GPIO_PIN, 0xFFFF, &val);
+ if (err) {
+ dev_err(&am300_device->dev, "get failed: %d\n", err);
+ return 0;
+ }
+ return (u16) val;
}
static void am300_set_hdb(struct broadsheetfb_par *par, u16 data)
{
- int i;
-
- for (i = 0; i <= (DB15_GPIO_PIN - DB0_GPIO_PIN) ; i++)
- gpio_set_value(DB0_GPIO_PIN + i, (data >> i) & 0x01);
+ int err;
+ err = gpio_set_batch(DB0_GPIO_PIN, 0xFFFF, data);
+ if (err)
+ dev_err(&am300_device->dev, "set failed: %d\n", err);
}
-
static void am300_set_ctl(struct broadsheetfb_par *par, unsigned char bit,
u8 state)
{
--
1.5.2.3
------------------------------------------------------------------------------
This SF.net email is sponsored by:
SourcForge Community
SourceForge wants to tell your story.
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^ permalink raw reply related
* Re: [RFC 2.6.28 1/3] gpiolib: add batch set/get
From: Uwe Kleine-König @ 2009-01-25 11:20 UTC (permalink / raw)
To: Jaya Kumar
Cc: David Brownell, Eric Miao, Paulius Zaleckas, Geert Uytterhoeven,
Sam Ravnborg, linux-arm-kernel, linux-fbdev-devel, linux-kernel,
linux-embedded
In-Reply-To: <123287728936-git-send-email-jayakumar.lkml@gmail.com>
Hello Jaya,
On Sun, Jan 25, 2009 at 05:54:47PM +0800, Jaya Kumar wrote:
> - split the patches into generic, arch specific and am300epd
I would swap the order to have:
generic
am300epd
pxa specific
This way the tree of the second commit is a test case for the generic
implementation.
> - adjusting the API to remove width (note, the actual API call where
> width was dropped is in the arch specific code, not here.)
Nevertheless I would document the "generic" per arch specific
implementation in gpio.txt. For the functions like __gpio_get_value you
can just do
#define gpio_get_value(gpio) __gpio_get_value(gpio)
but for your batch functions you need something like
#define gpio_set_batch(startpin, mask, values) \
({ u32 __mask = mask; __gpio_set_batch(startpin, __mask, fls(__mask), values);})
Maybe better use/recommend an inline function?
> Cc: David Brownell <david-b@pacbell.net>
> Cc: Eric Miao <eric.miao@marvell.com>
> Cc: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
> Cc: Geert Uytterhoeven <geert@linux-m68k.org>
> Cc: Sam Ravnborg <sam@ravnborg.org>
> Cc: linux-arm-kernel@lists.arm.linux.org.uk
> Cc: linux-fbdev-devel@lists.sourceforge.net
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-embedded@vger.kernel.org
> Signed-off-by: Jaya Kumar <jayakumar.lkml@gmail.com>
Note you didn't Cc: me.
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* Embedded Linux Conference Europe 2008 videos
From: Michael Opdenacker @ 2009-02-03 10:06 UTC (permalink / raw)
To: linux-embedded mailing list
Greetings,
Thomas Petazzoni and myself have (at last) completed the production of
ELCE videos. Here they are: http://free-electrons.com/blog/elce-2008-videos/
Many thanks to Ruud Derwig and Tim Bird for filming many presentations!
By the way, if you were a speaker at ELCE 2008, make sure you posted
your slides on
http://tree.celinuxforum.org/CelfPubWiki/ELCEurope2008Presentations .
Many people haven't done it yet.
Thomas and I strongly recommend presentations like David Woodhouse's or
Harald Welte's, and Tim's talk about boot time reduction techniques.
Anyway, they were plenty of very interesting talks.
Cheers,
Michael.
--
Michael Opdenacker, Free Electrons
Kernel, drivers and embedded Linux development,
consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH] mflash: Initial support
From: unsik Kim @ 2009-02-25 9:31 UTC (permalink / raw)
To: linux-kernel
Cc: hch, alan, shdl, akpm, linux-arm-kernel, harvey.harrison,
linux-embedded, minchan.kim, unsik Kim
This driver supports mflash IO mode for linux.
Mflash is embedded flash drive and mainly targeted mobile and consumer
electronic devices.
Internally, mflash has nand flash and other hardware logics and supports
2 different operation (ATA, IO) modes. ATA mode doesn't need any new
driver and currently works well under standard IDE subsystem. Actually it's
one chip SSD. IO mode is ATA-like custom mode for the host that doesn't have
IDE interface.
Followings are brief descriptions about IO mode.
A. IO mode based on ATA protocol and uses some custom command. (read confirm,
write confirm)
B. IO mode uses SRAM bus interface.
C. IO mode supports 4kB boot area, so host can boot from mflash.
Signed-off-by: unsik Kim <donari75@gmail.com>
---
Hello?
I already posted mflash patch before and many people comments for it.
Unfotunately I broke my local git, so I can't generate git diff for old one.
From now I'll post patches for this one as reference.
Here are some brief change status.
All the style issue from checkpatch fixed.
Documentation added.
reserved area feature added.
suspend, resume feature added.
remove currently not supported code.
I restrict this driver for ARM cause only tested for that arch.
Is it right thing ?
I really appreciate for previous comments and any further comments
are very very welcome.
---
Documentation/blockdev/00-INDEX | 2 +
Documentation/blockdev/mflash.txt | 73 +++
drivers/block/Kconfig | 17 +
drivers/block/Makefile | 1 +
drivers/block/mg_disk.c | 981 +++++++++++++++++++++++++++++++++++++
include/linux/mg_disk.h | 173 +++++++
6 files changed, 1247 insertions(+), 0 deletions(-)
create mode 100644 Documentation/blockdev/mflash.txt
create mode 100644 drivers/block/mg_disk.c
create mode 100644 include/linux/mg_disk.h
diff --git a/Documentation/blockdev/00-INDEX b/Documentation/blockdev/00-INDEX
index 86f054c..c08df56 100644
--- a/Documentation/blockdev/00-INDEX
+++ b/Documentation/blockdev/00-INDEX
@@ -8,6 +8,8 @@ cpqarray.txt
- info on using Compaq's SMART2 Intelligent Disk Array Controllers.
floppy.txt
- notes and driver options for the floppy disk driver.
+mflash.txt
+ - info on mGine m(g)flash driver for linux.
nbd.txt
- info on a TCP implementation of a network block device.
paride.txt
diff --git a/Documentation/blockdev/mflash.txt b/Documentation/blockdev/mflash.txt
new file mode 100644
index 0000000..d7522eb
--- /dev/null
+++ b/Documentation/blockdev/mflash.txt
@@ -0,0 +1,73 @@
+This document describes m[g]flash support in linux.
+
+Contents
+ 1. Overview
+ 2. Reserved area configuration
+ 3. Example of mflash platform driver registration
+
+1. Overview
+
+Mflash and gflash are embedded flash drive. The only difference is mflash is
+MCP(Multi Chip Package) device. These two device operate exactly same way.
+So the rest mflash repersents mflash and gflash altogether.
+
+Internally, mflash has nand flash and other hardware logics and supports
+2 different operation (ATA, IO) modes. ATA mode doesn't need any new
+driver and currently works well under standard IDE subsystem. Actually it's
+one chip SSD. IO mode is ATA-like custom mode for the host that doesn't have
+IDE interface.
+
+Followings are brief descriptions about IO mode.
+A. IO mode based on ATA protocol and uses some custom command. (read confirm,
+write confirm)
+B. IO mode uses SRAM bus interface.
+C. IO mode supports 4kB boot area, so host can boot from mflash.
+
+2. Reserved area configuration
+If host boot from mflash, usually needs raw area for boot loader image. All of
+the mflash's block device operation will be taken this value as start offset.
+Note that boot loader's size of reserved area and kernel configuration value
+must be same.
+
+3. Example of mflash platform driver registration
+Working mflash is very straight forward. Adding platform device stuff to board
+configuration file is all. Here is some pseudo example.
+
+static struct mg_drv_data mflash_drv_data = {
+ /* If you want to polling driver set to 1 */
+ .use_polling = 0,
+};
+
+static struct resource mg_mflash_rsc[] = {
+ /* Base address of mflash */
+ [0] = {
+ .start = 0x08000000,
+ .end = 0x08000000 + SZ_64K - 1,
+ .flags = IORESOURCE_MEM
+ },
+ /* mflash interrupt pin */
+ [1] = {
+ .start = IRQ_GPIO(84),
+ .end = IRQ_GPIO(84),
+ .flags = IORESOURCE_IRQ
+ },
+ /* mflash reset pin */
+ [2] = {
+ .start = 43,
+ .end = 43,
+ .name = "mg_rst",
+ .flags = IORESOURCE_IO
+ },
+};
+
+static struct platform_device mflash_dev = {
+ .name = MG_DEV_NAME,
+ .id = -1,
+ .dev = {
+ .platform_data = &mflash_drv_data,
+ },
+ .num_resources = ARRAY_SIZE(mg_mflash_rsc),
+ .resource = mg_mflash_rsc
+};
+
+platform_device_register(&mflash_dev);
diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index 0344a8a..88ad8e7 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -403,6 +403,23 @@ config ATA_OVER_ETH
This driver provides Support for ATA over Ethernet block
devices like the Coraid EtherDrive (R) Storage Blade.
+config MG_DISK
+ tristate "mGine mflash, gflash support"
+ depends on ARM
+ help
+ mGine mFlash(gFlash) block device driver
+
+config MG_DISK_RES
+ int "Size of reserved area before MBR"
+ depends on MG_DISK
+ default 0
+ help
+ Define size of reserved area that usually used for boot. Unit is KB.
+ All of the block device operation will be taken this value as start
+ offset
+ Examples:
+ 1024 => 1 MB
+
config SUNVDC
tristate "Sun Virtual Disk Client support"
depends on SUN_LDOMS
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index 204332b..79dd7c7 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_BLK_CPQ_CISS_DA) += cciss.o
obj-$(CONFIG_BLK_DEV_DAC960) += DAC960.o
obj-$(CONFIG_XILINX_SYSACE) += xsysace.o
obj-$(CONFIG_CDROM_PKTCDVD) += pktcdvd.o
+obj-$(CONFIG_MG_DISK) += mg_disk.o
obj-$(CONFIG_SUNVDC) += sunvdc.o
obj-$(CONFIG_BLK_DEV_UMEM) += umem.o
diff --git a/drivers/block/mg_disk.c b/drivers/block/mg_disk.c
new file mode 100644
index 0000000..10ac8d6
--- /dev/null
+++ b/drivers/block/mg_disk.c
@@ -0,0 +1,981 @@
+/*
+ * drivers/block/mg_disk.c
+ *
+ * Support for the mGine m[g]flash IO mode.
+ * Based on legacy hd.c
+ *
+ * (c) 2008 mGine Co.,LTD
+ * (c) 2008 unsik Kim <donari75@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/blkdev.h>
+#include <linux/hdreg.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/mg_disk.h>
+
+#define MG_RES_SEC (CONFIG_MG_DISK_RES << 1)
+
+static void mg_request(struct request_queue *);
+
+static void mg_dump_status(const char *msg, unsigned int stat,
+ struct mg_host *host)
+{
+ char *name = MG_DISK_NAME"?";
+ struct request *req;
+
+ if (host->breq) {
+ req = elv_next_request(host->breq);
+ if (req)
+ name = req->rq_disk->disk_name;
+ }
+
+ printk(KERN_DEBUG "%s: %s: status=0x%02x { ", name, msg, stat & 0xff);
+ if (stat & MG_REG_STATUS_BIT_BUSY)
+ printk("Busy ");
+ if (stat & MG_REG_STATUS_BIT_READY)
+ printk("DriveReady ");
+ if (stat & MG_REG_STATUS_BIT_WRITE_FAULT)
+ printk("WriteFault ");
+ if (stat & MG_REG_STATUS_BIT_SEEK_DONE)
+ printk("SeekComplete ");
+ if (stat & MG_REG_STATUS_BIT_DATA_REQ)
+ printk("DataRequest ");
+ if (stat & MG_REG_STATUS_BIT_CORRECTED_ERROR)
+ printk("CorrectedError ");
+ if (stat & MG_REG_STATUS_BIT_ERROR)
+ printk("Error ");
+ printk("}\n");
+ if ((stat & MG_REG_STATUS_BIT_ERROR) == 0) {
+ host->error = 0;
+ } else {
+ host->error = inb(host->dev_base + MG_REG_ERROR);
+ printk(KERN_DEBUG "%s: %s: error=0x%02x { ", name, msg,
+ host->error & 0xff);
+ if (host->error & MG_REG_ERR_BBK)
+ printk("BadSector ");
+ if (host->error & MG_REG_ERR_UNC)
+ printk("UncorrectableError ");
+ if (host->error & MG_REG_ERR_IDNF)
+ printk("SectorIdNotFound ");
+ if (host->error & MG_REG_ERR_ABRT)
+ printk("DriveStatusError ");
+ if (host->error & MG_REG_ERR_AMNF)
+ printk("AddrMarkNotFound ");
+ printk("}");
+ if (host->error &
+ (MG_REG_ERR_BBK | MG_REG_ERR_UNC |
+ MG_REG_ERR_IDNF | MG_REG_ERR_AMNF)) {
+ if (host->breq) {
+ req = elv_next_request(host->breq);
+ if (req)
+ printk(", sector=%ld", req->sector);
+ }
+
+ }
+ printk("\n");
+ }
+}
+
+static unsigned int mg_wait(struct mg_host *host, u32 expect, u32 msec)
+{
+ u8 status;
+ u64 expire, cur_jiffies;
+
+ host->error = MG_ERR_NONE;
+ expire = get_jiffies_64() + msecs_to_jiffies(msec);
+
+ status = inb(host->dev_base + MG_REG_STATUS);
+ do {
+ cur_jiffies = get_jiffies_64();
+ if (status & MG_REG_STATUS_BIT_BUSY) {
+ if (expect == MG_REG_STATUS_BIT_BUSY)
+ break;
+ } else {
+ /* Check the error condition! */
+ if (status & MG_REG_STATUS_BIT_ERROR) {
+ mg_dump_status("mg_wait", status, host);
+ break;
+ }
+
+ if (expect == MG_STAT_READY)
+ if (MG_READY_OK(status))
+ break;
+
+ if (expect == MG_REG_STATUS_BIT_DATA_REQ)
+ if (status & MG_REG_STATUS_BIT_DATA_REQ)
+ break;
+ }
+ status = inb(host->dev_base + MG_REG_STATUS);
+ } while (cur_jiffies < expire);
+
+ if (cur_jiffies >= expire)
+ host->error = MG_ERR_TIMEOUT;
+
+ return host->error;
+}
+
+static void mg_unexpected_intr(struct mg_host *host)
+{
+ u32 status = inb(host->dev_base + MG_REG_STATUS);
+
+ mg_dump_status("mg_unexpected_intr", status, host);
+}
+
+static irqreturn_t mg_irq(int irq, void *dev_id)
+{
+ struct mg_host *host = dev_id;
+ void (*handler)(struct mg_host *) = host->mg_do_intr;
+
+ host->mg_do_intr = 0;
+ del_timer(&host->timer);
+ if (!handler)
+ handler = mg_unexpected_intr;
+ handler(host);
+ return IRQ_HANDLED;
+}
+
+static void mg_ide_fixstring(u8 *s, const int bytecount)
+{
+ u8 *p, *end = &s[bytecount & ~1]; /* bytecount must be even */
+
+ /* convert from big-endian to host byte order */
+ for (p = s ; p != end ; p += 2)
+ be16_to_cpus((u16 *) p);
+
+ /* strip leading blanks */
+ p = s;
+ while (s != end && *s == ' ')
+ ++s;
+ /* compress internal blanks and strip trailing blanks */
+ while (s != end && *s) {
+ if (*s++ != ' ' || (s != end && *s && *s != ' '))
+ *p++ = *(s-1);
+ }
+ /* wipe out trailing garbage */
+ while (p != end)
+ *p++ = '\0';
+}
+
+static int mg_get_disk_id(struct mg_host *host)
+{
+ u32 i, res;
+ s32 err;
+ u16 *id = (u16 *)&host->id_data;
+ struct mg_drv_data *prv_data = host->dev->platform_data;
+
+ if (!prv_data->use_polling)
+ outb(MG_REG_CTRL_INTR_DISABLE,
+ host->dev_base + MG_REG_DRV_CTRL);
+
+ outb(MG_CMD_ID, host->dev_base + MG_REG_COMMAND);
+ err = mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ, 3000);
+ if (err)
+ return err;
+
+ for (i = 0; i < (MG_SECTOR_SIZE >> 1); i++)
+ id[i] = le16_to_cpu(inw(host->dev_base + MG_BUFF_OFFSET +
+ i * 2));
+
+ outb(MG_CMD_RD_CONF, host->dev_base + MG_REG_COMMAND);
+ err = mg_wait(host, MG_STAT_READY, 3000);
+ if (err)
+ return err;
+
+ if ((host->id_data.field_valid & 1) == 0)
+ return MG_ERR_TRANSLATION;
+
+#ifdef __BIG_ENDIAN
+ host->id_data.lba_capacity = (host->id_data.lba_capacity << 16)
+ | (host->id_data.lba_capacity >> 16);
+#endif /* __BIG_ENDIAN */
+ if (MG_RES_SEC) {
+ /* modify cyls, lba_capacity */
+ host->id_data.cyls = (host->id_data.lba_capacity - MG_RES_SEC) /
+ host->id_data.heads / host->id_data.sectors;
+ res = host->id_data.lba_capacity - host->id_data.cyls *
+ host->id_data.heads * host->id_data.sectors;
+ host->id_data.lba_capacity -= res;
+ }
+ host->tot_sectors = host->id_data.lba_capacity;
+ mg_ide_fixstring(host->id_data.model,
+ sizeof(host->id_data.model));
+ mg_ide_fixstring(host->id_data.serial_no,
+ sizeof(host->id_data.serial_no));
+ mg_ide_fixstring(host->id_data.fw_rev,
+ sizeof(host->id_data.fw_rev));
+ printk(KERN_INFO "mg_disk: model: %s\n", host->id_data.model);
+ printk(KERN_INFO "mg_disk: firm: %.8s\n", host->id_data.fw_rev);
+ printk(KERN_INFO "mg_disk: serial: %s\n",
+ host->id_data.serial_no);
+ printk(KERN_INFO "mg_disk: %d + reserved %d sectors\n",
+ host->tot_sectors, res);
+
+ if (!prv_data->use_polling)
+ outb(MG_REG_CTRL_INTR_ENABLE, host->dev_base + MG_REG_DRV_CTRL);
+
+ return err;
+}
+
+
+static int mg_disk_init(struct mg_host *host)
+{
+ struct mg_drv_data *prv_data = host->dev->platform_data;
+ s32 err;
+ u8 init_status;
+
+ /* hdd rst low */
+ gpio_set_value(host->rst, 0);
+ err = mg_wait(host, MG_REG_STATUS_BIT_BUSY, 300);
+ if (err)
+ return err;
+
+ /* hdd rst high */
+ gpio_set_value(host->rst, 1);
+ err = mg_wait(host, MG_STAT_READY, 3000);
+ if (err)
+ return err;
+
+ /* soft reset on */
+ outb(MG_REG_CTRL_RESET |
+ (prv_data->use_polling ? MG_REG_CTRL_INTR_DISABLE :
+ MG_REG_CTRL_INTR_ENABLE),
+ host->dev_base + MG_REG_DRV_CTRL);
+ err = mg_wait(host, MG_REG_STATUS_BIT_BUSY, 3000);
+ if (err)
+ return err;
+
+ /* soft reset off */
+ outb(prv_data->use_polling ? MG_REG_CTRL_INTR_DISABLE :
+ MG_REG_CTRL_INTR_ENABLE,
+ host->dev_base + MG_REG_DRV_CTRL);
+ err = mg_wait(host, MG_STAT_READY, 3000);
+ if (err)
+ return err;
+
+ init_status = inb(host->dev_base + MG_REG_STATUS) & 0xf;
+
+ if (init_status == 0xf)
+ return MG_ERR_INIT_STAT;
+
+ return err;
+}
+
+static void mg_bad_rw_intr(struct mg_host *host)
+{
+ struct request *req = elv_next_request(host->breq);
+ if (req != NULL) {
+ if (++req->errors >= MG_MAX_ERRORS) {
+ end_request(req, 0);
+ } else if (req->errors % MG_RESET_FREQ == 0 ||
+ host->error == MG_ERR_TIMEOUT) {
+ host->reset = 1;
+ }
+ /* Otherwise just retry */
+ }
+}
+
+static unsigned int mg_out(struct mg_host *host,
+ unsigned int sect_num,
+ unsigned int sect_cnt,
+ unsigned int cmd,
+ void (*intr_addr)(struct mg_host *))
+{
+ struct mg_drv_data *prv_data = host->dev->platform_data;
+
+ if (mg_wait(host, MG_STAT_READY, 3000))
+ return host->error;
+
+ if (!prv_data->use_polling) {
+ host->mg_do_intr = intr_addr;
+ mod_timer(&host->timer, jiffies + 3 * HZ);
+ }
+ if (MG_RES_SEC)
+ sect_num += MG_RES_SEC;
+ outb((u8)sect_cnt, host->dev_base + MG_REG_SECT_CNT);
+ outb((u8)sect_num, host->dev_base + MG_REG_SECT_NUM);
+ outb((u8)(sect_num >> 8), host->dev_base + MG_REG_CYL_LOW);
+ outb((u8)(sect_num >> 16), host->dev_base + MG_REG_CYL_HIGH);
+ outb((u8)((sect_num >> 24) | MG_REG_HEAD_LBA_MODE),
+ host->dev_base + MG_REG_DRV_HEAD);
+ outb(cmd, host->dev_base + MG_REG_COMMAND);
+ return MG_ERR_NONE;
+}
+
+static void mg_read(struct request *req)
+{
+ u32 remains, j;
+ struct mg_host *host = req->rq_disk->private_data;
+
+ remains = req->nr_sectors;
+
+ if (host->reset) {
+ if (mg_disk_init(host)) {
+ end_request(req, 0);
+ return;
+ }
+ host->reset = 0;
+ }
+
+ if (mg_out(host, req->sector, req->nr_sectors, MG_CMD_RD, 0) !=
+ MG_ERR_NONE)
+ mg_bad_rw_intr(host);
+
+ MG_DBG("requested %d sects (from %ld), buffer=0x%p\n",
+ remains, req->sector, req->buffer);
+
+ while (remains) {
+ if (mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ, 3000) !=
+ MG_ERR_NONE) {
+ mg_bad_rw_intr(host);
+ return;
+ }
+ for (j = 0; j < MG_SECTOR_SIZE >> 1; j++) {
+ *(u16 *)req->buffer =
+ inw(host->dev_base + MG_BUFF_OFFSET + (j << 1));
+ req->buffer += 2;
+ }
+
+ req->sector++;
+ req->errors = 0;
+ remains = --req->nr_sectors;
+ --req->current_nr_sectors;
+
+ if (req->current_nr_sectors <= 0) {
+ MG_DBG("remain : %d sects\n", remains);
+ end_request(req, 1);
+ if (remains > 0)
+ req = elv_next_request(host->breq);
+ }
+
+ outb(MG_CMD_RD_CONF, host->dev_base + MG_REG_COMMAND);
+ }
+}
+
+static void mg_write(struct request *req)
+{
+ u32 remains, j;
+ struct mg_host *host = req->rq_disk->private_data;
+
+ remains = req->nr_sectors;
+
+ if (host->reset) {
+ if (mg_disk_init(host)) {
+ end_request(req, 0);
+ return;
+ }
+ host->reset = 0;
+ }
+
+ if (mg_out(host, req->sector, req->nr_sectors, MG_CMD_WR, 0) !=
+ MG_ERR_NONE) {
+ mg_bad_rw_intr(host);
+ return;
+ }
+
+
+ MG_DBG("requested %d sects (from %ld), buffer=0x%p\n",
+ remains, req->sector, req->buffer);
+ while (remains) {
+ if (mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ, 3000) !=
+ MG_ERR_NONE) {
+ mg_bad_rw_intr(host);
+ return;
+ }
+ for (j = 0; j < MG_SECTOR_SIZE >> 1; j++) {
+ outw(*(u16 *)req->buffer, host->dev_base +
+ MG_BUFF_OFFSET + (j << 1));
+ req->buffer += 2;
+ }
+ req->sector++;
+ remains = --req->nr_sectors;
+ --req->current_nr_sectors;
+
+ if (req->current_nr_sectors <= 0) {
+ MG_DBG("remain : %d sects\n", remains);
+ end_request(req, 1);
+ if (remains > 0)
+ req = elv_next_request(host->breq);
+ }
+
+ outb(MG_CMD_WR_CONF, host->dev_base + MG_REG_COMMAND);
+ }
+}
+
+static void mg_read_intr(struct mg_host *host)
+{
+ u32 i;
+ struct request *req;
+
+ /* check status */
+ do {
+ i = inb(host->dev_base + MG_REG_STATUS);
+ if (i & MG_REG_STATUS_BIT_BUSY)
+ break;
+ if (!MG_READY_OK(i))
+ break;
+ if (i & MG_REG_STATUS_BIT_DATA_REQ)
+ goto ok_to_read;
+ } while (0);
+ mg_dump_status("mg_read_intr", i, host);
+ mg_bad_rw_intr(host);
+ mg_request(host->breq);
+ return;
+
+ok_to_read:
+ /* get current segment of request */
+ req = elv_next_request(host->breq);
+
+ /* read 1 sector */
+ for (i = 0; i < MG_SECTOR_SIZE >> 1; i++) {
+ *(u16 *)req->buffer =
+ inw(host->dev_base + MG_BUFF_OFFSET + (i << 1));
+ req->buffer += 2;
+ }
+
+ /* manipulate request */
+ MG_DBG("sector %ld, remaining=%ld, buffer=0x%p\n",
+ req->sector, req->nr_sectors - 1, req->buffer);
+
+ req->sector++;
+ req->errors = 0;
+ i = --req->nr_sectors;
+ --req->current_nr_sectors;
+
+ /* let know if current segment done */
+ if (req->current_nr_sectors <= 0)
+ end_request(req, 1);
+
+ /* set handler if read remains */
+ if (i > 0) {
+ host->mg_do_intr = mg_read_intr;
+ mod_timer(&host->timer, jiffies + 3 * HZ);
+ }
+
+ /* send read confirm */
+ outb(MG_CMD_RD_CONF, host->dev_base + MG_REG_COMMAND);
+
+ /* goto next request */
+ if (!i)
+ mg_request(host->breq);
+}
+
+static void mg_write_intr(struct mg_host *host)
+{
+ u32 i, j;
+ u16 *buff;
+ struct request *req;
+
+ /* get current segment of request */
+ req = elv_next_request(host->breq);
+
+ /* check status */
+ do {
+ i = inb(host->dev_base + MG_REG_STATUS);
+ if (i & MG_REG_STATUS_BIT_BUSY)
+ break;
+ if (!MG_READY_OK(i))
+ break;
+ if ((req->nr_sectors <= 1) || (i & MG_REG_STATUS_BIT_DATA_REQ))
+ goto ok_to_write;
+ } while (0);
+ mg_dump_status("mg_write_intr", i, host);
+ mg_bad_rw_intr(host);
+ mg_request(host->breq);
+ return;
+
+ok_to_write:
+ /* manipulate request */
+ req->sector++;
+ i = --req->nr_sectors;
+ --req->current_nr_sectors;
+ req->buffer += MG_SECTOR_SIZE;
+
+ /* let know if current segment or all done */
+ if (!i || (req->bio && req->current_nr_sectors <= 0))
+ end_request(req, 1);
+
+ /* write 1 sector and set handler if remains */
+ if (i > 0) {
+ buff = (u16 *)req->buffer;
+ for (j = 0; j < MG_STORAGE_BUFFER_SIZE >> 1; j++) {
+ outw(*buff, host->dev_base + MG_BUFF_OFFSET + (j << 1));
+ buff++;
+ }
+ MG_DBG("sector %ld, remaining=%ld, buffer=0x%p\n",
+ req->sector, req->nr_sectors, req->buffer);
+ host->mg_do_intr = mg_write_intr;
+ mod_timer(&host->timer, jiffies + 3 * HZ);
+ }
+
+ /* send write confirm */
+ outb(MG_CMD_WR_CONF, host->dev_base + MG_REG_COMMAND);
+
+ if (!i)
+ mg_request(host->breq);
+}
+
+void mg_times_out(unsigned long data)
+{
+ struct mg_host *host = (struct mg_host *)data;
+ char *name;
+ struct request *req;
+
+ req = elv_next_request(host->breq);
+ if (!req)
+ return;
+
+ host->mg_do_intr = NULL;
+
+ name = req->rq_disk->disk_name;
+ printk(KERN_DEBUG "%s: timeout\n", name);
+
+ host->error = MG_ERR_TIMEOUT;
+ mg_bad_rw_intr(host);
+
+ mg_request(host->breq);
+}
+
+static void mg_request_poll(struct request_queue *q)
+{
+ struct request *req;
+ struct mg_host *host;
+
+ while ((req = elv_next_request(q)) != NULL) {
+ host = req->rq_disk->private_data;
+ if (blk_fs_request(req)) {
+ switch (rq_data_dir(req)) {
+ case READ:
+ mg_read(req);
+ break;
+ case WRITE:
+ mg_write(req);
+ break;
+ default:
+ printk(KERN_WARNING "%s:%d unknown command\n",
+ __func__, __LINE__);
+ end_request(req, 0);
+ break;
+ }
+ }
+ }
+}
+
+static unsigned int mg_issue_req(struct request *req,
+ struct mg_host *host,
+ unsigned int sect_num,
+ unsigned int sect_cnt)
+{
+ u16 *buff;
+ u32 i;
+
+ switch (rq_data_dir(req)) {
+ case READ:
+ if (mg_out(host, sect_num, sect_cnt, MG_CMD_RD, &mg_read_intr)
+ != MG_ERR_NONE) {
+ mg_bad_rw_intr(host);
+ return host->error;
+ }
+ break;
+ case WRITE:
+ /* TODO : handler */
+ outb(MG_REG_CTRL_INTR_DISABLE,
+ host->dev_base + MG_REG_DRV_CTRL);
+ if (mg_out(host, sect_num, sect_cnt, MG_CMD_WR, &mg_write_intr)
+ != MG_ERR_NONE) {
+ mg_bad_rw_intr(host);
+ return host->error;
+ }
+ del_timer(&host->timer);
+ mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ, 3000);
+ outb(MG_REG_CTRL_INTR_ENABLE, host->dev_base + MG_REG_DRV_CTRL);
+ if (host->error) {
+ mg_bad_rw_intr(host);
+ return host->error;
+ }
+ buff = (u16 *)req->buffer;
+ for (i = 0; i < MG_SECTOR_SIZE >> 1; i++) {
+ outw(*buff, host->dev_base + MG_BUFF_OFFSET + (i << 1));
+ buff++;
+ }
+ mod_timer(&host->timer, jiffies + 3 * HZ);
+ outb(MG_CMD_WR_CONF, host->dev_base + MG_REG_COMMAND);
+ break;
+ default:
+ printk(KERN_WARNING "%s:%d unknown command\n",
+ __func__, __LINE__);
+ end_request(req, 0);
+ break;
+ }
+ return MG_ERR_NONE;
+}
+
+/* This function also called from IRQ context */
+static void mg_request(struct request_queue *q)
+{
+ struct request *req;
+ struct mg_host *host;
+ u32 sect_num, sect_cnt;
+
+ while (1) {
+ req = elv_next_request(q);
+ if (!req)
+ return;
+
+ host = req->rq_disk->private_data;
+
+ /* check unwanted request call */
+ if (host->mg_do_intr)
+ return;
+
+ del_timer(&host->timer);
+
+ if (host->reset) {
+ if (mg_disk_init(host)) {
+ end_request(req, 0);
+ return;
+ }
+ host->reset = 0;
+ }
+
+ sect_num = req->sector;
+ /* deal whole segments */
+ sect_cnt = req->nr_sectors;
+
+ /* sanity check */
+ if (sect_num >= get_capacity(req->rq_disk) ||
+ ((sect_num + sect_cnt) >
+ get_capacity(req->rq_disk))) {
+ printk(KERN_WARNING
+ "%s: bad access: sector=%d, count=%d\n",
+ req->rq_disk->disk_name,
+ sect_num, sect_cnt);
+ end_request(req, 0);
+ continue;
+ }
+
+ if (!blk_fs_request(req))
+ return;
+
+ if (!mg_issue_req(req, host, sect_num, sect_cnt))
+ return;
+ }
+}
+
+static int mg_getgeo(struct block_device *bdev, struct hd_geometry *geo)
+{
+ struct mg_host *host = bdev->bd_disk->private_data;
+
+ geo->cylinders = host->id_data.cyls;
+ geo->heads = host->id_data.heads;
+ geo->sectors = host->id_data.sectors;
+ return 0;
+}
+
+static struct block_device_operations mg_disk_ops = {
+ .getgeo = mg_getgeo
+};
+
+static int mg_suspend(struct platform_device *plat_dev, pm_message_t state)
+{
+ struct mg_drv_data *prv_data = plat_dev->dev.platform_data;
+ struct mg_host *host = prv_data->host;
+
+ if (mg_wait(host, MG_STAT_READY, 3000))
+ return -EIO;
+
+ if (!prv_data->use_polling)
+ outb(MG_REG_CTRL_INTR_DISABLE,
+ host->dev_base + MG_REG_DRV_CTRL);
+
+ outb(MG_CMD_SLEEP, host->dev_base + MG_REG_COMMAND);
+ mdelay(1);
+
+ if (mg_wait(host, MG_STAT_READY, 3000)) {
+ if (!prv_data->use_polling)
+ outb(MG_REG_CTRL_INTR_ENABLE,
+ host->dev_base + MG_REG_DRV_CTRL);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int mg_resume(struct platform_device *plat_dev)
+{
+ struct mg_drv_data *prv_data = plat_dev->dev.platform_data;
+ struct mg_host *host = prv_data->host;
+
+ if (mg_wait(host, MG_STAT_READY, 3000))
+ return -EIO;
+
+ outb(MG_CMD_WAKEUP, host->dev_base + MG_REG_COMMAND);
+ mdelay(1);
+
+ if (mg_wait(host, MG_STAT_READY, 3000))
+ return -EIO;
+
+ if (!prv_data->use_polling)
+ outb(MG_REG_CTRL_INTR_ENABLE, host->dev_base + MG_REG_DRV_CTRL);
+
+ return 0;
+}
+
+static int mg_probe(struct platform_device *plat_dev)
+{
+ struct mg_host *host;
+ struct resource *rsc;
+ struct mg_drv_data *prv_data = plat_dev->dev.platform_data;
+ int err = 0;
+
+ if (!prv_data) {
+ printk(KERN_ERR "%s:%d fail (no driver_data)\n",
+ __func__, __LINE__);
+ err = -EINVAL;
+ goto probe_err;
+ }
+
+ /* alloc mg_host */
+ host = kmalloc(sizeof(struct mg_host), GFP_KERNEL);
+ if (!host) {
+ printk(KERN_ERR "%s:%d fail (no memory for mg_host)\n",
+ __func__, __LINE__);
+ err = -ENOMEM;
+ goto probe_err;
+ }
+ memset(host, 0, sizeof(struct mg_host));
+ host->major = MG_DISK_MAJ;
+
+ /* link each other */
+ prv_data->host = host;
+ host->dev = &plat_dev->dev;
+
+ /* io remap */
+ rsc = platform_get_resource(plat_dev, IORESOURCE_MEM, 0);
+ if (!rsc) {
+ printk(KERN_ERR "%s:%d platform_get_resource fail\n",
+ __func__, __LINE__);
+ err = -EINVAL;
+ goto probe_err_2;
+ }
+ host->dev_base = (unsigned long)ioremap(rsc->start , rsc->end + 1);
+ if (!host->dev_base) {
+ printk(KERN_ERR "%s:%d ioremap fail\n",
+ __func__, __LINE__);
+ err = -EIO;
+ goto probe_err_2;
+ }
+ MG_DBG("dev_base = 0x%x\n", (u32)host->dev_base);
+
+ /* get reset pin */
+ rsc = platform_get_resource(plat_dev, IORESOURCE_IO, 0);
+ if (!rsc) {
+ printk(KERN_ERR "%s:%d get reset pin fail\n",
+ __func__, __LINE__);
+ err = -EIO;
+ goto probe_err_3;
+ }
+ host->rst = rsc->start;
+
+ /* init rst pin */
+ err = gpio_request(host->rst, "mg_rst");
+ if (err)
+ goto probe_err_3;
+ gpio_direction_output(host->rst, 1);
+
+ /* disk init */
+ err = mg_disk_init(host);
+ if (err) {
+ printk(KERN_ERR "%s:%d fail (err code : %d)\n",
+ __func__, __LINE__, err);
+ err = -EIO;
+ goto probe_err_3a;
+ }
+
+ /* get irq resource */
+ if (!prv_data->use_polling) {
+ host->irq = platform_get_irq(plat_dev, 0);
+ if (host->irq == -ENXIO) {
+ err = host->irq;
+ goto probe_err_3a;
+ }
+ err = request_irq(host->irq, mg_irq,
+ IRQF_DISABLED | IRQF_TRIGGER_RISING,
+ MG_DEV_NAME, host);
+ if (err) {
+ printk(KERN_ERR "%s:%d fail (request_irq err=%d)\n",
+ __func__, __LINE__, err);
+ goto probe_err_3a;
+ }
+
+ }
+
+ /* get disk id */
+ err = mg_get_disk_id(host);
+ if (err) {
+ printk(KERN_ERR "%s:%d fail (err code : %d)\n",
+ __func__, __LINE__, err);
+ err = -EIO;
+ goto probe_err_4;
+ }
+
+ err = register_blkdev(host->major, MG_DISK_NAME);
+ if (err < 0) {
+ printk(KERN_ERR "%s:%d register_blkdev fail (err code : %d)\n",
+ __func__, __LINE__, err);
+ goto probe_err_4;
+ }
+ if (!host->major)
+ host->major = err;
+
+ spin_lock_init(&host->lock);
+
+ if (prv_data->use_polling)
+ host->breq = blk_init_queue(mg_request_poll, &host->lock);
+ else
+ host->breq = blk_init_queue(mg_request, &host->lock);
+
+ if (!host->breq) {
+ err = -ENOMEM;
+ printk(KERN_ERR "%s:%d (blk_init_queue) fail\n",
+ __func__, __LINE__);
+ goto probe_err_5;
+ }
+
+ /* mflash is random device, thanx for the noop */
+ elevator_exit(host->breq->elevator);
+ err = elevator_init(host->breq, "noop");
+ if (err) {
+ printk(KERN_ERR "%s:%d (elevator_init) fail\n",
+ __func__, __LINE__);
+ goto probe_err_6;
+ }
+ blk_queue_max_sectors(host->breq, MG_MAX_SECTS);
+ blk_queue_hardsect_size(host->breq, MG_SECTOR_SIZE);
+
+ init_timer(&host->timer);
+ host->timer.function = mg_times_out;
+ host->timer.data = (unsigned long)host;
+
+ host->gd = alloc_disk(MG_DISK_MAX_PART);
+ if (!host->gd) {
+ printk(KERN_ERR "%s:%d (alloc_disk) fail\n",
+ __func__, __LINE__);
+ err = -ENOMEM;
+ goto probe_err_7;
+ }
+ host->gd->major = host->major;
+ host->gd->first_minor = 0;
+ host->gd->fops = &mg_disk_ops;
+ host->gd->queue = host->breq;
+ host->gd->private_data = host;
+ sprintf(host->gd->disk_name, MG_DISK_NAME"a");
+
+ set_capacity(host->gd, host->tot_sectors);
+
+ add_disk(host->gd);
+
+ return err;
+
+probe_err_7:
+ del_timer_sync(&host->timer);
+probe_err_6:
+ blk_cleanup_queue(host->breq);
+probe_err_5:
+ unregister_blkdev(MG_DISK_MAJ, MG_DISK_NAME);
+probe_err_4:
+ if (!prv_data->use_polling)
+ free_irq(host->irq, host);
+probe_err_3a:
+ gpio_free(host->rst);
+probe_err_3:
+ iounmap((void __iomem *)host->dev_base);
+probe_err_2:
+ kfree(host);
+probe_err:
+ return err;
+}
+
+static int mg_remove(struct platform_device *plat_dev)
+{
+ struct mg_drv_data *prv_data = plat_dev->dev.platform_data;
+ struct mg_host *host = prv_data->host;
+ int err = 0;
+
+ /* delete timer */
+ del_timer_sync(&host->timer);
+
+ /* remove disk */
+ if (host->gd) {
+ del_gendisk(host->gd);
+ put_disk(host->gd);
+ }
+ /* remove queue */
+ if (host->breq)
+ blk_cleanup_queue(host->breq);
+
+ /* unregister blk device */
+ unregister_blkdev(host->major, MG_DISK_NAME);
+
+ /* free irq */
+ if (!prv_data->use_polling)
+ free_irq(host->irq, host);
+
+ /* free rst pin */
+ if (host->rst)
+ gpio_free(host->rst);
+
+ /* unmap io */
+ if (host->dev_base)
+ iounmap((void __iomem *)host->dev_base);
+
+ /* free mg_host */
+ kfree(host);
+
+ return err;
+}
+
+static struct platform_driver mg_disk_driver = {
+ .probe = mg_probe,
+ .remove = mg_remove,
+ .suspend = mg_suspend,
+ .resume = mg_resume,
+ .driver = {
+ .name = MG_DEV_NAME,
+ .owner = THIS_MODULE,
+ }
+};
+
+/****************************************************************************
+ *
+ * Module stuff
+ *
+ ****************************************************************************/
+
+static int __init mg_init(void)
+{
+ printk(KERN_INFO "mGine mflash driver, (c) 2008 mGine Co.\n");
+ return platform_driver_register(&mg_disk_driver);
+}
+
+static void __exit mg_exit(void)
+{
+ printk(KERN_INFO "mflash driver : bye bye\n");
+ platform_driver_unregister(&mg_disk_driver);
+}
+
+module_init(mg_init);
+module_exit(mg_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("unsik Kim <donari75@gmail.com>");
+MODULE_DESCRIPTION("mGine m[g]flash device driver");
diff --git a/include/linux/mg_disk.h b/include/linux/mg_disk.h
new file mode 100644
index 0000000..4f1a4a2
--- /dev/null
+++ b/include/linux/mg_disk.h
@@ -0,0 +1,173 @@
+/*
+ * include/linux/mg_disk.c
+ *
+ * Support for the mGine m[g]flash IO mode.
+ * Based on legacy hd.c
+ *
+ * (c) 2008 mGine Co.,LTD
+ * (c) 2008 unsik Kim <donari75@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __MG_DISK_H__
+#define __MG_DISK_H__
+
+#include <linux/blkdev.h>
+#include <linux/hdreg.h>
+
+/* name for block device */
+#define MG_DISK_NAME "mgd"
+/* name for platform device */
+#define MG_DEV_NAME "mg_disk"
+
+#define MG_DISK_MAJ 0
+#define MG_DISK_MAX_PART 16
+#define MG_SECTOR_SIZE 512
+#define MG_MAX_SECTS 256
+
+/* Register offsets */
+#define MG_BUFF_OFFSET 0x8000
+#define MG_STORAGE_BUFFER_SIZE 0x200
+#define MG_REG_OFFSET 0xC000
+#define MG_REG_FEATURE (MG_REG_OFFSET + 2) /* write case */
+#define MG_REG_ERROR (MG_REG_OFFSET + 2) /* read case */
+#define MG_REG_SECT_CNT (MG_REG_OFFSET + 4)
+#define MG_REG_SECT_NUM (MG_REG_OFFSET + 6)
+#define MG_REG_CYL_LOW (MG_REG_OFFSET + 8)
+#define MG_REG_CYL_HIGH (MG_REG_OFFSET + 0xA)
+#define MG_REG_DRV_HEAD (MG_REG_OFFSET + 0xC)
+#define MG_REG_COMMAND (MG_REG_OFFSET + 0xE) /* write case */
+#define MG_REG_STATUS (MG_REG_OFFSET + 0xE) /* read case */
+#define MG_REG_DRV_CTRL (MG_REG_OFFSET + 0x10)
+#define MG_REG_BURST_CTRL (MG_REG_OFFSET + 0x12)
+
+/* "Drive Select/Head Register" bit values */
+#define MG_REG_HEAD_MUST_BE_ON 0xA0 /* These 2 bits are always on */
+#define MG_REG_HEAD_DRIVE_MASTER (0x00 | MG_REG_HEAD_MUST_BE_ON)
+#define MG_REG_HEAD_DRIVE_SLAVE (0x10 | MG_REG_HEAD_MUST_BE_ON)
+#define MG_REG_HEAD_LBA_MODE (0x40 | MG_REG_HEAD_MUST_BE_ON)
+
+
+/* "Device Control Register" bit values */
+#define MG_REG_CTRL_INTR_ENABLE 0x0
+#define MG_REG_CTRL_INTR_DISABLE (0x1<<1)
+#define MG_REG_CTRL_RESET (0x1<<2)
+#define MG_REG_CTRL_INTR_POLA_ACTIVE_HIGH 0x0
+#define MG_REG_CTRL_INTR_POLA_ACTIVE_LOW (0x1<<4)
+#define MG_REG_CTRL_DPD_POLA_ACTIVE_LOW 0x0
+#define MG_REG_CTRL_DPD_POLA_ACTIVE_HIGH (0x1<<5)
+#define MG_REG_CTRL_DPD_DISABLE 0x0
+#define MG_REG_CTRL_DPD_ENABLE (0x1<<6)
+
+/* Status register bit */
+/* error bit in status register */
+#define MG_REG_STATUS_BIT_ERROR 0x01
+/* corrected error in status register */
+#define MG_REG_STATUS_BIT_CORRECTED_ERROR 0x04
+/* data request bit in status register */
+#define MG_REG_STATUS_BIT_DATA_REQ 0x08
+/* DSC - Drive Seek Complete */
+#define MG_REG_STATUS_BIT_SEEK_DONE 0x10
+/* DWF - Drive Write Fault */
+#define MG_REG_STATUS_BIT_WRITE_FAULT 0x20
+#define MG_REG_STATUS_BIT_READY 0x40
+#define MG_REG_STATUS_BIT_BUSY 0x80
+
+/* handy status */
+#define MG_STAT_READY (MG_REG_STATUS_BIT_READY | MG_REG_STATUS_BIT_SEEK_DONE)
+#define MG_READY_OK(s) (((s) & (MG_STAT_READY | \
+ (MG_REG_STATUS_BIT_BUSY | \
+ MG_REG_STATUS_BIT_WRITE_FAULT | \
+ MG_REG_STATUS_BIT_ERROR))) == MG_STAT_READY)
+
+/* Error register */
+#define MG_REG_ERR_AMNF 0x01
+#define MG_REG_ERR_ABRT 0x04
+#define MG_REG_ERR_IDNF 0x10
+#define MG_REG_ERR_UNC 0x40
+#define MG_REG_ERR_BBK 0x80
+
+/* error code for others */
+#define MG_ERR_NONE 0
+#define MG_ERR_TIMEOUT 0x100
+#define MG_ERR_INIT_STAT 0x101
+#define MG_ERR_TRANSLATION 0x102
+#define MG_ERR_CTRL_RST 0x103
+
+#define MG_MAX_ERRORS 16 /* Max read/write errors/sector */
+#define MG_RESET_FREQ 4 /* Reset controller every 4th retry */
+
+/* command */
+#define MG_CMD_RD 0x20
+#define MG_CMD_WR 0x30
+#define MG_CMD_SLEEP 0x99
+#define MG_CMD_WAKEUP 0xC3
+#define MG_CMD_ID 0xEC
+#define MG_CMD_WR_CONF 0x3C
+#define MG_CMD_RD_CONF 0x40
+
+/* operation mode */
+#define MG_OP_CASCADE (1 << 0)
+#define MG_OP_CASCADE_SYNC_RD (1 << 1)
+#define MG_OP_CASCADE_SYNC_WR (1 << 2)
+#define MG_OP_INTERLEAVE (1 << 3)
+
+/* synchronous */
+#define MG_BURST_LAT_4 (3 << 4)
+#define MG_BURST_LAT_5 (4 << 4)
+#define MG_BURST_LAT_6 (5 << 4)
+#define MG_BURST_LAT_7 (6 << 4)
+#define MG_BURST_LAT_8 (7 << 4)
+#define MG_BURST_LEN_4 (1 << 1)
+#define MG_BURST_LEN_8 (2 << 1)
+#define MG_BURST_LEN_16 (3 << 1)
+#define MG_BURST_LEN_32 (4 << 1)
+#define MG_BURST_LEN_CONT (0 << 1)
+
+/* private driver data */
+struct mg_drv_data {
+ /* disk resource */
+ u32 use_polling;
+
+ /* internally used */
+ struct mg_host *host;
+};
+
+/* main structure for mflash driver */
+struct mg_host {
+ struct device *dev;
+
+ struct request_queue *breq;
+ spinlock_t lock;
+ struct gendisk *gd;
+
+ struct timer_list timer;
+ void (*mg_do_intr) (struct mg_host *);
+
+ struct hd_driveid id_data;
+ u32 tot_sectors;
+
+ unsigned long dev_base;
+ unsigned int irq;
+ unsigned int rst;
+
+ u32 major;
+ u32 error;
+ u32 reset;
+};
+
+/*
+ * Debugging macro and defines
+ */
+#undef DO_MG_DEBUG
+#ifdef DO_MG_DEBUG
+# define MG_DBG(fmt, args...) \
+ printk(KERN_DEBUG "%s:%d "fmt, __func__, __LINE__, ##args)
+#else /* CONFIG_MG_DEBUG */
+# define MG_DBG(fmt, args...) do { } while (0)
+#endif /* CONFIG_MG_DEBUG */
+
+#endif
--
1.5.6.6
Regards,
unsik Kim
^ permalink raw reply related
* Re: [PATCH] mflash: Initial support
From: Andrew Morton @ 2009-02-26 21:35 UTC (permalink / raw)
Cc: linux-kernel, hch, alan, shdl, linux-arm-kernel, harvey.harrison,
linux-embedded, minchan.kim, donari75
In-Reply-To: <1235554274-794-1-git-send-email-donari75@gmail.com>
On Wed, 25 Feb 2009 18:31:14 +0900
unsik Kim <donari75@gmail.com> wrote:
> This driver supports mflash IO mode for linux.
>
> Mflash is embedded flash drive and mainly targeted mobile and consumer
> electronic devices.
>
> Internally, mflash has nand flash and other hardware logics and supports
> 2 different operation (ATA, IO) modes. ATA mode doesn't need any new
> driver and currently works well under standard IDE subsystem. Actually it's
> one chip SSD. IO mode is ATA-like custom mode for the host that doesn't have
> IDE interface.
>
> Followings are brief descriptions about IO mode.
> A. IO mode based on ATA protocol and uses some custom command. (read confirm,
> write confirm)
> B. IO mode uses SRAM bus interface.
> C. IO mode supports 4kB boot area, so host can boot from mflash.
>
Have we fully explored the option of controlling this device with the
current ATA or IDE code, rather than creating a whole new parallel
block device implementation?
>
> ...
>
> --- /dev/null
> +++ b/drivers/block/mg_disk.c
> @@ -0,0 +1,981 @@
> +/*
> + * drivers/block/mg_disk.c
> + *
> + * Support for the mGine m[g]flash IO mode.
> + * Based on legacy hd.c
> + *
> + * (c) 2008 mGine Co.,LTD
> + * (c) 2008 unsik Kim <donari75@gmail.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/fs.h>
> +#include <linux/blkdev.h>
> +#include <linux/hdreg.h>
> +#include <linux/interrupt.h>
> +#include <linux/delay.h>
> +#include <linux/platform_device.h>
> +#include <linux/gpio.h>
> +#include <linux/mg_disk.h>
> +
> +#define MG_RES_SEC (CONFIG_MG_DISK_RES << 1)
> +
> +static void mg_request(struct request_queue *);
> +
> +static void mg_dump_status(const char *msg, unsigned int stat,
> + struct mg_host *host)
> +{
> + char *name = MG_DISK_NAME"?";
The "?" seems strange. Why do we want to print "mgd?" here?
> + struct request *req;
> +
> + if (host->breq) {
> + req = elv_next_request(host->breq);
> + if (req)
> + name = req->rq_disk->disk_name;
> + }
> +
> + printk(KERN_DEBUG "%s: %s: status=0x%02x { ", name, msg, stat & 0xff);
> + if (stat & MG_REG_STATUS_BIT_BUSY)
> + printk("Busy ");
> + if (stat & MG_REG_STATUS_BIT_READY)
> + printk("DriveReady ");
> + if (stat & MG_REG_STATUS_BIT_WRITE_FAULT)
> + printk("WriteFault ");
> + if (stat & MG_REG_STATUS_BIT_SEEK_DONE)
> + printk("SeekComplete ");
> + if (stat & MG_REG_STATUS_BIT_DATA_REQ)
> + printk("DataRequest ");
> + if (stat & MG_REG_STATUS_BIT_CORRECTED_ERROR)
> + printk("CorrectedError ");
> + if (stat & MG_REG_STATUS_BIT_ERROR)
> + printk("Error ");
> + printk("}\n");
> + if ((stat & MG_REG_STATUS_BIT_ERROR) == 0) {
> + host->error = 0;
> + } else {
> + host->error = inb(host->dev_base + MG_REG_ERROR);
> + printk(KERN_DEBUG "%s: %s: error=0x%02x { ", name, msg,
> + host->error & 0xff);
> + if (host->error & MG_REG_ERR_BBK)
> + printk("BadSector ");
> + if (host->error & MG_REG_ERR_UNC)
> + printk("UncorrectableError ");
> + if (host->error & MG_REG_ERR_IDNF)
> + printk("SectorIdNotFound ");
> + if (host->error & MG_REG_ERR_ABRT)
> + printk("DriveStatusError ");
> + if (host->error & MG_REG_ERR_AMNF)
> + printk("AddrMarkNotFound ");
> + printk("}");
> + if (host->error &
> + (MG_REG_ERR_BBK | MG_REG_ERR_UNC |
> + MG_REG_ERR_IDNF | MG_REG_ERR_AMNF)) {
> + if (host->breq) {
> + req = elv_next_request(host->breq);
> + if (req)
> + printk(", sector=%ld", req->sector);
> + }
> +
> + }
> + printk("\n");
> + }
> +}
> +
> +static unsigned int mg_wait(struct mg_host *host, u32 expect, u32 msec)
> +{
> + u8 status;
> + u64 expire, cur_jiffies;
cur_jiffies64 would be a clearer name.
> + host->error = MG_ERR_NONE;
> + expire = get_jiffies_64() + msecs_to_jiffies(msec);
But why is this code using jiffies_64 at all? Why not use plain old
jiffies and unsigned longs?
> + status = inb(host->dev_base + MG_REG_STATUS);
> + do {
> + cur_jiffies = get_jiffies_64();
> + if (status & MG_REG_STATUS_BIT_BUSY) {
> + if (expect == MG_REG_STATUS_BIT_BUSY)
> + break;
> + } else {
> + /* Check the error condition! */
> + if (status & MG_REG_STATUS_BIT_ERROR) {
> + mg_dump_status("mg_wait", status, host);
> + break;
> + }
> +
> + if (expect == MG_STAT_READY)
> + if (MG_READY_OK(status))
> + break;
> +
> + if (expect == MG_REG_STATUS_BIT_DATA_REQ)
> + if (status & MG_REG_STATUS_BIT_DATA_REQ)
> + break;
> + }
> + status = inb(host->dev_base + MG_REG_STATUS);
> + } while (cur_jiffies < expire);
This loop will not handle jiffy wrap properly. Use
time_after/time_before/etc.
> + if (cur_jiffies >= expire)
ditto.
> + host->error = MG_ERR_TIMEOUT;
> +
> + return host->error;
> +}
This function appears to be doing up-to-multi-second busy wait looping.
Bad.
Can we fix this by waiting for some interrupt? Presumably not. Can we
at least do something to prevent it from locking up the whole machine
for long periods while it chews up vast amounts of power? Evan a silly
msleep(1) in there would help tremendously.
> +static void mg_unexpected_intr(struct mg_host *host)
> +{
> + u32 status = inb(host->dev_base + MG_REG_STATUS);
> +
> + mg_dump_status("mg_unexpected_intr", status, host);
> +}
> +
> +static irqreturn_t mg_irq(int irq, void *dev_id)
> +{
> + struct mg_host *host = dev_id;
> + void (*handler)(struct mg_host *) = host->mg_do_intr;
> +
> + host->mg_do_intr = 0;
> + del_timer(&host->timer);
> + if (!handler)
> + handler = mg_unexpected_intr;
> + handler(host);
> + return IRQ_HANDLED;
> +}
> +
> +static void mg_ide_fixstring(u8 *s, const int bytecount)
> +{
> + u8 *p, *end = &s[bytecount & ~1]; /* bytecount must be even */
> +
> + /* convert from big-endian to host byte order */
> + for (p = s ; p != end ; p += 2)
It's more conventional to omit the space before the semicolon in `for'
statements.
> + be16_to_cpus((u16 *) p);
> +
> + /* strip leading blanks */
> + p = s;
> + while (s != end && *s == ' ')
> + ++s;
> + /* compress internal blanks and strip trailing blanks */
> + while (s != end && *s) {
> + if (*s++ != ' ' || (s != end && *s && *s != ' '))
> + *p++ = *(s-1);
> + }
> + /* wipe out trailing garbage */
> + while (p != end)
> + *p++ = '\0';
> +}
erk, what's this doing? Regularizing some ID text which it read from
the device, it seems.
It should have a nice comment explaining this, and perhaps explaining
the transformations which it attempts to make.
Because I'm sure that there's library code in the kernel which does at
least some of whatever-this-function-does. Steve Rostedt presently has
some infrastructure code of this nature under review.
> +static int mg_get_disk_id(struct mg_host *host)
> +{
> + u32 i, res;
> + s32 err;
> + u16 *id = (u16 *)&host->id_data;
> + struct mg_drv_data *prv_data = host->dev->platform_data;
> +
> + if (!prv_data->use_polling)
> + outb(MG_REG_CTRL_INTR_DISABLE,
> + host->dev_base + MG_REG_DRV_CTRL);
> +
> + outb(MG_CMD_ID, host->dev_base + MG_REG_COMMAND);
> + err = mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ, 3000);
> + if (err)
> + return err;
> +
> + for (i = 0; i < (MG_SECTOR_SIZE >> 1); i++)
> + id[i] = le16_to_cpu(inw(host->dev_base + MG_BUFF_OFFSET +
> + i * 2));
> +
> + outb(MG_CMD_RD_CONF, host->dev_base + MG_REG_COMMAND);
> + err = mg_wait(host, MG_STAT_READY, 3000);
> + if (err)
> + return err;
> +
> + if ((host->id_data.field_valid & 1) == 0)
> + return MG_ERR_TRANSLATION;
> +
> +#ifdef __BIG_ENDIAN
> + host->id_data.lba_capacity = (host->id_data.lba_capacity << 16)
> + | (host->id_data.lba_capacity >> 16);
> +#endif /* __BIG_ENDIAN */
> + if (MG_RES_SEC) {
> + /* modify cyls, lba_capacity */
> + host->id_data.cyls = (host->id_data.lba_capacity - MG_RES_SEC) /
> + host->id_data.heads / host->id_data.sectors;
Could a bad device trick the kernel into doing a divide-by-zero here?
> + res = host->id_data.lba_capacity - host->id_data.cyls *
> + host->id_data.heads * host->id_data.sectors;
> + host->id_data.lba_capacity -= res;
> + }
> + host->tot_sectors = host->id_data.lba_capacity;
> + mg_ide_fixstring(host->id_data.model,
> + sizeof(host->id_data.model));
> + mg_ide_fixstring(host->id_data.serial_no,
> + sizeof(host->id_data.serial_no));
> + mg_ide_fixstring(host->id_data.fw_rev,
> + sizeof(host->id_data.fw_rev));
> + printk(KERN_INFO "mg_disk: model: %s\n", host->id_data.model);
> + printk(KERN_INFO "mg_disk: firm: %.8s\n", host->id_data.fw_rev);
> + printk(KERN_INFO "mg_disk: serial: %s\n",
> + host->id_data.serial_no);
> + printk(KERN_INFO "mg_disk: %d + reserved %d sectors\n",
> + host->tot_sectors, res);
> +
> + if (!prv_data->use_polling)
> + outb(MG_REG_CTRL_INTR_ENABLE, host->dev_base + MG_REG_DRV_CTRL);
> +
> + return err;
> +}
>
> ...
>
> +static int mg_resume(struct platform_device *plat_dev)
> +{
> + struct mg_drv_data *prv_data = plat_dev->dev.platform_data;
> + struct mg_host *host = prv_data->host;
> +
> + if (mg_wait(host, MG_STAT_READY, 3000))
> + return -EIO;
> +
> + outb(MG_CMD_WAKEUP, host->dev_base + MG_REG_COMMAND);
> + mdelay(1);
There's no way in which the reader of this code can determine why this
delay is here, and why it has this duration. Comments shold be added
to fix this!
Can we avoid using a busy-waiting delay?
> + if (mg_wait(host, MG_STAT_READY, 3000))
> + return -EIO;
> +
> + if (!prv_data->use_polling)
> + outb(MG_REG_CTRL_INTR_ENABLE, host->dev_base + MG_REG_DRV_CTRL);
> +
> + return 0;
> +}
> +
> +static int mg_probe(struct platform_device *plat_dev)
> +{
> + struct mg_host *host;
> + struct resource *rsc;
> + struct mg_drv_data *prv_data = plat_dev->dev.platform_data;
> + int err = 0;
> +
> + if (!prv_data) {
> + printk(KERN_ERR "%s:%d fail (no driver_data)\n",
> + __func__, __LINE__);
> + err = -EINVAL;
> + goto probe_err;
> + }
> +
> + /* alloc mg_host */
> + host = kmalloc(sizeof(struct mg_host), GFP_KERNEL);
> + if (!host) {
> + printk(KERN_ERR "%s:%d fail (no memory for mg_host)\n",
> + __func__, __LINE__);
> + err = -ENOMEM;
> + goto probe_err;
> + }
> + memset(host, 0, sizeof(struct mg_host));
use kzalloc()
> + host->major = MG_DISK_MAJ;
> +
> + /* link each other */
> + prv_data->host = host;
> + host->dev = &plat_dev->dev;
> +
> + /* io remap */
> + rsc = platform_get_resource(plat_dev, IORESOURCE_MEM, 0);
> + if (!rsc) {
> + printk(KERN_ERR "%s:%d platform_get_resource fail\n",
> + __func__, __LINE__);
> + err = -EINVAL;
> + goto probe_err_2;
> + }
> + host->dev_base = (unsigned long)ioremap(rsc->start , rsc->end + 1);
ioremap() returns `void __iomem *'. Casting it into an unsigned long
loses the sparse-checkable annotation and loses the (correct)
information that this is an address.
IOW, host->dev_base has the wrong type, doesn't it?
> + if (!host->dev_base) {
> + printk(KERN_ERR "%s:%d ioremap fail\n",
> + __func__, __LINE__);
> + err = -EIO;
> + goto probe_err_2;
> + }
> + MG_DBG("dev_base = 0x%x\n", (u32)host->dev_base);
> +
> + /* get reset pin */
> + rsc = platform_get_resource(plat_dev, IORESOURCE_IO, 0);
> + if (!rsc) {
> + printk(KERN_ERR "%s:%d get reset pin fail\n",
> + __func__, __LINE__);
> + err = -EIO;
> + goto probe_err_3;
> + }
> + host->rst = rsc->start;
> +
> + /* init rst pin */
> + err = gpio_request(host->rst, "mg_rst");
> + if (err)
> + goto probe_err_3;
> + gpio_direction_output(host->rst, 1);
Did this driver express a dependency on GPIO in its Kconfig?
> + /* disk init */
> + err = mg_disk_init(host);
> + if (err) {
> + printk(KERN_ERR "%s:%d fail (err code : %d)\n",
> + __func__, __LINE__, err);
> + err = -EIO;
> + goto probe_err_3a;
> + }
> +
>
> ...
>
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