[PATCH] Radeon 2D Acceleration for 2.6

[PATCH] Radeon 2D Acceleration for 2.6

[random]

[-- Attachment #1: Type: TEXT/PLAIN, Size: 683 bytes --]


Included are copyarea() and fillrect() for Radeon.  It is based on BenH's
new driver in drivers/video/aty, and it works on my PowerBook.
Please test.

To make this work, I've had to tell radeonfb.c to expect to always run
accelerated.  It was checking if the FB_ACCELF_TEXT bit was set in the var
passed in to enable acceleration, and it never was;  consequently, it
never "ran accelerated" meaning it never called radeon_engine_init() and
such.

Also, this is my first experience with BitKeeper, so let me know if I've
screwed something up there (and anywhere else for that matter).

-David Eger
(ps, i'm not on linux-fbdev-devel so if you reply,
     please forward a copy to me)

[-- Attachment #2: Type: TEXT/PLAIN, Size: 7202 bytes --]

# User:	eger
# Host:	rosencrantz.pok.ibm.com
# Root:	/usr/src/linux-2.6-benh-work

# Patch vers:	1.3
# Patch type:	REGULAR

== ChangeSet ==
torvalds@athlon.transmeta.com|ChangeSet|20020205173056|16047|c1d11a41ed024864
benh@kernel.crashing.org|ChangeSet|20040109135753|20972
D 1.1319 04/01/20 15:07:51+01:00 eger@rosencrantz.pok.ibm.com +3 -0
B torvalds@athlon.transmeta.com|ChangeSet|20020205173056|16047|c1d11a41ed024864
C
c Added 2D-acceleration support for radeonfb with copyarea() and fillrect()
K 22174
P ChangeSet
------------------------------------------------

0a0
> patch@athlon.transmeta.com|drivers/video/radeon.h|20020205201335|45853|de7a7433ce71623f eger@rosencrantz.pok.ibm.com|include/video/radeon.h|20040120140412|50553
> torvalds@athlon.transmeta.com|BitKeeper/etc/ignore|20020205173056|17751|fa71c5ed300a3cfc eger@rosencrantz.pok.ibm.com|BitKeeper/etc/ignore|20040120140412|57764
> benh@kernel.crashing.org|drivers/video/aty/radeon_base.c|20030907210758|08926|7b0faecdfcf8e4ae eger@rosencrantz.pok.ibm.com|drivers/video/aty/radeon_base.c|20040120140412|53176

== drivers/video/aty/radeon_base.c ==
benh@kernel.crashing.org|drivers/video/aty/radeon_base.c|20030907210758|08926|7b0faecdfcf8e4ae
benh@kernel.crashing.org|drivers/video/aty/radeon_base.c|20040104002346|65106
D 1.23 04/01/20 15:04:12+01:00 eger@rosencrantz.pok.ibm.com +123 -24
B torvalds@athlon.transmeta.com|ChangeSet|20020205173056|16047|c1d11a41ed024864
C
c Added 2D-acceleration support for radeonfb with copyarea() and fillrect()
K 53176
O -rw-rw-r--
P drivers/video/aty/radeon_base.c
------------------------------------------------

I853 1
\
I859 1
	OUTREG(DEFAULT_SC_TOP_LEFT, 0);
D897 1
I897 1
        int accel = 1;
D1528 1
I1528 1
	int accel = 1;
I1805 92
/* ------------ Accelerated Functions --------------------- */
/* the accelerated functions here are patterned after the 
 * "ACCEL_MMIO" ifdef branches in XFree86             --dte */
void radeonfb_prim_fillrect(struct radeonfb_info *rinfo, 
                       const struct fb_fillrect *region)
{
	radeon_fifo_wait(4);  
  
	OUTREG(DP_GUI_MASTER_CNTL,  
		rinfo->dp_gui_master_cntl  /* contains, like GMC_DST_32BPP */
                | GMC_BRUSH_SOLID_COLOR
                | ROP3_P);
	OUTREG(DP_BRUSH_FRGD_CLR, region->color);
	OUTREG(DP_WRITE_MSK, 0xffffffff);
	OUTREG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM));
\
	radeon_fifo_wait(2);  
	OUTREG(DST_Y_X, (region->dy << 16) | region->dx);
	OUTREG(DST_WIDTH_HEIGHT, (region->width << 16) | region->height);
	radeon_engine_idle ();
}
\
void radeonfb_fillrect(struct fb_info *info, 
                       const struct fb_fillrect *region)
{
	struct radeonfb_info *rinfo = (struct radeonfb_info *)info;
	struct fb_fillrect modded;
	int vxres, vyres;
  
	vxres = info->var.xres;
	vyres = info->var.yres;
\
	memcpy(&modded, region, sizeof(struct fb_fillrect));
\
	if(!modded.width || !modded.height ||
	   modded.dx >= vxres || modded.dy >= vyres)
		return;
  
	if(modded.dx + modded.width  > vxres) modded.width  = vxres - modded.dx;
	if(modded.dy + modded.height > vyres) modded.height = vyres - modded.dy;
\
	radeonfb_prim_fillrect(rinfo, &modded);
}
\
void radeonfb_prim_copyarea(struct radeonfb_info *rinfo, 
                       const struct fb_copyarea *area)
{
	radeon_fifo_wait(3);
	OUTREG(DP_GUI_MASTER_CNTL,
		rinfo->dp_gui_master_cntl /* i.e. GMC_DST_32BPP */
		| GMC_SRC_DSTCOLOR
		| ROP3_S 
		| DP_SRC_RECT );
	OUTREG(DP_WRITE_MSK, 0xffffffff);
	OUTREG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM));
\
	radeon_fifo_wait(3);
	OUTREG(SRC_Y_X, (area->sy << 16) | area->sx);
	OUTREG(DST_Y_X, (area->dy << 16) | area->dx);
	OUTREG(DST_HEIGHT_WIDTH, (area->height << 16) | area->width);
	radeon_engine_idle ();
}
\
\
void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
{
	struct radeonfb_info *rinfo = (struct radeonfb_info *)info;
	struct fb_copyarea modded;
	u32 vxres, vyres;
	modded.sx = area->sx;
	modded.sy = area->sy;
	modded.dx = area->dx;
	modded.dy = area->dy;
	modded.width  = area->width;
	modded.height = area->height;
  
	vxres = info->var.xres;
	vyres = info->var.yres;
\
	if(!modded.width || !modded.height ||
	   modded.sx >= vxres || modded.sy >= vyres ||
	   modded.dx >= vxres || modded.dy >= vyres)
		return;
  
	if(modded.sx + modded.width > vxres)  modded.width = vxres - modded.sx;
	if(modded.dx + modded.width > vxres)  modded.width = vxres - modded.dx;
	if(modded.sy + modded.height > vyres) modded.height = vyres - modded.sy;
	if(modded.dy + modded.height > vyres) modded.height = vyres - modded.dy;
  
	radeonfb_prim_copyarea(rinfo, &modded);
}
\
D1809 8
I1816 7
	.owner		= THIS_MODULE,
	.fb_check_var	= radeonfb_check_var,
	.fb_set_par	= radeonfb_set_par,
	.fb_setcolreg	= radeonfb_setcolreg,
	.fb_pan_display	= radeonfb_pan_display,
	.fb_blank	= radeonfb_blank,
	.fb_ioctl	= radeonfb_ioctl,
D1819 3
I1821 12
	.fb_imageblit	= cfb_imageblit,
	.fb_cursor	= soft_cursor,
};
\
static struct fb_ops radeonfb_noaccel_ops = {
	.owner		= THIS_MODULE,
	.fb_check_var	= radeonfb_check_var,
	.fb_set_par	= radeonfb_set_par,
	.fb_setcolreg	= radeonfb_setcolreg,
	.fb_pan_display	= radeonfb_pan_display,
	.fb_blank	= radeonfb_blank,
	.fb_ioctl	= radeonfb_ioctl,
D1825 1
D1840 1
D1856 8
I1863 2
	if (noaccel) {
		info->fix.accel = FB_ACCEL_NONE;
D1865 1
I1865 3
		info->fbops = &radeonfb_noaccel_ops;
	} else {
		info->fix.accel = FB_ACCEL_ATI_RADEON;
I1866 3
		info->fbops = &radeonfb_ops;
	}
	fb_alloc_cmap(&info->cmap, 256, 0);

== include/video/radeon.h ==
patch@athlon.transmeta.com|drivers/video/radeon.h|20020205201335|45853|de7a7433ce71623f
benh@kernel.crashing.org|include/video/radeon.h|20031009155225|47316
D 1.18 04/01/20 15:04:12+01:00 eger@rosencrantz.pok.ibm.com +1 -0
B torvalds@athlon.transmeta.com|ChangeSet|20020205173056|16047|c1d11a41ed024864
C
c New constant from XFree86 headers: DEFAULT_SC_TOP_LEFT
K 50553
O -rw-rw-r--
P include/video/radeon.h
------------------------------------------------

I367 1
#define DEFAULT_SC_TOP_LEFT                    0x16EC

== BitKeeper/etc/ignore ==
torvalds@athlon.transmeta.com|BitKeeper/etc/ignore|20020205173056|17751|fa71c5ed300a3cfc
benh@kernel.crashing.org|BitKeeper/etc/ignore|20031014072735|36220
D 1.64 04/01/20 15:04:12+01:00 eger@rosencrantz.pok.ibm.com +7 -0
B torvalds@athlon.transmeta.com|ChangeSet|20020205173056|16047|c1d11a41ed024864
C
c Added arch/ppc/boot/openfirmware/coffboot arch/ppc/boot/openfirmware/note arch/ppc/boot/prep/zImage arch/ppc/boot/prep/zImage.bin drivers/video/logo/logo_linux_mono.c drivers/video/logo/logo_linux_vga16.c include/asm-ppc/offsets.h to the ignore list
K 57764
O -rw-rw-r--
P BitKeeper/etc/ignore
------------------------------------------------

I284 7
arch/ppc/boot/openfirmware/coffboot
arch/ppc/boot/openfirmware/note
arch/ppc/boot/prep/zImage
arch/ppc/boot/prep/zImage.bin
drivers/video/logo/logo_linux_mono.c
drivers/video/logo/logo_linux_vga16.c
include/asm-ppc/offsets.h

# Patch checksum=36be6db7

Re: [PATCH] Radeon 2D Acceleration for 2.6

[Benjamin Herrenschmidt]

On Wed, 2004-01-21 at 01:44, random wrote:
> Included are copyarea() and fillrect() for Radeon.  It is based on BenH's
> new driver in drivers/video/aty, and it works on my PowerBook.
> Please test.
> 
> To make this work, I've had to tell radeonfb.c to expect to always run
> accelerated.  It was checking if the FB_ACCELF_TEXT bit was set in the var
> passed in to enable acceleration, and it never was;  consequently, it
> never "ran accelerated" meaning it never called radeon_engine_init() and
> such.
> 
> Also, this is my first experience with BitKeeper, so let me know if I've
> screwed something up there (and anywhere else for that matter).

Excellent ! I planned to work on that after the big merge. I'll
review the patch this week and send it to James myself if it's
ok. Regarding FB_ACCEL_TEST, I suppose it could be the initial
mode set by radeonfb missing it, I'll check what's up, I don't
want to force it from userland requested modes at this point.

Ben.




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The SF.Net email is sponsored by EclipseCon 2004
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Re: [PATCH] Radeon 2D Acceleration for 2.6

[Benjamin Herrenschmidt]

Can you re-export the cset as a patch in unified diff form please ?

(bk export -tpatch -du)

Ben.




-------------------------------------------------------
The SF.Net email is sponsored by EclipseCon 2004
Premiere Conference on Open Tools Development and Integration
See the breadth of Eclipse activity. February 3-5 in Anaheim, CA.
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Re: [PATCH] Radeon 2D Acceleration for 2.6

[random]

Ben asks:
> Can you re-export the cset as a patch in unified diff form please ?
> 
> (bk export -tpatch -du)

Now that I know the shortcut ;-)

-David

# This is a BitKeeper generated diff -Nru style patch.
#
# ChangeSet
#   2004/01/20 15:07:51+01:00 eger@rosencrantz.pok.ibm.com 
#   Added 2D-acceleration support for radeonfb with copyarea() and fillrect()
# 
# include/video/radeon.h
#   2004/01/20 15:04:12+01:00 eger@rosencrantz.pok.ibm.com +1 -0
#   New constant from XFree86 headers: DEFAULT_SC_TOP_LEFT
# 
# drivers/video/aty/radeon_base.c
#   2004/01/20 15:04:12+01:00 eger@rosencrantz.pok.ibm.com +123 -24
#   Added 2D-acceleration support for radeonfb with copyarea() and fillrect()
# 
# BitKeeper/etc/ignore
#   2004/01/20 15:04:12+01:00 eger@rosencrantz.pok.ibm.com +7 -0
#   Added arch/ppc/boot/openfirmware/coffboot arch/ppc/boot/openfirmware/note arch/ppc/boot/prep/zImage arch/ppc/boot/prep/zImage.bin drivers/video/logo/logo_linux_mono.c drivers/video/logo/logo_linux_vga16.c include/asm-ppc/offsets.h to the ignore list
# 
diff -Nru a/drivers/video/aty/radeon_base.c b/drivers/video/aty/radeon_base.c
--- a/drivers/video/aty/radeon_base.c	Wed Jan 21 00:07:29 2004
+++ b/drivers/video/aty/radeon_base.c	Wed Jan 21 00:07:29 2004
@@ -851,12 +851,14 @@
 	OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10));
 
 	radeon_fifo_wait (1);
+
 #if defined(__BIG_ENDIAN)
 	OUTREGP(DP_DATATYPE, HOST_BIG_ENDIAN_EN, ~HOST_BIG_ENDIAN_EN);
 #else
 	OUTREGP(DP_DATATYPE, 0, ~HOST_BIG_ENDIAN_EN);
 #endif
 	radeon_fifo_wait (1);
+	OUTREG(DEFAULT_SC_TOP_LEFT, 0);
 	OUTREG(DEFAULT_SC_BOTTOM_RIGHT, (DEFAULT_SC_RIGHT_MAX |
 					 DEFAULT_SC_BOTTOM_MAX));
 
@@ -894,7 +896,7 @@
 	struct radeonfb_info *rinfo = (struct radeonfb_info *) info->par;
         struct fb_var_screeninfo v;
         int nom, den;
-        int accel = (var->accel_flags & FB_ACCELF_TEXT) != 0;
+        int accel = 1;
 	unsigned int pitch;
 
 	if (noaccel)
@@ -1525,7 +1527,7 @@
 	int hsync_start, hsync_fudge, bytpp, hsync_wid, vsync_wid;
 	int primary_mon = PRIMARY_MONITOR(rinfo);
 	int depth = var_to_depth(mode);
-        int accel = (mode->accel_flags & FB_ACCELF_TEXT) != 0;
+	int accel = 1;
 
 	hSyncStart = mode->xres + mode->right_margin;
 	hSyncEnd = hSyncStart + mode->hsync_len;
@@ -1803,26 +1805,125 @@
 	return 0;
 }
 
+/* ------------ Accelerated Functions --------------------- */
+/* the accelerated functions here are patterned after the 
+ * "ACCEL_MMIO" ifdef branches in XFree86             --dte */
+void radeonfb_prim_fillrect(struct radeonfb_info *rinfo, 
+                       const struct fb_fillrect *region)
+{
+	radeon_fifo_wait(4);  
+  
+	OUTREG(DP_GUI_MASTER_CNTL,  
+		rinfo->dp_gui_master_cntl  /* contains, like GMC_DST_32BPP */
+                | GMC_BRUSH_SOLID_COLOR
+                | ROP3_P);
+	OUTREG(DP_BRUSH_FRGD_CLR, region->color);
+	OUTREG(DP_WRITE_MSK, 0xffffffff);
+	OUTREG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM));
+
+	radeon_fifo_wait(2);  
+	OUTREG(DST_Y_X, (region->dy << 16) | region->dx);
+	OUTREG(DST_WIDTH_HEIGHT, (region->width << 16) | region->height);
+	radeon_engine_idle ();
+}
+
+void radeonfb_fillrect(struct fb_info *info, 
+                       const struct fb_fillrect *region)
+{
+	struct radeonfb_info *rinfo = (struct radeonfb_info *)info;
+	struct fb_fillrect modded;
+	int vxres, vyres;
+  
+	vxres = info->var.xres;
+	vyres = info->var.yres;
+
+	memcpy(&modded, region, sizeof(struct fb_fillrect));
+
+	if(!modded.width || !modded.height ||
+	   modded.dx >= vxres || modded.dy >= vyres)
+		return;
+  
+	if(modded.dx + modded.width  > vxres) modded.width  = vxres - modded.dx;
+	if(modded.dy + modded.height > vyres) modded.height = vyres - modded.dy;
+
+	radeonfb_prim_fillrect(rinfo, &modded);
+}
+
+void radeonfb_prim_copyarea(struct radeonfb_info *rinfo, 
+                       const struct fb_copyarea *area)
+{
+	radeon_fifo_wait(3);
+	OUTREG(DP_GUI_MASTER_CNTL,
+		rinfo->dp_gui_master_cntl /* i.e. GMC_DST_32BPP */
+		| GMC_SRC_DSTCOLOR
+		| ROP3_S 
+		| DP_SRC_RECT );
+	OUTREG(DP_WRITE_MSK, 0xffffffff);
+	OUTREG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM));
+
+	radeon_fifo_wait(3);
+	OUTREG(SRC_Y_X, (area->sy << 16) | area->sx);
+	OUTREG(DST_Y_X, (area->dy << 16) | area->dx);
+	OUTREG(DST_HEIGHT_WIDTH, (area->height << 16) | area->width);
+	radeon_engine_idle ();
+}
+
+
+void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
+{
+	struct radeonfb_info *rinfo = (struct radeonfb_info *)info;
+	struct fb_copyarea modded;
+	u32 vxres, vyres;
+	modded.sx = area->sx;
+	modded.sy = area->sy;
+	modded.dx = area->dx;
+	modded.dy = area->dy;
+	modded.width  = area->width;
+	modded.height = area->height;
+  
+	vxres = info->var.xres;
+	vyres = info->var.yres;
+
+	if(!modded.width || !modded.height ||
+	   modded.sx >= vxres || modded.sy >= vyres ||
+	   modded.dx >= vxres || modded.dy >= vyres)
+		return;
+  
+	if(modded.sx + modded.width > vxres)  modded.width = vxres - modded.sx;
+	if(modded.dx + modded.width > vxres)  modded.width = vxres - modded.dx;
+	if(modded.sy + modded.height > vyres) modded.height = vyres - modded.sy;
+	if(modded.dy + modded.height > vyres) modded.height = vyres - modded.dy;
+  
+	radeonfb_prim_copyarea(rinfo, &modded);
+}
+
 
 
 static struct fb_ops radeonfb_ops = {
-	.owner			= THIS_MODULE,
-	.fb_check_var		= radeonfb_check_var,
-	.fb_set_par		= radeonfb_set_par,
-	.fb_setcolreg		= radeonfb_setcolreg,
-	.fb_pan_display 	= radeonfb_pan_display,
-	.fb_blank		= radeonfb_blank,
-	.fb_ioctl		= radeonfb_ioctl,
-#if 0
+	.owner		= THIS_MODULE,
+	.fb_check_var	= radeonfb_check_var,
+	.fb_set_par	= radeonfb_set_par,
+	.fb_setcolreg	= radeonfb_setcolreg,
+	.fb_pan_display	= radeonfb_pan_display,
+	.fb_blank	= radeonfb_blank,
+	.fb_ioctl	= radeonfb_ioctl,
 	.fb_fillrect	= radeonfb_fillrect,
 	.fb_copyarea	= radeonfb_copyarea,
-	.fb_imageblit	= radeonfb_imageblit,
-	.fb_rasterimg	= radeonfb_rasterimg,
-#else
+	.fb_imageblit	= cfb_imageblit,
+	.fb_cursor	= soft_cursor,
+};
+
+static struct fb_ops radeonfb_noaccel_ops = {
+	.owner		= THIS_MODULE,
+	.fb_check_var	= radeonfb_check_var,
+	.fb_set_par	= radeonfb_set_par,
+	.fb_setcolreg	= radeonfb_setcolreg,
+	.fb_pan_display	= radeonfb_pan_display,
+	.fb_blank	= radeonfb_blank,
+	.fb_ioctl	= radeonfb_ioctl,
 	.fb_fillrect	= cfb_fillrect,
 	.fb_copyarea	= cfb_copyarea,
 	.fb_imageblit	= cfb_imageblit,
-#endif
 	.fb_cursor	= soft_cursor,
 };
 
@@ -1837,7 +1938,6 @@
 	info->par = rinfo;
 	info->pseudo_palette = rinfo->pseudo_palette;
         info->flags = FBINFO_FLAG_DEFAULT;
-        info->fbops = &radeonfb_ops;
         info->display_fg = NULL;
         info->screen_base = (char *)rinfo->fb_base;
 
@@ -1853,17 +1953,16 @@
         info->fix.type_aux = 0;
         info->fix.mmio_start = rinfo->mmio_base_phys;
         info->fix.mmio_len = RADEON_REGSIZE;
-	if (noaccel)
-	        info->fix.accel = FB_ACCEL_NONE;
-	else
-		info->fix.accel = FB_ACCEL_ATI_RADEON;
-
-	fb_alloc_cmap(&info->cmap, 256, 0);
-
-	if (noaccel)
+	if (noaccel) {
+		info->fix.accel = FB_ACCEL_NONE;
 		info->var.accel_flags &= ~FB_ACCELF_TEXT;
-	else
+		info->fbops = &radeonfb_noaccel_ops;
+	} else {
+		info->fix.accel = FB_ACCEL_ATI_RADEON;
 		info->var.accel_flags |= FB_ACCELF_TEXT;
+		info->fbops = &radeonfb_ops;
+	}
+	fb_alloc_cmap(&info->cmap, 256, 0);
 
         return 0;
 }
diff -Nru a/include/video/radeon.h b/include/video/radeon.h
--- a/include/video/radeon.h	Wed Jan 21 00:07:29 2004
+++ b/include/video/radeon.h	Wed Jan 21 00:07:29 2004
@@ -365,6 +365,7 @@
 #define DSTCACHE_CTLSTAT                       0x1714  
 #define DEFAULT_PITCH_OFFSET                   0x16E0  
 #define DEFAULT_SC_BOTTOM_RIGHT                0x16E8  
+#define DEFAULT_SC_TOP_LEFT                    0x16EC
 #define SRC_PITCH_OFFSET                       0x1428
 #define DST_PITCH_OFFSET                       0x142C
 #define DP_GUI_MASTER_CNTL                     0x146C  


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The SF.Net email is sponsored by EclipseCon 2004
Premiere Conference on Open Tools Development and Integration
See the breadth of Eclipse activity. February 3-5 in Anaheim, CA.
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Re: [PATCH] Radeon 2D Acceleration for 2.6

[Benjamin Herrenschmidt]

On Wed, 2004-01-21 at 10:09, random wrote:
> Ben asks:
> > Can you re-export the cset as a patch in unified diff form please ?
> > 
> > (bk export -tpatch -du)
> 
> Now that I know the shortcut ;-)

Ok, it appears to work (though the gain isn't terrific, we probably
need imageblt for that). I reworked it and merged in my tree.

I tried to debug the lack of accel and it appears there is some more
deep breakage with fbcon in this regard. I gave up for now and made
accel unconditional (except for noaccel at boot).

Ben.




-------------------------------------------------------
The SF.Net email is sponsored by EclipseCon 2004
Premiere Conference on Open Tools Development and Integration
See the breadth of Eclipse activity. February 3-5 in Anaheim, CA.
http://www.eclipsecon.org/osdn

Re: Re: [PATCH] Radeon 2D Acceleration for 2.6

[Michel Dänzer]

On Wed, 2004-01-21 at 00:09, random wrote: 
> 
> +void radeonfb_prim_fillrect(struct radeonfb_info *rinfo, 
> +                       const struct fb_fillrect *region)
> +{
> +	radeon_fifo_wait(4);  
> +  
> +	OUTREG(DP_GUI_MASTER_CNTL,  
> +		rinfo->dp_gui_master_cntl  /* contains, like GMC_DST_32BPP */
> +                | GMC_BRUSH_SOLID_COLOR
> +                | ROP3_P);
> +	OUTREG(DP_BRUSH_FRGD_CLR, region->color);
> +	OUTREG(DP_WRITE_MSK, 0xffffffff);

You could probably take this out of the acceleration functions, you
don't seem to need a different write mask?

> +	OUTREG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM));
> +
> +	radeon_fifo_wait(2);  
> +	OUTREG(DST_Y_X, (region->dy << 16) | region->dx);
> +	OUTREG(DST_WIDTH_HEIGHT, (region->width << 16) | region->height);
> +	radeon_engine_idle ();

Why idle the engine in every acceleration function? Doesn't the API
provide a way to only do it when necessary?


PS: You lost my last reply to your private mails to your temporary
address scheme.

-- 
Earthling Michel Dänzer      |     Debian (powerpc), X and DRI developer
Libre software enthusiast    |   http://svcs.affero.net/rm.php?r=daenzer



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Re: Re: [PATCH] Radeon 2D Acceleration for 2.6

[Benjamin Herrenschmidt]

On Fri, 2004-01-23 at 12:22, Michel Dänzer wrote:
> On Wed, 2004-01-21 at 00:09, random wrote: 
> > 
> > +void radeonfb_prim_fillrect(struct radeonfb_info *rinfo, 
> > +                       const struct fb_fillrect *region)
> > +{
> > +	radeon_fifo_wait(4);  
> > +  
> > +	OUTREG(DP_GUI_MASTER_CNTL,  
> > +		rinfo->dp_gui_master_cntl  /* contains, like GMC_DST_32BPP */
> > +                | GMC_BRUSH_SOLID_COLOR
> > +                | ROP3_P);
> > +	OUTREG(DP_BRUSH_FRGD_CLR, region->color);
> > +	OUTREG(DP_WRITE_MSK, 0xffffffff);
> 
> You could probably take this out of the acceleration functions, you
> don't seem to need a different write mask?

Yes, we could factor this one out

> > +	OUTREG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM));
> > +
> > +	radeon_fifo_wait(2);  
> > +	OUTREG(DST_Y_X, (region->dy << 16) | region->dx);
> > +	OUTREG(DST_WIDTH_HEIGHT, (region->width << 16) | region->height);
> > +	radeon_engine_idle ();
> 
> Why idle the engine in every acceleration function? Doesn't the API
> provide a way to only do it when necessary?

I don't do it in the patch I commited to my tree :) There is an fb_sync
callback that you use for that.

> PS: You lost my last reply to your private mails to your temporary
> address scheme.

And you'll lose mines too, please get rid of this shit and get a real
address :)

Ben.




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