From mboxrd@z Thu Jan 1 00:00:00 1970 From: Archit Taneja Date: Mon, 07 May 2012 11:33:35 +0000 Subject: [PATCH 5/6] OMAPDSS: Fix DSI_FCLK clock source selection Message-Id: <1336389696-21636-6-git-send-email-archit@ti.com> List-Id: References: <1336389696-21636-1-git-send-email-archit@ti.com> In-Reply-To: <1336389696-21636-1-git-send-email-archit@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: tomi.valkeinen@ti.com Cc: linux-omap@vger.kernel.org, linux-fbdev@vger.kernel.org, Archit Taneja The wrong bit field was being updated in DSS_CTRL when trying to configure the clock source of DSI2 functional clock. Use the correct bit field based on the dsi module number. Signed-off-by: Archit Taneja --- drivers/video/omap2/dss/dss.c | 5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index e731aa4..e212acb 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -335,7 +335,7 @@ void dss_select_dsi_clk_source(int dsi_module, enum omap_dss_clk_source clk_src) { struct platform_device *dsidev; - int b; + int b, pos; switch (clk_src) { case OMAP_DSS_CLK_SRC_FCK: @@ -357,7 +357,8 @@ void dss_select_dsi_clk_source(int dsi_module, BUG(); } - REG_FLD_MOD(DSS_CONTROL, b, 1, 1); /* DSI_CLK_SWITCH */ + pos = dsi_module = 0 ? 1 : 10; + REG_FLD_MOD(DSS_CONTROL, b, pos, pos); /* DSIx_CLK_SWITCH */ dss.dsi_clk_source[dsi_module] = clk_src; } -- 1.7.5.4