Rage128 and Radeon patches

Rage128 and Radeon patches

[Jon Smirl]

[-- Attachment #1: Type: text/plain, Size: 1392 bytes --]

Hopefully these is the last versions. They implement:
1) add every know PCI ID
2) access ROM directly instead of relying on copy in
low RAM. This allows multiple cards. Required
MPP_TB_CONFIG fix in driver.
3) implemented kernel 2.6 module parameters
4) Cleaned up error paths and made sure resources are
released on errors. Both build without compiler
warnings now. You can ins/rm mod multiple times
without problem. Just don't do it from a window in
your X server.
5) Driver marks both primary and secondary devices as
being in use.

These drivers are bigger than the old ones but that's
because I added descriptions for the parameters and a
bunch more error messages. Code is probably smaller.
Strip the strings and remove unneeded entries from the
device table for embedded systems.

I don't own Apple hardware. Anyone want to make sure I
didn't break Powerbooks?

It would be nice if someone with Radeon documentation
verified my chip IDs and family classifications. It is
important that secondary devices are marked correctly
in the driver. I did the best I could from Xfree
source and PCI databases.

Patches are against the current 2.6 kernel tree.
Anyone want to volunteer to get these into the kernel?


=====
Jon Smirl
jonsmirl@yahoo.com

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[-- Attachment #2: radeon.patch --]
[-- Type: application/octet-stream, Size: 29950 bytes --]

diff -Nru a/drivers/video/radeonfb.c b/drivers/video/radeonfb.c
--- a/drivers/video/radeonfb.c	Wed Aug 13 21:22:59 2003
+++ b/drivers/video/radeonfb.c	Wed Aug 13 21:22:59 2003
@@ -23,6 +23,9 @@
  *	2002-06-03	MTRR support, Peter Horton, 0.1.5
  *	2002-09-21	rv250, r300, m9 initial support,
  *			added mirror option, 0.1.6
+ * 	2003-08-12	added a bunch more PCI IDs for various Radeons
+ *			converted module params to 2.6 scheme
+ *			Jon Smirl <jonsmirl@yahoo.com>
  *
  *	Special thanks to ATI DevRel team for their hardware donations.
  *
@@ -34,6 +37,7 @@
 
 #include <linux/config.h>
 #include <linux/module.h>
+#include <linux/moduleparam.h>
 #include <linux/kernel.h>
 #include <linux/errno.h>
 #include <linux/string.h>
@@ -91,89 +95,41 @@
 // XXX
 #undef CONFIG_PMAC_PBOOK
 
-
-enum radeon_chips {
-	RADEON_QD,
-	RADEON_QE,
-	RADEON_QF,
-	RADEON_QG,
-	RADEON_QY,
-	RADEON_QZ,
-	RADEON_LW,
-	RADEON_LX,
-	RADEON_LY,
-	RADEON_LZ,
-	RADEON_QL,
-	RADEON_QN,
-	RADEON_QO,
-	RADEON_Ql,
-	RADEON_BB,
-	RADEON_QW,
-	RADEON_QX,
-	RADEON_Id,
-	RADEON_Ie,
-	RADEON_If,
-	RADEON_Ig,
-	RADEON_Ld,
-	RADEON_Le,
-	RADEON_Lf,
-	RADEON_Lg,
-	RADEON_ND,
-	RADEON_NE,
-	RADEON_NF,
-	RADEON_NG,
-	RADEON_QM
-};
-
 enum radeon_arch {
+        RADEON_IGP,
 	RADEON_R100,
 	RADEON_RV100,
 	RADEON_R200,
 	RADEON_RV200,
 	RADEON_RV250,
 	RADEON_R300,
+	RADEON_RS300,
+	RADEON_R350,
 	RADEON_M6,
 	RADEON_M7,
-	RADEON_M9
+	RADEON_M9,
+	RADEON_R200_SEC,
+	RADEON_RV250_SEC,
+	RADEON_R300_SEC,
+	RADEON_R350_SEC,
+	RADEON_M9_SEC,
 };
 
-static struct radeon_chip_info {
-	const char *name;
-	unsigned char arch;
-} radeon_chip_info[] __devinitdata = {
-	{ "QD", RADEON_R100 },
-	{ "QE", RADEON_R100 },
-	{ "QF", RADEON_R100 },
-	{ "QG", RADEON_R100 },
-	{ "VE QY", RADEON_RV100 },
-	{ "VE QZ", RADEON_RV100 },
-	{ "M7 LW", RADEON_M7 },
-	{ "M7 LX", RADEON_M7 },
-	{ "M6 LY", RADEON_M6 },
-	{ "M6 LZ", RADEON_M6 },
-	{ "8500 QL", RADEON_R200 },
-	{ "8500 QN", RADEON_R200 },
-	{ "8500 QO", RADEON_R200 },
-	{ "8500 Ql", RADEON_R200 },
-	{ "8500 BB", RADEON_R200 },
-	{ "7500 QW", RADEON_RV200 },
-	{ "7500 QX", RADEON_RV200 },
-	{ "9000 Id", RADEON_RV250 },
-	{ "9000 Ie", RADEON_RV250 },
-	{ "9000 If", RADEON_RV250 },
-	{ "9000 Ig", RADEON_RV250 },
-	{ "M9 Ld", RADEON_M9 },
-	{ "M9 Le", RADEON_M9 },
-	{ "M9 Lf", RADEON_M9 },
-	{ "M9 Lg", RADEON_M9 },
-	{ "9700 ND", RADEON_R300 },
-	{ "9700 NE", RADEON_R300 },
-	{ "9700 NF", RADEON_R300 },
-	{ "9700 NG", RADEON_R300 },
-	{ "9100 QM", RADEON_R200 }
+static const char *radeon_family[] __devinitdata = {
+	"IGP",
+	"R100",
+	"VE RV100",
+	"8500 R200",
+	"7500 RV200",
+	"9000 RV250",
+	"9700 R300",
+	"9700 RS300",
+	"9800 R350",
+	"Mobility M6",
+	"Mobility M7",
+	"Mobility M9",
 };
-
-
+		    
 enum radeon_montype
 {
 	MT_NONE,
@@ -186,36 +142,67 @@
 
 
 static struct pci_device_id radeonfb_pci_table[] = {
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QD},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QE},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QF},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QG, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QG},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QY, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QY},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QZ, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QZ},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LW, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_LW},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LX, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_LX},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LY, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_LY},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LZ, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_LZ},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QL},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QN, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QN},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QO},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ql, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Ql},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_BB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_BB},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QW, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QW},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QX, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QX},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Id, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Id},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ie, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Ie},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_If, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_If},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ig, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Ig},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ld, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Ld},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Le, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Le},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Lf, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Lf},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Lg, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Lg},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_ND, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_ND},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_NE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_NE},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_NF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_NF},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_NG, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_NG},
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QM, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QM},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_A6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_IGP},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_A7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_IGP},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_AD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R300},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_AE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R300},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_AF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R300},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_AG, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R300},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ad, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R300_SEC},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_B7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_IGP},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_BB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R200},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_C6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_IGP},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_C7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_IGP},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_D7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_IGP},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Id, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_RV250},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ie, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_RV250},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_If, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_RV250},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ig, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_RV250},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_In, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_RV250_SEC},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LW, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_M7},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LX, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_M7},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LY, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_M6},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LZ, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_M6},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ld, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_M9},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Le, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_M9},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Lf, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_M9},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Lg, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_M9},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ln, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_M9_SEC},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_ND, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R300},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_NE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R300},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_NF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R300},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_NG, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R300},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_NH, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R350},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Nd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R300_SEC},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ne, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R300_SEC},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Nf, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R300_SEC},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ng, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R300_SEC},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Nh, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R350_SEC},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R100},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R100},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R100},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QG, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R100},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QH, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R200},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QI, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R200},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QJ, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R200},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QK, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R200},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R200},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QM, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R200},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QN, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R200},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R200},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QW, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_RV200},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QX, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_RV200},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QY, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_RV100},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QZ, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_RV100},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Qh, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R200_SEC},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Qi, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R200_SEC},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Qj, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R200_SEC},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Qk, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R200_SEC},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ql, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_R200_SEC},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_X4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_RS300},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_X5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_RS300},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_X6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_RS300},
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_X7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_RS300},
 	{ 0, }
 };
 MODULE_DEVICE_TABLE(pci, radeonfb_pci_table);
@@ -350,7 +337,7 @@
 	struct radeon_regs state;
 	struct radeon_regs init_state;
 
-	char name[32];
+	char name[DEVICE_NAME_SIZE];
 	char ram_type[12];
 
 	unsigned long mmio_base_phys;
@@ -679,12 +666,14 @@
  */
         
 static char *mode_option __initdata;
-static char noaccel = 1;
-static char mirror = 0;
+static int noaccel = 1;
+static int mirror = 0;
 static int panel_yres __initdata = 0;
-static char force_dfp __initdata = 0;
+static int force_dfp __initdata = 0;
 static struct radeonfb_info *board_list = NULL;
-static char nomtrr __initdata = 0;
+#ifdef CONFIG_MTRR
+static int nomtrr __initdata = 0;
+#endif
 
 /*
  * prototypes
@@ -698,7 +687,10 @@
 static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo);
 static int __devinit radeon_init_disp (struct radeonfb_info *rinfo);
 static int radeon_init_disp_var (struct radeonfb_info *rinfo, struct fb_var_screeninfo *var);
-static char *radeon_find_rom(struct radeonfb_info *rinfo);
+#if defined(__i386__)
+static void __init *radeon_map_ROM(struct radeonfb_info *rinfo, struct pci_dev *pdev);
+static void __init radeon_unmap_ROM(struct pci_dev *dev, void * rom);
+#endif
 static void radeon_get_pllinfo(struct radeonfb_info *rinfo, char *bios_seg);
 static void radeon_get_moninfo (struct radeonfb_info *rinfo);
 static int radeon_get_dfpinfo (struct radeonfb_info *rinfo);
@@ -731,74 +723,65 @@
 #endif /* CONFIG_PPC_OF */
 
 
-static char *radeon_find_rom(struct radeonfb_info *rinfo)
-{       
 #if defined(__i386__)
-        u32  segstart;
-        char *rom_base;
-        char *rom;
-        int  stage;
-        int  i,j;       
-        char aty_rom_sig[] = "761295520";
-        char *radeon_sig[] = {
-          "RG6",
-          "RADEON"
-        };
-                                                
-        for(segstart=0x000c0000; segstart<0x000f0000; segstart+=0x00001000) {
-                        
-                stage = 1;
-                
-                rom_base = (char *)ioremap(segstart, 0x1000);
-
-                if ((*rom_base == 0x55) && (((*(rom_base + 1)) & 0xff) == 0xaa))
-                        stage = 2;
-                
-                    
-                if (stage != 2) {
-                        iounmap(rom_base);
-                        continue;
-                }
-                                              
-                rom = rom_base;
-                     
-                for (i = 0; (i < 128 - strlen(aty_rom_sig)) && (stage != 3); i++) {
-                        if (aty_rom_sig[0] == *rom)
-                                if (strncmp(aty_rom_sig, rom,
-                                                strlen(aty_rom_sig)) == 0)
-                                        stage = 3;
-                        rom++;
-                }
-                if (stage != 3) {
-                        iounmap(rom_base);
-                        continue;
-                }
-                rom = rom_base;
-        
-                for (i = 0; (i < 512) && (stage != 4); i++) {
-                    for(j = 0;j < sizeof(radeon_sig)/sizeof(char *);j++) {
-                        if (radeon_sig[j][0] == *rom)
-                                if (strncmp(radeon_sig[j], rom,
-                                            strlen(radeon_sig[j])) == 0) {
-                                              stage = 4;
-                                              break;
-                                            }
-                    }                           
-                        rom++;
-                }       
-                if (stage != 4) {
-                        iounmap(rom_base);
-                        continue;
-                }       
-                
-                return rom_base;
-        }
-#endif          
-        return NULL;
+static void * __init radeon_map_ROM(struct radeonfb_info *rinfo, struct pci_dev *dev)
+{
+	// If this is a primary card, there is a shadow copy of the
+	// ROM somewhere in the first meg. We will just ignore the copy
+	// and use the ROM directly.
+    
+    	/* Fix from ATI for problem with Radeon hardware not leaving ROM enabled */
+    	unsigned int temp;
+	temp = INREG(RADEON_MPP_TB_CONFIG);
+	temp &= 0x00ffffffu;
+	temp |= 0x04 << 24;
+	OUTREG(RADEON_MPP_TB_CONFIG, temp);
+	temp = INREG(RADEON_MPP_TB_CONFIG);
+                                                                                                          
+	// no need to search for the ROM, just ask the card where it is.
+	struct resource *r = &dev->resource[PCI_ROM_RESOURCE];
+	void *rom;
+	
+	// assign the ROM an address if it doesn't have one
+	if (r->start == 0)
+		pci_assign_resource(dev, PCI_ROM_RESOURCE);
+	
+	// enable if needed
+	if (!(r->flags & PCI_ROM_ADDRESS_ENABLE)) {
+		pci_write_config_dword(dev, dev->rom_base_reg, r->start | PCI_ROM_ADDRESS_ENABLE);
+		r->flags |= PCI_ROM_ADDRESS_ENABLE;
+	}
+	
+	rom = ioremap(r->start, r->end - r->start + 1);
+	if (!rom) {
+		printk(KERN_ERR "radeonfb: ROM failed to map\n");
+		return NULL;
+	}
+	
+	// Very simple test to make sure it appeared
+	if (readb(rom) != 0x55) {
+		printk(KERN_ERR "radeonfb: Invalid ROM signature %x should be 0x55\n", readb(rom));
+		radeon_unmap_ROM(dev, rom);
+		return NULL;
+	}
+	return rom;
 }
 
-
-
+static void __init radeon_unmap_ROM(struct pci_dev *dev, void * rom)
+{
+	// leave it disabled and unassigned
+	struct resource *r = &dev->resource[PCI_ROM_RESOURCE];
+	
+	iounmap(rom);
+	
+	r->flags &= ~PCI_ROM_ADDRESS_ENABLE;
+	r->end -= r->start;
+	r->start = 0;
+	/* This will disable and set address to unassigned */
+	pci_write_config_dword(dev, dev->rom_base_reg, 0);
+	release_resource(r);
+}
+#endif          
 
 static void radeon_get_pllinfo(struct radeonfb_info *rinfo, char *bios_seg)
 {
@@ -1081,12 +1064,12 @@
 		return 0;
 
 	if (!(fpbiosstart = rinfo->bios_seg + readw(rinfo->bios_seg + 0x48))) {
-		printk("radeonfb: Failed to detect DFP panel info using BIOS\n");
+		printk(KERN_ERR "radeonfb: Failed to detect DFP panel info using BIOS\n");
 		return 0;
 	}
 
 	if (!(tmp = rinfo->bios_seg + readw(fpbiosstart + 0x40))) {
-		printk("radeonfb: Failed to detect DFP panel info using BIOS\n");
+		printk(KERN_ERR "radeonfb: Failed to detect DFP panel info using BIOS\n");
 		return 0;
 	}
 
@@ -1172,7 +1155,7 @@
 				rinfo->panel_xres = 1600;
 				break;
 			default:
-				printk("radeonfb: Failed to detect DFP panel size\n");
+				printk(KERN_ERR "radeonfb: Failed to detect DFP panel size\n");
 				return 0;
 		}
 
@@ -2794,10 +2777,21 @@
 				  const struct pci_device_id *ent)
 {
 	struct radeonfb_info *rinfo;
-	struct radeon_chip_info *rci = &radeon_chip_info[ent->driver_data];
 	u32 tmp;
 
 	RTRACE("radeonfb_pci_register BEGIN\n");
+	
+	/* The driver acknowledges owning secondary devices but they are handled by primary */
+	switch (ent->driver_data) {
+	case RADEON_R200_SEC:
+	case RADEON_RV250_SEC:
+	case RADEON_R300_SEC:
+	case RADEON_R350_SEC:
+	case RADEON_M9_SEC:
+		return 0;
+	default:
+		break;
+	}
 
 	/* Enable device in PCI config */
 	if (pci_enable_device(pdev) != 0) {
@@ -2807,15 +2801,23 @@
 
 	rinfo = kmalloc (sizeof (struct radeonfb_info), GFP_KERNEL);
 	if (!rinfo) {
-		printk ("radeonfb: could not allocate memory\n");
+		printk (KERN_ERR "radeonfb: could not allocate memory\n");
 		return -ENODEV;
 	}
 
 	memset (rinfo, 0, sizeof (struct radeonfb_info));
-	//info = &rinfo->info;
+
 	rinfo->pdev = pdev;
-	strcpy(rinfo->name, rci->name);
-	rinfo->arch = rci->arch;
+	
+	strcpy(rinfo->name, "ATI Radeon XX ");
+	rinfo->name[11] = ent->device >> 8;
+	rinfo->name[12] = ent->device & 0xFF;
+		
+	/* range check to make sure */
+	if (ent->driver_data < (sizeof(radeon_family)/sizeof(char *)))
+	    strncat(rinfo->name, radeon_family[ent->driver_data], sizeof(rinfo->name));
+	
+	rinfo->arch = ent->driver_data;
 
 	/* Set base addrs */
 	rinfo->fb_base_phys = pci_resource_start (pdev, 0);
@@ -2824,30 +2826,21 @@
 	/* request the mem regions */
 	if (!request_mem_region (rinfo->fb_base_phys,
 				 pci_resource_len(pdev, 0), "radeonfb")) {
-		printk ("radeonfb: cannot reserve FB region\n");
-		kfree (rinfo);
-		return -ENODEV;
+		printk (KERN_ERR "radeonfb: cannot reserve FB region\n");
+		goto free_rinfo;
 	}
 
 	if (!request_mem_region (rinfo->mmio_base_phys,
 				 pci_resource_len(pdev, 2), "radeonfb")) {
-		printk ("radeonfb: cannot reserve MMIO region\n");
-		release_mem_region (rinfo->fb_base_phys,
-				    pci_resource_len(pdev, 0));
-		kfree (rinfo);
-		return -ENODEV;
+		printk (KERN_ERR "radeonfb: cannot reserve MMIO region\n");
+		goto release_fb;
 	}
 
 	/* map the regions */
 	rinfo->mmio_base = (unsigned long) ioremap (rinfo->mmio_base_phys, RADEON_REGSIZE);
 	if (!rinfo->mmio_base) {
-		printk ("radeonfb: cannot map MMIO\n");
-		release_mem_region (rinfo->mmio_base_phys,
-				    pci_resource_len(pdev, 2));
-		release_mem_region (rinfo->fb_base_phys,
-				    pci_resource_len(pdev, 0));
-		kfree (rinfo);
-		return -ENODEV;
+		printk (KERN_ERR "radeonfb: cannot map MMIO\n");
+		goto release_mmio;
 	}
 
 	rinfo->chipset = pdev->device;
@@ -2924,7 +2917,7 @@
 			break;
 	}
 
-	rinfo->bios_seg = radeon_find_rom(rinfo);
+	rinfo->bios_seg = radeon_map_ROM(rinfo, pdev);
 	radeon_get_pllinfo(rinfo, rinfo->bios_seg);
 
 	/*
@@ -2966,26 +2959,14 @@
 	if ((rinfo->dviDisp_type == MT_DFP) || (rinfo->dviDisp_type == MT_LCD) ||
 	    (rinfo->crtDisp_type == MT_DFP)) {
 		if (!radeon_get_dfpinfo(rinfo)) {
-			iounmap ((void*)rinfo->mmio_base);
-			release_mem_region (rinfo->mmio_base_phys,
-					    pci_resource_len(pdev, 2));
-			release_mem_region (rinfo->fb_base_phys,
-					    pci_resource_len(pdev, 0));
-			kfree (rinfo);
-			return -ENODEV;
+			goto unmap_rom;
 		}
 	}
 
 	rinfo->fb_base = (unsigned long) ioremap (rinfo->fb_base_phys, rinfo->video_ram);
 	if (!rinfo->fb_base) {
-		printk ("radeonfb: cannot map FB\n");
-		iounmap ((void*)rinfo->mmio_base);
-		release_mem_region (rinfo->mmio_base_phys,
-				    pci_resource_len(pdev, 2));
-		release_mem_region (rinfo->fb_base_phys,
-				    pci_resource_len(pdev, 0));
-		kfree (rinfo);
-		return -ENODEV;
+		printk (KERN_ERR "radeonfb: cannot map FB\n");
+		goto unmap_rom;
 	}
 
 	/* I SHOULD FIX THAT CRAP ! I should probably mimmic XFree DRI
@@ -3035,15 +3016,8 @@
 	board_list = rinfo;
 
 	if (register_framebuffer ((struct fb_info *) rinfo) < 0) {
-		printk ("radeonfb: could not register framebuffer\n");
-		iounmap ((void*)rinfo->fb_base);
-		iounmap ((void*)rinfo->mmio_base);
-		release_mem_region (rinfo->mmio_base_phys,
-				    pci_resource_len(pdev, 2));
-		release_mem_region (rinfo->fb_base_phys,
-				    pci_resource_len(pdev, 0));
-		kfree (rinfo);
-		return -ENODEV;
+		printk (KERN_ERR "radeonfb: could not register framebuffer\n");
+		goto unmap_fb;
 	}
 
 #ifdef CONFIG_MTRR
@@ -3065,7 +3039,7 @@
 	}
 #endif
 
-	printk ("radeonfb: ATI Radeon %s %s %d MB\n", rinfo->name, rinfo->ram_type,
+	printk ("radeonfb: %s %s %d MB\n", rinfo->name, rinfo->ram_type,
 		(rinfo->video_ram/(1024*1024)));
 
 	if (rinfo->hasCRTC2) {
@@ -3078,9 +3052,24 @@
 			GET_MON_NAME(rinfo->crtDisp_type));
 	}
 
+	radeon_unmap_ROM(pdev, rinfo->bios_seg);
 	RTRACE("radeonfb_pci_register END\n");
 
 	return 0;
+unmap_fb:
+	iounmap ((void*)rinfo->fb_base);
+unmap_rom:	
+	radeon_unmap_ROM(pdev, rinfo->bios_seg);
+	iounmap ((void*)rinfo->mmio_base);
+release_mmio:
+	release_mem_region (rinfo->mmio_base_phys,
+			    pci_resource_len(pdev, 2));
+release_fb:	
+	release_mem_region (rinfo->fb_base_phys,
+			    pci_resource_len(pdev, 0));
+free_rinfo:	
+	kfree (rinfo);
+	return -ENODEV;
 }
 
 
@@ -3137,40 +3126,25 @@
 	pci_unregister_driver (&radeonfb_driver);
 }
 
-
-int __init radeonfb_setup (char *options)
-{
-        char *this_opt;
-
-        if (!options || !*options)
-                return 0;
- 
-	while ((this_opt = strsep (&options, ",")) != NULL) {
-		if (!*this_opt)
-			continue;
-                if (!strncmp(this_opt, "noaccel", 7)) {
-			noaccel = 1;
-                } else if (!strncmp(this_opt, "mirror", 6)) {
-			mirror = 1;
-		} else if (!strncmp(this_opt, "dfp", 3)) {
-			force_dfp = 1;
-		} else if (!strncmp(this_opt, "panel_yres:", 11)) {
-			panel_yres = simple_strtoul((this_opt+11), NULL, 0);
-		} else if (!strncmp(this_opt, "nomtrr", 6)) {
-			nomtrr = 1;
-                } else
-			mode_option = this_opt;
-        }
-
-	return 0;
-}
-
 #ifdef MODULE
 module_init(radeonfb_init);
 module_exit(radeonfb_exit);
 #endif
 
-
 MODULE_AUTHOR("Ani Joshi");
 MODULE_DESCRIPTION("framebuffer driver for ATI Radeon chipset");
 MODULE_LICENSE("GPL");
+module_param(noaccel, bool, 0);
+MODULE_PARM_DESC(noaccel, "bool: disable acceleration");
+module_param(mirror, bool, 0);
+MODULE_PARM_DESC(mirror, "bool: mirror the display to both monitors");
+module_param(force_dfp, bool, 0);
+MODULE_PARM_DESC(force_dfp, "bool: force display to dfp");
+#ifdef CONFIG_MTRR
+module_param(nomtrr, bool, 0);
+MODULE_PARM_DESC(nomtrr, "bool: disable use of MTRR registers");
+#endif
+module_param(panel_yres, int, 0);
+MODULE_PARM_DESC(force_dfp, "int: set panel yres");
+module_param(mode_option, charp, 0);
+MODULE_PARM_DESC(mode_option, "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
diff -Nru a/include/linux/pci_ids.h b/include/linux/pci_ids.h
--- a/include/linux/pci_ids.h	Wed Aug 13 21:22:59 2003
+++ b/include/linux/pci_ids.h	Wed Aug 13 21:22:59 2003
@@ -259,55 +259,77 @@
 #define PCI_DEVICE_ID_ATI_RAGE128_U1	0x5446
 #define PCI_DEVICE_ID_ATI_RAGE128_U2	0x544C
 #define PCI_DEVICE_ID_ATI_RAGE128_U3	0x5452
-/* Radeon M4 */
-#define PCI_DEVICE_ID_ATI_RADEON_LE	0x4d45
-#define PCI_DEVICE_ID_ATI_RADEON_LF	0x4d46
-/* Radeon NV-100 */
-#define PCI_DEVICE_ID_ATI_RADEON_N1	0x5159
-#define PCI_DEVICE_ID_ATI_RADEON_N2	0x515a
+/* Radeon IGP */
+#define PCI_DEVICE_ID_ATI_RADEON_A6	0x4136
+#define PCI_DEVICE_ID_ATI_RADEON_A7	0x4137
+#define PCI_DEVICE_ID_ATI_RADEON_AD	0x4144
+#define PCI_DEVICE_ID_ATI_RADEON_AE	0x4145
+#define PCI_DEVICE_ID_ATI_RADEON_AF	0x4146
+#define PCI_DEVICE_ID_ATI_RADEON_AG	0x4147
+#define PCI_DEVICE_ID_ATI_RADEON_Ad	0x4164
+#define PCI_DEVICE_ID_ATI_RADEON_B7	0x4237
+#define PCI_DEVICE_ID_ATI_RADEON_BB	0x4242
+#define PCI_DEVICE_ID_ATI_RADEON_C6	0x4336
+#define PCI_DEVICE_ID_ATI_RADEON_C7	0x4337
+#define PCI_DEVICE_ID_ATI_RADEON_D7	0x4337
+/* Radeon RV250 (9000) */
+#define PCI_DEVICE_ID_ATI_RADEON_Id	0x4964
+#define PCI_DEVICE_ID_ATI_RADEON_Ie	0x4965
+#define PCI_DEVICE_ID_ATI_RADEON_If	0x4966
+#define PCI_DEVICE_ID_ATI_RADEON_Ig	0x4967
+#define PCI_DEVICE_ID_ATI_RADEON_In	0x496e
+/* Radeon M7 */
+#define PCI_DEVICE_ID_ATI_RADEON_LW	0x4c57
+#define PCI_DEVICE_ID_ATI_RADEON_LX	0x4c58
+/* Radeon M6 */
+#define PCI_DEVICE_ID_ATI_RADEON_LY	0x4c59
+#define PCI_DEVICE_ID_ATI_RADEON_LZ	0x4c5a
+#define PCI_DEVICE_ID_ATI_RADEON_Ld	0x4c64
+#define PCI_DEVICE_ID_ATI_RADEON_Le	0x4c65
+#define PCI_DEVICE_ID_ATI_RADEON_Lf	0x4c66
+#define PCI_DEVICE_ID_ATI_RADEON_Lg	0x4c67
+#define PCI_DEVICE_ID_ATI_RADEON_Ln	0x4c6e
+/* Radeon R300 (9700) */
+#define PCI_DEVICE_ID_ATI_RADEON_ND	0x4e44
+#define PCI_DEVICE_ID_ATI_RADEON_NE	0x4e45
+#define PCI_DEVICE_ID_ATI_RADEON_NF	0x4e46
+#define PCI_DEVICE_ID_ATI_RADEON_NG	0x4e47
+#define PCI_DEVICE_ID_ATI_RADEON_NH	0x4e48
+#define PCI_DEVICE_ID_ATI_RADEON_Nd	0x4e64
+#define PCI_DEVICE_ID_ATI_RADEON_Ne	0x4e65
+#define PCI_DEVICE_ID_ATI_RADEON_Nf	0x4e66
+#define PCI_DEVICE_ID_ATI_RADEON_Ng	0x4e67
+#define PCI_DEVICE_ID_ATI_RADEON_Nh	0x4e68
 /* Radeon R100 */
 #define PCI_DEVICE_ID_ATI_RADEON_QD	0x5144
 #define PCI_DEVICE_ID_ATI_RADEON_QE	0x5145
 #define PCI_DEVICE_ID_ATI_RADEON_QF	0x5146
 #define PCI_DEVICE_ID_ATI_RADEON_QG	0x5147
-/* Radeon RV100 (VE) */
-#define PCI_DEVICE_ID_ATI_RADEON_QY	0x5159
-#define PCI_DEVICE_ID_ATI_RADEON_QZ	0x515a
+#define PCI_DEVICE_ID_ATI_RADEON_QH	0x5148
+#define PCI_DEVICE_ID_ATI_RADEON_QI	0x5149
+#define PCI_DEVICE_ID_ATI_RADEON_QJ	0x514a
+#define PCI_DEVICE_ID_ATI_RADEON_QK	0x514b
 /* Radeon R200 (8500) */
 #define PCI_DEVICE_ID_ATI_RADEON_QL	0x514c
+#define PCI_DEVICE_ID_ATI_RADEON_QM	0x514d
 #define PCI_DEVICE_ID_ATI_RADEON_QN	0x514e
 #define PCI_DEVICE_ID_ATI_RADEON_QO	0x514f
-#define PCI_DEVICE_ID_ATI_RADEON_Ql	0x516c
-#define PCI_DEVICE_ID_ATI_RADEON_BB	0x4242
 /* Radeon RV200 (7500) */
 #define PCI_DEVICE_ID_ATI_RADEON_QW	0x5157
 #define PCI_DEVICE_ID_ATI_RADEON_QX	0x5158
-/* Radeon RV250 (9000) */
-#define PCI_DEVICE_ID_ATI_RADEON_Id	0x4964
-#define PCI_DEVICE_ID_ATI_RADEON_Ie	0x4965
-#define PCI_DEVICE_ID_ATI_RADEON_If	0x4966
-#define PCI_DEVICE_ID_ATI_RADEON_Ig	0x4967
-#define PCI_DEVICE_ID_ATI_RADEON_QM	0x514d
-/* Radeon R300 (9700) */
-#define PCI_DEVICE_ID_ATI_RADEON_ND	0x4e44
-#define PCI_DEVICE_ID_ATI_RADEON_NE	0x4e45
-#define PCI_DEVICE_ID_ATI_RADEON_NF	0x4e46
-#define PCI_DEVICE_ID_ATI_RADEON_NG	0x4e47
-/* Radeon M6 */
-#define PCI_DEVICE_ID_ATI_RADEON_LY	0x4c59
-#define PCI_DEVICE_ID_ATI_RADEON_LZ	0x4c5a
-/* Radeon M7 */
-#define PCI_DEVICE_ID_ATI_RADEON_LW	0x4c57
-#define PCI_DEVICE_ID_ATI_RADEON_LX	0x4c58
-#define PCI_DEVICE_ID_ATI_RADEON_Ld	0x4964
-#define PCI_DEVICE_ID_ATI_RADEON_Le	0x4965
-#define PCI_DEVICE_ID_ATI_RADEON_Lf	0x4966
-#define PCI_DEVICE_ID_ATI_RADEON_Lg	0x4967
-/* Radeon */
-#define PCI_DEVICE_ID_ATI_RADEON_RA	0x5144
-#define PCI_DEVICE_ID_ATI_RADEON_RB	0x5145
-#define PCI_DEVICE_ID_ATI_RADEON_RC	0x5146
-#define PCI_DEVICE_ID_ATI_RADEON_RD	0x5147
+/* Radeon RV100 (VE) */
+#define PCI_DEVICE_ID_ATI_RADEON_QY	0x5159
+#define PCI_DEVICE_ID_ATI_RADEON_QZ	0x515a
+#define PCI_DEVICE_ID_ATI_RADEON_Qh	0x5168
+#define PCI_DEVICE_ID_ATI_RADEON_Qi	0x5169
+#define PCI_DEVICE_ID_ATI_RADEON_Qj	0x516a
+#define PCI_DEVICE_ID_ATI_RADEON_Qk	0x516b
+#define PCI_DEVICE_ID_ATI_RADEON_Ql	0x516c
+/* Radeon RS300 */
+#define PCI_DEVICE_ID_ATI_RADEON_X4	0x5834
+#define PCI_DEVICE_ID_ATI_RADEON_X5	0x5835
+#define PCI_DEVICE_ID_ATI_RADEON_X6	0x5836
+#define PCI_DEVICE_ID_ATI_RADEON_X7	0x5837
 /* RadeonIGP */
 #define PCI_DEVICE_ID_ATI_RADEON_IGP	0xCAB0
 
diff -Nru a/include/video/radeon.h b/include/video/radeon.h
--- a/include/video/radeon.h	Wed Aug 13 21:22:59 2003
+++ b/include/video/radeon.h	Wed Aug 13 21:22:59 2003
@@ -872,5 +872,8 @@
 
 #define GUI_ACTIVE			0x80000000
 
+/* used by ATI bug fix for hardware ROM */
+#define RADEON_MPP_TB_CONFIG            0x01c0
+
 #endif	/* _RADEON_H */
 

[-- Attachment #3: rage128.patch --]
[-- Type: application/octet-stream, Size: 19550 bytes --]

diff -Nru a/drivers/video/aty/aty128fb.c b/drivers/video/aty/aty128fb.c
--- a/drivers/video/aty/aty128fb.c	Wed Aug 13 21:23:50 2003
+++ b/drivers/video/aty/aty128fb.c	Wed Aug 13 21:23:50 2003
@@ -24,6 +24,10 @@
  *		  Paul Mundt 
  *		  	- PCI hotplug
  *
+ *		  Jon Smirl <jonsmirl@yahoo.com>
+ * 			- PCI ID update
+ * 			- replace ROM BIOS search
+ *
  *  Based off of Geert's atyfb.c and vfb.c.
  *
  *  TODO:
@@ -43,6 +47,7 @@
 
 #include <linux/config.h>
 #include <linux/module.h>
+#include <linux/moduleparam.h>
 #include <linux/kernel.h>
 #include <linux/errno.h>
 #include <linux/string.h>
@@ -136,8 +141,25 @@
 /* Chip generations */
 enum {
 	rage_128,
+	rage_128_pci,
 	rage_128_pro,
-	rage_M3
+	rage_128_pro_pci,
+	rage_M3,
+	rage_M3_pci,
+	rage_M4,
+	rage_128_ultra,
+};
+
+/* Must match above enum */
+static const char *r128_family[] __devinitdata = {
+	"AGP",
+	"PCI",
+	"PRO AGP",
+	"PRO PCI",
+	"M3 AGP",
+	"M3 PCI",
+	"M4 AGP",
+	"Ultra AGP",
 };
 
 /*
@@ -149,32 +171,100 @@
 
 /* supported Rage128 chipsets */
 static struct pci_device_id aty128_pci_tbl[] = {
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RE,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RF,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RI,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RK,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RL,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_Rage128_PD,
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_LE,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M3_pci },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_LF,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M3 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_MF,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M4 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_ML,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M4 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PA,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PB,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PC,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PD,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro_pci },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PE,
 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
 	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PF,
 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PR,
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PG,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PH,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PI,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PJ,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PK,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PL,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PM,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PN,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PO,
 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
 	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PP,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro_pci },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PQ,
 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_U3,
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PR,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro_pci },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PS,
 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_U1,
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PT,
 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_LE,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M3 },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_LF,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M3 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PU,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PV,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PW,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PX,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RE,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pci },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RF,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RG,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RK,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pci },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RL,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SE,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SF,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pci },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SG,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SH,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SK,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SL,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SM,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SN,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TF,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TL,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TR,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TS,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TT,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TU,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra },
 	{ 0, }
 };
 
@@ -250,14 +340,7 @@
 	.accel		= FB_ACCEL_ATI_RAGE128,
 };
 
-#ifdef MODULE
 static char *mode __initdata = NULL;
-#ifdef CONFIG_MTRR
-static int  nomtrr __initdata = 0;
-#endif /* CONFIG_MTRR */
-#endif /* MODULE */
-
-static char *mode_option __initdata = NULL;
 
 #ifdef CONFIG_PPC_PMAC
 static int default_vmode __initdata = VMODE_1024_768_60;
@@ -374,7 +457,7 @@
 #if !defined(CONFIG_PPC) && !defined(__sparc__)
 static void __init aty128_get_pllinfo(struct aty128fb_par *par,
 				      void *bios);
-static void __init *aty128_map_ROM(struct pci_dev *pdev);
+static void __init *aty128_map_ROM(struct pci_dev *pdev, const struct aty128fb_par *par);
 static void __init aty128_unmap_ROM(struct pci_dev *dev, void * rom);
 #endif
 static void aty128_timings(struct aty128fb_par *par);
@@ -1410,61 +1493,6 @@
 	return 0;
 }
 
-int __init
-aty128fb_setup(char *options)
-{
-	char *this_opt;
-
-	if (!options || !*options)
-		return 0;
-
-	while ((this_opt = strsep(&options, ",")) != NULL) {
-#ifdef CONFIG_PMAC_PBOOK
-		if (!strncmp(this_opt, "lcd:", 4)) {
-			default_lcd_on = simple_strtoul(this_opt+4, NULL, 0);
-			continue;
-		} else if (!strncmp(this_opt, "crt:", 4)) {
-			default_crt_on = simple_strtoul(this_opt+4, NULL, 0);
-			continue;
-		}
-#endif
-#ifdef CONFIG_MTRR
-		if(!strncmp(this_opt, "nomtrr", 6)) {
-			mtrr = 0;
-			continue;
-		}
-#endif
-#ifdef CONFIG_PPC_PMAC
-		/* vmode and cmode deprecated */
-		if (!strncmp(this_opt, "vmode:", 6)) {
-			unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
-			if (vmode > 0 && vmode <= VMODE_MAX)
-				default_vmode = vmode;
-			continue;
-		} else if (!strncmp(this_opt, "cmode:", 6)) {
-			unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
-			switch (cmode) {
-			case 0:
-			case 8:
-				default_cmode = CMODE_8;
-				break;
-			case 15:
-			case 16:
-				default_cmode = CMODE_16;
-				break;
-			case 24:
-			case 32:
-				default_cmode = CMODE_32;
-				break;
-			}
-			continue;
-		}
-#endif /* CONFIG_PPC_PMAC */
-		mode_option = this_opt;
-	}
-	return 0;
-}
-
 
 /*
  *  Initialisation
@@ -1476,7 +1504,7 @@
 	struct fb_info *info = pci_get_drvdata(pdev);
 	struct aty128fb_par *par = info->par;
 	struct fb_var_screeninfo var;
-	char video_card[25];
+	char video_card[DEVICE_NAME_SIZE];
 	u8 chip_rev;
 	u32 dac;
 
@@ -1486,43 +1514,13 @@
 	/* Get the chip revision */
 	chip_rev = (aty_ld_le32(CONFIG_CNTL) >> 16) & 0x1F;
 
-	switch (pdev->device) {
-		case PCI_DEVICE_ID_ATI_RAGE128_RE:
-			strcpy(video_card, "Rage128 RE (PCI)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_RF:
-			strcpy(video_card, "Rage128 RF (AGP)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_RK:
-			strcpy(video_card, "Rage128 RK (PCI)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_RL:
-			strcpy(video_card, "Rage128 RL (AGP)");
-			break;
-		case PCI_DEVICE_ID_ATI_Rage128_PD:
-			strcpy(video_card, "Rage128 Pro PD (PCI)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_PF:
-			strcpy(video_card, "Rage128 Pro PF (AGP)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_PR:
-			strcpy(video_card, "Rage128 Pro PR (PCI)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_U3:
-			strcpy(video_card, "Rage128 Pro TR (AGP)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_U1:
-			strcpy(video_card, "Rage128 Pro TF (AGP)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_LE:
-			strcpy(video_card, "Rage Mobility M3 (PCI)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_LF:
-			strcpy(video_card, "Rage Mobility M3 (AGP)");
-			break;
-		default:
-			return -ENODEV;
-	}
+	strcpy(video_card, "Rage128 XX ");
+	video_card[8] = ent->device >> 8;
+	video_card[9] = ent->device & 0xFF;
+	    
+	/* range check to make sure */
+	if (ent->driver_data < (sizeof(r128_family)/sizeof(char *)))
+	    strncat(video_card, r128_family[ent->driver_data], sizeof(video_card));
 
 	printk(KERN_INFO "aty128fb: %s [chip rev 0x%x] ", video_card, chip_rev);
 
@@ -1536,17 +1534,17 @@
 	/* fill in info */
 	info->fbops = &aty128fb_ops;
 	info->flags = FBINFO_FLAG_DEFAULT;
-
+	
 #ifdef CONFIG_PMAC_PBOOK
 	par->lcd_on = default_lcd_on;
 	par->crt_on = default_crt_on;
 #endif
-
+	
 	var = default_var;
 #ifdef CONFIG_PPC_PMAC
 	if (_machine == _MACH_Pmac) {
-		if (mode_option) {
-			if (!mac_find_mode(&var, info, mode_option, 8))
+		if (mode) {
+			if (!mac_find_mode(&var, info, mode, 8))
 				var = default_var;
 		} else {
 			if (default_vmode <= 0 || default_vmode > VMODE_MAX)
@@ -1575,8 +1573,12 @@
 			if (machine_is_compatible("PowerBook3,2"))
 				default_vmode = VMODE_1152_768_60;
 	
-			if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
-				default_cmode = CMODE_8;
+			if (default_cmode > 16) 
+			    default_cmode = CMODE_32;
+			else if (default_cmode > 8) 
+			    default_cmode = CMODE_16;
+			else 
+			    default_cmode = CMODE_8;
 
 			if (mac_vmode_to_var(default_vmode, default_cmode, &var))
 				var = default_var;
@@ -1584,9 +1586,10 @@
 	} else
 #endif /* CONFIG_PPC_PMAC */
 	{
-		if (fb_find_mode(&var, info, mode_option, NULL, 0,
-				 &defaultmode, 8) == 0)
-			var = default_var;
+		if (mode)
+			if (fb_find_mode(&var, info, mode, NULL, 
+					 0, &defaultmode, 8) == 0)
+				var = default_var;
 	}
 
 	var.accel_flags &= ~FB_ACCELF_TEXT;
@@ -1614,7 +1617,7 @@
 	var.activate = FB_ACTIVATE_NOW;
 
 	aty128_init_engine(par);
-
+	
 	if (register_framebuffer(info) < 0)
 		return 0;
 
@@ -1716,7 +1719,7 @@
 	}
 
 #if !defined(CONFIG_PPC) && !defined(__sparc__)
-	if (!(bios = aty128_map_ROM(pdev)))
+	if (!(bios = aty128_map_ROM(pdev, par)))
 		printk(KERN_INFO "aty128fb: BIOS not located, guessing timings.\n");
 	else {
 		printk(KERN_INFO "aty128fb: Rage128 BIOS located at %lx\n",
@@ -1776,8 +1779,6 @@
 
 	release_mem_region(pci_resource_start(pdev, 0),
 			   pci_resource_len(pdev, 0));
-	release_mem_region(pci_resource_start(pdev, 1),
-			   pci_resource_len(pdev, 1));
 	release_mem_region(pci_resource_start(pdev, 2),
 			   pci_resource_len(pdev, 2));
 #ifdef CONFIG_PMAC_PBOOK
@@ -1790,33 +1791,47 @@
 
 /* PPC and Sparc cannot read video ROM */
 #if !defined(CONFIG_PPC) && !defined(__sparc__)
-static void * __init aty128_map_ROM(struct pci_dev *dev)
+static void * __init aty128_map_ROM(struct pci_dev *dev, const struct aty128fb_par *par)
 {
 	// If this is a primary card, there is a shadow copy of the
 	// ROM somewhere in the first meg. We will just ignore the copy
 	// and use the ROM directly.
 	
+    	/* Fix from ATI for problem with Rage128 hardware not leaving ROM enabled */
+    	unsigned int temp;
+	temp = aty_ld_le32(RAGE128_MPP_TB_CONFIG);
+	temp &= 0x00ffffffu;
+	temp |= 0x04 << 24;
+	aty_st_le32(RAGE128_MPP_TB_CONFIG, temp);
+	temp = aty_ld_le32(RAGE128_MPP_TB_CONFIG);
+                                                                                                          
 	// no need to search for the ROM, just ask the card where it is.
 	struct resource *r = &dev->resource[PCI_ROM_RESOURCE];
-	unsigned char *addr;
+	void *rom;
 	
 	// assign the ROM an address if it doesn't have one
 	if (r->start == 0)
 		pci_assign_resource(dev, PCI_ROM_RESOURCE);
 	
 	// enable if needed
-	if (!(r->flags & PCI_ROM_ADDRESS_ENABLE))
+	if (!(r->flags & PCI_ROM_ADDRESS_ENABLE)) {
 		pci_write_config_dword(dev, dev->rom_base_reg, r->start | PCI_ROM_ADDRESS_ENABLE);
+		r->flags |= PCI_ROM_ADDRESS_ENABLE;
+	}
 	
-	addr = ioremap(r->start, r->end - r->start + 1);
+	rom = ioremap(r->start, r->end - r->start + 1);
+	if (!rom) {
+		printk(KERN_ERR "aty128fb: ROM failed to map\n");
+		return NULL;
+	}
 	
 	// Very simple test to make sure it appeared
-	if (addr && (*addr != 0x55)) {
-		printk("aty128fb: Invalid ROM signature %x\n", *addr);
-		iounmap(addr);
+	if (readb(rom) != 0x55) {
+		printk(KERN_ERR "aty128fb: Invalid ROM signature %x should be 0x55\n", readb(rom));
+		aty128_unmap_ROM(dev, rom);
 		return NULL;
 	}
-	return (void *)addr;
+	return rom;
 }
 
 static void __init aty128_unmap_ROM(struct pci_dev *dev, void * rom)
@@ -1826,10 +1841,12 @@
 	
 	iounmap(rom);
 	
-	r->flags &= !PCI_ROM_ADDRESS_ENABLE;
+	r->flags &= ~PCI_ROM_ADDRESS_ENABLE;
 	r->end -= r->start;
 	r->start = 0;
+	/* This will disable and set address to unassigned */
 	pci_write_config_dword(dev, dev->rom_base_reg, 0);
+	release_resource(r);
 }
 
 static void __init
@@ -2339,13 +2356,30 @@
 	pci_unregister_driver(&aty128fb_driver);
 }
 
+#ifdef MODULE
+module_init(aty128fb_init);
+module_exit(aty128fb_exit);
+#endif
+
 MODULE_AUTHOR("(c)1999-2003 Brad Douglas <brad@neruo.com>");
 MODULE_DESCRIPTION("FBDev driver for ATI Rage128 / Pro cards");
 MODULE_LICENSE("GPL");
-MODULE_PARM(mode, "s");
+module_param(mode, charp, 0);
 MODULE_PARM_DESC(mode, "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
 #ifdef CONFIG_MTRR
-MODULE_PARM(nomtrr, "i");
-MODULE_PARM_DESC(nomtrr, "Disable MTRR support (0 or 1=disabled) (default=0)");
+module_param_named(nomtrr, mtrr, invbool, 0);
+MODULE_PARM_DESC(mtrr, "bool: Disable MTRR support (0 or 1=disabled) (default=0)");
+#endif
+#ifdef CONFIG_PPC_PMAC
+module_param_named(vmode, default_vmode, int, 0);
+MODULE_PARM_DESC(default_vmode, "Deprecated: video mode int");
+module_param_named(cmode, default_cmode, int, 0);
+MODULE_PARM_DESC(default_cmode, "Deprecated: color mode int");
+#endif
+#ifdef CONFIG_PMAC_PBOOK
+module_param_named(lcd, default_lcd_on, bool, 0);
+MODULE_PARM_DESC(default_lcd_on, "bool: Default LCD on");
+module_param_named(crt, default_crt_on, bool, 0);
+MODULE_PARM_DESC(default_crt_on, "bool: Default CRT on");
 #endif
 
diff -Nru a/include/linux/pci_ids.h b/include/linux/pci_ids.h
--- a/include/linux/pci_ids.h	Wed Aug 13 21:23:50 2003
+++ b/include/linux/pci_ids.h	Wed Aug 13 21:23:50 2003
@@ -213,12 +213,18 @@
 #define PCI_DEVICE_ID_ATI_264VT		0x5654
 #define PCI_DEVICE_ID_ATI_264VU		0x5655
 #define PCI_DEVICE_ID_ATI_264VV		0x5656
+/* Rage128 M3 */
+#define PCI_DEVICE_ID_ATI_RAGE128_LE	0x4c45
+#define PCI_DEVICE_ID_ATI_RAGE128_LF	0x4c46
+/* Rage128 M4 */
+#define PCI_DEVICE_ID_ATI_RAGE128_MF	0x4d46
+#define PCI_DEVICE_ID_ATI_RAGE128_ML	0x4d4c
 /* Rage128 Pro GL */
-#define PCI_DEVICE_ID_ATI_Rage128_PA	0x5041
-#define PCI_DEVICE_ID_ATI_Rage128_PB	0x5042
-#define PCI_DEVICE_ID_ATI_Rage128_PC	0x5043
-#define PCI_DEVICE_ID_ATI_Rage128_PD	0x5044
-#define PCI_DEVICE_ID_ATI_Rage128_PE	0x5045
+#define PCI_DEVICE_ID_ATI_RAGE128_PA	0x5041
+#define PCI_DEVICE_ID_ATI_RAGE128_PB	0x5042
+#define PCI_DEVICE_ID_ATI_RAGE128_PC	0x5043
+#define PCI_DEVICE_ID_ATI_RAGE128_PD	0x5044
+#define PCI_DEVICE_ID_ATI_RAGE128_PE	0x5045
 #define PCI_DEVICE_ID_ATI_RAGE128_PF	0x5046
 /* Rage128 Pro VR */
 #define PCI_DEVICE_ID_ATI_RAGE128_PG	0x5047
@@ -243,25 +249,27 @@
 /* Rage128 GL */
 #define PCI_DEVICE_ID_ATI_RAGE128_RE	0x5245
 #define PCI_DEVICE_ID_ATI_RAGE128_RF	0x5246
-#define PCI_DEVICE_ID_ATI_RAGE128_RG	0x534b
-#define PCI_DEVICE_ID_ATI_RAGE128_RH	0x534c
-#define PCI_DEVICE_ID_ATI_RAGE128_RI	0x534d
 /* Rage128 VR */
+#define PCI_DEVICE_ID_ATI_RAGE128_RE	0x5245
+#define PCI_DEVICE_ID_ATI_RAGE128_RF	0x5246
+#define PCI_DEVICE_ID_ATI_RAGE128_RG	0x5247
 #define PCI_DEVICE_ID_ATI_RAGE128_RK	0x524b
 #define PCI_DEVICE_ID_ATI_RAGE128_RL	0x524c
-#define PCI_DEVICE_ID_ATI_RAGE128_RM	0x5345
-#define PCI_DEVICE_ID_ATI_RAGE128_RN	0x5346
-#define PCI_DEVICE_ID_ATI_RAGE128_RO	0x5347
-/* Rage128 M3 */
-#define PCI_DEVICE_ID_ATI_RAGE128_LE	0x4c45
-#define PCI_DEVICE_ID_ATI_RAGE128_LF	0x4c46
+#define PCI_DEVICE_ID_ATI_RAGE128_SE	0x5345
+#define PCI_DEVICE_ID_ATI_RAGE128_SF	0x5346
+#define PCI_DEVICE_ID_ATI_RAGE128_SG	0x5347
+#define PCI_DEVICE_ID_ATI_RAGE128_SH	0x5348
+#define PCI_DEVICE_ID_ATI_RAGE128_SK	0x534b
+#define PCI_DEVICE_ID_ATI_RAGE128_SL	0x534c
+#define PCI_DEVICE_ID_ATI_RAGE128_SM	0x534d
+#define PCI_DEVICE_ID_ATI_RAGE128_SN	0x534e
 /* Rage128 Pro Ultra */
-#define PCI_DEVICE_ID_ATI_RAGE128_U1	0x5446
-#define PCI_DEVICE_ID_ATI_RAGE128_U2	0x544C
-#define PCI_DEVICE_ID_ATI_RAGE128_U3	0x5452
-/* Radeon M4 */
-#define PCI_DEVICE_ID_ATI_RADEON_LE	0x4d45
-#define PCI_DEVICE_ID_ATI_RADEON_LF	0x4d46
+#define PCI_DEVICE_ID_ATI_RAGE128_TF	0x5446
+#define PCI_DEVICE_ID_ATI_RAGE128_TL	0x544C
+#define PCI_DEVICE_ID_ATI_RAGE128_TR	0x5452
+#define PCI_DEVICE_ID_ATI_RAGE128_TS	0x5453
+#define PCI_DEVICE_ID_ATI_RAGE128_TT	0x5454
+#define PCI_DEVICE_ID_ATI_RAGE128_TU	0x5455
 /* Radeon NV-100 */
 #define PCI_DEVICE_ID_ATI_RADEON_N1	0x5159
 #define PCI_DEVICE_ID_ATI_RADEON_N2	0x515a
diff -Nru a/include/video/aty128.h b/include/video/aty128.h
--- a/include/video/aty128.h	Wed Aug 13 21:23:50 2003
+++ b/include/video/aty128.h	Wed Aug 13 21:23:50 2003
@@ -416,4 +416,7 @@
 
 #define PMI_PMSCR_REG				0x60
 
+/* used by ATI bug fix for hardware ROM */
+#define RAGE128_MPP_TB_CONFIG            	0x01c0
+
 #endif				/* REG_RAGE128_H */

Re: [Dri-devel] Rage128 and Radeon patches

[Benjamin Herrenschmidt]

On Thu, 2003-08-14 at 05:43, Jon Smirl wrote:
> Hopefully these is the last versions. They implement:

Please CC me any further radeonfb patches, I have my own stuff
pending that I need to sync (and I sort of took over maintainership)

> 1) add every know PCI ID
> 2) access ROM directly instead of relying on copy in
> low RAM. This allows multiple cards. Required
> MPP_TB_CONFIG fix in driver.

This is a problem. We also parse it to find the DFP EDID and/or
flat panel informations, do that work with the real ROM ? I don't
know much about x86 BIOSes, but at least for the DFP EDID, I suppose
that one is read in RAM by the BIOS, not in the ROM...

> 3) implemented kernel 2.6 module parameters
> 4) Cleaned up error paths and made sure resources are
> released on errors. Both build without compiler
> warnings now. You can ins/rm mod multiple times
> without problem. Just don't do it from a window in
> your X server.
> 5) Driver marks both primary and secondary devices as
> being in use.
> 
> These drivers are bigger than the old ones but that's
> because I added descriptions for the parameters and a
> bunch more error messages. Code is probably smaller.
> Strip the strings and remove unneeded entries from the
> device table for embedded systems.
> 
> I don't own Apple hardware. Anyone want to make sure I
> didn't break Powerbooks?

You may want to look at the version I have in my tree
on ppc.bkbits.net/linuxppc-2.5-benh. I don't have much time
to sync with your before a couple of weeks for now... This version
rely on my Power Management stuffs I posted earlier that James didn't
seem to merge yet though.

> It would be nice if someone with Radeon documentation
> verified my chip IDs and family classifications. It is
> important that secondary devices are marked correctly
> in the driver. I did the best I could from Xfree
> source and PCI databases.

The ChipIDs aren't in the documentation. I suppose the best source
here is the XFree driver.

> Patches are against the current 2.6 kernel tree.
> Anyone want to volunteer to get these into the kernel?
> 
> 
> =====
> Jon Smirl
> jonsmirl@yahoo.com
> 
> __________________________________
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-- 
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Re: [Dri-devel] Rage128 and Radeon patches

[Alex Deucher]

--- Jon Smirl <jonsmirl@yahoo.com> wrote:
> Hopefully these is the last versions. They implement:
> 1) add every know PCI ID
> 2) access ROM directly instead of relying on copy in
> low RAM. This allows multiple cards. Required
> MPP_TB_CONFIG fix in driver.

Is this patch necessary for xfree86?  It may address some of the issues
in the email threads I sent out yesterday (ie, problems with multiple
radeon cards and xfree86).  if so would you consider making one?

Alex

> 3) implemented kernel 2.6 module parameters
> 4) Cleaned up error paths and made sure resources are
> released on errors. Both build without compiler
> warnings now. You can ins/rm mod multiple times
> without problem. Just don't do it from a window in
> your X server.
> 5) Driver marks both primary and secondary devices as
> being in use.
> 


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Re: Re: [Dri-devel] Rage128 and Radeon patches

[Jon Smirl]

--- Benjamin Herrenschmidt <benh@kernel.crashing.org>
wrote:
> This is a problem. We also parse it to find the DFP
> EDID and/or flat panel informations, do that work 
> with the real ROM ? I don't know much about x86
> BIOSes, but at least for the DFP EDID, I suppose
> that one is read in RAM by the BIOS, not in the
> ROM...

On x86 machines low RAM contains a copy of the ROM,
now you are getting a pointer to the real ROM. The
contents are identical. The only difference is that
you need to use the readb()/readw()/etc macros to read
it. On the x86 readb() does nothing, but on other
platforms it will trigger a PCI read cycle. This plus
side to this is that you can use multiple video cards.

The ROM stuff is only enabled on the X86 platform. It
was IFDEF'd that way before I made my changes. I did
not change the way it was previously IFDEF'd for other
platforms.  You may want to try enabling the ROM on
the Apple platforms. It will probably work, if it does
change the IFDEFs. The old technique of relying on the
copy in low memory does not work on Apples since their
BIOS doesn't make the copy, that's why it was IFDEF'd
off.

> You may want to look at the version I have in my
> tree on ppc.bkbits.net/linuxppc-2.5-benh. I don't
have
> much time to sync with your before a couple of weeks

> for now... This version rely on my Power Management
> stuffs I posted earlier that James didn't seem to
merge
> yet though.

I looked through the diff for this. The only potential
conflict is where I cleaned up some error paths.
Please keep my changes as the old code was not freeing
resources where it should have. You may want to
experiment with enabling the ROM on the Mac.

My code does not change the behavior of the driver
other than by adding PCI IDs and the way the ROM is
accessed on the X86. It would be nice if you could
check out my code and at least make sure it compiles
and loads on a Powerbook.


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jonsmirl@yahoo.com

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Re: [Linux-fbdev-devel] Re: [Dri-devel] Rage128 and Radeon patches

[Jon Smirl]

--- Alex Deucher <agd5f@yahoo.com> wrote:
> > 2) access ROM directly instead of relying on copy
> > in low RAM. This allows multiple cards. Required
> > MPP_TB_CONFIG fix in driver.
> 
> Is this patch necessary for xfree86?  It may address
> some of the issues
> in the email threads I sent out yesterday (ie,
> problems with multiple
> radeon cards and xfree86).  if so would you consider
> making one?
> 

Xfree code does not have the patch, but is Xfree
experiencing the bug? Xfree accesses the hardware very
differently than the framebuffer drivers.

I suspect that you would see this problem if you were
using something else for your primary video and a
Radeon for secondary. The first time you ran Xfree it
would work. But when you exited and restarted Xfree it
would hang when starting the secondary display.

Where does XFree reset the secondary card? The code
below needs to run right after the reset in the radeon
driver. I added it to my Rage128 driver too but I have
not observed the problem with them.

Framebuffer code is different and triggers the bug the
first time the secondary display is accessed.

/* Fix from ATI for problem with Radeon hardware not
leaving ROM enabled */
unsigned int temp;
temp = INREG(RADEON_MPP_TB_CONFIG);
temp &= 0x00ffffffu;
temp |= 0x04 << 24;
OUTREG(RADEON_MPP_TB_CONFIG, temp);
temp = INREG(RADEON_MPP_TB_CONFIG);


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jonsmirl@yahoo.com

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Re: [Linux-fbdev-devel] Re: [Dri-devel] Rage128 and Radeon patches

[Alex Deucher]

I haven't tried multiple radeon cards, but I seem to recall several
people having this problem right around when 4.3.0 was released.  I
don't think a "proper" fix ever went in and I think the issue was to be
revisited later.  I don't know if it's needed anymore or not.

Alex

--- Jon Smirl <jonsmirl@yahoo.com> wrote:
> --- Alex Deucher <agd5f@yahoo.com> wrote:
> > > 2) access ROM directly instead of relying on copy
> > > in low RAM. This allows multiple cards. Required
> > > MPP_TB_CONFIG fix in driver.
> > 
> > Is this patch necessary for xfree86?  It may address
> > some of the issues
> > in the email threads I sent out yesterday (ie,
> > problems with multiple
> > radeon cards and xfree86).  if so would you consider
> > making one?
> > 
> 
> Xfree code does not have the patch, but is Xfree
> experiencing the bug? Xfree accesses the hardware very
> differently than the framebuffer drivers.
> 
> I suspect that you would see this problem if you were
> using something else for your primary video and a
> Radeon for secondary. The first time you ran Xfree it
> would work. But when you exited and restarted Xfree it
> would hang when starting the secondary display.
> 
> Where does XFree reset the secondary card? The code
> below needs to run right after the reset in the radeon
> driver. I added it to my Rage128 driver too but I have
> not observed the problem with them.
> 
> Framebuffer code is different and triggers the bug the
> first time the secondary display is accessed.
> 
> /* Fix from ATI for problem with Radeon hardware not
> leaving ROM enabled */
> unsigned int temp;
> temp = INREG(RADEON_MPP_TB_CONFIG);
> temp &= 0x00ffffffu;
> temp |= 0x04 << 24;
> OUTREG(RADEON_MPP_TB_CONFIG, temp);
> temp = INREG(RADEON_MPP_TB_CONFIG);
> 
> 
> =====
> Jon Smirl
> jonsmirl@yahoo.com
> 

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dri fb drivers [was: Re: Rage128 and Radeon patches]

[Otto Solares]

On Wed, Aug 13, 2003 at 08:43:38PM -0700, Jon Smirl wrote:
> Hopefully these is the last versions. They implement:
> 1) add every know PCI ID
> 2) access ROM directly instead of relying on copy in
> low RAM. This allows multiple cards. Required
> MPP_TB_CONFIG fix in driver.
> 3) implemented kernel 2.6 module parameters
> 4) Cleaned up error paths and made sure resources are
> released on errors. Both build without compiler
> warnings now. You can ins/rm mod multiple times
> without problem. Just don't do it from a window in
> your X server.
> 5) Driver marks both primary and secondary devices as
> being in use.

nice work!

i know you are working with the dri fb drivers, is any
progress and what is the current state?

-solca



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Re: [Linux-fbdev-devel] Re: [Dri-devel] Rage128 and Radeon patches

[Steven Newbury]

On Thu, 2003-08-14 at 19:06, Alex Deucher wrote:
> I haven't tried multiple radeon cards, but I seem to recall several
> people having this problem right around when 4.3.0 was released.  I
> don't think a "proper" fix ever went in and I think the issue was to be
> revisited later.  I don't know if it's needed anymore or not.
> 
It is still needed, Radeon as a secondary display only works on the
first initialisation (it can not find ROM on subsequent attempts) in all
XFree86 versions I have tried up to and including current CVS.  At least
on my hardware... :-/

> Alex
> 
> --- Jon Smirl <jonsmirl@yahoo.com> wrote:
> > --- Alex Deucher <agd5f@yahoo.com> wrote:
> > > > 2) access ROM directly instead of relying on copy
> > > > in low RAM. This allows multiple cards. Required
> > > > MPP_TB_CONFIG fix in driver.
> > > 
> > > Is this patch necessary for xfree86?  It may address
> > > some of the issues
> > > in the email threads I sent out yesterday (ie,
> > > problems with multiple
> > > radeon cards and xfree86).  if so would you consider
> > > making one?
> > > 
> > 
> > Xfree code does not have the patch, but is Xfree
> > experiencing the bug? Xfree accesses the hardware very
> > differently than the framebuffer drivers.
> > 
> > I suspect that you would see this problem if you were
> > using something else for your primary video and a
> > Radeon for secondary. The first time you ran Xfree it
> > would work. But when you exited and restarted Xfree it
> > would hang when starting the secondary display.
> > 
> > Where does XFree reset the secondary card? The code
> > below needs to run right after the reset in the radeon
> > driver. I added it to my Rage128 driver too but I have
> > not observed the problem with them.
> > 
> > Framebuffer code is different and triggers the bug the
> > first time the secondary display is accessed.
> > 
> > /* Fix from ATI for problem with Radeon hardware not
> > leaving ROM enabled */
> > unsigned int temp;
> > temp = INREG(RADEON_MPP_TB_CONFIG);
> > temp &= 0x00ffffffu;
> > temp |= 0x04 << 24;
> > OUTREG(RADEON_MPP_TB_CONFIG, temp);
> > temp = INREG(RADEON_MPP_TB_CONFIG);
> > 

Re: dri fb drivers [was: Re: [Linux-fbdev-devel] Rage128 and Radeon patches]

[Jon Smirl]

--- Otto Solares <solca@guug.org> wrote:
> nice work!
> 
> i know you are working with the dri fb drivers, is
> any progress and what is the current state?

I am working on embedded Mesa, which is another name
for standalone OpenGL. Embedded Mesa is based on the
3D DRI code but it handles 2D very differently.

Xfree/DRI scans the PCI bus and initializes hardware
in it's user space process.  Embedded Mesa instead
loads the framebuffer drivers and uses them to
initialize the hardware. This makes Embedded Mesa much
simpler since it relies on the framebuffer drivers for
a lot of things such as mode switching and PCI bus
scanning.

You can get a snapshot of my work with this:
bk clone bk://mesa3d.bkbits.net/jonsmirl local_name

Standalone OpenGL works for most all Radeon chips if
you also use the updated framebuffers. Rage128 and MGA
support and being worked on but they are not ready
yet. This is development level code and it is not
ready for testing.

=====
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Re: dri fb drivers [was: Re: Rage128 and Radeon patches]

[James Simmons]

> > nice work!
> > 
> > i know you are working with the dri fb drivers, is
> > any progress and what is the current state?
> 
> I am working on embedded Mesa, which is another name
> for standalone OpenGL. Embedded Mesa is based on the
> 3D DRI code but it handles 2D very differently.
> 
> Xfree/DRI scans the PCI bus and initializes hardware
> in it's user space process.  Embedded Mesa instead
> loads the framebuffer drivers and uses them to
> initialize the hardware. This makes Embedded Mesa much
> simpler since it relies on the framebuffer drivers for
> a lot of things such as mode switching and PCI bus
> scanning.
> 
> You can get a snapshot of my work with this:
> bk clone bk://mesa3d.bkbits.net/jonsmirl local_name
> 
> Standalone OpenGL works for most all Radeon chips if
> you also use the updated framebuffers. Rage128 and MGA
> support and being worked on but they are not ready
> yet. This is development level code and it is not
> ready for testing.

Oh wow. That is way to cool!!!! I suggest you merge your work with 
the khronos group. It would be really nice to see a embedded OpenML 
implementation. I'm looking into this since I plan to implement Java3D 
/JavaX media layer for GNU Classpath/Kaffe in the near future.

http://www.khronos.org/



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Re: dri fb drivers [was: Re: Rage128 and Radeon patches]

[Otto Solares]

On Thu, Aug 14, 2003 at 11:55:51AM -0700, Jon Smirl wrote:
> --- Otto Solares <solca@guug.org> wrote:
> > nice work!
> > 
> > i know you are working with the dri fb drivers, is
> > any progress and what is the current state?
> 
> I am working on embedded Mesa, which is another name
> for standalone OpenGL. Embedded Mesa is based on the
> 3D DRI code but it handles 2D very differently.
> 
> Xfree/DRI scans the PCI bus and initializes hardware
> in it's user space process.  Embedded Mesa instead
> loads the framebuffer drivers and uses them to
> initialize the hardware. This makes Embedded Mesa much
> simpler since it relies on the framebuffer drivers for
> a lot of things such as mode switching and PCI bus
> scanning.

good! IMO this is the future for linux!
i would like to see this work merged with the dri.sf.net
folks and a unified set of drivers for both fb and Xfree.
Is this possible, is this your objective? or embedded
mesa will always be an standalone project...

-solca



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Re: Re: dri fb drivers [was: Re: [Linux-fbdev-devel] Rage128 and Radeon patches]

[Jon Smirl]

--- Otto Solares <solca@guug.org> wrote:
> good! IMO this is the future for linux!
> i would like to see this work merged with the
> dri.sf.net folks and a unified set of drivers for 
> both fb and Xfree. Is this possible, is this your
> objective? or embedded mesa will always be an 
> standalone project...

The long term plan is for a single OpenGL shared
object that runs standalone, with DirectFB or under
XFree/DRI. There is nothing technical stopping this,
it just a matter of adjusting bunches of code. 

3D drivers from DRI work in the embedded version with
minor changes mostly having to do with removing GLX
code from the drivers. 2D is a different story.
Significant code needs to be adjusted for each driver.
I am working on the Rage128 driver currently. Radeon
and MGA are done. Nothing else has been started yet.

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Re: Re: [Dri-devel] Rage128 and Radeon patches

[Benjamin Herrenschmidt]

On Thu, 2003-08-14 at 18:00, Jon Smirl wrote:
> --- Benjamin Herrenschmidt <benh@kernel.crashing.org>
> wrote:
> > This is a problem. We also parse it to find the DFP
> > EDID and/or flat panel informations, do that work 
> > with the real ROM ? I don't know much about x86
> > BIOSes, but at least for the DFP EDID, I suppose
> > that one is read in RAM by the BIOS, not in the
> > ROM...
> 
> On x86 machines low RAM contains a copy of the ROM,
> now you are getting a pointer to the real ROM. The
> contents are identical. The only difference is that
> you need to use the readb()/readw()/etc macros to read
> it. On the x86 readb() does nothing, but on other
> platforms it will trigger a PCI read cycle. This plus
> side to this is that you can use multiple video cards.

Well... Again, this has to be verified in real life, but
my understanding is that the BIOS code, once it has probed
the DFP flat panel, will put the EDID data in RAM somewhere
within the copy of the BIOS, which is where we then find
it... The best thing would still be, of course, to implement
full DDC probing in radeonfb like XFree does. This has been
on my todolist for a while now, but I lack time. 

Ben.



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Re: Re: [Dri-devel] Rage128 and Radeon patches

[Jon Smirl]

--- Benjamin Herrenschmidt <benh@kernel.crashing.org>
wrote:

> Well... Again, this has to be verified in real life,
> but
> my understanding is that the BIOS code, once it has
> probed
> the DFP flat panel, will put the EDID data in RAM
> somewhere
> within the copy of the BIOS, which is where we then
> find
> it... The best thing would still be, of course, to
> implement
> full DDC probing in radeonfb like XFree does. This
> has been
> on my todolist for a while now, but I lack time. 
> 
> Ben.
> 

Putting the EDID data into the RAM copy will never
work the case where there are multiple cards since
there is only one copy of the ROM in low RAM.

Personally I'd just like to ignore the boot VROM and
do everything in the Radeon driver code. But ATI won't
give out detailed info on how to read EDID or reset
the card with C code from the driver. So instead we
end up with the idiotic x86 emulator and doing INT10's
in simulated real mode.

Maybe someone with more leverage can coax this info
out of them.....


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Re: Re: [Dri-devel] Rage128 and Radeon patches

[Benjamin Herrenschmidt]

> Putting the EDID data into the RAM copy will never
> work the case where there are multiple cards since
> there is only one copy of the ROM in low RAM.

Yup, but at least it works for single cards, and that
helps a lot of users until radeonfb can do better

> Personally I'd just like to ignore the boot VROM and
> do everything in the Radeon driver code. But ATI won't
> give out detailed info on how to read EDID or reset
> the card with C code from the driver. So instead we
> end up with the idiotic x86 emulator and doing INT10's
> in simulated real mode.
> 
> Maybe someone with more leverage can coax this info
> out of them.....

Getting the full POST code is probably a lost cause. However,
if you look at the current XFree CVS driver, you'll see rather
complete code to get the EDID via DDC/i2c on all connectors.

Ben.


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