[PATCH 0/7] Bunch of patches

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* [PATCH 0/7] Bunch of patches
@ 2004-03-21 19:33 Alexander Kern
  2004-03-21 19:37 ` [PATCH 1/7] Alexander Kern
                   ` (8 more replies)
  0 siblings, 9 replies; 16+ messages in thread
From: Alexander Kern @ 2004-03-21 19:33 UTC (permalink / raw)
  To: fbdev; +Cc: James Simmons

Hello,

here a seven patches for mach64 fbdev driver.

01_mach64-add.diff
	simple additions, once already send to James

02_mach64-aux.diff
	patch based on patch from Ville Syrjälä, use aperture for register access

03_mach64-chipset2.diff
	reorganize table of chipsets

04_mach64-bios.diff
	let read frequence limits from BIOS

05_mach64-revers-hwtriple.diff
	reverse logic for hardware triple

06_mach64-laterinit.diff
	correct init from BIOS

07_mach64-aux_correct.diff
	free regions, registered for aperture

Summary of patches tested on ARMADA E500 1400x1050

Regards Alex


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^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH 1/7]
  2004-03-21 19:33 [PATCH 0/7] Bunch of patches Alexander Kern
@ 2004-03-21 19:37 ` Alexander Kern
  2004-03-21 19:37 ` [PATCH 2/7] Alexander Kern
                   ` (7 subsequent siblings)
  8 siblings, 0 replies; 16+ messages in thread
From: Alexander Kern @ 2004-03-21 19:37 UTC (permalink / raw)
  To: linux-fbdev-devel; +Cc: James Simmons

[-- Attachment #1: Type: text/plain, Size: 1 bytes --]



[-- Attachment #2: 01_mach64-add.diff --]
[-- Type: text/x-diff, Size: 21284 bytes --]

diff -U 3 -H -d -p -r -N -- linux-2.6.4/drivers/video/aty/atyfb.h linux-2.6.alex/drivers/video/aty/atyfb.h
--- linux-2.6.4/drivers/video/aty/atyfb.h	2004-03-11 16:47:33.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/atyfb.h	2004-03-13 21:27:34.000000000 +0100
@@ -168,6 +168,7 @@ struct atyfb_par {
 #define M64F_LT_SLEEP		0x00040000
 #define M64F_XL_DLL		0x00080000
 #define M64F_MFB_FORCE_4	0x00100000
+#define M64F_NO_HW_TRIPLE	0x00200000
 
     /*
      *  Register access
diff -U 3 -H -d -p -r -N -- linux-2.6.4/drivers/video/aty/atyfb_base.c linux-2.6.alex/drivers/video/aty/atyfb_base.c
--- linux-2.6.4/drivers/video/aty/atyfb_base.c	2004-03-11 16:47:33.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/atyfb_base.c	2004-03-13 21:23:57.000000000 +0100
@@ -125,6 +125,7 @@ static u32 aty_ld_lcd(int index, const s
 	/* read the register value */
 	return aty_ld_le32(LCD_DATA, par);
 }
+#endif /* defined(CONFIG_PM) || defined(CONFIG_PMAC_BACKLIGHT) || defined (CONFIG_FB_ATY_GENERIC_LCD) */
 
 /*
  * ATIReduceRatio --
@@ -149,8 +150,6 @@ static void ATIReduceRatio(int *Numerato
     *Denominator /= Divider;
 }
 
-#endif /* defined(CONFIG_PM) || defined(CONFIG_PMAC_BACKLIGHT) || defined (CONFIG_FB_ATY_GENERIC_LCD) */
-
     /*
      *  The Hardware parameters for each card
      */
@@ -235,6 +234,12 @@ struct fb_var_screeninfo default_var = {
 	0, FB_VMODE_NONINTERLACED
 };
 
+static struct fb_videomode defmode = {
+	/* 640x480 @ 60 Hz, 31.5 kHz hsync */
+	NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
+	0, FB_VMODE_NONINTERLACED
+};
+
 static struct fb_ops atyfb_ops = {
 	.owner		= THIS_MODULE,
 	.fb_open	= atyfb_open,
@@ -316,36 +321,38 @@ static struct {
 } aty_chips[] __initdata = {
 #ifdef CONFIG_FB_ATY_GX
 	/* Mach64 GX */
-	{ 0x4758, 0x00d7, 0x00, 0x00, m64n_gx, 135, 50, 50, M64F_GX },
-	{ 0x4358, 0x0057, 0x00, 0x00, m64n_cx, 135, 50, 50, M64F_GX },
+	{ 0x4758, 0x00d7, 0x00, 0x00, m64n_gx, 135, 50, 50, M64F_GX | M64F_NO_HW_TRIPLE },
+	{ 0x4358, 0x0057, 0x00, 0x00, m64n_cx, 135, 50, 50, M64F_GX | M64F_NO_HW_TRIPLE },
 #endif /* CONFIG_FB_ATY_GX */
 
 #ifdef CONFIG_FB_ATY_CT
 	/* Mach64 CT */
-	{ 0x4354, 0x4354, 0x00, 0x00, m64n_ct, 135, 60, 60, M64F_CT | M64F_INTEGRATED | M64F_CT_BUS | M64F_MAGIC_FIFO },
-	{ 0x4554, 0x4554, 0x00, 0x00, m64n_et, 135, 60, 60, M64F_CT | M64F_INTEGRATED | M64F_CT_BUS | M64F_MAGIC_FIFO },
+	{ 0x4354, 0x4354, 0x00, 0x00, m64n_ct, 135, 60, 60, M64F_CT | M64F_INTEGRATED | M64F_CT_BUS | M64F_MAGIC_FIFO | M64F_NO_HW_TRIPLE },
+	{ 0x4554, 0x4554, 0x00, 0x00, m64n_et, 135, 60, 60, M64F_CT | M64F_INTEGRATED | M64F_CT_BUS | M64F_MAGIC_FIFO | M64F_NO_HW_TRIPLE },
 
 	/* Mach64 VT */
-	{ 0x5654, 0x5654, 0xc7, 0x00, m64n_vta3, 170, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_MAGIC_FIFO | M64F_FIFO_24 },
-	{ 0x5654, 0x5654, 0xc7, 0x40, m64n_vta4, 200, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_MAGIC_POSTDIV },
-	{ 0x5654, 0x5654, 0x00, 0x00, m64n_vtb, 200, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_GTB_DSP | M64F_FIFO_24 },
-	{ 0x5655, 0x5655, 0x00, 0x00, m64n_vtb, 200, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL },
-	{ 0x5656, 0x5656, 0x00, 0x00, m64n_vt4, 230, 83, 83, M64F_VT | M64F_INTEGRATED | M64F_GTB_DSP },
+	{ 0x5654, 0x5654, 0xc7, 0x00, m64n_vta3, 170, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_NO_HW_TRIPLE },
+	{ 0x5654, 0x5654, 0xc7, 0x40, m64n_vta4, 200, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_NO_HW_TRIPLE | M64F_MAGIC_POSTDIV },
+	{ 0x5654, 0x5654, 0x00, 0x00, m64n_vtb, 200, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_GTB_DSP | M64F_FIFO_24 | M64F_NO_HW_TRIPLE },
+	{ 0x5655, 0x5655, 0x00, 0x00, m64n_vtb, 200, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_GTB_DSP | M64F_FIFO_24 | M64F_NO_HW_TRIPLE | M64F_SDRAM_MAGIC_PLL },
+	{ 0x5656, 0x5656, 0x00, 0x00, m64n_vt4, 230, 83, 83, M64F_VT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_NO_HW_TRIPLE },
+
+	/* Mach64 LT */
+	{ 0x4c54, 0x4c54, 0x00, 0x00, m64n_lt, 135, 63, 63, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_NO_HW_TRIPLE },
+	{ 0x4c47, 0x4c47, 0x00, 0x00, m64n_ltg, 230, 63, 63, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_LT_SLEEP | M64F_G3_PB_1024x768 | M64F_NO_HW_TRIPLE },
 
 	/* Mach64 GT (3D RAGE) */
-	{ 0x4754, 0x4754, 0x07, 0x00, m64n_gt, 135, 63, 63, M64F_GT | M64F_INTEGRATED | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_EXTRA_BRIGHT },
-	{ 0x4754, 0x4754, 0x07, 0x01, m64n_gt, 170, 67, 67, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-	{ 0x4754, 0x4754, 0x07, 0x02, m64n_gt, 200, 67, 67, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-	{ 0x4755, 0x4755, 0x00, 0x00, m64n_gtb, 200, 67, 67, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
+	{ 0x4754, 0x4754, 0x07, 0x00, m64n_gt, 135, 63, 63, M64F_GT | M64F_INTEGRATED | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_EXTRA_BRIGHT | M64F_NO_HW_TRIPLE },
+	{ 0x4754, 0x4754, 0x07, 0x01, m64n_gt, 170, 67, 67, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_NO_HW_TRIPLE },
+	{ 0x4754, 0x4754, 0x07, 0x02, m64n_gt, 200, 67, 67, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_NO_HW_TRIPLE },
+	{ 0x4755, 0x4755, 0x00, 0x00, m64n_gtb, 200, 67, 67, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_NO_HW_TRIPLE },
+
+	/* Mach64 RAGE 3D IIc, first chip with hardware tripple */
 	{ 0x4756, 0x4756, 0x00, 0x00, m64n_iic_p, 230, 83, 83, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
 	{ 0x4757, 0x4757, 0x00, 0x00, m64n_iic_a, 230, 83, 83, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
 	{ 0x4759, 0x4759, 0x00, 0x00, m64n_iic_p, 230, 83, 83, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
 	{ 0x475a, 0x475a, 0x00, 0x00, m64n_iic_a, 230, 83, 83, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
 
-	/* Mach64 LT */
-	{ 0x4c54, 0x4c54, 0x00, 0x00, m64n_lt, 135, 63, 63, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP },
-	{ 0x4c47, 0x4c47, 0x00, 0x00, m64n_ltg, 230, 63, 63, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_LT_SLEEP | M64F_G3_PB_1024x768 },
-
 	/* Mach64 GTC (3D RAGE PRO) */
 	{ 0x4742, 0x4742, 0x00, 0x00, m64n_gtc_ba, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
 	{ 0x4744, 0x4744, 0x00, 0x00, m64n_gtc_ba1, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
@@ -404,6 +411,22 @@ static char *aty_ct_ram[8] __initdata = 
 };
 #endif /* CONFIG_FB_ATY_CT */
 
+static u32 atyfb_get_pixclock(struct fb_var_screeninfo *var, struct atyfb_par *par)
+{
+	u32 pixclock = var->pixclock;
+#ifdef CONFIG_FB_ATY_GENERIC_LCD
+	u32 lcd_on_off;
+	par->pll.ct.xres = 0;
+	if (par->lcd_table != 0) {
+		lcd_on_off = aty_ld_lcd(LCD_GEN_CNTL, par);
+		if(lcd_on_off & LCD_ON) {
+			par->pll.ct.xres = var->xres;
+			pixclock = par->lcd_pixclock;
+		}
+	}
+#endif
+	return pixclock;
+}
 
 #if defined(CONFIG_PPC)
 
@@ -578,9 +601,11 @@ static int aty_var_to_crtc(const struct 
 	u32 sync, vmode;
 	u32 h_total, h_disp, h_sync_strt, h_sync_end, h_sync_dly, h_sync_wid, h_sync_pol;
 	u32 v_total, v_disp, v_sync_strt, v_sync_end, v_sync_wid, v_sync_pol, c_sync;
-	u32 pix_width, dp_pix_width, dp_chain_mask, lcd_on_off = 0;
-	int VScan = 1, VScanmode = 0;
-
+	u32 pix_width, dp_pix_width, dp_chain_mask;
+#ifdef CONFIG_FB_ATY_GENERIC_LCD
+	int VScan = 1;
+	u32 lcd_on_off = 0;
+#endif
 	/* input */
 	xres = var->xres;
 	yres = var->yres;
@@ -691,7 +716,11 @@ static int aty_var_to_crtc(const struct 
 		v_sync_end = v_sync_strt + par->lcd_vsync_len / VScan;
 		v_total = v_disp + par->lcd_vblank_len / VScan;
 	} else {
-#endif
+#endif /* CONFIG_FB_ATY_GENERIC_LCD */
+		if((xres > 1600) || (yres > 1200)) {
+		    FAIL("MACH64 chips are designed for max 1600x1200\n"
+			"select anoter resolution.");
+		}
 		h_sync_strt = h_disp + var->right_margin;
 		h_sync_end = h_sync_strt + var->hsync_len;
 		h_sync_dly  = var->right_margin & 7;
@@ -715,7 +744,7 @@ static int aty_var_to_crtc(const struct 
 	FAIL_MAX("h_sync_wid too large", h_sync_wid, 0x1f);
 	FAIL_MAX("h_total too large", h_total, 0x1ff);
 
-	if (vmode & FB_VMODE_DOUBLE || VScanmode > 1) {
+	if (vmode & FB_VMODE_DOUBLE) {
 		v_disp <<= 1;
 		v_sync_strt <<= 1;
 		v_sync_end <<= 1;
@@ -777,7 +806,7 @@ static int aty_var_to_crtc(const struct 
 	crtc->gen_cntl |= CRTC_VGA_LINEAR;
 
 	/* Enable doublescan mode if requested */
-	if (vmode & FB_VMODE_DOUBLE || VScanmode > 1)
+	if (vmode & FB_VMODE_DOUBLE)
 		crtc->gen_cntl |= CRTC_DBL_SCAN_EN;
 	/* Enable interlaced mode if requested */
 	if (vmode & FB_VMODE_INTERLACED)
@@ -787,8 +816,6 @@ static int aty_var_to_crtc(const struct 
 		int VDisplay = yres;
 		if(vmode & FB_VMODE_DOUBLE)
 			VDisplay <<= 1;
-		if(VScanmode > 1)
-			VDisplay *= VScanmode;
 		if(vmode & FB_VMODE_INTERLACED) {
 			VDisplay >>= 1;
 
@@ -804,14 +831,10 @@ static int aty_var_to_crtc(const struct 
 		crtc->lcd_gen_cntl &= ~(HORZ_DIVBY2_EN | DIS_HOR_CRT_DIVBY2 | SCLK_SEL | USE_SHADOWED_VEND | SHADOW_EN);
 		crtc->lcd_gen_cntl |= (DONT_SHADOW_VPAR);
 */
-		if(1) { /* only LT PRO and newer */
-			crtc->horz_stretching = aty_ld_lcd(HORZ_STRETCHING, par);
-			crtc->ext_vert_stretch = aty_ld_lcd(EXT_VERT_STRETCH, par) &
-				~(AUTO_VERT_RATIO | VERT_STRETCH_MODE | VERT_STRETCH_RATIO3);
-		} else { /* LT*/
-			/* crtc->horz_stretching = aty_ld_le32(LCD_HORZ_STRETCHING, par); */
-			FAIL("LT unsupported");
-		}
+		/* MOBILITY M1 tested, FIXME: LT */
+		crtc->horz_stretching = aty_ld_lcd(HORZ_STRETCHING, par);
+		crtc->ext_vert_stretch = aty_ld_lcd(EXT_VERT_STRETCH, par) &
+			~(AUTO_VERT_RATIO | VERT_STRETCH_MODE | VERT_STRETCH_RATIO3);
 
 		crtc->horz_stretching &=
 			~(HORZ_STRETCH_RATIO | HORZ_STRETCH_LOOP | AUTO_HORZ_RATIO |
@@ -1076,17 +1099,8 @@ static int atyfb_set_par(struct fb_info 
 	if ((err = aty_var_to_crtc(info, var, &par->crtc)))
 		return err;
 
-	pixclock = var->pixclock;
-#ifdef CONFIG_FB_ATY_GENERIC_LCD
-	par->pll.ct.xres = 0;
-	if (par->lcd_table != 0) {
-		tmp = aty_ld_lcd(LCD_GEN_CNTL, par);
-		if(tmp & LCD_ON) {
-			par->pll.ct.xres = var->xres;
-			pixclock = par->lcd_pixclock;
-		}
-	}
-#endif
+	pixclock = atyfb_get_pixclock(var, par);
+
 	if (pixclock == 0) {
 		FAIL("Invalid pixclock");
 	} else {
@@ -1111,7 +1125,7 @@ static int atyfb_set_par(struct fb_info 
 		pixclock_in_ps = 0;
 
 	if(0 == pixclock_in_ps) {
-		printk("ALERT ops->pll_to_var get 0\n");
+		printk(KERN_CRIT "ALERT ops->pll_to_var get 0\n");
 		pixclock_in_ps = pixclock;
 	}
 
@@ -1274,24 +1288,15 @@ static int atyfb_check_var(struct fb_var
 	int err;
 	struct crtc crtc;
 	union aty_pll pll;
-	u32 pixclock, lcd_on_off;
+	u32 pixclock;
 
 	memcpy(&pll, &(par->pll), sizeof(pll));
 
 	if((err = aty_var_to_crtc(info, var, &crtc)))
 		return err;
 
-	pixclock = var->pixclock;
-#ifdef CONFIG_FB_ATY_GENERIC_LCD
-	pll.ct.xres = 0;
-	if (par->lcd_table != 0) {
-		lcd_on_off = aty_ld_lcd(LCD_GEN_CNTL, par);
-		if(lcd_on_off & LCD_ON) {
-			pll.ct.xres = var->xres;
-			pixclock = par->lcd_pixclock;
-		}
-	}
-#endif
+	pixclock = atyfb_get_pixclock(var, par);
+
 	if (pixclock == 0) {
 		FAIL("Invalid pixclock");
 	} else {
@@ -1394,6 +1399,8 @@ static int atyfb_pan_display(struct fb_v
 
 	xres = (((par->crtc.h_tot_disp >> 16) & 0xff) + 1) * 8;
 	yres = ((par->crtc.v_tot_disp >> 16) & 0x7ff) + 1;
+	if (par->crtc.gen_cntl & CRTC_DBL_SCAN_EN)
+		yres >>= 1;
 	xoffset = (var->xoffset + 7) & ~7;
 	yoffset = var->yoffset;
 	if (xoffset + xres > par->crtc.vxres || yoffset + yres > par->crtc.vyres)
@@ -2168,8 +2175,7 @@ static int __init aty_init(struct fb_inf
 		info->fix.mmio_start = -0x400;
 		info->fix.mmio_len = 0x800;
 		info->fix.accel = FB_ACCEL_ATI_MACH64VT;
-	} else {		/* if (M64_HAS(GT)) */
-
+	} else {/* GT */
 		info->fix.mmio_start = -0x400;
 		info->fix.mmio_len = 0x800;
 		info->fix.accel = FB_ACCEL_ATI_MACH64GT;
@@ -2180,8 +2186,7 @@ static int __init aty_init(struct fb_inf
 	       info->fix.smem_len == 0x80000 ? 'K' : 'M', ramname, xtal, pll,
 	       mclk, xclk);
 
-#ifdef DEBUG
-#ifdef CONFIG_ATY_CT	
+#if defined(DEBUG) && defined(CONFIG_ATY_CT)
 	if (M64_HAS(INTEGRATED)) {
 		int i;
 		printk("BUS_CNTL DAC_CNTL MEM_CNTL EXT_MEM_CNTL CRTC_GEN_CNTL "
@@ -2197,7 +2202,6 @@ static int __init aty_init(struct fb_inf
 		printk("\n");
 	}
 #endif
-#endif	
 	if(par->pll_ops->init_pll)
 		par->pll_ops->init_pll(info, &par->pll);
 
@@ -2224,14 +2228,10 @@ static int __init aty_init(struct fb_inf
 		aty_st_lcd(POWER_MANAGEMENT,
 			   aty_ld_lcd(POWER_MANAGEMENT, par)
 			   | (USE_F32KHZ | TRISTATE_MEM_EN), par);
-	}
-	if (M64_HAS(MOBIL_BUS))
+	} else if (M64_HAS(MOBIL_BUS))
 		register_backlight_controller(&aty_backlight_controller, info, "ati");
 #endif /* CONFIG_PMAC_BACKLIGHT */
 
-#ifdef MODULE
-	var = default_var;
-#else /* !MODULE */
 	memset(&var, 0, sizeof(var));
 #ifdef CONFIG_PPC
 	if (_machine == _MACH_Pmac) {
@@ -2240,8 +2240,7 @@ static int __init aty_init(struct fb_inf
 		 *         applies to all Mac video cards
 		 */
 		if (mode_option) {
-			if (!mac_find_mode
-			    (&var, info, mode_option, 8))
+			if (!mac_find_mode(&var, info, mode_option, 8))
 				var = default_var;
 		} else {
 			if (default_vmode == VMODE_CHOOSE) {
@@ -2257,38 +2256,21 @@ static int __init aty_init(struct fb_inf
 				else
 					default_vmode = VMODE_640_480_67;
 				sense = read_aty_sense(par);
-				printk(KERN_INFO
-				       "atyfb: monitor sense=%x, mode %d\n",
-				       sense,
-				       mac_map_monitor_sense(sense));
+				printk(KERN_INFO "atyfb: monitor sense=%x, mode %d\n",
+					sense,  mac_map_monitor_sense(sense));
 			}
-			if (default_vmode <= 0
-			    || default_vmode > VMODE_MAX)
+			if (default_vmode <= 0 || default_vmode > VMODE_MAX)
 				default_vmode = VMODE_640_480_60;
-			if (default_cmode < CMODE_8
-			    || default_cmode > CMODE_32)
+			if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
 				default_cmode = CMODE_8;
-			if (mac_vmode_to_var
-			    (default_vmode, default_cmode, &var))
+			if (mac_vmode_to_var(default_vmode, default_cmode, &var))
 				var = default_var;
 		}
 	} else
-	    if (!fb_find_mode
-		(&var, info, mode_option, NULL, 0, NULL, 8))
-		var = default_var;
-#else /* !CONFIG_PPC */
-#ifdef __sparc__
-	if (mode_option) {
-		if (!fb_find_mode(&var, info, mode_option, NULL, 0, NULL, 8))
-			var = default_var;
-	} else
-		var = default_var;
-#else
-	if (!fb_find_mode(&var, info, mode_option, NULL, 0, NULL, 8))
-		var = default_var;
-#endif /* !__sparc__ */
 #endif /* !CONFIG_PPC */
-#endif /* !MODULE */
+	if (!fb_find_mode(&var, info, mode_option, NULL, 0, &defmode, 8))
+		var = default_var;
+
 	if (noaccel)
 		var.accel_flags &= ~FB_ACCELF_TEXT;
 	else
@@ -2296,14 +2278,13 @@ static int __init aty_init(struct fb_inf
 
 	if (var.yres == var.yres_virtual) {
 		u32 vram = (info->fix.smem_len - (PAGE_SIZE << 2));
-		var.yres_virtual =
-		    ((vram * 8) / var.bits_per_pixel) / var.xres_virtual;
+		var.yres_virtual = ((vram * 8) / var.bits_per_pixel) / var.xres_virtual;
 		if (var.yres_virtual < var.yres)
 			var.yres_virtual = var.yres;
 	}
 
 	if (atyfb_check_var(&var, info)) {
-		printk("atyfb: can't set default video mode\n");
+		printk(KERN_CRIT "atyfb: can't set default video mode\n");
 		return 0;
 	}
 
diff -U 3 -H -d -p -r -N -- linux-2.6.4/drivers/video/aty/mach64_accel.c linux-2.6.alex/drivers/video/aty/mach64_accel.c
--- linux-2.6.4/drivers/video/aty/mach64_accel.c	2004-03-11 16:47:33.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/mach64_accel.c	2004-03-13 19:12:50.000000000 +0100
@@ -13,7 +13,7 @@
      *  Generic Mach64 routines
      */
      
-/* this is for DMA GUI engine! work to be continue */
+/* this is for DMA GUI engine! work in progress */
 typedef struct {
 	u32 frame_buf_offset;
 	u32 system_mem_addr;
@@ -279,7 +279,7 @@ void atyfb_fillrect(struct fb_info *info
 void atyfb_imageblit(struct fb_info *info, const struct fb_image *image)
 {
 	struct atyfb_par *par = (struct atyfb_par *) info->par;
-	u32 dwords, dx = image->dx, dy = image->dy, width = image->width;
+	u32 src_bytes, dx = image->dx, dy = image->dy, width = image->width;
 	u32 pix_width_save, pix_width, host_cntl, rotation = 0, src, mix;
 
 	if (par->asleep)
@@ -341,15 +341,15 @@ void atyfb_imageblit(struct fb_info *inf
 		pix_width &= ~DST_MASK;
 		pix_width |= DST_8BPP;
 
-		/* ab IIC we have DP_HOST_TRIPLE_EN bit */
-		/* FIXME: 24bpp + SUN12x22 corruption
-		if (image->width % 8 == 0) */
+		/* 
+		 * since Rage 3D IIc we have DP_HOST_TRIPLE_EN bit
+		 * this hwaccelerated triple has an issue with not aligned data
+		 */
+		if (!M64_HAS(NO_HW_TRIPLE) && image->width % 8 == 0)
 			pix_width |= DP_HOST_TRIPLE_EN;
 	}
 
-	dwords = (((((image->width * image->depth) + 7) / 8) * image->height * image->depth)+ 3) / 4 ;
-
-	if(image->depth == 1) {
+	if (image->depth == 1) {
 		u32 fg, bg;
 		if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
 		    info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
@@ -379,20 +379,19 @@ void atyfb_imageblit(struct fb_info *inf
 	aty_st_le32(DST_CNTL, DST_Y_TOP_TO_BOTTOM | DST_X_LEFT_TO_RIGHT | rotation, par);
 
 	draw_rect(dx, dy, width, image->height, par);
+	src_bytes = (((image->width * image->depth) + 7) / 8) * image->height;
 
-	/* manual triple each pixel, freezes the box */
-	if (0 && info->var.bits_per_pixel == 24 && !(pix_width & DP_HOST_TRIPLE_EN)) {
+	/* manual triple each pixel */
+	if (info->var.bits_per_pixel == 24 && !(pix_width & DP_HOST_TRIPLE_EN)) {
 		int inbit, outbit, mult24, byte_id_in_dword, width;
-		u8 *pbitmapin, *pbitmapout;
+		u8 *pbitmapin = (u8*)image->data, *pbitmapout;
 		u32 hostdword;
 
-		pbitmapin = (u8*)image->data;
-
-		for(width = image->width, inbit = 7, mult24 = 0; dwords; dwords--) {
-			for(hostdword = 0, pbitmapout = (u8*)&hostdword, byte_id_in_dword = 0;
-				byte_id_in_dword < 4;
+		for (width = image->width, inbit = 7, mult24 = 0; src_bytes; ) {
+			for (hostdword = 0, pbitmapout = (u8*)&hostdword, byte_id_in_dword = 0;
+				byte_id_in_dword < 4 && src_bytes;
 				byte_id_in_dword++, pbitmapout++) {
-				for(outbit = 7; outbit >= 0; outbit--) {
+				for (outbit = 7; outbit >= 0; outbit--) {
 					*pbitmapout |= (((*pbitmapin >> inbit) & 1) << outbit);
 					mult24++;
 					/* next bit */
@@ -404,10 +403,11 @@ void atyfb_imageblit(struct fb_info *inf
 
 					/* next byte */
 					if (inbit < 0 || width == 0) {
+						src_bytes--;	
 						pbitmapin++;
 						inbit = 7;
 
-						if(width == 0) {
+						if (width == 0) {
 						    width = image->width;
 						    outbit = 0;
 						}
@@ -418,10 +418,10 @@ void atyfb_imageblit(struct fb_info *inf
 			aty_st_le32(HOST_DATA0, hostdword, par);
 		}
 	} else {
-		u32 *pbitmap;
-		for(pbitmap = (u32*)(image->data); dwords; dwords--, pbitmap++) {
+		u32 *pbitmap, dwords = (src_bytes + 3) / 4;
+		for (pbitmap = (u32*)(image->data); dwords; dwords--, pbitmap++) {
 			wait_for_fifo(1, par);
-			aty_st_le32(HOST_DATA0, *pbitmap, par);
+			aty_st_le32(HOST_DATA0, le32_to_cpup(pbitmap), par);
 		}
 	}
 
diff -U 3 -H -d -p -r -N -- linux-2.6.4/drivers/video/aty/mach64_ct.c linux-2.6.alex/drivers/video/aty/mach64_ct.c
--- linux-2.6.4/drivers/video/aty/mach64_ct.c	2004-03-11 16:47:33.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/mach64_ct.c	2004-03-13 17:23:47.000000000 +0100
@@ -477,18 +477,17 @@ int __init aty_init_pll_ct(const struct 
 		pll->ct.dsp_loop_latency = (dsp_config & DSP_LOOP_LATENCY) >> 16;
 #if 0
 	FIXME: is it relevant for us?
-	if ((!dsp_on_off && (Chip < ATI_CHIP_264GTPRO)) ||
+	if ((!dsp_on_off && !M64_HAS(RESET_3D)) ||
 		((dsp_on_off == vga_dsp_on_off) &&
 		(!dsp_config || !((dsp_config ^ vga_dsp_config) & DSP_XCLKS_PER_QW)))) {
-		if (ATIDivide(GetBits(vga_dsp_on_off, VGA_DSP_OFF),
-			GetBits(vga_dsp_config, VGA_DSP_XCLKS_PER_QW), 5, 1) > 24)
+		vga_dsp_on_off &= VGA_DSP_OFF;
+		vga_dsp_config &= VGA_DSP_XCLKS_PER_QW;
+		if (ATIDivide(vga_dsp_on_off, vga_dsp_config, 5, 1) > 24)
 			pll->ct.fifo_size = 32;
 		else
 			pll->ct.fifo_size = 24;
 	}
 #endif
-	/* end BIOS */
-
 	/* Exit if the user does not want us to tamper with the clock
 	rates of her chip. */
 	if (par->mclk_per == 0) {
@@ -549,7 +548,7 @@ int __init aty_init_pll_ct(const struct 
 		* The chip clock is not equal to the memory clock.
 		* Therefore we will use sclk to clock the chip.
 		*/
-		pll->ct.pll_gen_cntl |= (6 << 4); /* mclk == sclk*/
+		pll->ct.pll_gen_cntl |= (6 << 4); /* mclk == sclk */
 
 		q = par->ref_clk_per * pll->ct.pll_ref_div * 4 / par->mclk_per;
 		if (q < 16*8 || q > 255*8) {

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH 2/7]
  2004-03-21 19:33 [PATCH 0/7] Bunch of patches Alexander Kern
  2004-03-21 19:37 ` [PATCH 1/7] Alexander Kern
@ 2004-03-21 19:37 ` Alexander Kern
  2004-03-21 19:38 ` [PATCH 3/7] Alexander Kern
                   ` (6 subsequent siblings)
  8 siblings, 0 replies; 16+ messages in thread
From: Alexander Kern @ 2004-03-21 19:37 UTC (permalink / raw)
  To: linux-fbdev-devel; +Cc: James Simmons

[-- Attachment #1: Type: text/plain, Size: 1 bytes --]



[-- Attachment #2: 02_mach64-aux.diff --]
[-- Type: text/x-diff, Size: 4529 bytes --]

diff -U 3 -H -d -p -r -- linux-2.6.4/drivers/video/aty/atyfb.h linux-2.6.alex/drivers/video/aty/atyfb.h
--- linux-2.6.4/drivers/video/aty/atyfb.h	2004-03-13 21:13:43.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/atyfb.h	2004-03-13 22:31:04.000000000 +0100
@@ -33,6 +33,28 @@ struct crtc {
 #endif
 };
 
+struct pll_info {
+	int pll_max;
+	int pll_min;
+	int sclk, mclk, mclk_pm, xclk;
+	int ref_div;
+	int ref_clk;
+};
+
+typedef struct {
+	u16 unknown1;
+	u16 PCLK_min_freq;
+	u16 PCLK_max_freq;
+	u16 unknown2;
+	u16 ref_freq;
+	u16 ref_divider;
+	u16 unknown3;
+	u16 MCLK_pwd;
+	u16 MCLK_max_freq;
+	u16 XCLK_max_freq;
+	u16 SCLK_freq;
+} __attribute__ ((packed)) PLL_BLOCK_MACH64;
+
 struct pll_514 {
 	u8 m;
 	u8 n;
@@ -139,8 +161,9 @@ struct atyfb_par {
 	u16 lcd_hblank_len;
 	u16 lcd_vblank_len;
 #endif
+	int aux_app; /* auxiliary aperture */
 };
-    
+
     /*
      *  ATI Mach64 features
      */
diff -U 3 -H -d -p -r -- linux-2.6.4/drivers/video/aty/atyfb_base.c linux-2.6.alex/drivers/video/aty/atyfb_base.c
--- linux-2.6.4/drivers/video/aty/atyfb_base.c	2004-03-13 21:13:43.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/atyfb_base.c	2004-03-13 22:58:18.000000000 +0100
@@ -1208,11 +1208,11 @@ static int atyfb_set_par(struct fb_info 
 			aty_st_le32(BUS_CNTL, 0x680000f9, par);
 		} else if (M64_HAS(MOBIL_BUS)) {
 			aty_st_le32(DAC_CNTL, 0x80010102, par);
-			aty_st_le32(BUS_CNTL, 0x7b33a040, par);
+			aty_st_le32(BUS_CNTL, 0x7b33a040 | (par->aux_app ? BUS_APER_REG_DIS : 0), par);
 		} else {
 			/* GT */
 			aty_st_le32(DAC_CNTL, 0x86010102, par);
-			aty_st_le32(BUS_CNTL, 0x7b23a040, par);
+			aty_st_le32(BUS_CNTL, 0x7b23a040 | (par->aux_app ? BUS_APER_REG_DIS : 0), par);
 			aty_st_le32(EXT_MEM_CNTL, aty_ld_le32(EXT_MEM_CNTL, par) | 0x5000001, par);
 		}
 		aty_st_le32(MEM_CNTL, tmp, par);
@@ -1965,8 +1965,7 @@ static int __init aty_init(struct fb_inf
 	rev = (chip_id & CFG_CHIP_REV) >> 24;
 	for (j = 0; j < (sizeof(aty_chips) / sizeof(*aty_chips)); j++)
 		if (type == aty_chips[j].chip_type &&
-		    (rev & aty_chips[j].rev_mask) ==
-		    aty_chips[j].rev_val) {
+		    (rev & aty_chips[j].rev_mask) == aty_chips[j].rev_val) {
 			chipname = aty_chips[j].name;
 			pll = aty_chips[j].pll;
 			mclk = aty_chips[j].mclk;
@@ -2211,10 +2210,18 @@ static int __init aty_init(struct fb_inf
 	 *  the full 8 MB of video RAM on 8 MB boards
 	 */
 
-	if (info->fix.smem_len == 0x800000 ||
-	    (par->bus_type == ISA && info->fix.smem_len == 0x400000))
+	if (!par->aux_app &&
+		(info->fix.smem_len == 0x800000 || (par->bus_type == ISA && info->fix.smem_len == 0x400000)))
 		info->fix.smem_len -= GUI_RESERVE;
 
+	/*
+	 *  Disable register access through the linear aperture
+	 *  if the auxiliary aperture is used so we can access
+	 *  the full 8 MB of video RAM on 8 MB boards.
+	 */
+	if (par->aux_app)
+		aty_st_le32(BUS_CNTL, aty_ld_le32(BUS_CNTL, par) | BUS_APER_REG_DIS, par);
+
 	/* Clear the video memory */
 	fb_memset((void *) info->screen_base, 0, info->fix.smem_len);
 
@@ -2225,8 +2232,7 @@ static int __init aty_init(struct fb_inf
 #ifdef CONFIG_PMAC_BACKLIGHT
 	if (M64_HAS(G3_PB_1_1) && machine_is_compatible("PowerBook1,1")) {
 		/* these bits let the 101 powerbook wake up from sleep -- paulus */
-		aty_st_lcd(POWER_MANAGEMENT,
-			   aty_ld_lcd(POWER_MANAGEMENT, par)
+		aty_st_lcd(POWER_MANAGEMENT, aty_ld_lcd(POWER_MANAGEMENT, par)
 			   | (USE_F32KHZ | TRISTATE_MEM_EN), par);
 	} else if (M64_HAS(MOBIL_BUS))
 		register_backlight_controller(&aty_backlight_controller, info, "ati");
@@ -2732,18 +2738,28 @@ static int __devinit atyfb_setup_generic
 {
 	struct atyfb_par *par = info->par;
 	u16 tmp;
+	unsigned long raddr;
+	struct resource *rrp;
 #if defined(CONFIG_FB_ATY_GENERIC_LCD)
 	u32 driv_inf_tab, sig, rom_addr;
 	u16 lcd_ofs;
 #endif
 
-	info->fix.mmio_start = 0x7ff000 + addr;
+	raddr = addr + 0x7ff000UL;
+	rrp = &pdev->resource[2];
+	if ((rrp->flags & IORESOURCE_MEM) && request_mem_region(rrp->start, rrp->end - rrp->start + 1, "atyfb")) {
+		par->aux_app = 1;
+		raddr = rrp->start;
+		printk(KERN_INFO "atyfb: using auxiliary register aperture\n");
+	}
+
+	info->fix.mmio_start = raddr;
 	par->ati_regbase = (unsigned long)ioremap(info->fix.mmio_start, 0x1000);
 	if (par->ati_regbase == 0)
 		return -ENOMEM;
 
-	info->fix.mmio_start += 0xc00;
-	par->ati_regbase += 0xc00;
+	info->fix.mmio_start += par->aux_app ? 0x400 : 0xc00;
+	par->ati_regbase += par->aux_app ? 0x400 : 0xc00;
 
 	/*
 	 * Enable memory-space accesses using config-space

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH 3/7]
  2004-03-21 19:33 [PATCH 0/7] Bunch of patches Alexander Kern
  2004-03-21 19:37 ` [PATCH 1/7] Alexander Kern
  2004-03-21 19:37 ` [PATCH 2/7] Alexander Kern
@ 2004-03-21 19:38 ` Alexander Kern
  2004-03-21 19:38 ` [PATCH 4/7] Alexander Kern
                   ` (5 subsequent siblings)
  8 siblings, 0 replies; 16+ messages in thread
From: Alexander Kern @ 2004-03-21 19:38 UTC (permalink / raw)
  To: linux-fbdev-devel; +Cc: James Simmons

[-- Attachment #1: Type: text/plain, Size: 1 bytes --]



[-- Attachment #2: 03_mach64-chipset2.diff --]
[-- Type: text/x-diff, Size: 20523 bytes --]

diff -U 3 -H -d -I '*.o' -p -r -- linux-2.6.4/drivers/video/aty/ati_ids.h linux-2.6.alex/drivers/video/aty/ati_ids.h
--- linux-2.6.4/drivers/video/aty/ati_ids.h	2004-03-11 03:55:25.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/ati_ids.h	2004-03-18 18:34:33.000000000 +0100
@@ -64,6 +64,7 @@
 #define PCI_CHIP_MACH64LQ		0x4C51
 #define PCI_CHIP_MACH64LR		0x4C52
 #define PCI_CHIP_MACH64LS		0x4C53
+#define PCI_CHIP_MACH64LT		0x4C54
 #define PCI_CHIP_RADEON_LW		0x4C57
 #define PCI_CHIP_RADEON_LX		0x4C58
 #define PCI_CHIP_RADEON_LY		0x4C59
diff -U 3 -H -d -I '*.o' -p -r -- linux-2.6.4/drivers/video/aty/atyfb.h linux-2.6.alex/drivers/video/aty/atyfb.h
--- linux-2.6.4/drivers/video/aty/atyfb.h	2004-03-13 23:29:07.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/atyfb.h	2004-03-18 19:52:51.000000000 +0100
@@ -122,6 +122,7 @@ struct atyfb_par {
 	unsigned long clk_wr_offset; /* meaning overloaded, clock id by CT */
 	struct crtc crtc;
 	union aty_pll pll;
+	struct pll_info pll_limits;
 	u32 features;
 	u32 ref_clk_per;
 	u32 pll_per;
@@ -130,6 +131,7 @@ struct atyfb_par {
 	u8 bus_type;
 	u8 ram_type;
 	u8 mem_refresh_rate;
+	u16 pci_id;
 	u32 accel_flags;
 	int blitter_may_be_busy;
 	int asleep;
diff -U 3 -H -d -I '*.o' -p -r -- linux-2.6.4/drivers/video/aty/atyfb_base.c linux-2.6.alex/drivers/video/aty/atyfb_base.c
--- linux-2.6.4/drivers/video/aty/atyfb_base.c	2004-03-13 23:29:07.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/atyfb_base.c	2004-03-18 19:57:59.000000000 +0100
@@ -67,6 +67,7 @@
 
 #include <video/mach64.h>
 #include "atyfb.h"
+#include "ati_ids.h"
 
 #ifdef __powerpc__
 #include <asm/prom.h>
@@ -282,104 +283,154 @@ static unsigned long phys_size[FB_MAX] _
 static unsigned long phys_guiregbase[FB_MAX] __initdata = { 0, };
 #endif
 
-#ifdef CONFIG_FB_ATY_GX
-static char m64n_gx[] __initdata = "mach64GX (ATI888GX00)";
-static char m64n_cx[] __initdata = "mach64CX (ATI888CX00)";
-#endif /* CONFIG_FB_ATY_GX */
-#ifdef CONFIG_FB_ATY_CT
-static char m64n_ct[] __initdata = "mach64CT (ATI264CT)";
-static char m64n_et[] __initdata = "mach64ET (ATI264ET)";
-static char m64n_vta3[] __initdata = "mach64VTA3 (ATI264VT)";
-static char m64n_vta4[] __initdata = "mach64VTA4 (ATI264VT)";
-static char m64n_vtb[] __initdata = "mach64VTB (ATI264VTB)";
-static char m64n_vt4[] __initdata = "mach64VT4 (ATI264VT4)";
-static char m64n_gt[] __initdata = "3D RAGE (GT)";
-static char m64n_gtb[] __initdata = "3D RAGE II+ (GTB)";
-static char m64n_iic_p[] __initdata = "3D RAGE IIC (PCI)";
-static char m64n_iic_a[] __initdata = "3D RAGE IIC (AGP)";
-static char m64n_lt[] __initdata = "3D RAGE LT";
-static char m64n_ltg[] __initdata = "3D RAGE LT-G";
-static char m64n_gtc_ba[] __initdata = "3D RAGE PRO (BGA, AGP)";
-static char m64n_gtc_ba1[] __initdata = "3D RAGE PRO (BGA, AGP, 1x only)";
-static char m64n_gtc_bp[] __initdata = "3D RAGE PRO (BGA, PCI)";
-static char m64n_gtc_pp[] __initdata = "3D RAGE PRO (PQFP, PCI)";
-static char m64n_gtc_ppl[] __initdata = "3D RAGE PRO (PQFP, PCI, limited 3D)";
-static char m64n_xl_33[] __initdata = "3D RAGE (XL PCI-33MHz)";
-static char m64n_xl_66[] __initdata = "3D RAGE (XL PCI-66MHz)";
-static char m64n_ltp_a[] __initdata = "3D RAGE LT PRO (AGP)";
-static char m64n_ltp_p[] __initdata = "3D RAGE LT PRO (PCI)";
-static char m64n_mob_p[] __initdata = "3D RAGE Mobility P/M (AGP 2x)";
-static char m64n_mob_a[] __initdata = "3D RAGE Mobility L (AGP 2x)";
-#endif /* CONFIG_FB_ATY_CT */
+#define ATI_CHIP_88800GX (M64F_GX | M64F_NO_HW_TRIPLE)
+#define ATI_CHIP_88800CX ATI_CHIP_88800GX
+#define ATI_CHIP_264CT     (M64F_CT | M64F_INTEGRATED | M64F_CT_BUS | M64F_MAGIC_FIFO | M64F_NO_HW_TRIPLE)
+#define ATI_CHIP_264ET      ATI_CHIP_264CT
+
+#define ATI_CHIP_264VT     (M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_NO_HW_TRIPLE)
+#define ATI_CHIP_264VTA4   (ATI_CHIP_264VT | M64F_MAGIC_POSTDIV)
+#define ATI_CHIP_264GT     (M64F_GT | M64F_INTEGRATED               | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_NO_HW_TRIPLE | M64F_EXTRA_BRIGHT)
+#define ATI_CHIP_264VTB    (M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_GTB_DSP    | M64F_FIFO_24 | M64F_NO_HW_TRIPLE)
+#define ATI_CHIP_264GTB    (M64F_GT | M64F_INTEGRATED               | M64F_GTB_DSP    | M64F_FIFO_24 | M64F_NO_HW_TRIPLE | M64F_EXTRA_BRIGHT | M64F_SDRAM_MAGIC_PLL) 
+#define ATI_CHIP_264VT3    (ATI_CHIP_264VTB | M64F_SDRAM_MAGIC_PLL)
+/*#define ATI_CHIP_264GTDVD  ?*/
+#define ATI_CHIP_264LT     (M64F_GT | M64F_INTEGRATED               | M64F_GTB_DSP    | M64F_FIFO_24 | M64F_NO_HW_TRIPLE)
+#define ATI_CHIP_264LTG    (ATI_CHIP_264LT                                                           | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT)
+#define ATI_CHIP_264VT4    (M64F_VT | M64F_INTEGRATED               | M64F_GTB_DSP    | M64F_FIFO_24 | M64F_NO_HW_TRIPLE)
+#define ATI_CHIP_264GT2C   (M64F_GT | M64F_INTEGRATED               | M64F_GTB_DSP    | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT)
+#define ATI_CHIP_264GTPRO  (M64F_GT | M64F_INTEGRATED               | M64F_GTB_DSP                   | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_RESET_3D)
+#define ATI_CHIP_264LTPRO  (M64F_GT | M64F_INTEGRATED               | M64F_GTB_DSP                                          | M64F_EXTRA_BRIGHT | M64F_RESET_3D)
+#define ATI_CHIP_264XL     (ATI_CHIP_264GTPRO | M64F_XL_DLL | M64F_MFB_FORCE_4)
+#define ATI_CHIP_MOBILITY  (ATI_CHIP_264LTPRO | M64F_XL_DLL | M64F_MFB_FORCE_4 | M64F_MOBIL_BUS )
 
 static struct {
-	u16 pci_id, chip_type;
-	u8 rev_mask, rev_val;
+	u16 pci_id;
 	const char *name;
 	int pll, mclk, xclk;
 	u32 features;
 } aty_chips[] __initdata = {
 #ifdef CONFIG_FB_ATY_GX
 	/* Mach64 GX */
-	{ 0x4758, 0x00d7, 0x00, 0x00, m64n_gx, 135, 50, 50, M64F_GX | M64F_NO_HW_TRIPLE },
-	{ 0x4358, 0x0057, 0x00, 0x00, m64n_cx, 135, 50, 50, M64F_GX | M64F_NO_HW_TRIPLE },
+	{ PCI_CHIP_MACH64GX, "ATI888GX00 (Mach64 GX)", 135, 50, 50, ATI_CHIP_88800GX },
+	{ PCI_CHIP_MACH64CX, "ATI888CX00 (Mach64 CX)", 135, 50, 50, ATI_CHIP_88800CX },
 #endif /* CONFIG_FB_ATY_GX */
 
 #ifdef CONFIG_FB_ATY_CT
-	/* Mach64 CT */
-	{ 0x4354, 0x4354, 0x00, 0x00, m64n_ct, 135, 60, 60, M64F_CT | M64F_INTEGRATED | M64F_CT_BUS | M64F_MAGIC_FIFO | M64F_NO_HW_TRIPLE },
-	{ 0x4554, 0x4554, 0x00, 0x00, m64n_et, 135, 60, 60, M64F_CT | M64F_INTEGRATED | M64F_CT_BUS | M64F_MAGIC_FIFO | M64F_NO_HW_TRIPLE },
-
-	/* Mach64 VT */
-	{ 0x5654, 0x5654, 0xc7, 0x00, m64n_vta3, 170, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_NO_HW_TRIPLE },
-	{ 0x5654, 0x5654, 0xc7, 0x40, m64n_vta4, 200, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_NO_HW_TRIPLE | M64F_MAGIC_POSTDIV },
-	{ 0x5654, 0x5654, 0x00, 0x00, m64n_vtb, 200, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_GTB_DSP | M64F_FIFO_24 | M64F_NO_HW_TRIPLE },
-	{ 0x5655, 0x5655, 0x00, 0x00, m64n_vtb, 200, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_GTB_DSP | M64F_FIFO_24 | M64F_NO_HW_TRIPLE | M64F_SDRAM_MAGIC_PLL },
-	{ 0x5656, 0x5656, 0x00, 0x00, m64n_vt4, 230, 83, 83, M64F_VT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_NO_HW_TRIPLE },
-
-	/* Mach64 LT */
-	{ 0x4c54, 0x4c54, 0x00, 0x00, m64n_lt, 135, 63, 63, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_NO_HW_TRIPLE },
-	{ 0x4c47, 0x4c47, 0x00, 0x00, m64n_ltg, 230, 63, 63, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_LT_SLEEP | M64F_G3_PB_1024x768 | M64F_NO_HW_TRIPLE },
-
-	/* Mach64 GT (3D RAGE) */
-	{ 0x4754, 0x4754, 0x07, 0x00, m64n_gt, 135, 63, 63, M64F_GT | M64F_INTEGRATED | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_EXTRA_BRIGHT | M64F_NO_HW_TRIPLE },
-	{ 0x4754, 0x4754, 0x07, 0x01, m64n_gt, 170, 67, 67, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_NO_HW_TRIPLE },
-	{ 0x4754, 0x4754, 0x07, 0x02, m64n_gt, 200, 67, 67, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_NO_HW_TRIPLE },
-	{ 0x4755, 0x4755, 0x00, 0x00, m64n_gtb, 200, 67, 67, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_NO_HW_TRIPLE },
+	{ PCI_CHIP_MACH64CT, "ATI264CT (Mach64 CT)", 135, 60, 60, ATI_CHIP_264CT },
+	{ PCI_CHIP_MACH64ET, "ATI264ET (Mach64 ET)", 135, 60, 60, ATI_CHIP_264ET },
+	{ PCI_CHIP_MACH64VT, "ATI264VT? (Mach64 VT)", 170, 67, 67, ATI_CHIP_264VT },
+	{ PCI_CHIP_MACH64GT, "3D RAGE (Mach64 GT)", 135, 63, 63, ATI_CHIP_264GT },
+	/* FIXME { ...ATI_264GU, maybe ATI_CHIP_264GTDVD }, */
+	{ PCI_CHIP_MACH64GU, "3D RAGE II+ (Mach64 GTB)", 200, 67, 67, ATI_CHIP_264GTB  },
+	{ PCI_CHIP_MACH64VU, "ATI264VTB (Mach64 VU)", 200, 67, 67, ATI_CHIP_264VT3 },
 
-	/* Mach64 RAGE 3D IIc, first chip with hardware tripple */
-	{ 0x4756, 0x4756, 0x00, 0x00, m64n_iic_p, 230, 83, 83, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-	{ 0x4757, 0x4757, 0x00, 0x00, m64n_iic_a, 230, 83, 83, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-	{ 0x4759, 0x4759, 0x00, 0x00, m64n_iic_p, 230, 83, 83, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-	{ 0x475a, 0x475a, 0x00, 0x00, m64n_iic_a, 230, 83, 83, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
+	{ PCI_CHIP_MACH64LT, "3D RAGE LT (Mach64 LT)", 135, 63, 63, ATI_CHIP_264LT },
+	 /* FIXME chipset maybe ATI_CHIP_264LTPRO ? */
+	{ PCI_CHIP_MACH64LG, "3D RAGE LT-G (Mach64 LG)", 230, 63, 63, ATI_CHIP_264LTG | M64F_LT_SLEEP | M64F_G3_PB_1024x768 },
 
-	/* Mach64 GTC (3D RAGE PRO) */
-	{ 0x4742, 0x4742, 0x00, 0x00, m64n_gtc_ba, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-	{ 0x4744, 0x4744, 0x00, 0x00, m64n_gtc_ba1, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-	{ 0x4749, 0x4749, 0x00, 0x00, m64n_gtc_bp, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_MAGIC_VRAM_SIZE },
-	{ 0x4750, 0x4750, 0x00, 0x00, m64n_gtc_pp, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-	{ 0x4751, 0x4751, 0x00, 0x00, m64n_gtc_ppl, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
+	{ PCI_CHIP_MACH64VV, "ATI264VT4 (Mach64 VV)", 230, 83, 83, ATI_CHIP_264VT4 },
 
+	{ PCI_CHIP_MACH64GV, "3D RAGE IIC (Mach64 GV, PCI)", 230, 83, 83, ATI_CHIP_264GT2C },
+	{ PCI_CHIP_MACH64GW, "3D RAGE IIC (Mach64 GW, AGP)", 230, 83, 83, ATI_CHIP_264GT2C },
+	{ PCI_CHIP_MACH64GY, "3D RAGE IIC (Mach64 GY, PCI)", 230, 83, 83, ATI_CHIP_264GT2C },
+	{ PCI_CHIP_MACH64GZ, "3D RAGE IIC (Mach64 GZ, AGP)", 230, 83, 83, ATI_CHIP_264GT2C },
 
-	/* 3D RAGE XL Unknown model */
-	{ 0x474d, 0x474d, 0x00, 0x00, m64n_xl_66, 230, 83, 63, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_XL_DLL | M64F_MFB_FORCE_4 },
-	/* 3D RAGE XL PCI-66/BGA */
-	{ 0x474f, 0x474f, 0x00, 0x00, m64n_xl_66, 230, 83, 63, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_XL_DLL | M64F_MFB_FORCE_4 },
-	/* 3D RAGE XL PCI-33/BGA */
-	{ 0x4752, 0x4752, 0x00, 0x00, m64n_xl_33, 230, 83, 63, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_XL_DLL | M64F_MFB_FORCE_4 },
+	{ PCI_CHIP_MACH64GB, "3D RAGE PRO (Mach64 GB, BGA, AGP)", 230, 100, 100, ATI_CHIP_264GTPRO },
+	{ PCI_CHIP_MACH64GD, "3D RAGE PRO (Mach64 GD, BGA, AGP 1x)", 230, 100, 100, ATI_CHIP_264GTPRO },
+	{ PCI_CHIP_MACH64GI, "3D RAGE PRO (Mach64 GI, BGA, PCI)", 230, 100, 100, ATI_CHIP_264GTPRO | M64F_MAGIC_VRAM_SIZE },
+	{ PCI_CHIP_MACH64GP, "3D RAGE PRO (Mach64 GP, PQFP, PCI)", 230, 100, 100, ATI_CHIP_264GTPRO },
+	{ PCI_CHIP_MACH64GQ, "3D RAGE PRO (Mach64 GQ, PQFP, PCI, limited 3D)", 230, 100, 100, ATI_CHIP_264GTPRO },
+	
+	{ PCI_CHIP_MACH64LB, "3D RAGE LT PRO (Mach64 LB, AGP)", 236, 75, 100, ATI_CHIP_264LTPRO },
+	{ PCI_CHIP_MACH64LD, "3D RAGE LT PRO (Mach64 LD, AGP)", 230, 100, 100, ATI_CHIP_264LTPRO },
+	{ PCI_CHIP_MACH64LI, "3D RAGE LT PRO (Mach64 LI, PCI)", 230, 100, 100, ATI_CHIP_264LTPRO | M64F_G3_PB_1_1 | M64F_G3_PB_1024x768 },
+	{ PCI_CHIP_MACH64LP, "3D RAGE LT PRO (Mach64 LP, PCI)", 230, 100, 100, ATI_CHIP_264LTPRO },
+	{ PCI_CHIP_MACH64LQ, "3D RAGE LT PRO (Mach64 LQ, PCI)", 230, 100, 100, ATI_CHIP_264LTPRO },
 
-	/* Mach64 LT PRO */
-	{ 0x4c42, 0x4c42, 0x00, 0x00, m64n_ltp_a, 236, 75, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_EXTRA_BRIGHT },
-	{ 0x4c44, 0x4c44, 0x00, 0x00, m64n_ltp_p, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_EXTRA_BRIGHT },
-	{ 0x4c49, 0x4c49, 0x00, 0x00, m64n_ltp_p, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_EXTRA_BRIGHT | M64F_G3_PB_1_1 | M64F_G3_PB_1024x768 },
-	{ 0x4c50, 0x4c50, 0x00, 0x00, m64n_ltp_p, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_EXTRA_BRIGHT },
+	{ PCI_CHIP_MACH64GM, "3D RAGE XL (Mach64 GM, AGP)", 230, 83, 63, ATI_CHIP_264XL },
+	{ PCI_CHIP_MACH64GN, "3D RAGE XL (Mach64 GN, AGP)", 230, 83, 63, ATI_CHIP_264XL },
+	{ PCI_CHIP_MACH64GO, "3D RAGE XL (Mach64 GO, PCI-66/BGA)", 230, 83, 63, ATI_CHIP_264XL },
+	{ PCI_CHIP_MACH64GR, "3D RAGE XL (Mach64 GR, PCI-33MHz)", 230, 83, 63, ATI_CHIP_264XL },
+	{ PCI_CHIP_MACH64GL, "3D RAGE XL (Mach64 GL, PCI)", 230, 83, 63, ATI_CHIP_264XL },
+	{ PCI_CHIP_MACH64GS, "3D RAGE XL (Mach64 GS, PCI)", 230, 83, 63, ATI_CHIP_264XL },
 
-	/* 3D RAGE Mobility */
-	{ 0x4c4d, 0x4c4d, 0x00, 0x00, m64n_mob_p, 230, 83, 125, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_MOBIL_BUS | M64F_XL_DLL | M64F_EXTRA_BRIGHT | M64F_MFB_FORCE_4 },
-	{ 0x4c4e, 0x4c4e, 0x00, 0x00, m64n_mob_a, 230, 83, 125, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_MOBIL_BUS | M64F_MFB_FORCE_4 },
+	{ PCI_CHIP_MACH64LM, "3D RAGE Mobility P/M (Mach64 LM, AGP 2x)", 230, 83, 125, ATI_CHIP_MOBILITY },
+	{ PCI_CHIP_MACH64LN, "3D RAGE Mobility (Mach64 LN, AGP 2x)", 230, 83, 125, ATI_CHIP_MOBILITY },
+	{ PCI_CHIP_MACH64LR, "3D RAGE Mobility (Mach64 LR, PCI)", 230, 83, 125, ATI_CHIP_MOBILITY },
+	{ PCI_CHIP_MACH64LS, "3D RAGE Mobility (Mach64 LS, PCI)", 230, 83, 125, ATI_CHIP_MOBILITY },
 #endif /* CONFIG_FB_ATY_CT */
 };
 
+/* can not fail */
+static void __devinit correct_chipset(int i, struct atyfb_par *par)
+{
+	u8 rev;
+	u16 type;
+	u32 chip_id;
+	const char *name;
+
+	name = aty_chips[i].name;
+	par->pll_limits.pll_max = aty_chips[i].pll;
+	par->pll_limits.mclk = aty_chips[i].mclk;
+	par->pll_limits.xclk = aty_chips[i].xclk;
+	par->features = aty_chips[i].features;
+	par->pci_id = aty_chips[i].pci_id;
+	
+	chip_id = aty_ld_le32(CONFIG_CHIP_ID, par);
+	type = chip_id & CFG_CHIP_TYPE;
+	rev = (chip_id & CFG_CHIP_REV) >> 24;
+	switch(aty_chips[i].pci_id) {
+#ifdef CONFIG_FB_ATY_GX
+	case PCI_CHIP_MACH64GX:
+		assert(type == 0x00d7);
+		break;
+	case PCI_CHIP_MACH64CX:
+		assert(type == 0x0057);
+		break;
+#endif
+#ifdef CONFIG_FB_ATY_CT
+	case PCI_CHIP_MACH64VT:
+		rev &= 0xc7;
+		if(rev == 0x00) {
+			name = "ATI264VTA3 (Mach64 VT)";
+			par->pll_limits.pll_max = 170;
+			par->pll_limits.mclk = 67;
+			par->pll_limits.xclk = 67;
+			par->features = ATI_CHIP_264VT;
+		} else if(rev == 0x40) {
+			name = "ATI264VTA4 (Mach64 VT)";
+			par->pll_limits.pll_max = 200;
+			par->pll_limits.mclk = 67;
+			par->pll_limits.xclk = 67;
+			par->features = ATI_CHIP_264VTA4;
+		} else {
+			name = "ATI264VTB (Mach64 VT)";
+			par->pll_limits.pll_max = 200;
+			par->pll_limits.mclk = 67;
+			par->pll_limits.xclk = 67;
+			par->features = ATI_CHIP_264VTB;
+		} 
+		break;
+	case PCI_CHIP_MACH64GT:
+		rev &= 0x07;
+		if(rev == 0x01) {
+			par->pll_limits.pll_max = 170;
+			par->pll_limits.mclk = 67;
+			par->pll_limits.xclk = 67;
+			par->features = ATI_CHIP_264GTB;
+		} else if(rev == 0x02) {
+			par->pll_limits.pll_max = 200;
+			par->pll_limits.mclk = 67;
+			par->pll_limits.xclk = 67;
+			par->features = ATI_CHIP_264GTB;
+		}
+		break;
+#endif
+	}
+
+	printk("atyfb: %s [0x%04x rev 0x%02x] ", name, type, rev);
+}
 
 static char ram_dram[] __initdata = "DRAM";
 static char ram_resv[] __initdata = "RESV";
@@ -1912,7 +1963,7 @@ static struct backlight_controller aty_b
 };
 #endif /* CONFIG_PMAC_BACKLIGHT */
 
-static void __init aty_calc_mem_refresh(struct atyfb_par *par, u16 id, int xclk)
+static void __init aty_calc_mem_refresh(struct atyfb_par *par, int xclk)
 {
 	const int ragepro_tbl[] = {
 		44, 50, 55, 66, 75, 80, 100
@@ -1924,7 +1975,7 @@ static void __init aty_calc_mem_refresh(
 	const int *refresh_tbl;
 	int i, size;
 
-	if (IS_XL(id)) {
+	if (IS_XL(par->pci_id)) {
 		refresh_tbl = ragexl_tbl;
 		size = sizeof(ragexl_tbl)/sizeof(int);
 	} else {
@@ -1948,48 +1999,29 @@ static struct fb_info *fb_list = NULL;
 static int __init aty_init(struct fb_info *info, const char *name)
 {
 	struct atyfb_par *par = (struct atyfb_par *) info->par;
-	const char *chipname = NULL, *ramname = NULL, *xtal;
-	int pll, mclk, xclk, gtb_memsize, j;
+	const char *ramname = NULL, *xtal;
+	int gtb_memsize;
 	struct fb_var_screeninfo var;
-	u8 pll_ref_div, rev;
-	u32 chip_id, i;
-	u16 type;
+	u8 pll_ref_div;
+	u32 i;
 #if defined(CONFIG_PPC)
 	int sense;
 #endif
 
 	par->aty_cmap_regs =
 	    (struct aty_cmap_regs *) (par->ati_regbase + 0xc0);
-	chip_id = aty_ld_le32(CONFIG_CHIP_ID, par);
-	type = chip_id & CFG_CHIP_TYPE;
-	rev = (chip_id & CFG_CHIP_REV) >> 24;
-	for (j = 0; j < (sizeof(aty_chips) / sizeof(*aty_chips)); j++)
-		if (type == aty_chips[j].chip_type &&
-		    (rev & aty_chips[j].rev_mask) == aty_chips[j].rev_val) {
-			chipname = aty_chips[j].name;
-			pll = aty_chips[j].pll;
-			mclk = aty_chips[j].mclk;
-			xclk = aty_chips[j].xclk;
-			par->features = aty_chips[j].features;
-			goto found;
-		}
-	printk("atyfb: Unknown mach64 0x%04x rev 0x%04x\n", type, rev);
-	return 0;
-
-      found:
-	printk("atyfb: %s [0x%04x rev 0x%02x] ", chipname, type, rev);
 
 	if (default_pll)
-		pll = default_pll;
+		par->pll_limits.pll_max = default_pll;
 	if (default_mclk)
-		mclk = default_mclk;
+		par->pll_limits.mclk = default_mclk;
 	if (default_xclk)
-		xclk = default_xclk;
+		par->pll_limits.xclk = default_xclk;
 
-	aty_calc_mem_refresh(par, type, xclk);
-	par->pll_per = 1000000/pll;
-	par->mclk_per = 1000000/mclk;
-	par->xclk_per = 1000000/xclk;
+	aty_calc_mem_refresh(par, par->pll_limits.xclk);
+	par->pll_per = 1000000/par->pll_limits.pll_max;
+	par->mclk_per = 1000000/par->pll_limits.mclk;
+	par->xclk_per = 1000000/par->pll_limits.xclk;
 
 	par->ref_clk_per = 1000000000000ULL / 14318180;
 	xtal = "14.31818";
@@ -2065,15 +2097,15 @@ static int __init aty_init(struct fb_inf
 		ramname = aty_ct_ram[par->ram_type];
 
 		/* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
-		if (mclk == 67 && par->ram_type < SDRAM)
-			mclk = 63;
+		if (par->pll_limits.mclk == 67 && par->ram_type < SDRAM)
+			par->pll_limits.mclk = 63;
 	}
 
 	if (M64_HAS(GTB_DSP)
 	    && (pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par))) {
 		int diff1, diff2;
-		diff1 = 510 * 14 / pll_ref_div - pll;
-		diff2 = 510 * 29 / pll_ref_div - pll;
+		diff1 = 510 * 14 / pll_ref_div - par->pll_limits.pll_max;
+		diff2 = 510 * 29 / pll_ref_div - par->pll_limits.pll_max;
 		if (diff1 < 0)
 			diff1 = -diff1;
 		if (diff2 < 0)
@@ -2182,8 +2214,8 @@ static int __init aty_init(struct fb_inf
 
 	printk("%d%c %s, %s MHz XTAL, %d MHz PLL, %d Mhz MCLK, %d MHz XCLK\n",
 	       info->fix.smem_len == 0x80000 ? 512 : (info->fix.smem_len >> 20),
-	       info->fix.smem_len == 0x80000 ? 'K' : 'M', ramname, xtal, pll,
-	       mclk, xclk);
+	       info->fix.smem_len == 0x80000 ? 'K' : 'M', ramname, xtal, par->pll_limits.pll_max,
+	       par->pll_limits.mclk, par->pll_limits.xclk);
 
 #if defined(DEBUG) && defined(CONFIG_ATY_CT)
 	if (M64_HAS(INTEGRATED)) {
@@ -3105,6 +3137,9 @@ static int __devinit atyfb_pci_probe(str
 		goto err_free;
 	}
 
+	/* set default Values aus pci_table */
+	correct_chipset(i, par);
+
 	/* Setup "info" structure */
 #ifdef __sparc__
 	rc = atyfb_setup_sparc(pdev, info, addr);


^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH 4/7]
  2004-03-21 19:33 [PATCH 0/7] Bunch of patches Alexander Kern
                   ` (2 preceding siblings ...)
  2004-03-21 19:38 ` [PATCH 3/7] Alexander Kern
@ 2004-03-21 19:38 ` Alexander Kern
  2004-03-21 19:38 ` [PATCH 5/7] Alexander Kern
                   ` (4 subsequent siblings)
  8 siblings, 0 replies; 16+ messages in thread
From: Alexander Kern @ 2004-03-21 19:38 UTC (permalink / raw)
  To: linux-fbdev-devel; +Cc: James Simmons

[-- Attachment #1: Type: text/plain, Size: 1 bytes --]



[-- Attachment #2: 04_mach64-bios.diff --]
[-- Type: text/x-diff, Size: 14883 bytes --]

diff -U 3 -H -d -I '*.o' -p -r -- linux-2.6.4/drivers/video/aty/atyfb_base.c linux-2.6.alex/drivers/video/aty/atyfb_base.c
--- linux-2.6.4/drivers/video/aty/atyfb_base.c	2004-03-18 20:02:44.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/atyfb_base.c	2004-03-18 20:12:51.000000000 +0100
@@ -2766,124 +2766,33 @@ static int __devinit atyfb_setup_sparc(s
 
 #else /* __sparc__ */
 
-static int __devinit atyfb_setup_generic(struct pci_dev *pdev, struct fb_info *info, unsigned long addr)
+#ifdef CONFIG_FB_ATY_GENERIC_LCD
+void aty_init_lcd(struct atyfb_par *par, u32 bios_base)
 {
-	struct atyfb_par *par = info->par;
-	u16 tmp;
-	unsigned long raddr;
-	struct resource *rrp;
-#if defined(CONFIG_FB_ATY_GENERIC_LCD)
-	u32 driv_inf_tab, sig, rom_addr;
+	u32 driv_inf_tab, sig;
 	u16 lcd_ofs;
-#endif
-
-	raddr = addr + 0x7ff000UL;
-	rrp = &pdev->resource[2];
-	if ((rrp->flags & IORESOURCE_MEM) && request_mem_region(rrp->start, rrp->end - rrp->start + 1, "atyfb")) {
-		par->aux_app = 1;
-		raddr = rrp->start;
-		printk(KERN_INFO "atyfb: using auxiliary register aperture\n");
-	}
-
-	info->fix.mmio_start = raddr;
-	par->ati_regbase = (unsigned long)ioremap(info->fix.mmio_start, 0x1000);
-	if (par->ati_regbase == 0)
-		return -ENOMEM;
-
-	info->fix.mmio_start += par->aux_app ? 0x400 : 0xc00;
-	par->ati_regbase += par->aux_app ? 0x400 : 0xc00;
-
-	/*
-	 * Enable memory-space accesses using config-space
-	 * command register.
-	 */
-	pci_read_config_word(pdev, PCI_COMMAND, &tmp);
-	if (!(tmp & PCI_COMMAND_MEMORY)) {
-		tmp |= PCI_COMMAND_MEMORY;
-		pci_write_config_word(pdev, PCI_COMMAND, tmp);
-	}
-#ifdef __BIG_ENDIAN
-	/* Use the big-endian aperture */
-	addr += 0x800000;
-#endif
-
-	/* Map in frame buffer */
-	info->fix.smem_start = addr;
-	info->screen_base = (char *)ioremap(addr, 0x800000);
-	if (info->screen_base == NULL) {
-		iounmap((void *)par->ati_regbase);
-		par->ati_regbase = 0;
-		return -ENOMEM;
-	}
-
-#ifdef CONFIG_FB_ATY_GENERIC_LCD
+	
 	/* To support an LCD panel, we should know it's dimensions and
-	 * it's desired pixel clock.
+	 *  it's desired pixel clock.
 	 * There are two ways to do it:
-	 * - Check the startup video mode and calculate the panel
-	 *   size from it. This is unreliable.
-	 * - Read it from the driver information table in the video BIOS, that
-	 *   works only on x86
-	 *
-	 * So, we try to find a BIOS and get access to it.
-	 */
-	rom_addr = 0xc0000 + ((aty_ld_le32(SCRATCH_REG1, par) & 0x7f) << 11);
-	par->bios_base_phys = rom_addr;
-	par->bios_base = (unsigned long)ioremap(rom_addr, 0x10000);
-
-	/* The BIOS starts with 0xaa55. */
-	if (*((u16 *)par->bios_base) == 0xaa55) {
-		printk(KERN_INFO "atyfb: Mach64 BIOS is located at %x, mapped at %x.\n",
-		       (u32)par->bios_base_phys, (u32)par->bios_base);
-
-		/* check for frequncy table */
-		if (1) {
-			u8 *bios_ptr;
-			u16 rom_table_offset, freq_table_offset, XCLK_pwd, XCLK_dram, XCLK_vram, ref_freq, ref_divider, sclk;
-			u32 min_freq, max_freq;
-
-			bios_ptr = (u8*)par->bios_base;
-			rom_table_offset = (u16)(bios_ptr[0x48] | (bios_ptr[0x49] << 8));
-			printk(KERN_INFO "atyfb: rom table offset is %d\n", rom_table_offset);
-
-			freq_table_offset = bios_ptr[rom_table_offset + 16] | (bios_ptr[rom_table_offset + 17] << 8);
-			printk(KERN_INFO "atyfb: frequency table offset is %d\n", freq_table_offset);
-
-			min_freq = bios_ptr[freq_table_offset + 2] | (bios_ptr[freq_table_offset + 3] << 8);
-			max_freq = bios_ptr[freq_table_offset + 4] | (bios_ptr[freq_table_offset + 5] << 8);
-			ref_freq = bios_ptr[freq_table_offset + 8] | (bios_ptr[freq_table_offset + 9] << 8);
-			ref_divider = bios_ptr[freq_table_offset + 10] | (bios_ptr[freq_table_offset + 11] << 8);
-
-			XCLK_pwd = bios_ptr[freq_table_offset + 14] | (bios_ptr[freq_table_offset + 15] << 8);
-			XCLK_dram = bios_ptr[freq_table_offset + 16] | (bios_ptr[freq_table_offset + 17] << 8);
-			XCLK_vram = bios_ptr[freq_table_offset + 18] | (bios_ptr[freq_table_offset + 19] << 8);
-			sclk = bios_ptr[freq_table_offset + 20] | (bios_ptr[freq_table_offset + 21] << 8);
-
-			printk(KERN_INFO "atyfb: BIOS frequency table:\n");
-			printk(KERN_INFO "       XCLK_pwd %d, XCLK_dram %d, XCLK_vram %d\n", XCLK_pwd, XCLK_dram, XCLK_vram);
-			printk(KERN_INFO "       ref_clk %d, ref_divider %d\n", ref_freq, ref_divider);
-			printk(KERN_INFO "       vpll_min %d, vpll_max %d\n", min_freq, max_freq);
-			printk(KERN_INFO "       sclk %d\n", sclk);
-
-			par->ref_clk_per = 100000000UL / ref_freq;
-			par->xclk_per  = 100000000UL / XCLK_vram;
-			par->pll_per = 100000000UL / max_freq;
-		}
-
-		/* Address of driver information table is at offset 0x78. */
-		driv_inf_tab = par->bios_base + *((u16 *)(par->bios_base+0x78));
-
-		/* Check for the driver information table signature. */
-		sig = (*(u32 *)driv_inf_tab);
-		if ((sig == 0x54504c24) || /* Rage LT pro */
-		    (sig == 0x544d5224) || /* Rage mobility */
-		    (sig == 0x54435824) || /* Rage XC */
-		    (sig == 0x544c5824)) { /* Rage XL */
-			printk(KERN_INFO "atyfb: BIOS contains driver information table.\n");
-			lcd_ofs = (*(u16 *)(driv_inf_tab + 10));
-			par->lcd_table = 0;
-			if (lcd_ofs != 0)
-				par->lcd_table = par->bios_base + lcd_ofs;
+	 *  - Check the startup video mode and calculate the panel
+	 *    size from it. This is unreliable.
+	 *  - Read it from the driver information table in the video BIOS.
+	*/
+	/* Address of driver information table is at offset 0x78. */
+	driv_inf_tab = bios_base + *((u16 *)(bios_base+0x78));
+	
+	/* Check for the driver information table signature. */
+	sig = (*(u32 *)driv_inf_tab);
+	if ((sig == 0x54504c24) || /* Rage LT pro */
+		(sig == 0x544d5224) || /* Rage mobility */
+		(sig == 0x54435824) || /* Rage XC */
+		(sig == 0x544c5824)) { /* Rage XL */
+		printk(KERN_INFO "atyfb: BIOS contains driver information table.\n");
+		lcd_ofs = (*(u16 *)(driv_inf_tab + 10));
+		par->lcd_table = 0;
+		if (lcd_ofs != 0) {
+			par->lcd_table = bios_base + lcd_ofs;
 		}
 	}
 
@@ -2900,7 +2809,6 @@ static int __devinit atyfb_setup_generic
 		u16 *lcdmodeptr;
 		u32 format;
 		u8 lcd_refresh_rates[16] = {50,56,60,67,70,72,75,76,85,90,100,120,140,150,160,200};
-
 		/* The most important information is the panel size at
 		 * offset 25 and 27, but there's some other nice information
 		 * which we print to the screen.
@@ -2908,7 +2816,7 @@ static int __devinit atyfb_setup_generic
 		id = *(u8 *)par->lcd_table;
 		strncpy(model,(char *)par->lcd_table+1,24);
 		model[23]=0;
-
+	
 		width = par->lcd_width = *(u16 *)(par->lcd_table+25);
 		height = par->lcd_height = *(u16 *)(par->lcd_table+27);
 		panel_type = *(u16 *)(par->lcd_table+29);
@@ -2980,7 +2888,7 @@ static int __devinit atyfb_setup_generic
 			}
 		}
 		printk(KERN_INFO "atyfb: %s%s %s monitor detected: %s\n        id=%d, %dx%d pixels, %s\n",
-		       txtdual ,txtcolour, txtmonitor, model, id, width, height, txtformat);
+			txtdual ,txtcolour, txtmonitor, model, id, width, height, txtformat);
 		refresh_rates_buf[0] = 0;
 		refresh_rates = *(u16 *)(par->lcd_table+62);
 		m = 1;
@@ -2999,14 +2907,13 @@ static int __devinit atyfb_setup_generic
 		}
 		default_refresh_rate = (*(u8 *)(par->lcd_table+61) & 0xf0) >> 4;
 		printk(KERN_INFO "        supports refresh rates [%s], default %d Hz\n",
-		       refresh_rates_buf, lcd_refresh_rates[default_refresh_rate]);
+			refresh_rates_buf, lcd_refresh_rates[default_refresh_rate]);
 		par->lcd_refreshrate = lcd_refresh_rates[default_refresh_rate];
-
 		/* We now need to determine the crtc parameters for the
 		 * lcd monitor. This is tricky, because they are not stored
 		 * individually in the BIOS. Instead, the BIOS contains a
 		 * table of display modes that work for this monitor.
-		 *  
+		 *
 		 * The idea is that we search for a mode of the same dimensions
 		 * as the dimensions of the lcd monitor. Say our lcd monitor
 		 * is 800x600 pixels, we search for a 800x600 monitor.
@@ -3017,11 +2924,11 @@ static int __devinit atyfb_setup_generic
 		while (*lcdmodeptr != 0) {
 			u32 modeptr;
 			u16 mwidth, mheight, lcd_hsync_start, lcd_vsync_start;
-			modeptr = par->bios_base + *lcdmodeptr;
-
+			modeptr = bios_base + *lcdmodeptr;
+	
 			mwidth = *((u16 *)(modeptr+0));
 			mheight = *((u16 *)(modeptr+2));
-
+	
 			if (mwidth == width && mheight == height) {
 				par->lcd_pixclock = 100000000 / *((u16 *)(modeptr+9));
 				par->lcd_htotal = *((u16 *)(modeptr+17)) & 511;
@@ -3029,26 +2936,28 @@ static int __devinit atyfb_setup_generic
 				lcd_hsync_start = *((u16 *)(modeptr+21)) & 511;
 				par->lcd_hsync_dly = (*((u16 *)(modeptr+21)) >> 9) & 7;
 				par->lcd_hsync_len = *((u8 *)(modeptr+23)) & 63;
+	
 				par->lcd_vtotal = *((u16 *)(modeptr+24)) & 2047;
 				par->lcd_vdisp = *((u16 *)(modeptr+26)) & 2047;
 				lcd_vsync_start = *((u16 *)(modeptr+28)) & 2047;
 				par->lcd_vsync_len = (*((u16 *)(modeptr+28)) >> 11) & 31;
+	
 				par->lcd_htotal = (par->lcd_htotal + 1) * 8;
 				par->lcd_hdisp = (par->lcd_hdisp + 1) * 8;
 				lcd_hsync_start = (lcd_hsync_start + 1) * 8;
 				par->lcd_hsync_len = par->lcd_hsync_len * 8;
-
+	
 				par->lcd_vtotal++;
 				par->lcd_vdisp++;
 				lcd_vsync_start++;
-				
+	
 				par->lcd_right_margin = lcd_hsync_start - par->lcd_hdisp;
 				par->lcd_lower_margin = lcd_vsync_start - par->lcd_vdisp;
 				par->lcd_hblank_len = par->lcd_htotal - par->lcd_hdisp;
 				par->lcd_vblank_len = par->lcd_vtotal - par->lcd_vdisp;
 				break;
 			}
-
+	
 			lcdmodeptr++;
 		}
 		if (*lcdmodeptr == 0) {
@@ -3056,29 +2965,133 @@ static int __devinit atyfb_setup_generic
 			/* To do: Switch to CRT if possible. */
 		} else {
 			printk(KERN_INFO "        LCD CRTC parameters: %d.%d  %d %d %d %d  %d %d %d %d\n",
-			       1000000 / par->lcd_pixclock, 1000000 % par->lcd_pixclock,
-			       par->lcd_hdisp,
-			       par->lcd_hdisp + par->lcd_right_margin,
-			       par->lcd_hdisp + par->lcd_right_margin + par->lcd_hsync_dly + par->lcd_hsync_len,
-			       par->lcd_htotal,
-			       par->lcd_vdisp,
-			       par->lcd_vdisp + par->lcd_lower_margin,
-			       par->lcd_vdisp + par->lcd_lower_margin + par->lcd_vsync_len,
-			       par->lcd_vtotal);
+				1000000 / par->lcd_pixclock, 1000000 % par->lcd_pixclock,
+				par->lcd_hdisp,
+				par->lcd_hdisp + par->lcd_right_margin,
+				par->lcd_hdisp + par->lcd_right_margin
+					+ par->lcd_hsync_dly + par->lcd_hsync_len,
+				par->lcd_htotal,
+				par->lcd_vdisp,
+				par->lcd_vdisp + par->lcd_lower_margin,
+				par->lcd_vdisp + par->lcd_lower_margin + par->lcd_vsync_len,
+				par->lcd_vtotal);
 			printk(KERN_INFO "                           : %d %d %d %d %d %d %d %d %d\n",
-			       par->lcd_pixclock,
-			       par->lcd_hblank_len - (par->lcd_right_margin + par->lcd_hsync_dly + par->lcd_hsync_len),
-			       par->lcd_hdisp,
-			       par->lcd_right_margin,
-			       par->lcd_hsync_len,
-			       par->lcd_vblank_len - (par->lcd_lower_margin + par->lcd_vsync_len),
-			       par->lcd_vdisp,
-			       par->lcd_lower_margin,
-			       par->lcd_vsync_len);
+				par->lcd_pixclock,
+				par->lcd_hblank_len - (par->lcd_right_margin +
+					par->lcd_hsync_dly + par->lcd_hsync_len),
+				par->lcd_hdisp,
+				par->lcd_right_margin,
+				par->lcd_hsync_len,
+				par->lcd_vblank_len - (par->lcd_lower_margin + par->lcd_vsync_len),
+				par->lcd_vdisp,
+				par->lcd_lower_margin,
+				par->lcd_vsync_len);
 		}
 	}
+}
 #endif /* CONFIG_FB_ATY_GENERIC_LCD */
 
+static int __devinit init_from_bios(struct atyfb_par *par)
+{
+	u32 bios_base, rom_addr;
+	int ret;
+
+	rom_addr = 0xc0000 + ((aty_ld_le32(SCRATCH_REG1, par) & 0x7f) << 11);
+	bios_base = (unsigned long)ioremap(rom_addr, 0x10000);
+
+	/* The BIOS starts with 0xaa55. */
+	if (*((u16 *)bios_base) == 0xaa55) {
+
+		u8 *bios_ptr;
+		u16 rom_table_offset, freq_table_offset;
+		PLL_BLOCK_MACH64 pll_block;
+		
+		printk(KERN_INFO "atyfb: Mach64 BIOS is located at %x, mapped at %x.\n", rom_addr, bios_base);
+
+		/* check for frequncy table */
+		bios_ptr = (u8*)bios_base;
+		rom_table_offset = (u16)(bios_ptr[0x48] | (bios_ptr[0x49] << 8));
+		freq_table_offset = bios_ptr[rom_table_offset + 16] | (bios_ptr[rom_table_offset + 17] << 8);
+		memcpy(&pll_block, bios_ptr + freq_table_offset, sizeof(PLL_BLOCK_MACH64));
+
+		printk(KERN_INFO "atyfb: BIOS frequency table:\n");
+		printk(KERN_INFO " PCLK_min_freq %d, PCLK_max_freq %d, ref_freq %d, ref_divider %d\n",
+			pll_block.PCLK_min_freq, pll_block.PCLK_max_freq,
+			pll_block.ref_freq, pll_block.ref_divider);
+		printk(KERN_INFO " MCLK_pwd %d, MCLK_max_freq %d, XCLK_max_freq %d, SCLK_freq %d\n",
+			pll_block.MCLK_pwd, pll_block.MCLK_max_freq,
+			pll_block.XCLK_max_freq, pll_block.SCLK_freq);
+
+		par->pll_limits.pll_min = pll_block.PCLK_min_freq/100;
+		par->pll_limits.pll_max = pll_block.PCLK_max_freq/100;
+		par->pll_limits.ref_clk = pll_block.ref_freq/100;
+		par->pll_limits.ref_div = pll_block.ref_divider;
+		par->pll_limits.sclk = pll_block.SCLK_freq/100;
+		par->pll_limits.mclk = pll_block.MCLK_max_freq/100;
+		par->pll_limits.mclk_pm = pll_block.MCLK_pwd/100;
+		par->pll_limits.xclk = pll_block.XCLK_max_freq/100;
+#ifdef CONFIG_FB_ATY_GENERIC_LCD
+		aty_init_lcd(par, bios_base);
+#endif
+		ret = 0;
+	} else {
+		printk(KERN_CRIT "atyfb: no BIOS frequency table found, use parameters\n");
+		ret = -ENXIO;
+	}
+	iounmap((void*)bios_base);
+
+	return ret;
+}
+
+static int __devinit atyfb_setup_generic(struct pci_dev *pdev, struct fb_info *info, unsigned long addr)
+{
+	struct atyfb_par *par = info->par;
+	u16 tmp;
+	unsigned long raddr;
+	struct resource *rrp;
+
+	raddr = addr + 0x7ff000UL;
+	rrp = &pdev->resource[2];
+	if ((rrp->flags & IORESOURCE_MEM) && request_mem_region(rrp->start, rrp->end - rrp->start + 1, "atyfb")) {
+		par->aux_app = 1;
+		raddr = rrp->start;
+		printk(KERN_INFO "atyfb: using auxiliary register aperture\n");
+	}
+
+	info->fix.mmio_start = raddr;
+	par->ati_regbase = (unsigned long)ioremap(info->fix.mmio_start, 0x1000);
+	if (par->ati_regbase == 0)
+		return -ENOMEM;
+
+	info->fix.mmio_start += par->aux_app ? 0x400 : 0xc00;
+	par->ati_regbase += par->aux_app ? 0x400 : 0xc00;
+
+	/*
+	 * Enable memory-space accesses using config-space
+	 * command register.
+	 */
+	pci_read_config_word(pdev, PCI_COMMAND, &tmp);
+	if (!(tmp & PCI_COMMAND_MEMORY)) {
+		tmp |= PCI_COMMAND_MEMORY;
+		pci_write_config_word(pdev, PCI_COMMAND, tmp);
+	}
+#ifdef __BIG_ENDIAN
+	/* Use the big-endian aperture */
+	addr += 0x800000;
+#endif
+
+	/* Map in frame buffer */
+	info->fix.smem_start = addr;
+	info->screen_base = (char *)ioremap(addr, 0x800000);
+	if (info->screen_base == NULL) {
+		iounmap((void *)par->ati_regbase);
+		par->ati_regbase = 0;
+		return -ENOMEM;
+	}
+
+	/* always succeeded ? */
+	init_from_bios(par);
+
 	if (!(aty_ld_le32(CRTC_GEN_CNTL, par) & CRTC_EXT_DISP_EN))
 		par->clk_wr_offset = (inb(R_GENMO) & 0x0CU) >> 2;
 	else

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH 5/7]
  2004-03-21 19:33 [PATCH 0/7] Bunch of patches Alexander Kern
                   ` (3 preceding siblings ...)
  2004-03-21 19:38 ` [PATCH 4/7] Alexander Kern
@ 2004-03-21 19:38 ` Alexander Kern
  2004-03-21 19:39 ` [PATCH 6/7] Alexander Kern
                   ` (3 subsequent siblings)
  8 siblings, 0 replies; 16+ messages in thread
From: Alexander Kern @ 2004-03-21 19:38 UTC (permalink / raw)
  To: linux-fbdev-devel

[-- Attachment #1: Type: text/plain, Size: 1 bytes --]



[-- Attachment #2: 05_mach64-revers-hwtriple.diff --]
[-- Type: text/x-diff, Size: 5536 bytes --]

diff -U 3 -H -d -I '*.o' -p -r -- linux-2.6.4/drivers/video/aty/atyfb.h linux-2.6.alex/drivers/video/aty/atyfb.h
--- linux-2.6.4/drivers/video/aty/atyfb.h	2004-03-18 20:02:44.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/atyfb.h	2004-03-18 20:30:47.000000000 +0100
@@ -193,7 +193,7 @@ struct atyfb_par {
 #define M64F_LT_SLEEP		0x00040000
 #define M64F_XL_DLL		0x00080000
 #define M64F_MFB_FORCE_4	0x00100000
-#define M64F_NO_HW_TRIPLE	0x00200000
+#define M64F_HW_TRIPLE		0x00200000
 
     /*
      *  Register access
Only in linux-2.6.alex/drivers/video/aty/: atyfb.h.orig
Only in linux-2.6.alex/drivers/video/aty/: atyfb.o
diff -U 3 -H -d -I '*.o' -p -r -- linux-2.6.4/drivers/video/aty/atyfb_base.c linux-2.6.alex/drivers/video/aty/atyfb_base.c
--- linux-2.6.4/drivers/video/aty/atyfb_base.c	2004-03-18 20:21:31.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/atyfb_base.c	2004-03-18 20:29:52.000000000 +0100
@@ -283,26 +283,29 @@ static unsigned long phys_size[FB_MAX] _
 static unsigned long phys_guiregbase[FB_MAX] __initdata = { 0, };
 #endif
 
-#define ATI_CHIP_88800GX (M64F_GX | M64F_NO_HW_TRIPLE)
-#define ATI_CHIP_88800CX ATI_CHIP_88800GX
-#define ATI_CHIP_264CT     (M64F_CT | M64F_INTEGRATED | M64F_CT_BUS | M64F_MAGIC_FIFO | M64F_NO_HW_TRIPLE)
+#define ATI_CHIP_88800GX   (M64F_GX)
+#define ATI_CHIP_88800CX    ATI_CHIP_88800GX
+#define ATI_CHIP_264CT     (M64F_CT | M64F_INTEGRATED | M64F_CT_BUS | M64F_MAGIC_FIFO)
 #define ATI_CHIP_264ET      ATI_CHIP_264CT
 
-#define ATI_CHIP_264VT     (M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_NO_HW_TRIPLE)
-#define ATI_CHIP_264VTA4   (ATI_CHIP_264VT | M64F_MAGIC_POSTDIV)
-#define ATI_CHIP_264GT     (M64F_GT | M64F_INTEGRATED               | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_NO_HW_TRIPLE | M64F_EXTRA_BRIGHT)
-#define ATI_CHIP_264VTB    (M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_GTB_DSP    | M64F_FIFO_24 | M64F_NO_HW_TRIPLE)
-#define ATI_CHIP_264GTB    (M64F_GT | M64F_INTEGRATED               | M64F_GTB_DSP    | M64F_FIFO_24 | M64F_NO_HW_TRIPLE | M64F_EXTRA_BRIGHT | M64F_SDRAM_MAGIC_PLL) 
-#define ATI_CHIP_264VT3    (ATI_CHIP_264VTB | M64F_SDRAM_MAGIC_PLL)
+#define ATI_CHIP_264VT     (M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_MAGIC_FIFO | M64F_FIFO_24)
+#define ATI_CHIP_264VTA4   (ATI_CHIP_264VT                                                           | M64F_MAGIC_POSTDIV)
+#define ATI_CHIP_264GT     (M64F_GT | M64F_INTEGRATED               | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_EXTRA_BRIGHT)
+#define ATI_CHIP_264VTB    (M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_GTB_DSP    | M64F_FIFO_24)
+#define ATI_CHIP_264GTB    (M64F_GT | M64F_INTEGRATED               | M64F_GTB_DSP    | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT) 
+#define ATI_CHIP_264VT3    (ATI_CHIP_264VTB                                                          | M64F_SDRAM_MAGIC_PLL)
 /*#define ATI_CHIP_264GTDVD  ?*/
-#define ATI_CHIP_264LT     (M64F_GT | M64F_INTEGRATED               | M64F_GTB_DSP    | M64F_FIFO_24 | M64F_NO_HW_TRIPLE)
+#define ATI_CHIP_264LT     (M64F_GT | M64F_INTEGRATED               | M64F_GTB_DSP    | M64F_FIFO_24)
 #define ATI_CHIP_264LTG    (ATI_CHIP_264LT                                                           | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT)
-#define ATI_CHIP_264VT4    (M64F_VT | M64F_INTEGRATED               | M64F_GTB_DSP    | M64F_FIFO_24 | M64F_NO_HW_TRIPLE)
-#define ATI_CHIP_264GT2C   (M64F_GT | M64F_INTEGRATED               | M64F_GTB_DSP    | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT)
-#define ATI_CHIP_264GTPRO  (M64F_GT | M64F_INTEGRATED               | M64F_GTB_DSP                   | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_RESET_3D)
-#define ATI_CHIP_264LTPRO  (M64F_GT | M64F_INTEGRATED               | M64F_GTB_DSP                                          | M64F_EXTRA_BRIGHT | M64F_RESET_3D)
-#define ATI_CHIP_264XL     (ATI_CHIP_264GTPRO | M64F_XL_DLL | M64F_MFB_FORCE_4)
-#define ATI_CHIP_MOBILITY  (ATI_CHIP_264LTPRO | M64F_XL_DLL | M64F_MFB_FORCE_4 | M64F_MOBIL_BUS )
+#define ATI_CHIP_264VT4    (M64F_VT | M64F_INTEGRATED               | M64F_GTB_DSP    | M64F_FIFO_24)
+
+#define ATI_MODERN_SET     (M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_EXTRA_BRIGHT | M64F_HW_TRIPLE)
+
+#define ATI_CHIP_264GT2C   (ATI_MODERN_SET | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL)
+#define ATI_CHIP_264GTPRO  (ATI_MODERN_SET                | M64F_SDRAM_MAGIC_PLL | M64F_RESET_3D)
+#define ATI_CHIP_264LTPRO  (ATI_MODERN_SET                                       | M64F_RESET_3D)
+#define ATI_CHIP_264XL     (ATI_MODERN_SET                | M64F_SDRAM_MAGIC_PLL | M64F_RESET_3D | M64F_XL_DLL | M64F_MFB_FORCE_4)
+#define ATI_CHIP_MOBILITY  (ATI_MODERN_SET                                       | M64F_RESET_3D | M64F_XL_DLL | M64F_MFB_FORCE_4 | M64F_MOBIL_BUS )
 
 static struct {
 	u16 pci_id;
diff -U 3 -H -d -I '*.o' -p -r -- linux-2.6.4/drivers/video/aty/mach64_accel.c linux-2.6.alex/drivers/video/aty/mach64_accel.c
--- linux-2.6.4/drivers/video/aty/mach64_accel.c	2004-03-13 21:13:43.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/mach64_accel.c	2004-03-18 20:22:50.000000000 +0100
@@ -345,7 +345,7 @@ void atyfb_imageblit(struct fb_info *inf
 		 * since Rage 3D IIc we have DP_HOST_TRIPLE_EN bit
 		 * this hwaccelerated triple has an issue with not aligned data
 		 */
-		if (!M64_HAS(NO_HW_TRIPLE) && image->width % 8 == 0)
+		if (M64_HAS(HW_TRIPLE) && image->width % 8 == 0)
 			pix_width |= DP_HOST_TRIPLE_EN;
 	}
 


^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH 6/7]
  2004-03-21 19:33 [PATCH 0/7] Bunch of patches Alexander Kern
                   ` (4 preceding siblings ...)
  2004-03-21 19:38 ` [PATCH 5/7] Alexander Kern
@ 2004-03-21 19:39 ` Alexander Kern
  2004-03-21 20:47   ` Alexander Kern
  2004-03-21 19:39 ` [PATCH 7/7] Alexander Kern
                   ` (2 subsequent siblings)
  8 siblings, 1 reply; 16+ messages in thread
From: Alexander Kern @ 2004-03-21 19:39 UTC (permalink / raw)
  To: linux-fbdev-devel

[-- Attachment #1: Type: text/plain, Size: 1 bytes --]



[-- Attachment #2: 06_mach64-laterinit.diff --]
[-- Type: text/x-diff, Size: 5302 bytes --]

Only in linux-2.6.alex/drivers/video/aty/: .atyfb.o.cmd
Only in linux-2.6.alex/drivers/video/aty/: .atyfb_base.o.cmd
Only in linux-2.6.alex/drivers/video/aty/: .built-in.o.cmd
Only in linux-2.6.alex/drivers/video/aty/: .mach64_accel.o.cmd
Only in linux-2.6.alex/drivers/video/aty/: .mach64_ct.o.cmd
Only in linux-2.6.alex/drivers/video/aty/: .mach64_cursor.o.cmd
Only in linux-2.6.alex/drivers/video/aty/: atyfb.h.orig
Only in linux-2.6.alex/drivers/video/aty/: atyfb.o
diff -U 3 -H -d -I '*.o' -p -r -- linux-2.6.4/drivers/video/aty/atyfb_base.c linux-2.6.alex/drivers/video/aty/atyfb_base.c
--- linux-2.6.4/drivers/video/aty/atyfb_base.c	2004-03-19 21:18:14.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/atyfb_base.c	2004-03-20 18:47:53.000000000 +0100
@@ -366,24 +366,29 @@ static struct {
 };
 
 /* can not fail */
-static void __devinit correct_chipset(int i, struct atyfb_par *par)
+static void __devinit correct_chipset(struct atyfb_par *par)
 {
 	u8 rev;
 	u16 type;
 	u32 chip_id;
 	const char *name;
+	int i;
+
+	for (i = sizeof(aty_chips) / sizeof(*aty_chips) - 1; i >= 0; i--)
+		if (par->pci_id == aty_chips[i].pci_id)
+			break;
 
 	name = aty_chips[i].name;
 	par->pll_limits.pll_max = aty_chips[i].pll;
 	par->pll_limits.mclk = aty_chips[i].mclk;
 	par->pll_limits.xclk = aty_chips[i].xclk;
 	par->features = aty_chips[i].features;
-	par->pci_id = aty_chips[i].pci_id;
 	
 	chip_id = aty_ld_le32(CONFIG_CHIP_ID, par);
 	type = chip_id & CFG_CHIP_TYPE;
 	rev = (chip_id & CFG_CHIP_REV) >> 24;
-	switch(aty_chips[i].pci_id) {
+
+	switch(par->pci_id) {
 #ifdef CONFIG_FB_ATY_GX
 	case PCI_CHIP_MACH64GX:
 		assert(type == 0x00d7);
@@ -432,7 +437,7 @@ static void __devinit correct_chipset(in
 #endif
 	}
 
-	printk("atyfb: %s [0x%04x rev 0x%02x] ", name, type, rev);
+	printk("atyfb: %s [0x%04x rev 0x%02x]\n", name, type, rev);
 }
 
 static char ram_dram[] __initdata = "DRAM";
@@ -2648,6 +2653,8 @@ static int __devinit atyfb_setup_sparc(s
 		par->mmap_map[j].prot_flag = _PAGE_E;
 		j++;
 	}
+	
+	correct_chipset(par);
 
 	if (IS_XL(pdev->device)) {
 		/*
@@ -3025,14 +3032,14 @@ static int __devinit init_from_bios(stru
 			pll_block.MCLK_pwd, pll_block.MCLK_max_freq,
 			pll_block.XCLK_max_freq, pll_block.SCLK_freq);
 
-		par->pll_limits.pll_min = pll_block.PCLK_min_freq;
-		par->pll_limits.pll_max = pll_block.PCLK_max_freq;
-		par->pll_limits.ref_clk = pll_block.ref_freq;
+		par->pll_limits.pll_min = pll_block.PCLK_min_freq/100;
+		par->pll_limits.pll_max = pll_block.PCLK_max_freq/100;
+		par->pll_limits.ref_clk = pll_block.ref_freq/100;
 		par->pll_limits.ref_div = pll_block.ref_divider;
-		par->pll_limits.sclk = pll_block.SCLK_freq;
-		par->pll_limits.mclk = pll_block.MCLK_max_freq;
-		par->pll_limits.mclk_pm = pll_block.MCLK_pwd;
-		par->pll_limits.xclk = pll_block.XCLK_max_freq;
+		par->pll_limits.sclk = pll_block.SCLK_freq/100;
+		par->pll_limits.mclk = pll_block.MCLK_max_freq/100;
+		par->pll_limits.mclk_pm = pll_block.MCLK_pwd/100;
+		par->pll_limits.xclk = pll_block.XCLK_max_freq/100;
 #ifdef CONFIG_FB_ATY_GENERIC_LCD
 		aty_init_lcd(par, bios_base);
 #endif
@@ -3093,6 +3100,7 @@ static int __devinit atyfb_setup_generic
 	}
 
 	/* always succeeded ? */
+	correct_chipset(par);
 	init_from_bios(par);
 
 	if (!(aty_ld_le32(CRTC_GEN_CNTL, par) & CRTC_EXT_DISP_EN))
@@ -3119,6 +3127,7 @@ static int __devinit atyfb_pci_probe(str
 	for (i = sizeof(aty_chips) / sizeof(*aty_chips) - 1; i >= 0; i--)
 		if (pdev->device == aty_chips[i].pci_id)
 			break;
+
 	if (i < 0)
 		return -ENODEV;
 
@@ -3144,6 +3153,7 @@ static int __devinit atyfb_pci_probe(str
 	}
 	par = info->par;
 	info->fix = atyfb_fix;
+	par->pci_id = aty_chips[i].pci_id;
 
 	/* Reserve space */
 	par->res_start = rp->start;
@@ -3153,9 +3163,6 @@ static int __devinit atyfb_pci_probe(str
 		goto err_free;
 	}
 
-	/* set default Values aus pci_table */
-	correct_chipset(i, par);
-
 	/* Setup "info" structure */
 #ifdef __sparc__
 	rc = atyfb_setup_sparc(pdev, info, addr);
Only in linux-2.6.alex/drivers/video/aty/: atyfb_base.c.orig
Only in linux-2.6.alex/drivers/video/aty/: atyfb_base.o
Only in linux-2.6.alex/drivers/video/aty/: built-in.o
Only in linux-2.6.alex/drivers/video/aty/: mach64_accel.c.orig
Only in linux-2.6.alex/drivers/video/aty/: mach64_accel.o
diff -U 3 -H -d -I '*.o' -p -r -- linux-2.6.4/drivers/video/aty/mach64_ct.c linux-2.6.alex/drivers/video/aty/mach64_ct.c
--- linux-2.6.4/drivers/video/aty/mach64_ct.c	2004-03-13 21:13:44.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/mach64_ct.c	2004-03-20 20:10:00.000000000 +0100
@@ -273,12 +273,11 @@ void aty_set_pll_ct(const struct fb_info
 		__FUNCTION__,
 		pll->ct.pll_ext_cntl, pll->ct.pll_gen_cntl, pll->ct.pll_vclk_cntl);
 
-#endif
 	printk("atyfb(%s): setting clock %lu for FeedBackDivider %i, ReferenceDivider %i, PostDivider %i(%i)\n",
 		__FUNCTION__,
 		par->clk_wr_offset, pll->ct.vclk_fb_div,
 		pll->ct.pll_ref_div, pll->ct.vclk_post_div, pll->ct.vclk_post_div_real);
-
+#endif
 #ifdef CONFIG_FB_ATY_GENERIC_LCD
 	if (par->lcd_table != 0) {
 		/* turn off LCD */
Only in linux-2.6.alex/drivers/video/aty/: mach64_ct.c.orig
Only in linux-2.6.alex/drivers/video/aty/: mach64_ct.o
Only in linux-2.6.alex/drivers/video/aty/: mach64_cursor.o
Only in linux-2.6.alex/drivers/video/aty/: xlinit.c.orig

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH 6/7]
  2004-03-21 19:39 ` [PATCH 6/7] Alexander Kern
@ 2004-03-21 20:47   ` Alexander Kern
  0 siblings, 0 replies; 16+ messages in thread
From: Alexander Kern @ 2004-03-21 20:47 UTC (permalink / raw)
  To: linux-fbdev-devel; +Cc: James Simmons

[-- Attachment #1: Type: text/plain, Size: 113 bytes --]

Am Sonntag, 21. März 2004 20:39 schrieb Alexander Kern:
Uups, something goes wrong
 here another version...


[-- Attachment #2: 06_mach64-laterinit2.diff --]
[-- Type: text/x-diff, Size: 3277 bytes --]

diff -U 3 -H -d -I '*.o' -p -r -- linux-2.6.4/drivers/video/aty/atyfb_base.c linux-2.6.alex/drivers/video/aty/atyfb_base.c
--- linux-2.6.4/drivers/video/aty/atyfb_base.c	2004-03-21 21:30:07.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/atyfb_base.c	2004-03-20 21:33:24.000000000 +0100
@@ -366,24 +366,29 @@ static struct {
 };
 
 /* can not fail */
-static void __devinit correct_chipset(int i, struct atyfb_par *par)
+static void __devinit correct_chipset(struct atyfb_par *par)
 {
 	u8 rev;
 	u16 type;
 	u32 chip_id;
 	const char *name;
+	int i;
+
+	for (i = sizeof(aty_chips) / sizeof(*aty_chips) - 1; i >= 0; i--)
+		if (par->pci_id == aty_chips[i].pci_id)
+			break;
 
 	name = aty_chips[i].name;
 	par->pll_limits.pll_max = aty_chips[i].pll;
 	par->pll_limits.mclk = aty_chips[i].mclk;
 	par->pll_limits.xclk = aty_chips[i].xclk;
 	par->features = aty_chips[i].features;
-	par->pci_id = aty_chips[i].pci_id;
 	
 	chip_id = aty_ld_le32(CONFIG_CHIP_ID, par);
 	type = chip_id & CFG_CHIP_TYPE;
 	rev = (chip_id & CFG_CHIP_REV) >> 24;
-	switch(aty_chips[i].pci_id) {
+
+	switch(par->pci_id) {
 #ifdef CONFIG_FB_ATY_GX
 	case PCI_CHIP_MACH64GX:
 		assert(type == 0x00d7);
@@ -432,7 +437,7 @@ static void __devinit correct_chipset(in
 #endif
 	}
 
-	printk("atyfb: %s [0x%04x rev 0x%02x] ", name, type, rev);
+	printk("atyfb: %s [0x%04x rev 0x%02x]\n", name, type, rev);
 }
 
 static char ram_dram[] __initdata = "DRAM";
@@ -2648,6 +2653,8 @@ static int __devinit atyfb_setup_sparc(s
 		par->mmap_map[j].prot_flag = _PAGE_E;
 		j++;
 	}
+	
+	correct_chipset(par);
 
 	if (IS_XL(pdev->device)) {
 		/*
@@ -3094,6 +3101,7 @@ static int __devinit atyfb_setup_generic
 	}
 
 	/* always succeeded ? */
+	correct_chipset(par);
 	init_from_bios(par);
 
 	if (!(aty_ld_le32(CRTC_GEN_CNTL, par) & CRTC_EXT_DISP_EN))
@@ -3120,6 +3128,7 @@ static int __devinit atyfb_pci_probe(str
 	for (i = sizeof(aty_chips) / sizeof(*aty_chips) - 1; i >= 0; i--)
 		if (pdev->device == aty_chips[i].pci_id)
 			break;
+
 	if (i < 0)
 		return -ENODEV;
 
@@ -3145,6 +3154,7 @@ static int __devinit atyfb_pci_probe(str
 	}
 	par = info->par;
 	info->fix = atyfb_fix;
+	par->pci_id = aty_chips[i].pci_id;
 
 	/* Reserve space */
 	par->res_start = rp->start;
@@ -3154,9 +3164,6 @@ static int __devinit atyfb_pci_probe(str
 		goto err_free;
 	}
 
-	/* set default Values aus pci_table */
-	correct_chipset(i, par);
-
 	/* Setup "info" structure */
 #ifdef __sparc__
 	rc = atyfb_setup_sparc(pdev, info, addr);
diff -U 3 -H -d -I '*.o' -p -r -- linux-2.6.4/drivers/video/aty/mach64_ct.c linux-2.6.alex/drivers/video/aty/mach64_ct.c
--- linux-2.6.4/drivers/video/aty/mach64_ct.c	2004-03-21 21:28:27.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/mach64_ct.c	2004-03-20 20:10:00.000000000 +0100
@@ -273,12 +273,11 @@ void aty_set_pll_ct(const struct fb_info
 		__FUNCTION__,
 		pll->ct.pll_ext_cntl, pll->ct.pll_gen_cntl, pll->ct.pll_vclk_cntl);
 
-#endif
 	printk("atyfb(%s): setting clock %lu for FeedBackDivider %i, ReferenceDivider %i, PostDivider %i(%i)\n",
 		__FUNCTION__,
 		par->clk_wr_offset, pll->ct.vclk_fb_div,
 		pll->ct.pll_ref_div, pll->ct.vclk_post_div, pll->ct.vclk_post_div_real);
-
+#endif
 #ifdef CONFIG_FB_ATY_GENERIC_LCD
 	if (par->lcd_table != 0) {
 		/* turn off LCD */

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH 7/7]
  2004-03-21 19:33 [PATCH 0/7] Bunch of patches Alexander Kern
                   ` (5 preceding siblings ...)
  2004-03-21 19:39 ` [PATCH 6/7] Alexander Kern
@ 2004-03-21 19:39 ` Alexander Kern
  2004-03-21 20:49 ` [PATCH] all changes in two, again James mach64.diff Alexander Kern
  2004-03-23 18:57 ` [PATCH 0/7] Bunch of patches James Simmons
  8 siblings, 0 replies; 16+ messages in thread
From: Alexander Kern @ 2004-03-21 19:39 UTC (permalink / raw)
  To: linux-fbdev-devel; +Cc: James Simmons

[-- Attachment #1: Type: text/plain, Size: 1 bytes --]



[-- Attachment #2: 07_mach64-aux_correct.diff --]
[-- Type: text/x-diff, Size: 4528 bytes --]

Only in linux-2.6.alex/drivers/video/aty/: .atyfb.o.cmd
Only in linux-2.6.alex/drivers/video/aty/: .atyfb_base.o.cmd
Only in linux-2.6.alex/drivers/video/aty/: .built-in.o.cmd
Only in linux-2.6.alex/drivers/video/aty/: .mach64_accel.o.cmd
Only in linux-2.6.alex/drivers/video/aty/: .mach64_ct.o.cmd
Only in linux-2.6.alex/drivers/video/aty/: .mach64_cursor.o.cmd
diff -U 3 -H -d -I '*.o' -p -r -- linux-2.6.4/drivers/video/aty/atyfb.h linux-2.6.alex/drivers/video/aty/atyfb.h
--- linux-2.6.4/drivers/video/aty/atyfb.h	2004-03-19 21:18:14.000000000 +0100
+++ linux-2.6.alex/drivers/video/aty/atyfb.h	2004-03-20 21:25:44.620076176 +0100
@@ -163,7 +163,8 @@ struct atyfb_par {
 	u16 lcd_hblank_len;
 	u16 lcd_vblank_len;
 #endif
-	int aux_app; /* auxiliary aperture */
+	unsigned long aux_start; /* auxiliary aperture */
+	unsigned long aux_size;
 };
 
     /*
Only in linux-2.6.alex/drivers/video/aty/: atyfb.h.orig
Only in linux-2.6.alex/drivers/video/aty/: atyfb.o
diff -U 3 -H -d -I '*.o' -p -r -- linux-2.6.4/drivers/video/aty/atyfb_base.c linux-2.6.alex/drivers/video/aty/atyfb_base.c
--- linux-2.6.4/drivers/video/aty/atyfb_base.c	2004-03-20 21:20:18.748616168 +0100
+++ linux-2.6.alex/drivers/video/aty/atyfb_base.c	2004-03-20 21:33:24.479166968 +0100
@@ -1267,11 +1267,11 @@ static int atyfb_set_par(struct fb_info 
 			aty_st_le32(BUS_CNTL, 0x680000f9, par);
 		} else if (M64_HAS(MOBIL_BUS)) {
 			aty_st_le32(DAC_CNTL, 0x80010102, par);
-			aty_st_le32(BUS_CNTL, 0x7b33a040 | (par->aux_app ? BUS_APER_REG_DIS : 0), par);
+			aty_st_le32(BUS_CNTL, 0x7b33a040 | (par->aux_start ? BUS_APER_REG_DIS : 0), par);
 		} else {
 			/* GT */
 			aty_st_le32(DAC_CNTL, 0x86010102, par);
-			aty_st_le32(BUS_CNTL, 0x7b23a040 | (par->aux_app ? BUS_APER_REG_DIS : 0), par);
+			aty_st_le32(BUS_CNTL, 0x7b23a040 | (par->aux_start ? BUS_APER_REG_DIS : 0), par);
 			aty_st_le32(EXT_MEM_CNTL, aty_ld_le32(EXT_MEM_CNTL, par) | 0x5000001, par);
 		}
 		aty_st_le32(MEM_CNTL, tmp, par);
@@ -2250,7 +2250,7 @@ static int __init aty_init(struct fb_inf
 	 *  the full 8 MB of video RAM on 8 MB boards
 	 */
 
-	if (!par->aux_app &&
+	if (!par->aux_start &&
 		(info->fix.smem_len == 0x800000 || (par->bus_type == ISA && info->fix.smem_len == 0x400000)))
 		info->fix.smem_len -= GUI_RESERVE;
 
@@ -2259,7 +2259,7 @@ static int __init aty_init(struct fb_inf
 	 *  if the auxiliary aperture is used so we can access
 	 *  the full 8 MB of video RAM on 8 MB boards.
 	 */
-	if (par->aux_app)
+	if (par->aux_start)
 		aty_st_le32(BUS_CNTL, aty_ld_le32(BUS_CNTL, par) | BUS_APER_REG_DIS, par);
 
 	/* Clear the video memory */
@@ -3063,7 +3063,8 @@ static int __devinit atyfb_setup_generic
 	raddr = addr + 0x7ff000UL;
 	rrp = &pdev->resource[2];
 	if ((rrp->flags & IORESOURCE_MEM) && request_mem_region(rrp->start, rrp->end - rrp->start + 1, "atyfb")) {
-		par->aux_app = 1;
+		par->aux_start = rrp->start;
+		par->aux_size = rrp->end - rrp->start + 1;
 		raddr = rrp->start;
 		printk(KERN_INFO "atyfb: using auxiliary register aperture\n");
 	}
@@ -3073,8 +3074,8 @@ static int __devinit atyfb_setup_generic
 	if (par->ati_regbase == 0)
 		return -ENOMEM;
 
-	info->fix.mmio_start += par->aux_app ? 0x400 : 0xc00;
-	par->ati_regbase += par->aux_app ? 0x400 : 0xc00;
+	info->fix.mmio_start += par->aux_start ? 0x400 : 0xc00;
+	par->ati_regbase += par->aux_start ? 0x400 : 0xc00;
 
 	/*
 	 * Enable memory-space accesses using config-space
@@ -3211,6 +3212,9 @@ err_release_io:
 		iounmap((void *) info->screen_base);
 #endif
 err_release_mem:
+	if(par->aux_start)
+		release_mem_region(par->aux_start, par->aux_size);
+
 	release_mem_region(par->res_start, par->res_size);
 err_free:
 	framebuffer_release(info);
@@ -3302,8 +3306,12 @@ static void __devexit atyfb_remove(struc
 	if (par->mmap_map)
 		kfree(par->mmap_map);
 #endif
+	if (par->aux_start)
+		release_mem_region(par->aux_start, par->aux_size);
+
 	if (par->res_start)
 		release_mem_region(par->res_start, par->res_size);
+
 	framebuffer_release(info);
 }
 
Only in linux-2.6.alex/drivers/video/aty/: atyfb_base.c.orig
Only in linux-2.6.alex/drivers/video/aty/: atyfb_base.o
Only in linux-2.6.alex/drivers/video/aty/: built-in.o
Only in linux-2.6.alex/drivers/video/aty/: mach64_accel.c.orig
Only in linux-2.6.alex/drivers/video/aty/: mach64_accel.o
Only in linux-2.6.alex/drivers/video/aty/: mach64_ct.c.orig
Only in linux-2.6.alex/drivers/video/aty/: mach64_ct.o
Only in linux-2.6.alex/drivers/video/aty/: mach64_cursor.o
Only in linux-2.6.alex/drivers/video/aty/: xlinit.c.orig

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH] all changes in two, again James mach64.diff
  2004-03-21 19:33 [PATCH 0/7] Bunch of patches Alexander Kern
                   ` (6 preceding siblings ...)
  2004-03-21 19:39 ` [PATCH 7/7] Alexander Kern
@ 2004-03-21 20:49 ` Alexander Kern
  2004-03-23 18:57 ` [PATCH 0/7] Bunch of patches James Simmons
  8 siblings, 0 replies; 16+ messages in thread
From: Alexander Kern @ 2004-03-21 20:49 UTC (permalink / raw)
  To: James Simmons, linux-fbdev-devel

[-- Attachment #1: Type: text/plain, Size: 1 bytes --]



[-- Attachment #2: mach64-include.diff --]
[-- Type: text/x-diff, Size: 394 bytes --]

--- linux-2.6.4/include/video/mach64.h	2004-03-11 16:47:33.000000000 +0100
+++ linux-2.6.alex/include/video/mach64.h	2004-03-05 22:55:02.000000000 +0100
@@ -669,6 +669,7 @@
 /* Mach64 engine bit constants - these are typically ORed together */
 
 /* BUS_CNTL register constants */
+#define BUS_APER_REG_DIS	0x00000010
 #define BUS_FIFO_ERR_ACK	0x00200000
 #define BUS_HOST_ERR_ACK	0x00800000
 

[-- Attachment #3: mach64-summary.diff.gz --]
[-- Type: application/x-gzip, Size: 13416 bytes --]

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH 0/7] Bunch of patches
  2004-03-21 19:33 [PATCH 0/7] Bunch of patches Alexander Kern
                   ` (7 preceding siblings ...)
  2004-03-21 20:49 ` [PATCH] all changes in two, again James mach64.diff Alexander Kern
@ 2004-03-23 18:57 ` James Simmons
  2004-03-24 20:39   ` Alexander Kern
  8 siblings, 1 reply; 16+ messages in thread
From: James Simmons @ 2004-03-23 18:57 UTC (permalink / raw)
  To: Alexander Kern; +Cc: fbdev



I had no luck with any of the patches. They all bombed out for me. Can you 
create a patch against the mach64.diff.gz I have. 

On Sun, 21 Mar 2004, Alexander Kern wrote:

> Hello,
> 
> here a seven patches for mach64 fbdev driver.
> 
> 01_mach64-add.diff
> 	simple additions, once already send to James
> 
> 02_mach64-aux.diff
> 	patch based on patch from Ville Syrjälä, use aperture for register access
> 
> 03_mach64-chipset2.diff
> 	reorganize table of chipsets
> 
> 04_mach64-bios.diff
> 	let read frequence limits from BIOS
> 
> 05_mach64-revers-hwtriple.diff
> 	reverse logic for hardware triple
> 
> 06_mach64-laterinit.diff
> 	correct init from BIOS
> 
> 07_mach64-aux_correct.diff
> 	free regions, registered for aperture
> 
> Summary of patches tested on ARMADA E500 1400x1050
> 
> Regards Alex
> 



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^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Re: [PATCH 0/7] Bunch of patches
  2004-03-23 18:57 ` [PATCH 0/7] Bunch of patches James Simmons
@ 2004-03-24 20:39   ` Alexander Kern
  2004-03-24 21:25     ` all in one patch Alexander Kern
  2004-03-24 21:26     ` Re: [PATCH 0/7] Bunch of patches James Simmons
  0 siblings, 2 replies; 16+ messages in thread
From: Alexander Kern @ 2004-03-24 20:39 UTC (permalink / raw)
  To: linux-fbdev-devel

[-- Attachment #1: Type: text/plain, Size: 200 bytes --]

Am Dienstag, 23. März 2004 19:57 schrieb James Simmons:
> I had no luck with any of the patches. They all bombed out for me. Can you
> create a patch against the mach64.diff.gz I have.
And these?

[-- Attachment #2: mach64-include.diff --]
[-- Type: text/x-diff, Size: 394 bytes --]

--- linux-2.6.4/include/video/mach64.h	2004-03-11 16:47:33.000000000 +0100
+++ linux-2.6.alex/include/video/mach64.h	2004-03-05 22:55:02.000000000 +0100
@@ -669,6 +669,7 @@
 /* Mach64 engine bit constants - these are typically ORed together */
 
 /* BUS_CNTL register constants */
+#define BUS_APER_REG_DIS	0x00000010
 #define BUS_FIFO_ERR_ACK	0x00200000
 #define BUS_HOST_ERR_ACK	0x00800000
 

[-- Attachment #3: mach64-summary.diff.gz --]
[-- Type: application/x-gzip, Size: 13416 bytes --]

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: all in one patch
  2004-03-24 20:39   ` Alexander Kern
@ 2004-03-24 21:25     ` Alexander Kern
  2004-03-24 21:27       ` James Simmons
  2004-03-24 21:44       ` James Simmons
  2004-03-24 21:26     ` Re: [PATCH 0/7] Bunch of patches James Simmons
  1 sibling, 2 replies; 16+ messages in thread
From: Alexander Kern @ 2004-03-24 21:25 UTC (permalink / raw)
  To: linux-fbdev-devel; +Cc: James Simmons

[-- Attachment #1: Type: text/plain, Size: 257 bytes --]

Am Mittwoch, 24. März 2004 21:39 schrieb Alexander Kern:
> Am Dienstag, 23. März 2004 19:57 schrieb James Simmons:
> > I had no luck with any of the patches. They all bombed out for me. Can
> > you create a patch against the mach64.diff.gz I have.
>


[-- Attachment #2: mach64_ati.diff.gz --]
[-- Type: application/x-gzip, Size: 13286 bytes --]

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: all in one patch
  2004-03-24 21:25     ` all in one patch Alexander Kern
@ 2004-03-24 21:27       ` James Simmons
  2004-03-24 21:44       ` James Simmons
  1 sibling, 0 replies; 16+ messages in thread
From: James Simmons @ 2004-03-24 21:27 UTC (permalink / raw)
  To: Alexander Kern; +Cc: linux-fbdev-devel


I will give it a try.


On Wed, 24 Mar 2004, Alexander Kern wrote:

> Am Mittwoch, 24. März 2004 21:39 schrieb Alexander Kern:
> > Am Dienstag, 23. März 2004 19:57 schrieb James Simmons:
> > > I had no luck with any of the patches. They all bombed out for me. Can
> > > you create a patch against the mach64.diff.gz I have.
> >
> 
> 



-------------------------------------------------------
This SF.Net email is sponsored by: IBM Linux Tutorials
Free Linux tutorial presented by Daniel Robbins, President and CEO of
GenToo technologies. Learn everything from fundamentals to system
administration.http://ads.osdn.com/?ad_id=1470&alloc_id=3638&op=click

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: all in one patch
  2004-03-24 21:25     ` all in one patch Alexander Kern
  2004-03-24 21:27       ` James Simmons
@ 2004-03-24 21:44       ` James Simmons
  1 sibling, 0 replies; 16+ messages in thread
From: James Simmons @ 2004-03-24 21:44 UTC (permalink / raw)
  To: Alexander Kern; +Cc: linux-fbdev-devel


Still bombs out. I can manually apply the patch.

Stanards 2.6.4 kernel
Applied http://phoenix.infradead.org/~jsimmons/mach64.diff.gz
applied your patch.



On Wed, 24 Mar 2004, Alexander Kern wrote:

> Am Mittwoch, 24. März 2004 21:39 schrieb Alexander Kern:
> > Am Dienstag, 23. März 2004 19:57 schrieb James Simmons:
> > > I had no luck with any of the patches. They all bombed out for me. Can
> > > you create a patch against the mach64.diff.gz I have.
> >
> 
> 



-------------------------------------------------------
This SF.Net email is sponsored by: IBM Linux Tutorials
Free Linux tutorial presented by Daniel Robbins, President and CEO of
GenToo technologies. Learn everything from fundamentals to system
administration.http://ads.osdn.com/?ad_id=1470&alloc_id=3638&op=click

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Re: [PATCH 0/7] Bunch of patches
  2004-03-24 20:39   ` Alexander Kern
  2004-03-24 21:25     ` all in one patch Alexander Kern
@ 2004-03-24 21:26     ` James Simmons
  1 sibling, 0 replies; 16+ messages in thread
From: James Simmons @ 2004-03-24 21:26 UTC (permalink / raw)
  To: Alexander Kern; +Cc: linux-fbdev-devel



On Wed, 24 Mar 2004, Alexander Kern wrote:

> Am Dienstag, 23. März 2004 19:57 schrieb James Simmons:
> > I had no luck with any of the patches. They all bombed out for me. Can you
> > create a patch against the mach64.diff.gz I have.
> And these?

Same problem. 
 



-------------------------------------------------------
This SF.Net email is sponsored by: IBM Linux Tutorials
Free Linux tutorial presented by Daniel Robbins, President and CEO of
GenToo technologies. Learn everything from fundamentals to system
administration.http://ads.osdn.com/?ad_id=1470&alloc_id=3638&op=click

^ permalink raw reply	[flat|nested] 16+ messages in thread

end of thread, other threads:[~2004-03-24 21:44 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2004-03-21 19:33 [PATCH 0/7] Bunch of patches Alexander Kern
2004-03-21 19:37 ` [PATCH 1/7] Alexander Kern
2004-03-21 19:37 ` [PATCH 2/7] Alexander Kern
2004-03-21 19:38 ` [PATCH 3/7] Alexander Kern
2004-03-21 19:38 ` [PATCH 4/7] Alexander Kern
2004-03-21 19:38 ` [PATCH 5/7] Alexander Kern
2004-03-21 19:39 ` [PATCH 6/7] Alexander Kern
2004-03-21 20:47   ` Alexander Kern
2004-03-21 19:39 ` [PATCH 7/7] Alexander Kern
2004-03-21 20:49 ` [PATCH] all changes in two, again James mach64.diff Alexander Kern
2004-03-23 18:57 ` [PATCH 0/7] Bunch of patches James Simmons
2004-03-24 20:39   ` Alexander Kern
2004-03-24 21:25     ` all in one patch Alexander Kern
2004-03-24 21:27       ` James Simmons
2004-03-24 21:44       ` James Simmons
2004-03-24 21:26     ` Re: [PATCH 0/7] Bunch of patches James Simmons

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