Re: [PATCH 0/4 v6] i.MX31: dmaengine and framebuffer drivers

[Sascha Hauer <s.hauer@pengutronix.de>]

Hi Russell et al,

I just had some offline discussion with Guennadi about the chained
interrupt issue in the IPU (image processing unit) driver discussed in
this thread. We came up with several solutions but none of them seems
to be ideal. To sum this up we are talking about 142 interrupt sources
which consist of:

96 DMA channel interrupts (32 channels, 3 interrupts each)
46 misc interrupts which are going to be handled by various client
   drivers such as camera interface and framebuffer.

So far our possible solutions are:

1) handle all 142 interrupts in a chained handler. This involves adding
   of 142 struct irq_desc (implemented in -v1)
2) add a pool of chained interrupt sources and create a virtual mapping
   (implemented in -v6)
3) forget about chained interrupt handlers, handle the 96 channel
   interrupts in a normal interrupt handler and create callbacks for the
   rest. This would create a new API instead of using an existing one.

In a normal system most of these interrupts are unused. For example the
framebuffer needs the 3 interrupts for the corresponding DMA channel and
there is a vsync interrupt which is currently unused.

Russell, I would be glad if you could comment on this so that we come up
with a solution acceptable for mainline.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |