s3c2410fb: fix clockrate calculation

[Ben Dooks <ben@simtec.co.uk>]

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In the final part of the calculation for the tft display clockrate we
divide the output pf s3c2410fb_calc_pixclk() by 2 which leaves us with
a rounding error if the result is odd.

Change to using DIV_ROUND_UP() to ensure that we always choose a higher
divisor and thus a lower frequency.

Signed-off-by: Ben Dooks <ben@simtec.co.uk>

---
 drivers/video/s3c2410fb.c |    4 +++-
 2 files changed, 5 insertions(+), 2 deletions(-)
 
Index: b/drivers/video/s3c2410fb.c
===================================================================
--- a/drivers/video/s3c2410fb.c	2009-08-20 08:45:41.000000000 +0100
+++ b/drivers/video/s3c2410fb.c	2009-08-20 08:45:42.000000000 +0100
@@ -369,7 +369,9 @@ static void s3c2410fb_activate_var(struc
 	void __iomem *regs = fbi->io;
 	int type = fbi->regs.lcdcon1 & S3C2410_LCDCON1_TFT;
 	struct fb_var_screeninfo *var = &info->var;
-	int clkdiv = s3c2410fb_calc_pixclk(fbi, var->pixclock) / 2;
+	int clkdiv;
+
+	clkdiv = DIV_ROUND_UP(s3c2410fb_calc_pixclk(fbi, var->pixclock), 2);
 
 	printk(KERN_INFO "%s: pixclock=%d, clkdiv=%d\n",
 	       __func__, var->pixclock, clkdiv);

-- 
Ben (ben@fluff.org, http://www.fluff.org/)

  'a smiley only costs 4 bytes'

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