* [PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c
2016-09-04 18:03 [PATCH 1/2] staging: sm750fb: fix line length coding style issues in ddk750_chip.c Moshe Green
@ 2016-09-04 18:04 ` Moshe Green
2016-09-12 11:17 ` Greg KH
2016-09-12 11:16 ` [PATCH 1/2] staging: sm750fb: fix line length coding style " Greg KH
2016-09-15 20:15 ` Moshe Green
2 siblings, 1 reply; 8+ messages in thread
From: Moshe Green @ 2016-09-04 18:04 UTC (permalink / raw)
To: sudipm.mukherjee, teddy.wang, gregkh; +Cc: linux-fbdev, devel, linux-kernel
Fix the following warning types:
- line length
- block comment line * prefix
- trailing */ on a separate line
found by the checkpatch.pl tool in multiple block comments.
Fix a single spelling error in a comment.
Signed-off-by: Moshe Green <mgmoshes@gmail.com>
---
drivers/staging/sm750fb/ddk750_chip.c | 49 +++++++++++++++++++----------------
1 file changed, 27 insertions(+), 22 deletions(-)
diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c
index 76aaeaa..09fda26 100644
--- a/drivers/staging/sm750fb/ddk750_chip.c
+++ b/drivers/staging/sm750fb/ddk750_chip.c
@@ -144,8 +144,9 @@ static void setMasterClock(unsigned int frequency)
return;
if (frequency) {
- /* Set the frequency to the maximum frequency that the SM750 engine can
- run, which is about 190 MHz. */
+ /* Set the frequency to the maximum frequency
+ * that the SM750 engine can run, which is about 190 MHz.
+ */
if (frequency > MHz(190))
frequency = MHz(190);
@@ -242,9 +243,10 @@ int ddk750_initHw(initchip_param_t *pInitParam)
setMasterClock(MHz(pInitParam->masterClock));
- /* Reset the memory controller. If the memory controller is not reset in SM750,
- the system might hang when sw accesses the memory.
- The memory should be resetted after changing the MXCLK.
+ /* Reset the memory controller.
+ * If the memory controller is not reset in SM750,
+ * the system might hang when sw accesses the memory.
+ * The memory should be resetted after changing the MXCLK.
*/
if (pInitParam->resetMemory = 1) {
reg = PEEK32(MISC_CTRL);
@@ -288,21 +290,22 @@ int ddk750_initHw(initchip_param_t *pInitParam)
}
/*
- monk liu @ 4/6/2011:
- re-write the calculatePLL function of ddk750.
- the original version function does not use some mathematics tricks and shortcut
- when it doing the calculation of the best N,M,D combination
- I think this version gives a little upgrade in speed
-
- 750 pll clock formular:
- Request Clock = (Input Clock * M )/(N * X)
-
- Input Clock = 14318181 hz
- X = 2 power D
- D ={0,1,2,3,4,5,6}
- M = {1,...,255}
- N = {2,...,15}
-*/
+ * monk liu @ 4/6/2011:
+ * re-write the calculatePLL function of ddk750.
+ * the original version function does not use
+ * some mathematics tricks and shortcut
+ * when it doing the calculation of the best N,M,D combination
+ * I think this version gives a little upgrade in speed
+ *
+ * 750 pll clock formular:
+ * Request Clock = (Input Clock * M )/(N * X)
+ *
+ * Input Clock = 14318181 hz
+ * X = 2 power D
+ * D ={0,1,2,3,4,5,6}
+ * M = {1,...,255}
+ * N = {2,...,15}
+ */
unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
{
/* as sm750 register definition,
@@ -317,8 +320,10 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
int max_d = 6;
if (getChipType() = SM750LE) {
- /* SM750LE don't have prgrammable PLL and M/N values to work on.
- Just return the requested clock. */
+ /* SM750LE don't have
+ * programmable PLL and M/N values to work on.
+ * Just return the requested clock.
+ */
return request_orig;
}
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c
2016-09-04 18:04 ` [PATCH 2/2] staging: sm750fb: fix block comment style and spelling " Moshe Green
@ 2016-09-12 11:17 ` Greg KH
2016-09-15 18:59 ` Moshe Green
0 siblings, 1 reply; 8+ messages in thread
From: Greg KH @ 2016-09-12 11:17 UTC (permalink / raw)
To: Moshe Green
Cc: sudipm.mukherjee, teddy.wang, devel, linux-fbdev, linux-kernel
On Sun, Sep 04, 2016 at 09:04:10PM +0300, Moshe Green wrote:
> Fix the following warning types:
> - line length
> - block comment line * prefix
> - trailing */ on a separate line
> found by the checkpatch.pl tool in multiple block comments.
>
> Fix a single spelling error in a comment.
>
> Signed-off-by: Moshe Green <mgmoshes@gmail.com>
> ---
> drivers/staging/sm750fb/ddk750_chip.c | 49 +++++++++++++++++++----------------
> 1 file changed, 27 insertions(+), 22 deletions(-)
As I didn't take the first patch, this one didn't apply :(
Please resend when you send the first one again.
thanks,
greg k-h
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c
2016-09-12 11:17 ` Greg KH
@ 2016-09-15 18:59 ` Moshe Green
0 siblings, 0 replies; 8+ messages in thread
From: Moshe Green @ 2016-09-15 18:59 UTC (permalink / raw)
To: Greg KH; +Cc: sudipm.mukherjee, teddy.wang, devel, linux-fbdev, linux-kernel
On Mon, Sep 12, 2016 at 01:17:25PM +0200, Greg KH wrote:
> On Sun, Sep 04, 2016 at 09:04:10PM +0300, Moshe Green wrote:
> > Fix the following warning types:
> > - line length
> > - block comment line * prefix
> > - trailing */ on a separate line
> > found by the checkpatch.pl tool in multiple block comments.
> >
> > Fix a single spelling error in a comment.
> >
> > Signed-off-by: Moshe Green <mgmoshes@gmail.com>
> > ---
> > drivers/staging/sm750fb/ddk750_chip.c | 49 +++++++++++++++++++----------------
> > 1 file changed, 27 insertions(+), 22 deletions(-)
>
> As I didn't take the first patch, this one didn't apply :(
>
> Please resend when you send the first one again.
>
> thanks,
>
> greg k-h
Will do.
Thanks
Moshe Green
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] staging: sm750fb: fix line length coding style issues in ddk750_chip.c
2016-09-04 18:03 [PATCH 1/2] staging: sm750fb: fix line length coding style issues in ddk750_chip.c Moshe Green
2016-09-04 18:04 ` [PATCH 2/2] staging: sm750fb: fix block comment style and spelling " Moshe Green
@ 2016-09-12 11:16 ` Greg KH
2016-09-15 18:56 ` Moshe Green
2016-09-15 20:15 ` Moshe Green
2 siblings, 1 reply; 8+ messages in thread
From: Greg KH @ 2016-09-12 11:16 UTC (permalink / raw)
To: Moshe Green
Cc: sudipm.mukherjee, teddy.wang, devel, linux-fbdev, linux-kernel
On Sun, Sep 04, 2016 at 09:03:27PM +0300, Moshe Green wrote:
> Fix multiple line length warnings found by the checkpatch.pl tool
> in ddk750_chip.c.
>
> Signed-off-by: Moshe Green <mgmoshes@gmail.com>
> ---
> drivers/staging/sm750fb/ddk750_chip.c | 18 ++++++++++++------
> 1 file changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c
> index c1356bb..76aaeaa 100644
> --- a/drivers/staging/sm750fb/ddk750_chip.c
> +++ b/drivers/staging/sm750fb/ddk750_chip.c
> @@ -71,7 +71,7 @@ static void setChipClock(unsigned int frequency)
> pll.clockType = MXCLK_PLL;
>
> /*
> - * Call calcPllValue() to fill up the other fields for PLL structure.
> + * Call calcPllValue() to fill the other fields of PLL structure.
> * Sometime, the chip cannot set up the exact clock required by User.
> * Return value from calcPllValue() gives the actual possible clock.
You only changed one sentance here, please fix the whole block.
thanks,
greg k-h
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] staging: sm750fb: fix line length coding style issues in ddk750_chip.c
2016-09-12 11:16 ` [PATCH 1/2] staging: sm750fb: fix line length coding style " Greg KH
@ 2016-09-15 18:56 ` Moshe Green
0 siblings, 0 replies; 8+ messages in thread
From: Moshe Green @ 2016-09-15 18:56 UTC (permalink / raw)
To: Greg KH; +Cc: sudipm.mukherjee, teddy.wang, devel, linux-fbdev, linux-kernel
On Mon, Sep 12, 2016 at 01:16:35PM +0200, Greg KH wrote:
> On Sun, Sep 04, 2016 at 09:03:27PM +0300, Moshe Green wrote:
> > Fix multiple line length warnings found by the checkpatch.pl tool
> > in ddk750_chip.c.
> >
> > Signed-off-by: Moshe Green <mgmoshes@gmail.com>
> > ---
> > drivers/staging/sm750fb/ddk750_chip.c | 18 ++++++++++++------
> > 1 file changed, 12 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c
> > index c1356bb..76aaeaa 100644
> > --- a/drivers/staging/sm750fb/ddk750_chip.c
> > +++ b/drivers/staging/sm750fb/ddk750_chip.c
> > @@ -71,7 +71,7 @@ static void setChipClock(unsigned int frequency)
> > pll.clockType = MXCLK_PLL;
> >
> > /*
> > - * Call calcPllValue() to fill up the other fields for PLL structure.
> > + * Call calcPllValue() to fill the other fields of PLL structure.
> > * Sometime, the chip cannot set up the exact clock required by User.
> > * Return value from calcPllValue() gives the actual possible clock.
>
> You only changed one sentance here, please fix the whole block.
>
> thanks,
>
> greg k-h
Will do.
Thanks
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] staging: sm750fb: fix line length coding style issues in ddk750_chip.c
2016-09-04 18:03 [PATCH 1/2] staging: sm750fb: fix line length coding style issues in ddk750_chip.c Moshe Green
2016-09-04 18:04 ` [PATCH 2/2] staging: sm750fb: fix block comment style and spelling " Moshe Green
2016-09-12 11:16 ` [PATCH 1/2] staging: sm750fb: fix line length coding style " Greg KH
@ 2016-09-15 20:15 ` Moshe Green
2016-09-15 20:16 ` [PATCH 2/2] staging: sm750fb: fix block comment style and spelling " Moshe Green
2 siblings, 1 reply; 8+ messages in thread
From: Moshe Green @ 2016-09-15 20:15 UTC (permalink / raw)
To: sudipm.mukherjee, teddy.wang, gregkh; +Cc: linux-fbdev, devel, linux-kernel
Fix multiple line length warnings found by the checkpatch.pl tool
in ddk750_chip.c.
Signed-off-by: Moshe Green <mgmoshes@gmail.com>
---
drivers/staging/sm750fb/ddk750_chip.c | 23 +++++++++++++++--------
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c
index c1356bb..7cba1ab 100644
--- a/drivers/staging/sm750fb/ddk750_chip.c
+++ b/drivers/staging/sm750fb/ddk750_chip.c
@@ -71,9 +71,10 @@ static void setChipClock(unsigned int frequency)
pll.clockType = MXCLK_PLL;
/*
- * Call calcPllValue() to fill up the other fields for PLL structure.
- * Sometime, the chip cannot set up the exact clock required by User.
- * Return value from calcPllValue() gives the actual possible clock.
+ * Call calcPllValue() to fill the other fields of PLL structure.
+ * Sometime, the chip cannot set up the exact clock
+ * required by the User.
+ * Return value of calcPllValue gives the actual possible clock.
*/
ulActualMxClk = calcPllValue(frequency, &pll);
@@ -94,8 +95,8 @@ static void setMemoryClock(unsigned int frequency)
if (frequency) {
/*
- * Set the frequency to the maximum frequency that the DDR Memory can take
- * which is 336MHz.
+ * Set the frequency to the maximum frequency
+ * that the DDR Memory can take which is 336MHz.
*/
if (frequency > MHz(336))
frequency = MHz(336);
@@ -305,7 +306,9 @@ int ddk750_initHw(initchip_param_t *pInitParam)
*/
unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
{
- /* as sm750 register definition, N located in 2,15 and M located in 1,255 */
+ /* as sm750 register definition,
+ * N located in 2,15 and M located in 1,255
+ */
int N, M, X, d;
int mini_diff;
unsigned int RN, quo, rem, fl_quo;
@@ -325,12 +328,16 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
request = request_orig / 1000;
input = pll->inputFreq / 1000;
- /* for MXCLK register , no POD provided, so need be treated differently */
+ /* for MXCLK register,
+ * no POD provided, so need be treated differently
+ */
if (pll->clockType = MXCLK_PLL)
max_d = 3;
for (N = 15; N > 1; N--) {
- /* RN will not exceed maximum long if @request <= 285 MHZ (for 32bit cpu) */
+ /* RN will not exceed maximum long
+ * if @request <= 285 MHZ (for 32bit cpu)
+ */
RN = N * request;
quo = RN / input;
rem = RN % input;/* rem always small than 14318181 */
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c
2016-09-15 20:15 ` Moshe Green
@ 2016-09-15 20:16 ` Moshe Green
0 siblings, 0 replies; 8+ messages in thread
From: Moshe Green @ 2016-09-15 20:16 UTC (permalink / raw)
To: sudipm.mukherjee, teddy.wang, gregkh; +Cc: linux-fbdev, devel, linux-kernel
Fix the following warning types:
- line length
- block comment line * prefix
- trailing */ on a separate line
found by the checkpatch.pl tool in multiple block comments.
Fix a single spelling error in a comment.
Signed-off-by: Moshe Green <mgmoshes@gmail.com>
---
drivers/staging/sm750fb/ddk750_chip.c | 49 +++++++++++++++++++----------------
1 file changed, 27 insertions(+), 22 deletions(-)
diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c
index 7cba1ab..f557b6d 100644
--- a/drivers/staging/sm750fb/ddk750_chip.c
+++ b/drivers/staging/sm750fb/ddk750_chip.c
@@ -145,8 +145,9 @@ static void setMasterClock(unsigned int frequency)
return;
if (frequency) {
- /* Set the frequency to the maximum frequency that the SM750 engine can
- run, which is about 190 MHz. */
+ /* Set the frequency to the maximum frequency
+ * that the SM750 engine can run, which is about 190 MHz.
+ */
if (frequency > MHz(190))
frequency = MHz(190);
@@ -243,9 +244,10 @@ int ddk750_initHw(initchip_param_t *pInitParam)
setMasterClock(MHz(pInitParam->masterClock));
- /* Reset the memory controller. If the memory controller is not reset in SM750,
- the system might hang when sw accesses the memory.
- The memory should be resetted after changing the MXCLK.
+ /* Reset the memory controller.
+ * If the memory controller is not reset in SM750,
+ * the system might hang when sw accesses the memory.
+ * The memory should be resetted after changing the MXCLK.
*/
if (pInitParam->resetMemory = 1) {
reg = PEEK32(MISC_CTRL);
@@ -289,21 +291,22 @@ int ddk750_initHw(initchip_param_t *pInitParam)
}
/*
- monk liu @ 4/6/2011:
- re-write the calculatePLL function of ddk750.
- the original version function does not use some mathematics tricks and shortcut
- when it doing the calculation of the best N,M,D combination
- I think this version gives a little upgrade in speed
-
- 750 pll clock formular:
- Request Clock = (Input Clock * M )/(N * X)
-
- Input Clock = 14318181 hz
- X = 2 power D
- D ={0,1,2,3,4,5,6}
- M = {1,...,255}
- N = {2,...,15}
-*/
+ * monk liu @ 4/6/2011:
+ * re-write the calculatePLL function of ddk750.
+ * the original version function does not use
+ * some mathematics tricks and shortcut
+ * when it doing the calculation of the best N,M,D combination
+ * I think this version gives a little upgrade in speed
+ *
+ * 750 pll clock formular:
+ * Request Clock = (Input Clock * M )/(N * X)
+ *
+ * Input Clock = 14318181 hz
+ * X = 2 power D
+ * D ={0,1,2,3,4,5,6}
+ * M = {1,...,255}
+ * N = {2,...,15}
+ */
unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
{
/* as sm750 register definition,
@@ -318,8 +321,10 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
int max_d = 6;
if (getChipType() = SM750LE) {
- /* SM750LE don't have prgrammable PLL and M/N values to work on.
- Just return the requested clock. */
+ /* SM750LE don't have
+ * programmable PLL and M/N values to work on.
+ * Just return the requested clock.
+ */
return request_orig;
}
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread