From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christoph Hellwig Date: Thu, 15 Mar 2018 14:17:49 +0000 Subject: Re: [PATCH 00/16] remove eight obsolete architectures Message-Id: <20180315141749.GA27100@infradead.org> List-Id: References: <20180314143529.1456168-1-arnd@arndb.de> <2929.1521106970@warthog.procyon.org.uk> <6c9d075c-d7a8-72a5-9b2d-af1feaa06c6c@suse.de> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Arnd Bergmann Cc: linux-arch , linux-block , linux-fbdev@vger.kernel.org, linux-watchdog@vger.kernel.org, "open list:DOCUMENTATION" , Networking , dri-devel , linux-usb@vger.kernel.org, linux-wireless , Linux Kernel Mailing List , linux-pwm@vger.kernel.org, linux-spi , David Howells , IDE-ML , Hannes Reinecke , "open list:HID CORE LAYER" , Linux FS-devel Mailing List , Linux-MM , linux-rtc@vger.kernel.org On Thu, Mar 15, 2018 at 11:42:25AM +0100, Arnd Bergmann wrote: > Is anyone producing a chip that includes enough of the Privileged ISA spec > to have things like system calls, but not the MMU parts? Various SiFive SOCs seem to support M and U mode, but no S mode or iommu. That should be enough for nommu Linux running in M mode if someone cares enough to actually port it.