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* [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions
@ 2026-03-03 23:24 Gabriel Windlin
  2026-03-03 23:24 ` [PATCH 2/8] staging: sm750fb: remove unused CSC register definitions Gabriel Windlin
                   ` (7 more replies)
  0 siblings, 8 replies; 10+ messages in thread
From: Gabriel Windlin @ 2026-03-03 23:24 UTC (permalink / raw)
  To: Sudip Mukherjee, Teddy Wang, Greg Kroah-Hartman, linux-fbdev,
	linux-staging, linux-kernel
  Cc: Gabriel Windlin

The GPIO_MUX_0 through GPIO_MUX_31 bit field macros defined in
ddk750_reg.h are not referenced anywhere in the driver. The register
address GPIO_MUX itself is still used by ddk750_swi2c.c. Remove the
unused bit definitions to reduce dead code as noted in the TODO file.

Signed-off-by: Gabriel Windlin <gawindlin@gmail.com>
---
 drivers/staging/sm750fb/ddk750_reg.h | 32 ----------------------------
 1 file changed, 32 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h
index fe412ead72e5..59ecbc0d48f7 100644
--- a/drivers/staging/sm750fb/ddk750_reg.h
+++ b/drivers/staging/sm750fb/ddk750_reg.h
@@ -76,38 +76,6 @@
 #define MISC_CTRL_EMBEDDED_LOCALMEM_OFF               BIT(0)
 
 #define GPIO_MUX                                      0x000008
-#define GPIO_MUX_31                                   BIT(31)
-#define GPIO_MUX_30                                   BIT(30)
-#define GPIO_MUX_29                                   BIT(29)
-#define GPIO_MUX_28                                   BIT(28)
-#define GPIO_MUX_27                                   BIT(27)
-#define GPIO_MUX_26                                   BIT(26)
-#define GPIO_MUX_25                                   BIT(25)
-#define GPIO_MUX_24                                   BIT(24)
-#define GPIO_MUX_23                                   BIT(23)
-#define GPIO_MUX_22                                   BIT(22)
-#define GPIO_MUX_21                                   BIT(21)
-#define GPIO_MUX_20                                   BIT(20)
-#define GPIO_MUX_19                                   BIT(19)
-#define GPIO_MUX_18                                   BIT(18)
-#define GPIO_MUX_17                                   BIT(17)
-#define GPIO_MUX_16                                   BIT(16)
-#define GPIO_MUX_15                                   BIT(15)
-#define GPIO_MUX_14                                   BIT(14)
-#define GPIO_MUX_13                                   BIT(13)
-#define GPIO_MUX_12                                   BIT(12)
-#define GPIO_MUX_11                                   BIT(11)
-#define GPIO_MUX_10                                   BIT(10)
-#define GPIO_MUX_9                                    BIT(9)
-#define GPIO_MUX_8                                    BIT(8)
-#define GPIO_MUX_7                                    BIT(7)
-#define GPIO_MUX_6                                    BIT(6)
-#define GPIO_MUX_5                                    BIT(5)
-#define GPIO_MUX_4                                    BIT(4)
-#define GPIO_MUX_3                                    BIT(3)
-#define GPIO_MUX_2                                    BIT(2)
-#define GPIO_MUX_1                                    BIT(1)
-#define GPIO_MUX_0                                    BIT(0)
 
 #define LOCALMEM_ARBITRATION                          0x00000C
 #define LOCALMEM_ARBITRATION_ROTATE                   BIT(28)
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 2/8] staging: sm750fb: remove unused CSC register definitions
  2026-03-03 23:24 [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions Gabriel Windlin
@ 2026-03-03 23:24 ` Gabriel Windlin
  2026-03-03 23:24 ` [PATCH 3/8] staging: sm750fb: remove unused ZV capture " Gabriel Windlin
                   ` (6 subsequent siblings)
  7 siblings, 0 replies; 10+ messages in thread
From: Gabriel Windlin @ 2026-03-03 23:24 UTC (permalink / raw)
  To: Sudip Mukherjee, Teddy Wang, Greg Kroah-Hartman, linux-fbdev,
	linux-staging, linux-kernel
  Cc: Gabriel Windlin

The Color Space Conversion (CSC) register macros defined in ddk750_reg.h
are not referenced anywhere in the driver. Remove them to reduce dead
code as noted in the TODO file.

Signed-off-by: Gabriel Windlin <gawindlin@gmail.com>
---
 drivers/staging/sm750fb/ddk750_reg.h | 79 ----------------------------
 1 file changed, 79 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h
index 59ecbc0d48f7..13b04870ad9b 100644
--- a/drivers/staging/sm750fb/ddk750_reg.h
+++ b/drivers/staging/sm750fb/ddk750_reg.h
@@ -1126,85 +1126,6 @@
 /* Panel Palette register starts at 0x080C00 ~ 0x080FFC */
 #define CRT_PALETTE_RAM                               0x080C00
 
-/* Color Space Conversion registers. */
-
-#define CSC_Y_SOURCE_BASE                               0x1000C8
-#define CSC_Y_SOURCE_BASE_EXT                           BIT(27)
-#define CSC_Y_SOURCE_BASE_CS                            BIT(26)
-#define CSC_Y_SOURCE_BASE_ADDRESS_MASK                  0x3ffffff
-
-#define CSC_CONSTANTS                                   0x1000CC
-#define CSC_CONSTANTS_Y_MASK                            (0xff << 24)
-#define CSC_CONSTANTS_R_MASK                            (0xff << 16)
-#define CSC_CONSTANTS_G_MASK                            (0xff << 8)
-#define CSC_CONSTANTS_B_MASK                            0xff
-
-#define CSC_Y_SOURCE_X                                  0x1000D0
-#define CSC_Y_SOURCE_X_INTEGER_MASK                     (0x7ff << 16)
-#define CSC_Y_SOURCE_X_FRACTION_MASK                    (0x1fff << 3)
-
-#define CSC_Y_SOURCE_Y                                  0x1000D4
-#define CSC_Y_SOURCE_Y_INTEGER_MASK                     (0xfff << 16)
-#define CSC_Y_SOURCE_Y_FRACTION_MASK                    (0x1fff << 3)
-
-#define CSC_U_SOURCE_BASE                               0x1000D8
-#define CSC_U_SOURCE_BASE_EXT                           BIT(27)
-#define CSC_U_SOURCE_BASE_CS                            BIT(26)
-#define CSC_U_SOURCE_BASE_ADDRESS_MASK                  0x3ffffff
-
-#define CSC_V_SOURCE_BASE                               0x1000DC
-#define CSC_V_SOURCE_BASE_EXT                           BIT(27)
-#define CSC_V_SOURCE_BASE_CS                            BIT(26)
-#define CSC_V_SOURCE_BASE_ADDRESS_MASK                  0x3ffffff
-
-#define CSC_SOURCE_DIMENSION                            0x1000E0
-#define CSC_SOURCE_DIMENSION_X_MASK                     (0xffff << 16)
-#define CSC_SOURCE_DIMENSION_Y_MASK                     0xffff
-
-#define CSC_SOURCE_PITCH                                0x1000E4
-#define CSC_SOURCE_PITCH_Y_MASK                         (0xffff << 16)
-#define CSC_SOURCE_PITCH_UV_MASK                        0xffff
-
-#define CSC_DESTINATION                                 0x1000E8
-#define CSC_DESTINATION_WRAP                            BIT(31)
-#define CSC_DESTINATION_X_MASK                          (0xfff << 16)
-#define CSC_DESTINATION_Y_MASK                          0xfff
-
-#define CSC_DESTINATION_DIMENSION                       0x1000EC
-#define CSC_DESTINATION_DIMENSION_X_MASK                (0xffff << 16)
-#define CSC_DESTINATION_DIMENSION_Y_MASK                0xffff
-
-#define CSC_DESTINATION_PITCH                           0x1000F0
-#define CSC_DESTINATION_PITCH_X_MASK                    (0xffff << 16)
-#define CSC_DESTINATION_PITCH_Y_MASK                    0xffff
-
-#define CSC_SCALE_FACTOR                                0x1000F4
-#define CSC_SCALE_FACTOR_HORIZONTAL_MASK                (0xffff << 16)
-#define CSC_SCALE_FACTOR_VERTICAL_MASK                  0xffff
-
-#define CSC_DESTINATION_BASE                            0x1000F8
-#define CSC_DESTINATION_BASE_EXT                        BIT(27)
-#define CSC_DESTINATION_BASE_CS                         BIT(26)
-#define CSC_DESTINATION_BASE_ADDRESS_MASK               0x3ffffff
-
-#define CSC_CONTROL                                     0x1000FC
-#define CSC_CONTROL_STATUS                              BIT(31)
-#define CSC_CONTROL_SOURCE_FORMAT_MASK                  (0x7 << 28)
-#define CSC_CONTROL_SOURCE_FORMAT_YUV422                (0x0 << 28)
-#define CSC_CONTROL_SOURCE_FORMAT_YUV420I               (0x1 << 28)
-#define CSC_CONTROL_SOURCE_FORMAT_YUV420                (0x2 << 28)
-#define CSC_CONTROL_SOURCE_FORMAT_YVU9                  (0x3 << 28)
-#define CSC_CONTROL_SOURCE_FORMAT_IYU1                  (0x4 << 28)
-#define CSC_CONTROL_SOURCE_FORMAT_IYU2                  (0x5 << 28)
-#define CSC_CONTROL_SOURCE_FORMAT_RGB565                (0x6 << 28)
-#define CSC_CONTROL_SOURCE_FORMAT_RGB8888               (0x7 << 28)
-#define CSC_CONTROL_DESTINATION_FORMAT_MASK             (0x3 << 26)
-#define CSC_CONTROL_DESTINATION_FORMAT_RGB565           (0x0 << 26)
-#define CSC_CONTROL_DESTINATION_FORMAT_RGB8888          (0x1 << 26)
-#define CSC_CONTROL_HORIZONTAL_FILTER                   BIT(25)
-#define CSC_CONTROL_VERTICAL_FILTER                     BIT(24)
-#define CSC_CONTROL_BYTE_ORDER                          BIT(23)
-
 #define DE_DATA_PORT                                    0x110000
 
 #define I2C_BYTE_COUNT                                  0x010040
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 3/8] staging: sm750fb: remove unused ZV capture register definitions
  2026-03-03 23:24 [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions Gabriel Windlin
  2026-03-03 23:24 ` [PATCH 2/8] staging: sm750fb: remove unused CSC register definitions Gabriel Windlin
@ 2026-03-03 23:24 ` Gabriel Windlin
  2026-03-03 23:24 ` [PATCH 4/8] staging: sm750fb: remove unused alpha and cursor " Gabriel Windlin
                   ` (5 subsequent siblings)
  7 siblings, 0 replies; 10+ messages in thread
From: Gabriel Windlin @ 2026-03-03 23:24 UTC (permalink / raw)
  To: Sudip Mukherjee, Teddy Wang, Greg Kroah-Hartman, linux-fbdev,
	linux-staging, linux-kernel
  Cc: Gabriel Windlin

The ZV0 and ZV1 video capture port register macros defined in
ddk750_reg.h are not referenced anywhere in the driver. Remove them
to reduce dead code as noted in the TODO file.

Signed-off-by: Gabriel Windlin <gawindlin@gmail.com>
---
 drivers/staging/sm750fb/ddk750_reg.h | 141 ---------------------------
 1 file changed, 141 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h
index 13b04870ad9b..efdafa993e86 100644
--- a/drivers/staging/sm750fb/ddk750_reg.h
+++ b/drivers/staging/sm750fb/ddk750_reg.h
@@ -1168,147 +1168,6 @@
 #define I2C_DATA14                                      0x010052
 #define I2C_DATA15                                      0x010053
 
-#define ZV0_CAPTURE_CTRL                                0x090000
-#define ZV0_CAPTURE_CTRL_FIELD_INPUT                    BIT(27)
-#define ZV0_CAPTURE_CTRL_SCAN                           BIT(26)
-#define ZV0_CAPTURE_CTRL_CURRENT_BUFFER                 BIT(25)
-#define ZV0_CAPTURE_CTRL_VERTICAL_SYNC                  BIT(24)
-#define ZV0_CAPTURE_CTRL_ADJ                            BIT(19)
-#define ZV0_CAPTURE_CTRL_HA                             BIT(18)
-#define ZV0_CAPTURE_CTRL_VSK                            BIT(17)
-#define ZV0_CAPTURE_CTRL_HSK                            BIT(16)
-#define ZV0_CAPTURE_CTRL_FD                             BIT(15)
-#define ZV0_CAPTURE_CTRL_VP                             BIT(14)
-#define ZV0_CAPTURE_CTRL_HP                             BIT(13)
-#define ZV0_CAPTURE_CTRL_CP                             BIT(12)
-#define ZV0_CAPTURE_CTRL_UVS                            BIT(11)
-#define ZV0_CAPTURE_CTRL_BS                             BIT(10)
-#define ZV0_CAPTURE_CTRL_CS                             BIT(9)
-#define ZV0_CAPTURE_CTRL_CF                             BIT(8)
-#define ZV0_CAPTURE_CTRL_FS                             BIT(7)
-#define ZV0_CAPTURE_CTRL_WEAVE                          BIT(6)
-#define ZV0_CAPTURE_CTRL_BOB                            BIT(5)
-#define ZV0_CAPTURE_CTRL_DB                             BIT(4)
-#define ZV0_CAPTURE_CTRL_CC                             BIT(3)
-#define ZV0_CAPTURE_CTRL_RGB                            BIT(2)
-#define ZV0_CAPTURE_CTRL_656                            BIT(1)
-#define ZV0_CAPTURE_CTRL_CAP                            BIT(0)
-
-#define ZV0_CAPTURE_CLIP                                0x090004
-#define ZV0_CAPTURE_CLIP_EYCLIP_MASK                    (0x3ff << 16)
-#define ZV0_CAPTURE_CLIP_XCLIP_MASK                     0x3ff
-
-#define ZV0_CAPTURE_SIZE                                0x090008
-#define ZV0_CAPTURE_SIZE_HEIGHT_MASK                    (0x7ff << 16)
-#define ZV0_CAPTURE_SIZE_WIDTH_MASK                     0x7ff
-
-#define ZV0_CAPTURE_BUF0_ADDRESS                        0x09000C
-#define ZV0_CAPTURE_BUF0_ADDRESS_STATUS                 BIT(31)
-#define ZV0_CAPTURE_BUF0_ADDRESS_EXT                    BIT(27)
-#define ZV0_CAPTURE_BUF0_ADDRESS_CS                     BIT(26)
-#define ZV0_CAPTURE_BUF0_ADDRESS_ADDRESS_MASK           0x3ffffff
-
-#define ZV0_CAPTURE_BUF1_ADDRESS                        0x090010
-#define ZV0_CAPTURE_BUF1_ADDRESS_STATUS                 BIT(31)
-#define ZV0_CAPTURE_BUF1_ADDRESS_EXT                    BIT(27)
-#define ZV0_CAPTURE_BUF1_ADDRESS_CS                     BIT(26)
-#define ZV0_CAPTURE_BUF1_ADDRESS_ADDRESS_MASK           0x3ffffff
-
-#define ZV0_CAPTURE_BUF_OFFSET                          0x090014
-#ifndef VALIDATION_CHIP
-    #define ZV0_CAPTURE_BUF_OFFSET_YCLIP_ODD_FIELD      (0x3ff << 16)
-#endif
-#define ZV0_CAPTURE_BUF_OFFSET_OFFSET_MASK              0xffff
-
-#define ZV0_CAPTURE_FIFO_CTRL                           0x090018
-#define ZV0_CAPTURE_FIFO_CTRL_FIFO_MASK                 0x7
-#define ZV0_CAPTURE_FIFO_CTRL_FIFO_0                    0
-#define ZV0_CAPTURE_FIFO_CTRL_FIFO_1                    1
-#define ZV0_CAPTURE_FIFO_CTRL_FIFO_2                    2
-#define ZV0_CAPTURE_FIFO_CTRL_FIFO_3                    3
-#define ZV0_CAPTURE_FIFO_CTRL_FIFO_4                    4
-#define ZV0_CAPTURE_FIFO_CTRL_FIFO_5                    5
-#define ZV0_CAPTURE_FIFO_CTRL_FIFO_6                    6
-#define ZV0_CAPTURE_FIFO_CTRL_FIFO_7                    7
-
-#define ZV0_CAPTURE_YRGB_CONST                          0x09001C
-#define ZV0_CAPTURE_YRGB_CONST_Y_MASK                   (0xff << 24)
-#define ZV0_CAPTURE_YRGB_CONST_R_MASK                   (0xff << 16)
-#define ZV0_CAPTURE_YRGB_CONST_G_MASK                   (0xff << 8)
-#define ZV0_CAPTURE_YRGB_CONST_B_MASK                   0xff
-
-#define ZV0_CAPTURE_LINE_COMP                           0x090020
-#define ZV0_CAPTURE_LINE_COMP_LC_MASK                   0x7ff
-
-/* ZV1 */
-
-#define ZV1_CAPTURE_CTRL                                0x098000
-#define ZV1_CAPTURE_CTRL_FIELD_INPUT                    BIT(27)
-#define ZV1_CAPTURE_CTRL_SCAN                           BIT(26)
-#define ZV1_CAPTURE_CTRL_CURRENT_BUFFER                 BIT(25)
-#define ZV1_CAPTURE_CTRL_VERTICAL_SYNC                  BIT(24)
-#define ZV1_CAPTURE_CTRL_PANEL                          BIT(20)
-#define ZV1_CAPTURE_CTRL_ADJ                            BIT(19)
-#define ZV1_CAPTURE_CTRL_HA                             BIT(18)
-#define ZV1_CAPTURE_CTRL_VSK                            BIT(17)
-#define ZV1_CAPTURE_CTRL_HSK                            BIT(16)
-#define ZV1_CAPTURE_CTRL_FD                             BIT(15)
-#define ZV1_CAPTURE_CTRL_VP                             BIT(14)
-#define ZV1_CAPTURE_CTRL_HP                             BIT(13)
-#define ZV1_CAPTURE_CTRL_CP                             BIT(12)
-#define ZV1_CAPTURE_CTRL_UVS                            BIT(11)
-#define ZV1_CAPTURE_CTRL_BS                             BIT(10)
-#define ZV1_CAPTURE_CTRL_CS                             BIT(9)
-#define ZV1_CAPTURE_CTRL_CF                             BIT(8)
-#define ZV1_CAPTURE_CTRL_FS                             BIT(7)
-#define ZV1_CAPTURE_CTRL_WEAVE                          BIT(6)
-#define ZV1_CAPTURE_CTRL_BOB                            BIT(5)
-#define ZV1_CAPTURE_CTRL_DB                             BIT(4)
-#define ZV1_CAPTURE_CTRL_CC                             BIT(3)
-#define ZV1_CAPTURE_CTRL_RGB                            BIT(2)
-#define ZV1_CAPTURE_CTRL_656                            BIT(1)
-#define ZV1_CAPTURE_CTRL_CAP                            BIT(0)
-
-#define ZV1_CAPTURE_CLIP                                0x098004
-#define ZV1_CAPTURE_CLIP_YCLIP_MASK                     (0x3ff << 16)
-#define ZV1_CAPTURE_CLIP_XCLIP_MASK                     0x3ff
-
-#define ZV1_CAPTURE_SIZE                                0x098008
-#define ZV1_CAPTURE_SIZE_HEIGHT_MASK                    (0x7ff << 16)
-#define ZV1_CAPTURE_SIZE_WIDTH_MASK                     0x7ff
-
-#define ZV1_CAPTURE_BUF0_ADDRESS                        0x09800C
-#define ZV1_CAPTURE_BUF0_ADDRESS_STATUS                 BIT(31)
-#define ZV1_CAPTURE_BUF0_ADDRESS_EXT                    BIT(27)
-#define ZV1_CAPTURE_BUF0_ADDRESS_CS                     BIT(26)
-#define ZV1_CAPTURE_BUF0_ADDRESS_ADDRESS_MASK           0x3ffffff
-
-#define ZV1_CAPTURE_BUF1_ADDRESS                        0x098010
-#define ZV1_CAPTURE_BUF1_ADDRESS_STATUS                 BIT(31)
-#define ZV1_CAPTURE_BUF1_ADDRESS_EXT                    BIT(27)
-#define ZV1_CAPTURE_BUF1_ADDRESS_CS                     BIT(26)
-#define ZV1_CAPTURE_BUF1_ADDRESS_ADDRESS_MASK           0x3ffffff
-
-#define ZV1_CAPTURE_BUF_OFFSET                          0x098014
-#define ZV1_CAPTURE_BUF_OFFSET_OFFSET_MASK              0xffff
-
-#define ZV1_CAPTURE_FIFO_CTRL                           0x098018
-#define ZV1_CAPTURE_FIFO_CTRL_FIFO_MASK                 0x7
-#define ZV1_CAPTURE_FIFO_CTRL_FIFO_0                    0
-#define ZV1_CAPTURE_FIFO_CTRL_FIFO_1                    1
-#define ZV1_CAPTURE_FIFO_CTRL_FIFO_2                    2
-#define ZV1_CAPTURE_FIFO_CTRL_FIFO_3                    3
-#define ZV1_CAPTURE_FIFO_CTRL_FIFO_4                    4
-#define ZV1_CAPTURE_FIFO_CTRL_FIFO_5                    5
-#define ZV1_CAPTURE_FIFO_CTRL_FIFO_6                    6
-#define ZV1_CAPTURE_FIFO_CTRL_FIFO_7                    7
-
-#define ZV1_CAPTURE_YRGB_CONST                          0x09801C
-#define ZV1_CAPTURE_YRGB_CONST_Y_MASK                   (0xff << 24)
-#define ZV1_CAPTURE_YRGB_CONST_R_MASK                   (0xff << 16)
-#define ZV1_CAPTURE_YRGB_CONST_G_MASK                   (0xff << 8)
-#define ZV1_CAPTURE_YRGB_CONST_B_MASK                   0xff
-
 #define DMA_1_SOURCE                                    0x0D0010
 #define DMA_1_SOURCE_ADDRESS_EXT                        BIT(27)
 #define DMA_1_SOURCE_ADDRESS_CS                         BIT(26)
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 4/8] staging: sm750fb: remove unused alpha and cursor register definitions
  2026-03-03 23:24 [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions Gabriel Windlin
  2026-03-03 23:24 ` [PATCH 2/8] staging: sm750fb: remove unused CSC register definitions Gabriel Windlin
  2026-03-03 23:24 ` [PATCH 3/8] staging: sm750fb: remove unused ZV capture " Gabriel Windlin
@ 2026-03-03 23:24 ` Gabriel Windlin
  2026-03-03 23:24 ` [PATCH 5/8] staging: sm750fb: remove unused memory arbitration " Gabriel Windlin
                   ` (4 subsequent siblings)
  7 siblings, 0 replies; 10+ messages in thread
From: Gabriel Windlin @ 2026-03-03 23:24 UTC (permalink / raw)
  To: Sudip Mukherjee, Teddy Wang, Greg Kroah-Hartman, linux-fbdev,
	linux-staging, linux-kernel
  Cc: Gabriel Windlin

The VIDEO_ALPHA sub-register macros (FB_ADDRESS, FB_WIDTH, PLANE_TL,
PLANE_BR, SCALE, CHROMA_KEY, COLOR_LOOKUP_*), the PANEL_HWC hardware
cursor register macros, and the ALPHA sub-register macros defined in
ddk750_reg.h are not referenced anywhere in the driver. The register
addresses VIDEO_ALPHA_DISPLAY_CTRL and ALPHA_DISPLAY_CTRL are kept as
they are still in use. Remove the rest to reduce dead code as noted in
the TODO file.

Signed-off-by: Gabriel Windlin <gawindlin@gmail.com>
---
 drivers/staging/sm750fb/ddk750_reg.h | 282 ---------------------------
 1 file changed, 282 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h
index efdafa993e86..24e826c31721 100644
--- a/drivers/staging/sm750fb/ddk750_reg.h
+++ b/drivers/staging/sm750fb/ddk750_reg.h
@@ -674,292 +674,10 @@
 /* Video Alpha Control */
 
 #define VIDEO_ALPHA_DISPLAY_CTRL                        0x080080
-#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT                 BIT(28)
-#define VIDEO_ALPHA_DISPLAY_CTRL_ALPHA_MASK             (0xf << 24)
-#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_MASK              (0x3 << 16)
-#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_1                 (0x0 << 16)
-#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_3                 (0x1 << 16)
-#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_7                 (0x2 << 16)
-#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_11                (0x3 << 16)
-#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE             BIT(11)
-#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE             BIT(10)
-#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE              BIT(9)
-#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE              BIT(8)
-#define VIDEO_ALPHA_DISPLAY_CTRL_PIXEL_MASK             (0xf << 4)
-#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY             BIT(3)
-#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_MASK            0x3
-#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_8               0x0
-#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_16              0x1
-#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4       0x2
-#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4_4_4   0x3
-
-#define VIDEO_ALPHA_FB_ADDRESS                        0x080084
-#define VIDEO_ALPHA_FB_ADDRESS_STATUS                 BIT(31)
-#define VIDEO_ALPHA_FB_ADDRESS_EXT                    BIT(27)
-#define VIDEO_ALPHA_FB_ADDRESS_ADDRESS_MASK           0x3ffffff
-
-#define VIDEO_ALPHA_FB_WIDTH                          0x080088
-#define VIDEO_ALPHA_FB_WIDTH_WIDTH_MASK               (0x3fff << 16)
-#define VIDEO_ALPHA_FB_WIDTH_OFFSET_MASK              0x3fff
-
-#define VIDEO_ALPHA_FB_LAST_ADDRESS                   0x08008C
-#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT               BIT(27)
-#define VIDEO_ALPHA_FB_LAST_ADDRESS_ADDRESS_MASK      0x3ffffff
-
-#define VIDEO_ALPHA_PLANE_TL                          0x080090
-#define VIDEO_ALPHA_PLANE_TL_TOP_MASK                 (0x7ff << 16)
-#define VIDEO_ALPHA_PLANE_TL_LEFT_MASK                0x7ff
-
-#define VIDEO_ALPHA_PLANE_BR                          0x080094
-#define VIDEO_ALPHA_PLANE_BR_BOTTOM_MASK              (0x7ff << 16)
-#define VIDEO_ALPHA_PLANE_BR_RIGHT_MASK               0x7ff
-
-#define VIDEO_ALPHA_SCALE                             0x080098
-#define VIDEO_ALPHA_SCALE_VERTICAL_MODE               BIT(31)
-#define VIDEO_ALPHA_SCALE_VERTICAL_SCALE_MASK         (0xfff << 16)
-#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE             BIT(15)
-#define VIDEO_ALPHA_SCALE_HORIZONTAL_SCALE_MASK       0xfff
-
-#define VIDEO_ALPHA_INITIAL_SCALE                     0x08009C
-#define VIDEO_ALPHA_INITIAL_SCALE_VERTICAL_MASK       (0xfff << 16)
-#define VIDEO_ALPHA_INITIAL_SCALE_HORIZONTAL_MASK     0xfff
-
-#define VIDEO_ALPHA_CHROMA_KEY                        0x0800A0
-#define VIDEO_ALPHA_CHROMA_KEY_MASK_MASK              (0xffff << 16)
-#define VIDEO_ALPHA_CHROMA_KEY_VALUE_MASK             0xffff
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_01                   0x0800A4
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_BLUE_MASK       0x1f
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_23                   0x0800A8
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_BLUE_MASK       0x1f
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_45                   0x0800AC
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_BLUE_MASK       0x1f
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_67                   0x0800B0
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_BLUE_MASK       0x1f
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_89                   0x0800B4
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_BLUE_MASK       0x1f
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB                   0x0800B8
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_BLUE_MASK       0x1f
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD                   0x0800BC
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_BLUE_MASK       0x1f
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF                   0x0800C0
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_BLUE_MASK       0x1f
-
-/* Panel Cursor Control */
-
-#define PANEL_HWC_ADDRESS                             0x0800F0
-#define PANEL_HWC_ADDRESS_ENABLE                      BIT(31)
-#define PANEL_HWC_ADDRESS_EXT                         BIT(27)
-#define PANEL_HWC_ADDRESS_ADDRESS_MASK                0x3ffffff
-
-#define PANEL_HWC_LOCATION                            0x0800F4
-#define PANEL_HWC_LOCATION_TOP                        BIT(27)
-#define PANEL_HWC_LOCATION_Y_MASK                     (0x7ff << 16)
-#define PANEL_HWC_LOCATION_LEFT                       BIT(11)
-#define PANEL_HWC_LOCATION_X_MASK                     0x7ff
-
-#define PANEL_HWC_COLOR_12                            0x0800F8
-#define PANEL_HWC_COLOR_12_2_RGB565_MASK              (0xffff << 16)
-#define PANEL_HWC_COLOR_12_1_RGB565_MASK              0xffff
-
-#define PANEL_HWC_COLOR_3                             0x0800FC
-#define PANEL_HWC_COLOR_3_RGB565_MASK                 0xffff
-
-/* Old Definitions +++ */
-#define PANEL_HWC_COLOR_01                            0x0800F8
-#define PANEL_HWC_COLOR_01_1_RED_MASK                 (0x1f << 27)
-#define PANEL_HWC_COLOR_01_1_GREEN_MASK               (0x3f << 21)
-#define PANEL_HWC_COLOR_01_1_BLUE_MASK                (0x1f << 16)
-#define PANEL_HWC_COLOR_01_0_RED_MASK                 (0x1f << 11)
-#define PANEL_HWC_COLOR_01_0_GREEN_MASK               (0x3f << 5)
-#define PANEL_HWC_COLOR_01_0_BLUE_MASK                0x1f
-
-#define PANEL_HWC_COLOR_2                             0x0800FC
-#define PANEL_HWC_COLOR_2_RED_MASK                    (0x1f << 11)
-#define PANEL_HWC_COLOR_2_GREEN_MASK                  (0x3f << 5)
-#define PANEL_HWC_COLOR_2_BLUE_MASK                   0x1f
-/* Old Definitions --- */
 
 /* Alpha Control */
 
 #define ALPHA_DISPLAY_CTRL                            0x080100
-#define ALPHA_DISPLAY_CTRL_SELECT                     BIT(28)
-#define ALPHA_DISPLAY_CTRL_ALPHA_MASK                 (0xf << 24)
-#define ALPHA_DISPLAY_CTRL_FIFO_MASK                  (0x3 << 16)
-#define ALPHA_DISPLAY_CTRL_FIFO_1                     (0x0 << 16)
-#define ALPHA_DISPLAY_CTRL_FIFO_3                     (0x1 << 16)
-#define ALPHA_DISPLAY_CTRL_FIFO_7                     (0x2 << 16)
-#define ALPHA_DISPLAY_CTRL_FIFO_11                    (0x3 << 16)
-#define ALPHA_DISPLAY_CTRL_PIXEL_MASK                 (0xf << 4)
-#define ALPHA_DISPLAY_CTRL_CHROMA_KEY                 BIT(3)
-#define ALPHA_DISPLAY_CTRL_FORMAT_MASK                0x3
-#define ALPHA_DISPLAY_CTRL_FORMAT_16                  0x1
-#define ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4           0x2
-#define ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4_4_4       0x3
-
-#define ALPHA_FB_ADDRESS                              0x080104
-#define ALPHA_FB_ADDRESS_STATUS                       BIT(31)
-#define ALPHA_FB_ADDRESS_EXT                          BIT(27)
-#define ALPHA_FB_ADDRESS_ADDRESS_MASK                 0x3ffffff
-
-#define ALPHA_FB_WIDTH                                0x080108
-#define ALPHA_FB_WIDTH_WIDTH_MASK                     (0x3fff << 16)
-#define ALPHA_FB_WIDTH_OFFSET_MASK                    0x3fff
-
-#define ALPHA_PLANE_TL                                0x08010C
-#define ALPHA_PLANE_TL_TOP_MASK                       (0x7ff << 16)
-#define ALPHA_PLANE_TL_LEFT_MASK                      0x7ff
-
-#define ALPHA_PLANE_BR                                0x080110
-#define ALPHA_PLANE_BR_BOTTOM_MASK                    (0x7ff << 16)
-#define ALPHA_PLANE_BR_RIGHT_MASK                     0x7ff
-
-#define ALPHA_CHROMA_KEY                              0x080114
-#define ALPHA_CHROMA_KEY_MASK_MASK                    (0xffff << 16)
-#define ALPHA_CHROMA_KEY_VALUE_MASK                   0xffff
-
-#define ALPHA_COLOR_LOOKUP_01                         0x080118
-#define ALPHA_COLOR_LOOKUP_01_1_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_01_1_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_01_1_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_01_1_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_01_0_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_01_0_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_01_0_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_01_0_BLUE_MASK             0x1f
-
-#define ALPHA_COLOR_LOOKUP_23                         0x08011C
-#define ALPHA_COLOR_LOOKUP_23_3_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_23_3_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_23_3_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_23_3_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_23_2_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_23_2_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_23_2_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_23_2_BLUE_MASK             0x1f
-
-#define ALPHA_COLOR_LOOKUP_45                         0x080120
-#define ALPHA_COLOR_LOOKUP_45_5_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_45_5_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_45_5_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_45_5_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_45_4_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_45_4_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_45_4_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_45_4_BLUE_MASK             0x1f
-
-#define ALPHA_COLOR_LOOKUP_67                         0x080124
-#define ALPHA_COLOR_LOOKUP_67_7_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_67_7_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_67_7_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_67_7_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_67_6_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_67_6_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_67_6_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_67_6_BLUE_MASK             0x1f
-
-#define ALPHA_COLOR_LOOKUP_89                         0x080128
-#define ALPHA_COLOR_LOOKUP_89_9_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_89_9_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_89_9_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_89_9_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_89_8_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_89_8_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_89_8_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_89_8_BLUE_MASK             0x1f
-
-#define ALPHA_COLOR_LOOKUP_AB                         0x08012C
-#define ALPHA_COLOR_LOOKUP_AB_B_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_AB_B_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_AB_B_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_AB_B_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_AB_A_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_AB_A_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_AB_A_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_AB_A_BLUE_MASK             0x1f
-
-#define ALPHA_COLOR_LOOKUP_CD                         0x080130
-#define ALPHA_COLOR_LOOKUP_CD_D_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_CD_D_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_CD_D_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_CD_D_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_CD_C_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_CD_C_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_CD_C_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_CD_C_BLUE_MASK             0x1f
-
-#define ALPHA_COLOR_LOOKUP_EF                         0x080134
-#define ALPHA_COLOR_LOOKUP_EF_F_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_EF_F_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_EF_F_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_EF_F_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_EF_E_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_EF_E_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_EF_E_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_EF_E_BLUE_MASK             0x1f
 
 /* CRT Graphics Control */
 
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 5/8] staging: sm750fb: remove unused memory arbitration register definitions
  2026-03-03 23:24 [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions Gabriel Windlin
                   ` (2 preceding siblings ...)
  2026-03-03 23:24 ` [PATCH 4/8] staging: sm750fb: remove unused alpha and cursor " Gabriel Windlin
@ 2026-03-03 23:24 ` Gabriel Windlin
  2026-03-03 23:24 ` [PATCH 6/8] staging: sm750fb: remove unused interrupt " Gabriel Windlin
                   ` (3 subsequent siblings)
  7 siblings, 0 replies; 10+ messages in thread
From: Gabriel Windlin @ 2026-03-03 23:24 UTC (permalink / raw)
  To: Sudip Mukherjee, Teddy Wang, Greg Kroah-Hartman, linux-fbdev,
	linux-staging, linux-kernel
  Cc: Gabriel Windlin

The LOCALMEM_ARBITRATION and PCIMEM_ARBITRATION register macros defined
in ddk750_reg.h are not referenced anywhere in the driver. Remove them
to reduce dead code as noted in the TODO file.

Signed-off-by: Gabriel Windlin <gawindlin@gmail.com>
---
 drivers/staging/sm750fb/ddk750_reg.h | 132 ---------------------------
 1 file changed, 132 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h
index 24e826c31721..dd1d67fb9856 100644
--- a/drivers/staging/sm750fb/ddk750_reg.h
+++ b/drivers/staging/sm750fb/ddk750_reg.h
@@ -77,138 +77,6 @@
 
 #define GPIO_MUX                                      0x000008
 
-#define LOCALMEM_ARBITRATION                          0x00000C
-#define LOCALMEM_ARBITRATION_ROTATE                   BIT(28)
-#define LOCALMEM_ARBITRATION_VGA_MASK                 (0x7 << 24)
-#define LOCALMEM_ARBITRATION_VGA_OFF                  (0x0 << 24)
-#define LOCALMEM_ARBITRATION_VGA_PRIORITY_1           (0x1 << 24)
-#define LOCALMEM_ARBITRATION_VGA_PRIORITY_2           (0x2 << 24)
-#define LOCALMEM_ARBITRATION_VGA_PRIORITY_3           (0x3 << 24)
-#define LOCALMEM_ARBITRATION_VGA_PRIORITY_4           (0x4 << 24)
-#define LOCALMEM_ARBITRATION_VGA_PRIORITY_5           (0x5 << 24)
-#define LOCALMEM_ARBITRATION_VGA_PRIORITY_6           (0x6 << 24)
-#define LOCALMEM_ARBITRATION_VGA_PRIORITY_7           (0x7 << 24)
-#define LOCALMEM_ARBITRATION_DMA_MASK                 (0x7 << 20)
-#define LOCALMEM_ARBITRATION_DMA_OFF                  (0x0 << 20)
-#define LOCALMEM_ARBITRATION_DMA_PRIORITY_1           (0x1 << 20)
-#define LOCALMEM_ARBITRATION_DMA_PRIORITY_2           (0x2 << 20)
-#define LOCALMEM_ARBITRATION_DMA_PRIORITY_3           (0x3 << 20)
-#define LOCALMEM_ARBITRATION_DMA_PRIORITY_4           (0x4 << 20)
-#define LOCALMEM_ARBITRATION_DMA_PRIORITY_5           (0x5 << 20)
-#define LOCALMEM_ARBITRATION_DMA_PRIORITY_6           (0x6 << 20)
-#define LOCALMEM_ARBITRATION_DMA_PRIORITY_7           (0x7 << 20)
-#define LOCALMEM_ARBITRATION_ZVPORT1_MASK             (0x7 << 16)
-#define LOCALMEM_ARBITRATION_ZVPORT1_OFF              (0x0 << 16)
-#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_1       (0x1 << 16)
-#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_2       (0x2 << 16)
-#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_3       (0x3 << 16)
-#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_4       (0x4 << 16)
-#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_5       (0x5 << 16)
-#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_6       (0x6 << 16)
-#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_7       (0x7 << 16)
-#define LOCALMEM_ARBITRATION_ZVPORT0_MASK             (0x7 << 12)
-#define LOCALMEM_ARBITRATION_ZVPORT0_OFF              (0x0 << 12)
-#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_1       (0x1 << 12)
-#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_2       (0x2 << 12)
-#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_3       (0x3 << 12)
-#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_4       (0x4 << 12)
-#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_5       (0x5 << 12)
-#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_6       (0x6 << 12)
-#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_7       (0x7 << 12)
-#define LOCALMEM_ARBITRATION_VIDEO_MASK               (0x7 << 8)
-#define LOCALMEM_ARBITRATION_VIDEO_OFF                (0x0 << 8)
-#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_1         (0x1 << 8)
-#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_2         (0x2 << 8)
-#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_3         (0x3 << 8)
-#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_4         (0x4 << 8)
-#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_5         (0x5 << 8)
-#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_6         (0x6 << 8)
-#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_7         (0x7 << 8)
-#define LOCALMEM_ARBITRATION_PANEL_MASK               (0x7 << 4)
-#define LOCALMEM_ARBITRATION_PANEL_OFF                (0x0 << 4)
-#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_1         (0x1 << 4)
-#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_2         (0x2 << 4)
-#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_3         (0x3 << 4)
-#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_4         (0x4 << 4)
-#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_5         (0x5 << 4)
-#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_6         (0x6 << 4)
-#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_7         (0x7 << 4)
-#define LOCALMEM_ARBITRATION_CRT_MASK                 0x7
-#define LOCALMEM_ARBITRATION_CRT_OFF                  0x0
-#define LOCALMEM_ARBITRATION_CRT_PRIORITY_1           0x1
-#define LOCALMEM_ARBITRATION_CRT_PRIORITY_2           0x2
-#define LOCALMEM_ARBITRATION_CRT_PRIORITY_3           0x3
-#define LOCALMEM_ARBITRATION_CRT_PRIORITY_4           0x4
-#define LOCALMEM_ARBITRATION_CRT_PRIORITY_5           0x5
-#define LOCALMEM_ARBITRATION_CRT_PRIORITY_6           0x6
-#define LOCALMEM_ARBITRATION_CRT_PRIORITY_7           0x7
-
-#define PCIMEM_ARBITRATION                            0x000010
-#define PCIMEM_ARBITRATION_ROTATE                     BIT(28)
-#define PCIMEM_ARBITRATION_VGA_MASK                   (0x7 << 24)
-#define PCIMEM_ARBITRATION_VGA_OFF                    (0x0 << 24)
-#define PCIMEM_ARBITRATION_VGA_PRIORITY_1             (0x1 << 24)
-#define PCIMEM_ARBITRATION_VGA_PRIORITY_2             (0x2 << 24)
-#define PCIMEM_ARBITRATION_VGA_PRIORITY_3             (0x3 << 24)
-#define PCIMEM_ARBITRATION_VGA_PRIORITY_4             (0x4 << 24)
-#define PCIMEM_ARBITRATION_VGA_PRIORITY_5             (0x5 << 24)
-#define PCIMEM_ARBITRATION_VGA_PRIORITY_6             (0x6 << 24)
-#define PCIMEM_ARBITRATION_VGA_PRIORITY_7             (0x7 << 24)
-#define PCIMEM_ARBITRATION_DMA_MASK                   (0x7 << 20)
-#define PCIMEM_ARBITRATION_DMA_OFF                    (0x0 << 20)
-#define PCIMEM_ARBITRATION_DMA_PRIORITY_1             (0x1 << 20)
-#define PCIMEM_ARBITRATION_DMA_PRIORITY_2             (0x2 << 20)
-#define PCIMEM_ARBITRATION_DMA_PRIORITY_3             (0x3 << 20)
-#define PCIMEM_ARBITRATION_DMA_PRIORITY_4             (0x4 << 20)
-#define PCIMEM_ARBITRATION_DMA_PRIORITY_5             (0x5 << 20)
-#define PCIMEM_ARBITRATION_DMA_PRIORITY_6             (0x6 << 20)
-#define PCIMEM_ARBITRATION_DMA_PRIORITY_7             (0x7 << 20)
-#define PCIMEM_ARBITRATION_ZVPORT1_MASK               (0x7 << 16)
-#define PCIMEM_ARBITRATION_ZVPORT1_OFF                (0x0 << 16)
-#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_1         (0x1 << 16)
-#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_2         (0x2 << 16)
-#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_3         (0x3 << 16)
-#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_4         (0x4 << 16)
-#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_5         (0x5 << 16)
-#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_6         (0x6 << 16)
-#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_7         (0x7 << 16)
-#define PCIMEM_ARBITRATION_ZVPORT0_MASK               (0x7 << 12)
-#define PCIMEM_ARBITRATION_ZVPORT0_OFF                (0x0 << 12)
-#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_1         (0x1 << 12)
-#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_2         (0x2 << 12)
-#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_3         (0x3 << 12)
-#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_4         (0x4 << 12)
-#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_5         (0x5 << 12)
-#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_6         (0x6 << 12)
-#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_7         (0x7 << 12)
-#define PCIMEM_ARBITRATION_VIDEO_MASK                 (0x7 << 8)
-#define PCIMEM_ARBITRATION_VIDEO_OFF                  (0x0 << 8)
-#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_1           (0x1 << 8)
-#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_2           (0x2 << 8)
-#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_3           (0x3 << 8)
-#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_4           (0x4 << 8)
-#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_5           (0x5 << 8)
-#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_6           (0x6 << 8)
-#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_7           (0x7 << 8)
-#define PCIMEM_ARBITRATION_PANEL_MASK                 (0x7 << 4)
-#define PCIMEM_ARBITRATION_PANEL_OFF                  (0x0 << 4)
-#define PCIMEM_ARBITRATION_PANEL_PRIORITY_1           (0x1 << 4)
-#define PCIMEM_ARBITRATION_PANEL_PRIORITY_2           (0x2 << 4)
-#define PCIMEM_ARBITRATION_PANEL_PRIORITY_3           (0x3 << 4)
-#define PCIMEM_ARBITRATION_PANEL_PRIORITY_4           (0x4 << 4)
-#define PCIMEM_ARBITRATION_PANEL_PRIORITY_5           (0x5 << 4)
-#define PCIMEM_ARBITRATION_PANEL_PRIORITY_6           (0x6 << 4)
-#define PCIMEM_ARBITRATION_PANEL_PRIORITY_7           (0x7 << 4)
-#define PCIMEM_ARBITRATION_CRT_MASK                   0x7
-#define PCIMEM_ARBITRATION_CRT_OFF                    0x0
-#define PCIMEM_ARBITRATION_CRT_PRIORITY_1             0x1
-#define PCIMEM_ARBITRATION_CRT_PRIORITY_2             0x2
-#define PCIMEM_ARBITRATION_CRT_PRIORITY_3             0x3
-#define PCIMEM_ARBITRATION_CRT_PRIORITY_4             0x4
-#define PCIMEM_ARBITRATION_CRT_PRIORITY_5             0x5
-#define PCIMEM_ARBITRATION_CRT_PRIORITY_6             0x6
-#define PCIMEM_ARBITRATION_CRT_PRIORITY_7             0x7
-
 #define RAW_INT                                       0x000020
 #define RAW_INT_ZVPORT1_VSYNC                         BIT(4)
 #define RAW_INT_ZVPORT0_VSYNC                         BIT(3)
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 6/8] staging: sm750fb: remove unused interrupt register definitions
  2026-03-03 23:24 [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions Gabriel Windlin
                   ` (3 preceding siblings ...)
  2026-03-03 23:24 ` [PATCH 5/8] staging: sm750fb: remove unused memory arbitration " Gabriel Windlin
@ 2026-03-03 23:24 ` Gabriel Windlin
  2026-03-03 23:24 ` [PATCH 7/8] staging: sm750fb: remove unused CURRENT_GATE, CRT_HWC, and DMA " Gabriel Windlin
                   ` (2 subsequent siblings)
  7 siblings, 0 replies; 10+ messages in thread
From: Gabriel Windlin @ 2026-03-03 23:24 UTC (permalink / raw)
  To: Sudip Mukherjee, Teddy Wang, Greg Kroah-Hartman, linux-fbdev,
	linux-staging, linux-kernel
  Cc: Gabriel Windlin

The RAW_INT, INT_STATUS, and INT_MASK register macros defined in
ddk750_reg.h are not referenced anywhere in the driver. Remove them
to reduce dead code as noted in the TODO file.

Signed-off-by: Gabriel Windlin <gawindlin@gmail.com>
---
 drivers/staging/sm750fb/ddk750_reg.h | 51 ----------------------------
 1 file changed, 51 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h
index dd1d67fb9856..8f227d974613 100644
--- a/drivers/staging/sm750fb/ddk750_reg.h
+++ b/drivers/staging/sm750fb/ddk750_reg.h
@@ -77,57 +77,6 @@
 
 #define GPIO_MUX                                      0x000008
 
-#define RAW_INT                                       0x000020
-#define RAW_INT_ZVPORT1_VSYNC                         BIT(4)
-#define RAW_INT_ZVPORT0_VSYNC                         BIT(3)
-#define RAW_INT_CRT_VSYNC                             BIT(2)
-#define RAW_INT_PANEL_VSYNC                           BIT(1)
-#define RAW_INT_VGA_VSYNC                             BIT(0)
-
-#define INT_STATUS                                    0x000024
-#define INT_STATUS_GPIO31                             BIT(31)
-#define INT_STATUS_GPIO30                             BIT(30)
-#define INT_STATUS_GPIO29                             BIT(29)
-#define INT_STATUS_GPIO28                             BIT(28)
-#define INT_STATUS_GPIO27                             BIT(27)
-#define INT_STATUS_GPIO26                             BIT(26)
-#define INT_STATUS_GPIO25                             BIT(25)
-#define INT_STATUS_I2C                                BIT(12)
-#define INT_STATUS_PWM                                BIT(11)
-#define INT_STATUS_DMA1                               BIT(10)
-#define INT_STATUS_DMA0                               BIT(9)
-#define INT_STATUS_PCI                                BIT(8)
-#define INT_STATUS_SSP1                               BIT(7)
-#define INT_STATUS_SSP0                               BIT(6)
-#define INT_STATUS_DE                                 BIT(5)
-#define INT_STATUS_ZVPORT1_VSYNC                      BIT(4)
-#define INT_STATUS_ZVPORT0_VSYNC                      BIT(3)
-#define INT_STATUS_CRT_VSYNC                          BIT(2)
-#define INT_STATUS_PANEL_VSYNC                        BIT(1)
-#define INT_STATUS_VGA_VSYNC                          BIT(0)
-
-#define INT_MASK                                      0x000028
-#define INT_MASK_GPIO31                               BIT(31)
-#define INT_MASK_GPIO30                               BIT(30)
-#define INT_MASK_GPIO29                               BIT(29)
-#define INT_MASK_GPIO28                               BIT(28)
-#define INT_MASK_GPIO27                               BIT(27)
-#define INT_MASK_GPIO26                               BIT(26)
-#define INT_MASK_GPIO25                               BIT(25)
-#define INT_MASK_I2C                                  BIT(12)
-#define INT_MASK_PWM                                  BIT(11)
-#define INT_MASK_DMA1                                 BIT(10)
-#define INT_MASK_DMA                                  BIT(9)
-#define INT_MASK_PCI                                  BIT(8)
-#define INT_MASK_SSP1                                 BIT(7)
-#define INT_MASK_SSP0                                 BIT(6)
-#define INT_MASK_DE                                   BIT(5)
-#define INT_MASK_ZVPORT1_VSYNC                        BIT(4)
-#define INT_MASK_ZVPORT0_VSYNC                        BIT(3)
-#define INT_MASK_CRT_VSYNC                            BIT(2)
-#define INT_MASK_PANEL_VSYNC                          BIT(1)
-#define INT_MASK_VGA_VSYNC                            BIT(0)
-
 #define CURRENT_GATE                                  0x000040
 #define CURRENT_GATE_MCLK_MASK                        (0x3 << 14)
 #ifdef VALIDATION_CHIP
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 7/8] staging: sm750fb: remove unused CURRENT_GATE, CRT_HWC, and DMA register definitions
  2026-03-03 23:24 [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions Gabriel Windlin
                   ` (4 preceding siblings ...)
  2026-03-03 23:24 ` [PATCH 6/8] staging: sm750fb: remove unused interrupt " Gabriel Windlin
@ 2026-03-03 23:24 ` Gabriel Windlin
  2026-03-04  8:10   ` Dan Carpenter
  2026-03-03 23:24 ` [PATCH 8/8] staging: sm750fb: remove unused GPIO bit field and interrupt definitions Gabriel Windlin
  2026-03-09 16:39 ` [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions Greg Kroah-Hartman
  7 siblings, 1 reply; 10+ messages in thread
From: Gabriel Windlin @ 2026-03-03 23:24 UTC (permalink / raw)
  To: Sudip Mukherjee, Teddy Wang, Greg Kroah-Hartman, linux-fbdev,
	linux-staging, linux-kernel
  Cc: Gabriel Windlin

The CURRENT_GATE_VGA, CURRENT_GATE_PWM, CURRENT_GATE_SSP, and
CURRENT_GATE_ZVPORT bit field macros, the CRT_HWC hardware cursor
register macros, the DMA_1_SOURCE, DMA_1_DESTINATION, and
DMA_1_SIZE_CONTROL register macros, and the unused
DMA_ABORT_INTERRUPT_ABORT_0, DMA_ABORT_INTERRUPT_INT_1, and
DMA_ABORT_INTERRUPT_INT_0 bit field macros defined in ddk750_reg.h
are not referenced anywhere in the driver. Remove them to reduce dead
code as noted in the TODO file.

Signed-off-by: Gabriel Windlin <gawindlin@gmail.com>
---
 drivers/staging/sm750fb/ddk750_reg.h | 41 ----------------------------
 1 file changed, 41 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h
index 8f227d974613..328254d3d7cc 100644
--- a/drivers/staging/sm750fb/ddk750_reg.h
+++ b/drivers/staging/sm750fb/ddk750_reg.h
@@ -102,12 +102,8 @@
     #define CURRENT_GATE_M2XCLK_DIV_3                 (0x2 << 12)
     #define CURRENT_GATE_M2XCLK_DIV_4                 (0x3 << 12)
 #endif
-#define CURRENT_GATE_VGA                              BIT(10)
-#define CURRENT_GATE_PWM                              BIT(9)
 #define CURRENT_GATE_I2C                              BIT(8)
-#define CURRENT_GATE_SSP                              BIT(7)
 #define CURRENT_GATE_GPIO                             BIT(6)
-#define CURRENT_GATE_ZVPORT                           BIT(5)
 #define CURRENT_GATE_CSC                              BIT(4)
 #define CURRENT_GATE_DE                               BIT(3)
 #define CURRENT_GATE_DISPLAY                          BIT(2)
@@ -602,26 +598,6 @@
 #define CRT_SCALE_HORIZONTAL_MODE                     BIT(15)
 #define CRT_SCALE_HORIZONTAL_SCALE_MASK               0xfff
 
-/* CRT Cursor Control */
-
-#define CRT_HWC_ADDRESS                               0x080230
-#define CRT_HWC_ADDRESS_ENABLE                        BIT(31)
-#define CRT_HWC_ADDRESS_EXT                           BIT(27)
-#define CRT_HWC_ADDRESS_ADDRESS_MASK                  0x3ffffff
-
-#define CRT_HWC_LOCATION                              0x080234
-#define CRT_HWC_LOCATION_TOP                          BIT(27)
-#define CRT_HWC_LOCATION_Y_MASK                       (0x7ff << 16)
-#define CRT_HWC_LOCATION_LEFT                         BIT(11)
-#define CRT_HWC_LOCATION_X_MASK                       0x7ff
-
-#define CRT_HWC_COLOR_12                              0x080238
-#define CRT_HWC_COLOR_12_2_RGB565_MASK                (0xffff << 16)
-#define CRT_HWC_COLOR_12_1_RGB565_MASK                0xffff
-
-#define CRT_HWC_COLOR_3                               0x08023C
-#define CRT_HWC_COLOR_3_RGB565_MASK                   0xffff
-
 /* This vertical expansion below start at 0x080240 ~ 0x080264 */
 #define CRT_VERTICAL_EXPANSION                        0x080240
 #ifndef VALIDATION_CHIP
@@ -703,25 +679,8 @@
 #define I2C_DATA14                                      0x010052
 #define I2C_DATA15                                      0x010053
 
-#define DMA_1_SOURCE                                    0x0D0010
-#define DMA_1_SOURCE_ADDRESS_EXT                        BIT(27)
-#define DMA_1_SOURCE_ADDRESS_CS                         BIT(26)
-#define DMA_1_SOURCE_ADDRESS_MASK                       0x3ffffff
-
-#define DMA_1_DESTINATION                               0x0D0014
-#define DMA_1_DESTINATION_ADDRESS_EXT                   BIT(27)
-#define DMA_1_DESTINATION_ADDRESS_CS                    BIT(26)
-#define DMA_1_DESTINATION_ADDRESS_MASK                  0x3ffffff
-
-#define DMA_1_SIZE_CONTROL                              0x0D0018
-#define DMA_1_SIZE_CONTROL_STATUS                       BIT(31)
-#define DMA_1_SIZE_CONTROL_SIZE_MASK                    0xffffff
-
 #define DMA_ABORT_INTERRUPT                             0x0D0020
 #define DMA_ABORT_INTERRUPT_ABORT_1                     BIT(5)
-#define DMA_ABORT_INTERRUPT_ABORT_0                     BIT(4)
-#define DMA_ABORT_INTERRUPT_INT_1                       BIT(1)
-#define DMA_ABORT_INTERRUPT_INT_0                       BIT(0)
 
 /* Default i2c CLK and Data GPIO. These are the default i2c pins */
 #define DEFAULT_I2C_SCL                     30
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 8/8] staging: sm750fb: remove unused GPIO bit field and interrupt definitions
  2026-03-03 23:24 [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions Gabriel Windlin
                   ` (5 preceding siblings ...)
  2026-03-03 23:24 ` [PATCH 7/8] staging: sm750fb: remove unused CURRENT_GATE, CRT_HWC, and DMA " Gabriel Windlin
@ 2026-03-03 23:24 ` Gabriel Windlin
  2026-03-09 16:39 ` [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions Greg Kroah-Hartman
  7 siblings, 0 replies; 10+ messages in thread
From: Gabriel Windlin @ 2026-03-03 23:24 UTC (permalink / raw)
  To: Sudip Mukherjee, Teddy Wang, Greg Kroah-Hartman, linux-fbdev,
	linux-staging, linux-kernel
  Cc: Gabriel Windlin

The GPIO_DATA_0..31, GPIO_DATA_DIRECTION_0..31 bit field macros, and
the GPIO_INTERRUPT_SETUP and GPIO_INTERRUPT_STATUS register macros
defined in ddk750_reg.h are not referenced anywhere in the driver. The
register addresses GPIO_DATA and GPIO_DATA_DIRECTION are kept as they
are still in use. Remove the rest to reduce dead code as noted in the
TODO file.

Signed-off-by: Gabriel Windlin <gawindlin@gmail.com>
---
 drivers/staging/sm750fb/ddk750_reg.h | 96 ----------------------------
 1 file changed, 96 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h
index 328254d3d7cc..d21e4a5e5ac4 100644
--- a/drivers/staging/sm750fb/ddk750_reg.h
+++ b/drivers/staging/sm750fb/ddk750_reg.h
@@ -215,104 +215,8 @@
 #endif
 
 #define GPIO_DATA                                       0x010000
-#define GPIO_DATA_31                                    BIT(31)
-#define GPIO_DATA_30                                    BIT(30)
-#define GPIO_DATA_29                                    BIT(29)
-#define GPIO_DATA_28                                    BIT(28)
-#define GPIO_DATA_27                                    BIT(27)
-#define GPIO_DATA_26                                    BIT(26)
-#define GPIO_DATA_25                                    BIT(25)
-#define GPIO_DATA_24                                    BIT(24)
-#define GPIO_DATA_23                                    BIT(23)
-#define GPIO_DATA_22                                    BIT(22)
-#define GPIO_DATA_21                                    BIT(21)
-#define GPIO_DATA_20                                    BIT(20)
-#define GPIO_DATA_19                                    BIT(19)
-#define GPIO_DATA_18                                    BIT(18)
-#define GPIO_DATA_17                                    BIT(17)
-#define GPIO_DATA_16                                    BIT(16)
-#define GPIO_DATA_15                                    BIT(15)
-#define GPIO_DATA_14                                    BIT(14)
-#define GPIO_DATA_13                                    BIT(13)
-#define GPIO_DATA_12                                    BIT(12)
-#define GPIO_DATA_11                                    BIT(11)
-#define GPIO_DATA_10                                    BIT(10)
-#define GPIO_DATA_9                                     BIT(9)
-#define GPIO_DATA_8                                     BIT(8)
-#define GPIO_DATA_7                                     BIT(7)
-#define GPIO_DATA_6                                     BIT(6)
-#define GPIO_DATA_5                                     BIT(5)
-#define GPIO_DATA_4                                     BIT(4)
-#define GPIO_DATA_3                                     BIT(3)
-#define GPIO_DATA_2                                     BIT(2)
-#define GPIO_DATA_1                                     BIT(1)
-#define GPIO_DATA_0                                     BIT(0)
 
 #define GPIO_DATA_DIRECTION                             0x010004
-#define GPIO_DATA_DIRECTION_31                          BIT(31)
-#define GPIO_DATA_DIRECTION_30                          BIT(30)
-#define GPIO_DATA_DIRECTION_29                          BIT(29)
-#define GPIO_DATA_DIRECTION_28                          BIT(28)
-#define GPIO_DATA_DIRECTION_27                          BIT(27)
-#define GPIO_DATA_DIRECTION_26                          BIT(26)
-#define GPIO_DATA_DIRECTION_25                          BIT(25)
-#define GPIO_DATA_DIRECTION_24                          BIT(24)
-#define GPIO_DATA_DIRECTION_23                          BIT(23)
-#define GPIO_DATA_DIRECTION_22                          BIT(22)
-#define GPIO_DATA_DIRECTION_21                          BIT(21)
-#define GPIO_DATA_DIRECTION_20                          BIT(20)
-#define GPIO_DATA_DIRECTION_19                          BIT(19)
-#define GPIO_DATA_DIRECTION_18                          BIT(18)
-#define GPIO_DATA_DIRECTION_17                          BIT(17)
-#define GPIO_DATA_DIRECTION_16                          BIT(16)
-#define GPIO_DATA_DIRECTION_15                          BIT(15)
-#define GPIO_DATA_DIRECTION_14                          BIT(14)
-#define GPIO_DATA_DIRECTION_13                          BIT(13)
-#define GPIO_DATA_DIRECTION_12                          BIT(12)
-#define GPIO_DATA_DIRECTION_11                          BIT(11)
-#define GPIO_DATA_DIRECTION_10                          BIT(10)
-#define GPIO_DATA_DIRECTION_9                           BIT(9)
-#define GPIO_DATA_DIRECTION_8                           BIT(8)
-#define GPIO_DATA_DIRECTION_7                           BIT(7)
-#define GPIO_DATA_DIRECTION_6                           BIT(6)
-#define GPIO_DATA_DIRECTION_5                           BIT(5)
-#define GPIO_DATA_DIRECTION_4                           BIT(4)
-#define GPIO_DATA_DIRECTION_3                           BIT(3)
-#define GPIO_DATA_DIRECTION_2                           BIT(2)
-#define GPIO_DATA_DIRECTION_1                           BIT(1)
-#define GPIO_DATA_DIRECTION_0                           BIT(0)
-
-#define GPIO_INTERRUPT_SETUP                            0x010008
-#define GPIO_INTERRUPT_SETUP_TRIGGER_31                 BIT(22)
-#define GPIO_INTERRUPT_SETUP_TRIGGER_30                 BIT(21)
-#define GPIO_INTERRUPT_SETUP_TRIGGER_29                 BIT(20)
-#define GPIO_INTERRUPT_SETUP_TRIGGER_28                 BIT(19)
-#define GPIO_INTERRUPT_SETUP_TRIGGER_27                 BIT(18)
-#define GPIO_INTERRUPT_SETUP_TRIGGER_26                 BIT(17)
-#define GPIO_INTERRUPT_SETUP_TRIGGER_25                 BIT(16)
-#define GPIO_INTERRUPT_SETUP_ACTIVE_31                  BIT(14)
-#define GPIO_INTERRUPT_SETUP_ACTIVE_30                  BIT(13)
-#define GPIO_INTERRUPT_SETUP_ACTIVE_29                  BIT(12)
-#define GPIO_INTERRUPT_SETUP_ACTIVE_28                  BIT(11)
-#define GPIO_INTERRUPT_SETUP_ACTIVE_27                  BIT(10)
-#define GPIO_INTERRUPT_SETUP_ACTIVE_26                  BIT(9)
-#define GPIO_INTERRUPT_SETUP_ACTIVE_25                  BIT(8)
-#define GPIO_INTERRUPT_SETUP_ENABLE_31                  BIT(6)
-#define GPIO_INTERRUPT_SETUP_ENABLE_30                  BIT(5)
-#define GPIO_INTERRUPT_SETUP_ENABLE_29                  BIT(4)
-#define GPIO_INTERRUPT_SETUP_ENABLE_28                  BIT(3)
-#define GPIO_INTERRUPT_SETUP_ENABLE_27                  BIT(2)
-#define GPIO_INTERRUPT_SETUP_ENABLE_26                  BIT(1)
-#define GPIO_INTERRUPT_SETUP_ENABLE_25                  BIT(0)
-
-#define GPIO_INTERRUPT_STATUS                           0x01000C
-#define GPIO_INTERRUPT_STATUS_31                        BIT(22)
-#define GPIO_INTERRUPT_STATUS_30                        BIT(21)
-#define GPIO_INTERRUPT_STATUS_29                        BIT(20)
-#define GPIO_INTERRUPT_STATUS_28                        BIT(19)
-#define GPIO_INTERRUPT_STATUS_27                        BIT(18)
-#define GPIO_INTERRUPT_STATUS_26                        BIT(17)
-#define GPIO_INTERRUPT_STATUS_25                        BIT(16)
 
 #define PANEL_DISPLAY_CTRL                            0x080000
 #define PANEL_DISPLAY_CTRL_RESERVED_MASK              0xc0f08000
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH 7/8] staging: sm750fb: remove unused CURRENT_GATE, CRT_HWC, and DMA register definitions
  2026-03-03 23:24 ` [PATCH 7/8] staging: sm750fb: remove unused CURRENT_GATE, CRT_HWC, and DMA " Gabriel Windlin
@ 2026-03-04  8:10   ` Dan Carpenter
  0 siblings, 0 replies; 10+ messages in thread
From: Dan Carpenter @ 2026-03-04  8:10 UTC (permalink / raw)
  To: Gabriel Windlin
  Cc: Sudip Mukherjee, Teddy Wang, Greg Kroah-Hartman, linux-fbdev,
	linux-staging, linux-kernel

On Wed, Mar 04, 2026 at 12:24:28AM +0100, Gabriel Windlin wrote:
> The CURRENT_GATE_VGA, CURRENT_GATE_PWM, CURRENT_GATE_SSP, and
> CURRENT_GATE_ZVPORT bit field macros, the CRT_HWC hardware cursor
> register macros, the DMA_1_SOURCE, DMA_1_DESTINATION, and
> DMA_1_SIZE_CONTROL register macros, and the unused
> DMA_ABORT_INTERRUPT_ABORT_0, DMA_ABORT_INTERRUPT_INT_1, and
> DMA_ABORT_INTERRUPT_INT_0 bit field macros defined in ddk750_reg.h
> are not referenced anywhere in the driver. Remove them to reduce dead
> code as noted in the TODO file.
> 
> Signed-off-by: Gabriel Windlin <gawindlin@gmail.com>
> ---
>  drivers/staging/sm750fb/ddk750_reg.h | 41 ----------------------------

We always remove unused code, but I don't really understand the point
of removing these.  It's not like they hurt readability.  They function
as documentation.

regards,
dan carpenter


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions
  2026-03-03 23:24 [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions Gabriel Windlin
                   ` (6 preceding siblings ...)
  2026-03-03 23:24 ` [PATCH 8/8] staging: sm750fb: remove unused GPIO bit field and interrupt definitions Gabriel Windlin
@ 2026-03-09 16:39 ` Greg Kroah-Hartman
  7 siblings, 0 replies; 10+ messages in thread
From: Greg Kroah-Hartman @ 2026-03-09 16:39 UTC (permalink / raw)
  To: Gabriel Windlin
  Cc: Sudip Mukherjee, Teddy Wang, linux-fbdev, linux-staging,
	linux-kernel

On Wed, Mar 04, 2026 at 12:24:22AM +0100, Gabriel Windlin wrote:
> The GPIO_MUX_0 through GPIO_MUX_31 bit field macros defined in
> ddk750_reg.h are not referenced anywhere in the driver. The register
> address GPIO_MUX itself is still used by ddk750_swi2c.c. Remove the
> unused bit definitions to reduce dead code as noted in the TODO file.

As Dan says, it's good to keep hardware documentation like this around,
as it's not taking any runtime space.

thanks,

greg k-h

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2026-03-09 16:39 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-03-03 23:24 [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions Gabriel Windlin
2026-03-03 23:24 ` [PATCH 2/8] staging: sm750fb: remove unused CSC register definitions Gabriel Windlin
2026-03-03 23:24 ` [PATCH 3/8] staging: sm750fb: remove unused ZV capture " Gabriel Windlin
2026-03-03 23:24 ` [PATCH 4/8] staging: sm750fb: remove unused alpha and cursor " Gabriel Windlin
2026-03-03 23:24 ` [PATCH 5/8] staging: sm750fb: remove unused memory arbitration " Gabriel Windlin
2026-03-03 23:24 ` [PATCH 6/8] staging: sm750fb: remove unused interrupt " Gabriel Windlin
2026-03-03 23:24 ` [PATCH 7/8] staging: sm750fb: remove unused CURRENT_GATE, CRT_HWC, and DMA " Gabriel Windlin
2026-03-04  8:10   ` Dan Carpenter
2026-03-03 23:24 ` [PATCH 8/8] staging: sm750fb: remove unused GPIO bit field and interrupt definitions Gabriel Windlin
2026-03-09 16:39 ` [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions Greg Kroah-Hartman

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