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Tue, 03 Mar 2026 15:25:54 -0800 (PST) From: Gabriel Windlin To: Sudip Mukherjee , Teddy Wang , Greg Kroah-Hartman , linux-fbdev@vger.kernel.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Gabriel Windlin Subject: [PATCH 2/8] staging: sm750fb: remove unused CSC register definitions Date: Wed, 4 Mar 2026 00:24:23 +0100 Message-ID: <20260303232434.1850583-2-gawindlin@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260303232434.1850583-1-gawindlin@gmail.com> References: <20260303232434.1850583-1-gawindlin@gmail.com> Precedence: bulk X-Mailing-List: linux-fbdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The Color Space Conversion (CSC) register macros defined in ddk750_reg.h are not referenced anywhere in the driver. Remove them to reduce dead code as noted in the TODO file. Signed-off-by: Gabriel Windlin --- drivers/staging/sm750fb/ddk750_reg.h | 79 ---------------------------- 1 file changed, 79 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h index 59ecbc0d48f7..13b04870ad9b 100644 --- a/drivers/staging/sm750fb/ddk750_reg.h +++ b/drivers/staging/sm750fb/ddk750_reg.h @@ -1126,85 +1126,6 @@ /* Panel Palette register starts at 0x080C00 ~ 0x080FFC */ #define CRT_PALETTE_RAM 0x080C00 -/* Color Space Conversion registers. */ - -#define CSC_Y_SOURCE_BASE 0x1000C8 -#define CSC_Y_SOURCE_BASE_EXT BIT(27) -#define CSC_Y_SOURCE_BASE_CS BIT(26) -#define CSC_Y_SOURCE_BASE_ADDRESS_MASK 0x3ffffff - -#define CSC_CONSTANTS 0x1000CC -#define CSC_CONSTANTS_Y_MASK (0xff << 24) -#define CSC_CONSTANTS_R_MASK (0xff << 16) -#define CSC_CONSTANTS_G_MASK (0xff << 8) -#define CSC_CONSTANTS_B_MASK 0xff - -#define CSC_Y_SOURCE_X 0x1000D0 -#define CSC_Y_SOURCE_X_INTEGER_MASK (0x7ff << 16) -#define CSC_Y_SOURCE_X_FRACTION_MASK (0x1fff << 3) - -#define CSC_Y_SOURCE_Y 0x1000D4 -#define CSC_Y_SOURCE_Y_INTEGER_MASK (0xfff << 16) -#define CSC_Y_SOURCE_Y_FRACTION_MASK (0x1fff << 3) - -#define CSC_U_SOURCE_BASE 0x1000D8 -#define CSC_U_SOURCE_BASE_EXT BIT(27) -#define CSC_U_SOURCE_BASE_CS BIT(26) -#define CSC_U_SOURCE_BASE_ADDRESS_MASK 0x3ffffff - -#define CSC_V_SOURCE_BASE 0x1000DC -#define CSC_V_SOURCE_BASE_EXT BIT(27) -#define CSC_V_SOURCE_BASE_CS BIT(26) -#define CSC_V_SOURCE_BASE_ADDRESS_MASK 0x3ffffff - -#define CSC_SOURCE_DIMENSION 0x1000E0 -#define CSC_SOURCE_DIMENSION_X_MASK (0xffff << 16) -#define CSC_SOURCE_DIMENSION_Y_MASK 0xffff - -#define CSC_SOURCE_PITCH 0x1000E4 -#define CSC_SOURCE_PITCH_Y_MASK (0xffff << 16) -#define CSC_SOURCE_PITCH_UV_MASK 0xffff - -#define CSC_DESTINATION 0x1000E8 -#define CSC_DESTINATION_WRAP BIT(31) -#define CSC_DESTINATION_X_MASK (0xfff << 16) -#define CSC_DESTINATION_Y_MASK 0xfff - -#define CSC_DESTINATION_DIMENSION 0x1000EC -#define CSC_DESTINATION_DIMENSION_X_MASK (0xffff << 16) -#define CSC_DESTINATION_DIMENSION_Y_MASK 0xffff - -#define CSC_DESTINATION_PITCH 0x1000F0 -#define CSC_DESTINATION_PITCH_X_MASK (0xffff << 16) -#define CSC_DESTINATION_PITCH_Y_MASK 0xffff - -#define CSC_SCALE_FACTOR 0x1000F4 -#define CSC_SCALE_FACTOR_HORIZONTAL_MASK (0xffff << 16) -#define CSC_SCALE_FACTOR_VERTICAL_MASK 0xffff - -#define CSC_DESTINATION_BASE 0x1000F8 -#define CSC_DESTINATION_BASE_EXT BIT(27) -#define CSC_DESTINATION_BASE_CS BIT(26) -#define CSC_DESTINATION_BASE_ADDRESS_MASK 0x3ffffff - -#define CSC_CONTROL 0x1000FC -#define CSC_CONTROL_STATUS BIT(31) -#define CSC_CONTROL_SOURCE_FORMAT_MASK (0x7 << 28) -#define CSC_CONTROL_SOURCE_FORMAT_YUV422 (0x0 << 28) -#define CSC_CONTROL_SOURCE_FORMAT_YUV420I (0x1 << 28) -#define CSC_CONTROL_SOURCE_FORMAT_YUV420 (0x2 << 28) -#define CSC_CONTROL_SOURCE_FORMAT_YVU9 (0x3 << 28) -#define CSC_CONTROL_SOURCE_FORMAT_IYU1 (0x4 << 28) -#define CSC_CONTROL_SOURCE_FORMAT_IYU2 (0x5 << 28) -#define CSC_CONTROL_SOURCE_FORMAT_RGB565 (0x6 << 28) -#define CSC_CONTROL_SOURCE_FORMAT_RGB8888 (0x7 << 28) -#define CSC_CONTROL_DESTINATION_FORMAT_MASK (0x3 << 26) -#define CSC_CONTROL_DESTINATION_FORMAT_RGB565 (0x0 << 26) -#define CSC_CONTROL_DESTINATION_FORMAT_RGB8888 (0x1 << 26) -#define CSC_CONTROL_HORIZONTAL_FILTER BIT(25) -#define CSC_CONTROL_VERTICAL_FILTER BIT(24) -#define CSC_CONTROL_BYTE_ORDER BIT(23) - #define DE_DATA_PORT 0x110000 #define I2C_BYTE_COUNT 0x010040 -- 2.53.0