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From: Nils Lehnen <nils.lehnen@proton.me>
To: Sudip Mukherjee <sudipm.mukherjee@gmail.com>,
	Teddy Wang <teddy.wang@siliconmotion.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-fbdev@vger.kernel.org, linux-staging@lists.linux.dev,
	linux-kernel@vger.kernel.org, Nils Lehnen <nils.lehnen@proton.me>
Subject: [PATCH 2/2] staging: sm750fb: unindent defines left by conditional removal
Date: Sat, 18 Jul 2026 05:57:58 +0000	[thread overview]
Message-ID: <20260718055709.466-2-nils.lehnen@proton.me> (raw)
In-Reply-To: <20260718055709.466-1-nils.lehnen@proton.me>

The preceding removal of the VALIDATION_CHIP conditionals left the
surviving define blocks and one comment indented by four spaces, and
two double blank lines where conditional lines went away. Move the
now-unconditional defines to column zero while keeping the aligned
value column untouched, and collapse the blank lines.

No functional change: whitespace and preprocessor layout only; the
disassembly of all ten sm750fb object files stays bit-identical.

All English text in this patch (commit message and code comments) was
translated from a German draft with the assistance of Claude Fable 5.

Assisted-by: Claude:claude-fable-5
Signed-off-by: Nils Lehnen <nils.lehnen@proton.me>
---
 drivers/staging/sm750fb/ddk750_reg.h | 50 +++++++++++++---------------
 1 file changed, 24 insertions(+), 26 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h
index 4bcede37584a..2888ffe32fa2 100644
--- a/drivers/staging/sm750fb/ddk750_reg.h
+++ b/drivers/staging/sm750fb/ddk750_reg.h
@@ -294,15 +294,15 @@
 
 #define CURRENT_GATE                                  0x000040
 #define CURRENT_GATE_MCLK_MASK                        (0x3 << 14)
-    #define CURRENT_GATE_MCLK_DIV_3                   (0x0 << 14)
-    #define CURRENT_GATE_MCLK_DIV_4                   (0x1 << 14)
-    #define CURRENT_GATE_MCLK_DIV_6                   (0x2 << 14)
-    #define CURRENT_GATE_MCLK_DIV_8                   (0x3 << 14)
+#define CURRENT_GATE_MCLK_DIV_3                       (0x0 << 14)
+#define CURRENT_GATE_MCLK_DIV_4                       (0x1 << 14)
+#define CURRENT_GATE_MCLK_DIV_6                       (0x2 << 14)
+#define CURRENT_GATE_MCLK_DIV_8                       (0x3 << 14)
 #define CURRENT_GATE_M2XCLK_MASK                      (0x3 << 12)
-    #define CURRENT_GATE_M2XCLK_DIV_1                 (0x0 << 12)
-    #define CURRENT_GATE_M2XCLK_DIV_2                 (0x1 << 12)
-    #define CURRENT_GATE_M2XCLK_DIV_3                 (0x2 << 12)
-    #define CURRENT_GATE_M2XCLK_DIV_4                 (0x3 << 12)
+#define CURRENT_GATE_M2XCLK_DIV_1                     (0x0 << 12)
+#define CURRENT_GATE_M2XCLK_DIV_2                     (0x1 << 12)
+#define CURRENT_GATE_M2XCLK_DIV_3                     (0x2 << 12)
+#define CURRENT_GATE_M2XCLK_DIV_4                     (0x3 << 12)
 #define CURRENT_GATE_VGA                              BIT(10)
 #define CURRENT_GATE_PWM                              BIT(9)
 #define CURRENT_GATE_I2C                              BIT(8)
@@ -383,10 +383,10 @@
 #define PLL_CTRL_BYPASS                               BIT(18)
 #define PLL_CTRL_POWER                                BIT(17)
 #define PLL_CTRL_INPUT                                BIT(16)
-    #define PLL_CTRL_POD_SHIFT                        14
-    #define PLL_CTRL_POD_MASK                         (0x3 << 14)
-    #define PLL_CTRL_OD_SHIFT                         12
-    #define PLL_CTRL_OD_MASK                          (0x3 << 12)
+#define PLL_CTRL_POD_SHIFT                            14
+#define PLL_CTRL_POD_MASK                             (0x3 << 14)
+#define PLL_CTRL_OD_SHIFT                             12
+#define PLL_CTRL_OD_MASK                              (0x3 << 12)
 #define PLL_CTRL_N_SHIFT                              8
 #define PLL_CTRL_N_MASK                               (0xf << 8)
 #define PLL_CTRL_M_SHIFT                              0
@@ -400,7 +400,6 @@
 
 #define SCRATCH_DATA                                  0x00006c
 
-
 #define MXCLK_PLL_CTRL                                0x000070
 
 #define VGA_CONFIGURATION                             0x000088
@@ -408,7 +407,6 @@
 #define VGA_CONFIGURATION_PLL                         BIT(2)
 #define VGA_CONFIGURATION_MODE                        BIT(1)
 
-
 #define GPIO_DATA                                       0x010000
 #define GPIO_DATA_31                                    BIT(31)
 #define GPIO_DATA_30                                    BIT(30)
@@ -996,7 +994,7 @@
 #define CRT_DISPLAY_CTRL_CRTSELECT                    BIT(25)
 #define CRT_DISPLAY_CTRL_RGBBIT                       BIT(24)
 
-    #define CRT_DISPLAY_CTRL_CENTERING                BIT(24)
+#define CRT_DISPLAY_CTRL_CENTERING                    BIT(24)
 #define CRT_DISPLAY_CTRL_LOCK_TIMING                  BIT(23)
 #define CRT_DISPLAY_CTRL_EXPANSION                    BIT(22)
 #define CRT_DISPLAY_CTRL_VERTICAL_MODE                BIT(21)
@@ -1095,26 +1093,26 @@
 
 /* This vertical expansion below start at 0x080240 ~ 0x080264 */
 #define CRT_VERTICAL_EXPANSION                        0x080240
-    #define CRT_VERTICAL_CENTERING_VALUE_MASK         (0xff << 24)
+#define CRT_VERTICAL_CENTERING_VALUE_MASK             (0xff << 24)
 #define CRT_VERTICAL_EXPANSION_COMPARE_VALUE_MASK     (0xff << 16)
 #define CRT_VERTICAL_EXPANSION_LINE_BUFFER_MASK       (0xf << 12)
 #define CRT_VERTICAL_EXPANSION_SCALE_FACTOR_MASK      0xfff
 
 /* This horizontal expansion below start at 0x080268 ~ 0x08027C */
 #define CRT_HORIZONTAL_EXPANSION                      0x080268
-    #define CRT_HORIZONTAL_CENTERING_VALUE_MASK       (0xff << 24)
+#define CRT_HORIZONTAL_CENTERING_VALUE_MASK           (0xff << 24)
 #define CRT_HORIZONTAL_EXPANSION_COMPARE_VALUE_MASK   (0xff << 16)
 #define CRT_HORIZONTAL_EXPANSION_SCALE_FACTOR_MASK    0xfff
 
-    /* Auto Centering */
-    #define CRT_AUTO_CENTERING_TL                     0x080280
-    #define CRT_AUTO_CENTERING_TL_TOP_MASK            (0x7ff << 16)
-    #define CRT_AUTO_CENTERING_TL_LEFT_MASK           0x7ff
+/* Auto Centering */
+#define CRT_AUTO_CENTERING_TL                         0x080280
+#define CRT_AUTO_CENTERING_TL_TOP_MASK                (0x7ff << 16)
+#define CRT_AUTO_CENTERING_TL_LEFT_MASK               0x7ff
 
-    #define CRT_AUTO_CENTERING_BR                     0x080284
-    #define CRT_AUTO_CENTERING_BR_BOTTOM_MASK         (0x7ff << 16)
-    #define CRT_AUTO_CENTERING_BR_BOTTOM_SHIFT        16
-    #define CRT_AUTO_CENTERING_BR_RIGHT_MASK          0x7ff
+#define CRT_AUTO_CENTERING_BR                         0x080284
+#define CRT_AUTO_CENTERING_BR_BOTTOM_MASK             (0x7ff << 16)
+#define CRT_AUTO_CENTERING_BR_BOTTOM_SHIFT            16
+#define CRT_AUTO_CENTERING_BR_RIGHT_MASK              0x7ff
 
 /* sm750le new register to control panel output */
 #define DISPLAY_CONTROL_750LE			      0x80288
@@ -1294,7 +1292,7 @@
 #define ZV0_CAPTURE_BUF1_ADDRESS_ADDRESS_MASK           0x3ffffff
 
 #define ZV0_CAPTURE_BUF_OFFSET                          0x090014
-    #define ZV0_CAPTURE_BUF_OFFSET_YCLIP_ODD_FIELD      (0x3ff << 16)
+#define ZV0_CAPTURE_BUF_OFFSET_YCLIP_ODD_FIELD          (0x3ff << 16)
 #define ZV0_CAPTURE_BUF_OFFSET_OFFSET_MASK              0xffff
 
 #define ZV0_CAPTURE_FIFO_CTRL                           0x090018
-- 
2.43.0



  reply	other threads:[~2026-07-18  5:58 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-18  5:51 [PATCH 0/2] staging: sm750fb: remove dead VALIDATION_CHIP code Nils Lehnen
2026-07-18  5:57 ` (No Subject) Nils Lehnen
2026-07-18  5:57   ` Nils Lehnen [this message]
2026-07-18  6:20     ` [PATCH 2/2] staging: sm750fb: unindent defines left by conditional removal Greg Kroah-Hartman
2026-07-18  6:31       ` Nils Lehnen
2026-07-18  6:19   ` (No Subject) Greg Kroah-Hartman

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