Re: Twister savagefb doesn't sync

[Vassilis Virvilis <vasvir@iit.demokritos.gr>]

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Antonino A. Daplas wrote:

> 
> lspci -v -d 5333:8d04
> 
OK I have done a lot of tests. First my device is
5333:8d01 and the non-prefetchable memory is at ec000000
so we have

#define PCI_ID        0x8d01  /* put the PCI id of the device here */
#define PCI_PBASE     0xec000000  /* put the start address of the PCI resource here */

Ok. I tried both X (with use bios), and SDL testsprite in 640x480, 800x600, 1024x768 at
8, 16, 24 bpp.

testsprite is a SDL demo that accepts the following options
(-width, -height, -bpp). I made both sets of tests in a medion TFT 18 screen and in an
EIZO F520 CRT.

All X modes are working.
SDL works for 1024x768 bpp=* in CRT and TFT
SDL work in 800x600 bpp={16, 24} (not 8bpp) only in TFT and __not in CRT__

I am attaching the output of savagedump for all modes, for both monitors (#36),
just for future reference.

I will try to understand the differences but the registers are too many and without
documentation it is a bit hopeless I am afraid. Or is there documentation somewhere publicly
available?

Is there any way to replay the working set of registers to get the correct mode settings?
       .bill

Here is the output for just one case TFT 640x480-256

X- working
TwisterP

SR0x  03 01 0f 00 0e 05 06 07 06 00 0a 00 0c 00 0e 0f
SR1x  67 7d ffffffc5 fffffffc 00 ffffff81 0c ffffff8f 00 02 02 12 00 fffffff8 0a 00
SR2x  20 21 22 23 24 25 26 04 0c 00 2a 02 18 00 2e 2f
SR3x  10 17 41 63 00 00 00 00 00 00 3a 3b 3c 00 3e 00
SR4x  40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f
SR5x  00 00 21 fffffff7 1f 1f 1f 7f 08 60 18 7e 77 fffffff7 02 04
SR6x  ffffffa3 7f ffffff80 06 ffffff83 fffffff4 ffffff80 00 24 ffffffff ffffffff 24 02 ffffff88 ffffffa3 32
CR0x  5f 4f 50 ffffff82 52 ffffff9e 0b 3e 00 40 00 00 00 00 ffffffff 00
CR1x  ffffffe9 0b ffffffdf 50 60 ffffffe7 03 ffffffab ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
CR2x  ffffffff ffffffff 1b ffffffff 20 20 20 20 20 20 20 20 20 ffffff8d 01 02
CR3x  ffffffe1 0c 00 08 10 00 ffffffbf ffffffdb 5b ffffffb8 11 58 32 00 00 00
CR4x  01 19 00 00 00 00 01 39 38 ffffffe9 00 ffffffff 7f 7c 40 40
CR5x  ffffffc1 00 00 00 00 00 00 00 13 ffffffe0 00 00 00 00 00 00
CR6x  00 00 00 00 00 00 ffffff89 00 ffffffff ffffff80 00 03 00 ffffffff 00 ffffffee
CR7x  10 ffffffc0 07 1f 1f 1f 00 1f 01 04 1f 1f 17 17 17 17
CR8x  00 00 00 00 70 13 00 00 18 18 18 18 18 18 18 18
CR9x  ffffff80 4f 00 00 00 00 00 00 00 00 00 00 00 00 00 00
CRax  1a 00 00 00 00 ffffffc0 ffffffc6 ffffffb6 6d 00 00 00 00 00 00 00
CRbx  fffffff7 0c 00 00 00 00 00


SDL testsprite (not working)
TwisterP

SR0x  03 01 0f 00 0e 05 06 07 06 00 0a 00 0c 00 0e 0f
SR1x  67 7d ffffffc5 78 00 ffffff83 0c ffffff8f 00 02 02 ffffff82 00 fffffff8 0a 00
SR2x  20 21 22 23 24 25 26 04 0c 00 2a 02 18 00 2e 2f
SR3x  10 17 41 63 00 00 00 00 00 00 3a 3b 3c 00 3e 00
SR4x  40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f
SR5x  00 00 21 fffffff7 1f 1f 1f 7f 08 60 18 76 77 fffffff7 02 04
SR6x  ffffffa3 7f ffffff80 06 ffffff83 fffffff4 ffffff80 00 24 ffffffff ffffffff 24 02 ffffff88 ffffffa3 32
CR0x  63 4f 52 ffffff97 53 18 06 3e 00 40 00 00 00 00 00 00
CR1x  ffffffe9 2c ffffffdf 50 00 ffffffe8 ffffffeb ffffffeb ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
CR2x  ffffffff 00 00 00 00 00 00 00 00 00 00 00 00 ffffff8d 01 02
CR3x  ffffffe1 0c 40 20 10 00 ffffffbf ffffffdb 5b ffffffbd 15 5b 31 00 00 00
CR4x  01 03 00 00 00 00 02 ffffff80 ffffff81 ffffff88 00 ffffffff 7f 7c 40 40
CR5x  ffffffc1 00 00 00 00 00 00 00 13 ffffffe0 00 00 00 00 40 00
CR6x  00 00 00 00 00 00 ffffff89 01 ffffffff 00 00 03 00 ffffffff 00 ffffffee
CR7x  10 ffffffc0 07 1f 1f 1f 00 1f 01 04 1f 1f 17 17 17 17
CR8x  00 00 00 00 70 10 00 00 08 08 08 08 08 08 08 08
CR9x  ffffff80 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00
CRax  1a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
CRbx  fffffff7 0c 00 00 00 00 00

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