nvidiafb, monitor A & B and CRTC 0 & 1

[Petr Vandrovec <vandrove@vc.cvut.cz>]

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Hello,
   how much are you sure that monitor A i2c should use ddc_base 0x3E, 
and monitor B base 0x36 ?  Yesterday I connected TV (using HDMI cable) 
to my box, and ... it came up in 720x480 resolution, and fbset allowed 
me to go only up to 1920x540.  Which was quite surprising as when 
nvidiafb gets loaded second output stays in whatever mode it was before 
(720x400, text), displaying garbage, and only primary output does something.

After I added some debugging printks I've found that code became a bit 
confused because it believed that primary monitor is 1920x540, but later 
it found in CRTC0's registers that panel size is 1920x1200 (Windows also 
agree that 1920x1200 is primary monitor, and 1920x1080i secondary one).

When I applied attached patch then my monitor became as happy as it was 
before I connected HDMI cable to secondary output.
					Thanks,
						Petr

[just in case]
Signed-off-by: Petr Vandrovec <vandrove@vc.cvut.cz>

Before patch:

ACPI: PCI Interrupt Link [APC8] enabled at IRQ 16
ACPI: PCI Interrupt 0000:02:00.0[A] -> Link [APC8] -> GSI 16 (level, 
low) -> IRQ 16
nvidiafb: Device ID: 10de0295
nvidiafb: CRTC0 analog not found
nvidiafb: CRTC1 analog not found
edid: 1920 x 540, 13468
nvidiafb: EDID found from BUS1
edid: 1920 x 1200, 6493
nvidiafb: EDID found from BUS2
nvidiafb: CRTC 0 is currently programmed for DFP
nvidiafb: Using DFP on CRTC 0
nvidiafb: Panel size is 1920 x 1200
nvidiafb: Panel is TMDS
nvidiafb: MTRR set to ON
nvidiafb: Flat panel dithering disabled
Console: switching to colour frame buffer device 90x30
nvidiafb: PCI nVidia NV29 framebuffer (64MB @ 0xE0000000)

After patch:

ACPI: PCI Interrupt Link [APC8] enabled at IRQ 16
ACPI: PCI Interrupt 0000:02:00.0[A] -> Link [APC8] -> GSI 16 (level, 
low) -> IRQ 16
nvidiafb: Device ID: 10de0295
nvidiafb: CRTC0 analog not found
nvidiafb: CRTC1 analog not found
edid: 1920 x 1200, 6493
nvidiafb: EDID found from BUS1
edid: 1920 x 540, 13468
nvidiafb: EDID found from BUS2
nvidiafb: CRTC 0 is currently programmed for DFP
nvidiafb: Using DFP on CRTC 0
nvidiafb: Panel size is 1920 x 1200
nvidiafb: Panel is TMDS
nvidiafb: MTRR set to ON
nvidiafb: Flat panel dithering disabled
Console: switching to colour frame buffer device 240x75
nvidiafb: PCI nVidia NV29 framebuffer (64MB @ 0xE0000000)

Monitor:
	# EDID version 1 revision 3
Section "Monitor"
	# Block type: 2:0 3:fc
	Identifier "FPD2485W"
	VendorName "GWY"
	ModelName "FPD2485W"
	# Block type: 2:0 3:fc
	# Block type: 2:0 3:fd
	HorizSync 30-83
	VertRefresh 56-76
	# Max dot clock (video bandwidth) 160 MHz
	# Block type: 2:0 3:ff
	# DPMS capabilities: Active off:yes  Suspend:no  Standby:no

	Mode 	"1920x1200"	# vfreq 59.950Hz, hfreq 74.038kHz
		DotClock	154.000000
		HTimings	1920 1968 2000 2080
		VTimings	1200 1203 1209 1235
		Flags	"-HSync" "+VSync"
	EndMode
	# Block type: 2:0 3:fc
	# Block type: 2:0 3:fd
	# Block type: 2:0 3:ff
EndSection

TV:
	# EDID version 1 revision 3
Section "Monitor"
	# Block type: 2:0 3:fc
	Identifier "LT-40FN97"
	VendorName "JVC"
	ModelName "LT-40FN97"
	# Block type: 2:0 3:fc
	# Block type: 2:0 3:fd
	HorizSync 15-46
	VertRefresh 59-61
	# Max dot clock (video bandwidth) 80 MHz
	# DPMS capabilities: Active off:yes  Suspend:no  Standby:no

	Mode 	"1920x540"	# vfreq 60.053Hz, hfreq 33.750kHz
		DotClock	74.250000
		HTimings	1920 2008 2052 2200
		VTimings	540 542 547 562
		Flags	"Interlace" "+HSync" "+VSync"
	EndMode
	Mode 	"720x480"	# vfreq 59.940Hz, hfreq 31.469kHz
		DotClock	27.000000
		HTimings	720 736 798 858
		VTimings	480 489 495 525
		Flags	"-HSync" "-VSync"
	EndMode
	# Block type: 2:0 3:fc
	# Block type: 2:0 3:fd
EndSection

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diff -uN -r linux-2.6.21-rc4-f33b.dist/drivers/video/nvidia/nv_i2c.c linux-2.6.21-rc4-f33b/drivers/video/nvidia/nv_i2c.c
--- linux-2.6.21-rc4-f33b.dist/drivers/video/nvidia/nv_i2c.c	2007-03-24 03:46:16.000000000 -0700
+++ linux-2.6.21-rc4-f33b/drivers/video/nvidia/nv_i2c.c	2007-03-25 04:52:09.000000000 -0700
@@ -133,10 +133,10 @@
 	par->chan[1].par = par;
 	par->chan[2].par = par;
 
-	par->chan[0].ddc_base = 0x3e;
+	par->chan[0].ddc_base = 0x36;
 	nvidia_setup_i2c_bus(&par->chan[0], "nvidia #0");
 
-	par->chan[1].ddc_base = 0x36;
+	par->chan[1].ddc_base = 0x3e;
 	nvidia_setup_i2c_bus(&par->chan[1], "nvidia #1");
 
 	par->chan[2].ddc_base = 0x50;

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