Monitor failing mode validation in fb_validate_mode()

[Jon Smirl <jonsmirl@gmail.com>]

I have a monitor that in DDC reports that it supports:
VESA 1024x768-75

The timing from modesdb.c
	/* 15 1024x768-75 VESA */
	{ NULL, 75, 1024, 768, 12690, 176, 16, 28, 1, 96, 3,

Now multiply out the bandwidth:
1000000000/12690*1000 / (1024 +176 + 16 + 96)
gives
60.062 KHz

From DDC the monitor also reports it's bandwidth:
      Monitor Operating Limits: From EDID
           H: 30-60KHz V: 50-75Hz DCLK: 80MHz

fb_validate_mode() then fails to validate this mode because
60.062Khz is greater than 60KHz

I checked and this isn't a round off problem. For the bandwidth to
multiply out to below 60KHz the dot clock would need to be 12704
instead of 12690.

What is the right fix for this? Maybe truncate (or round) hfreq to the
nearest KHz before doing the bandwidth comparison in the bottom of
fb_validate_mode()?

The dot clock is still well withing range, 78802000 dclkmax 80000000,
only the horizontal frequency is a little bit out. Dot clock is
probably the hard limit and shouldn't be adjusted.

-- 
Jon Smirl
jonsmirl@gmail.com


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