* Re: [PATCH 4/4] fb: vt8500: Add VGA output support to wm8505fb driver.
From: Alexey Charkov @ 2013-05-18 13:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1368868514-18975-5-git-send-email-linux@prisktech.co.nz>
2013/5/18 Tony Prisk <linux@prisktech.co.nz>:
> The APC8750 does not support an LCD panel, but provides a VGA connector.
> This patch adds support for the VGA interface, and defines an optional
> devicetree property to specify the output interface. The default if not
> specified is LCD for backward compatibility.
>
> Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
> ---
> .../devicetree/bindings/video/wm,wm8505-fb.txt | 5 ++++
> drivers/video/wm8505fb.c | 31 ++++++++++++++++++--
> 2 files changed, 34 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/video/wm,wm8505-fb.txt b/Documentation/devicetree/bindings/video/wm,wm8505-fb.txt
> index 601416c..9f1d648 100644
> --- a/Documentation/devicetree/bindings/video/wm,wm8505-fb.txt
> +++ b/Documentation/devicetree/bindings/video/wm,wm8505-fb.txt
> @@ -7,6 +7,10 @@ Required properties:
> - bits-per-pixel : bit depth of framebuffer (16 or 32)
> - clocks : phandle to DVO clock
>
> +Optional properties:
> +- output-interface : the interface the fb should output on. Valid values are
> + "lcd" or "vga". If not specified, the default is "lcd".
> +
> Required subnodes:
> - display-timings: see display-timing.txt for information
>
> @@ -17,6 +21,7 @@ Example:
> reg = <0xd8051700 0x200>;
> bits-per-pixel = <16>;
> clocks = <&clkdvo>;
> + output-interface = "vga";
>
> display-timings {
> native-mode = <&timing0>;
> diff --git a/drivers/video/wm8505fb.c b/drivers/video/wm8505fb.c
> index f8bffc2..d1f7f33 100644
> --- a/drivers/video/wm8505fb.c
> +++ b/drivers/video/wm8505fb.c
> @@ -130,12 +130,17 @@
>
> #define to_wm8505fb_info(__info) container_of(__info, \
> struct wm8505fb_info, fb)
> +
> +#define INTERFACE_LCD 1
> +#define INTERFACE_VGA 2
> +
> struct wm8505fb_info {
> struct fb_info fb;
> void __iomem *regbase;
> unsigned int contrast;
> struct device *dev;
> struct clk *clk_dvo;
> + int interface;
> };
>
>
> @@ -158,7 +163,11 @@ static int wm8505fb_init_hw(struct fb_info *info)
> * 0x31C sets the correct color mode (RGB565) for WM8650
> * Bit 8+9 (0x300) are ignored on WM8505 as reserved
> */
> - writel(0x31c, fbi->regbase + REG_GOVRH_YUVRGB);
> + if (fbi->interface = INTERFACE_VGA)
> + writel(0x338, fbi->regbase + REG_GOVRH_YUVRGB);
> + else
> + writel(0x31c, fbi->regbase + REG_GOVRH_YUVRGB);
> +
> writel(1, fbi->regbase + REG_GOVRH_DVO_PIX);
Tony,
Would it be possible to also define known bit offsets for those
registers, while you are at this? It would probably reduce the black
magic quite a bit :)
> /* Virtual buffer size */
> @@ -167,7 +176,12 @@ static int wm8505fb_init_hw(struct fb_info *info)
>
> /* black magic ;) */
> writel(0xf, fbi->regbase + REG_GOVRH_FHI);
> - writel(4, fbi->regbase + REG_GOVRH_DVO_SET);
> +
> + if (fbi->interface = INTERFACE_VGA)
> + writel(0xe, fbi->regbase + REG_GOVRH_DVO_SET);
> + else
> + writel(4, fbi->regbase + REG_GOVRH_DVO_SET);
I don't remember if HDMI is yet another option for this register or
not... If it is, it would probably warrant defining fbi->interface as
an enum and changing this if-else into a switch statement to let the
compiler add its checks/warnings.
> writel(1, fbi->regbase + REG_GOVRH_MIF);
> writel(1, fbi->regbase + REG_GOVRH_REG_STS);
>
> @@ -194,11 +208,15 @@ static int wm8505fb_set_timing(struct fb_info *info)
> writel(h_end, fbi->regbase + REG_GOVRH_ACTPX_END);
> writel(h_all, fbi->regbase + REG_GOVRH_H_ALLPXL);
> writel(h_sync, fbi->regbase + REG_GOVRH_HDMI_HSYNW);
> + if (fbi->interface = INTERFACE_VGA)
> + writel(h_sync, fbi->regbase + REG_GOVRH_VGA_HSYNW);
Will it misbehave on LCD if you write to the VGA register unconditionally?
> writel(v_start, fbi->regbase + REG_GOVRH_ACTLN_BG);
> writel(v_end, fbi->regbase + REG_GOVRH_ACTLN_END);
> writel(v_all, fbi->regbase + REG_GOVRH_V_ALLLN);
> writel(v_sync, fbi->regbase + REG_GOVRH_HDMI_VBISW);
> + if (fbi->interface = INTERFACE_VGA)
> + writel(info->var.pixclock, fbi->regbase + REG_GOVRH_VGA_VSYNW);
Same here. I would assume that setting the pixclock should not hurt
LCD, which would then simplify the code a little.
Thanks,
Alexey
^ permalink raw reply
* Re: [PATCH V2] video: implement a simple framebuffer driver
From: Alexandre Courbot @ 2013-05-18 10:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1365043183-28905-1-git-send-email-swarren@wwwdotorg.org>
On Thu, Apr 4, 2013 at 11:39 AM, Stephen Warren <swarren@wwwdotorg.org> wrote:
> +struct simplefb_format {
> + const char *name;
> + u32 bits_per_pixel;
> + struct fb_bitfield red;
> + struct fb_bitfield green;
> + struct fb_bitfield blue;
> + struct fb_bitfield transp;
> +};
> +
> +struct simplefb_format simplefb_formats[] = {
> + { "r5g6b5", 16, {11, 5}, {5, 6}, {0, 5}, {0, 0} },
> +};
I have been adding a few extra formats to this list, and I wonder if
this could not simply be turned into a function that would directly
convert the name string into the corresponding right format. The
mapping between name and format seems to be a 1:1 and this would
probably avoid errors in the future. I'm especially thinking about
color order here - I started adding a mode that reads
{ "r8g8b8a8", 32, {0, 8}, {8, 8}, {16, 8}, {24, 8} },
while it should probably be called "a8b8g8r8" as the order of colors
is not the same as your r5g6b5.
I can submit a patch if there is no issue with that idea.
Alex.
^ permalink raw reply
* [PATCH 4/4] fb: vt8500: Add VGA output support to wm8505fb driver.
From: Tony Prisk @ 2013-05-18 9:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1368868514-18975-1-git-send-email-linux@prisktech.co.nz>
The APC8750 does not support an LCD panel, but provides a VGA connector.
This patch adds support for the VGA interface, and defines an optional
devicetree property to specify the output interface. The default if not
specified is LCD for backward compatibility.
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
---
.../devicetree/bindings/video/wm,wm8505-fb.txt | 5 ++++
drivers/video/wm8505fb.c | 31 ++++++++++++++++++--
2 files changed, 34 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/video/wm,wm8505-fb.txt b/Documentation/devicetree/bindings/video/wm,wm8505-fb.txt
index 601416c..9f1d648 100644
--- a/Documentation/devicetree/bindings/video/wm,wm8505-fb.txt
+++ b/Documentation/devicetree/bindings/video/wm,wm8505-fb.txt
@@ -7,6 +7,10 @@ Required properties:
- bits-per-pixel : bit depth of framebuffer (16 or 32)
- clocks : phandle to DVO clock
+Optional properties:
+- output-interface : the interface the fb should output on. Valid values are
+ "lcd" or "vga". If not specified, the default is "lcd".
+
Required subnodes:
- display-timings: see display-timing.txt for information
@@ -17,6 +21,7 @@ Example:
reg = <0xd8051700 0x200>;
bits-per-pixel = <16>;
clocks = <&clkdvo>;
+ output-interface = "vga";
display-timings {
native-mode = <&timing0>;
diff --git a/drivers/video/wm8505fb.c b/drivers/video/wm8505fb.c
index f8bffc2..d1f7f33 100644
--- a/drivers/video/wm8505fb.c
+++ b/drivers/video/wm8505fb.c
@@ -130,12 +130,17 @@
#define to_wm8505fb_info(__info) container_of(__info, \
struct wm8505fb_info, fb)
+
+#define INTERFACE_LCD 1
+#define INTERFACE_VGA 2
+
struct wm8505fb_info {
struct fb_info fb;
void __iomem *regbase;
unsigned int contrast;
struct device *dev;
struct clk *clk_dvo;
+ int interface;
};
@@ -158,7 +163,11 @@ static int wm8505fb_init_hw(struct fb_info *info)
* 0x31C sets the correct color mode (RGB565) for WM8650
* Bit 8+9 (0x300) are ignored on WM8505 as reserved
*/
- writel(0x31c, fbi->regbase + REG_GOVRH_YUVRGB);
+ if (fbi->interface = INTERFACE_VGA)
+ writel(0x338, fbi->regbase + REG_GOVRH_YUVRGB);
+ else
+ writel(0x31c, fbi->regbase + REG_GOVRH_YUVRGB);
+
writel(1, fbi->regbase + REG_GOVRH_DVO_PIX);
/* Virtual buffer size */
@@ -167,7 +176,12 @@ static int wm8505fb_init_hw(struct fb_info *info)
/* black magic ;) */
writel(0xf, fbi->regbase + REG_GOVRH_FHI);
- writel(4, fbi->regbase + REG_GOVRH_DVO_SET);
+
+ if (fbi->interface = INTERFACE_VGA)
+ writel(0xe, fbi->regbase + REG_GOVRH_DVO_SET);
+ else
+ writel(4, fbi->regbase + REG_GOVRH_DVO_SET);
+
writel(1, fbi->regbase + REG_GOVRH_MIF);
writel(1, fbi->regbase + REG_GOVRH_REG_STS);
@@ -194,11 +208,15 @@ static int wm8505fb_set_timing(struct fb_info *info)
writel(h_end, fbi->regbase + REG_GOVRH_ACTPX_END);
writel(h_all, fbi->regbase + REG_GOVRH_H_ALLPXL);
writel(h_sync, fbi->regbase + REG_GOVRH_HDMI_HSYNW);
+ if (fbi->interface = INTERFACE_VGA)
+ writel(h_sync, fbi->regbase + REG_GOVRH_VGA_HSYNW);
writel(v_start, fbi->regbase + REG_GOVRH_ACTLN_BG);
writel(v_end, fbi->regbase + REG_GOVRH_ACTLN_END);
writel(v_all, fbi->regbase + REG_GOVRH_V_ALLLN);
writel(v_sync, fbi->regbase + REG_GOVRH_HDMI_VBISW);
+ if (fbi->interface = INTERFACE_VGA)
+ writel(info->var.pixclock, fbi->regbase + REG_GOVRH_VGA_VSYNW);
writel(1, fbi->regbase + REG_GOVRH_TG_ENABLE);
@@ -371,6 +389,7 @@ static int wm8505fb_probe(struct platform_device *pdev)
dma_addr_t fb_mem_phys;
unsigned long fb_mem_len;
void *fb_mem_virt;
+ const char *intf;
fbi = devm_kzalloc(&pdev->dev, sizeof(struct wm8505fb_info) +
sizeof(u32) * 16, GFP_KERNEL);
@@ -428,6 +447,14 @@ static int wm8505fb_probe(struct platform_device *pdev)
clk_prepare_enable(fbi->clk_dvo);
+ fbi->interface = INTERFACE_LCD;
+ ret = of_property_read_string(pdev->dev.of_node, "output-interface",
+ &intf);
+ if (!ret) {
+ if (!strcmp(intf, "vga"))
+ fbi->interface = INTERFACE_VGA;
+ }
+
fb_videomode_to_var(&fbi->fb.var, &mode);
fbi->fb.var.nonstd = 0;
--
1.7.9.5
^ permalink raw reply related
* [PATCH 3/4] fb: vt8500: Require a device clock for wm8505fb driver
From: Tony Prisk @ 2013-05-18 9:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1368868514-18975-1-git-send-email-linux@prisktech.co.nz>
The wm8505fb driver requires a clock to work properly. Without a clock,
the driver can only initialize the display resolution that was set in
uboot.
This patch updates the driver to get and use a clock, and updates
the devicetree documentation to indicate the requirement for a clock.
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
---
.../devicetree/bindings/video/wm,wm8505-fb.txt | 4 ++-
drivers/video/wm8505fb.c | 30 +++++++++++++++++---
2 files changed, 29 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/video/wm,wm8505-fb.txt b/Documentation/devicetree/bindings/video/wm,wm8505-fb.txt
index 0bcadb2..601416c 100644
--- a/Documentation/devicetree/bindings/video/wm,wm8505-fb.txt
+++ b/Documentation/devicetree/bindings/video/wm,wm8505-fb.txt
@@ -5,6 +5,7 @@ Required properties:
- compatible : "wm,wm8505-fb"
- reg : Should contain 1 register ranges(address and length)
- bits-per-pixel : bit depth of framebuffer (16 or 32)
+- clocks : phandle to DVO clock
Required subnodes:
- display-timings: see display-timing.txt for information
@@ -15,11 +16,12 @@ Example:
compatible = "wm,wm8505-fb";
reg = <0xd8051700 0x200>;
bits-per-pixel = <16>;
+ clocks = <&clkdvo>;
display-timings {
native-mode = <&timing0>;
timing0: 800x480 {
- clock-frequency = <0>; /* unused but required */
+ clock-frequency = <30000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <40>;
diff --git a/drivers/video/wm8505fb.c b/drivers/video/wm8505fb.c
index 167a9e2..f8bffc2 100644
--- a/drivers/video/wm8505fb.c
+++ b/drivers/video/wm8505fb.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/fb.h>
@@ -130,9 +131,11 @@
#define to_wm8505fb_info(__info) container_of(__info, \
struct wm8505fb_info, fb)
struct wm8505fb_info {
- struct fb_info fb;
- void __iomem *regbase;
- unsigned int contrast;
+ struct fb_info fb;
+ void __iomem *regbase;
+ unsigned int contrast;
+ struct device *dev;
+ struct clk *clk_dvo;
};
@@ -210,6 +213,13 @@ static int wm8505fb_set_par(struct fb_info *info)
if (!fbi)
return -EINVAL;
+ if (info->var.pixclock = 0) {
+ dev_err(fbi->dev, "requested pixclock = 0\n");
+ return -EINVAL;
+ }
+
+ clk_set_rate(fbi->clk_dvo, PICOS2KHZ(info->var.pixclock)*1000);
+
if (info->var.bits_per_pixel = 32) {
info->var.red.offset = 16;
info->var.red.length = 8;
@@ -369,6 +379,8 @@ static int wm8505fb_probe(struct platform_device *pdev)
return -ENOMEM;
}
+ fbi->dev = &pdev->dev;
+
strcpy(fbi->fb.fix.id, DRIVER_NAME);
fbi->fb.fix.type = FB_TYPE_PACKED_PIXELS;
@@ -408,6 +420,14 @@ static int wm8505fb_probe(struct platform_device *pdev)
if (ret)
return ret;
+ fbi->clk_dvo = of_clk_get(pdev->dev.of_node, 0);
+ if (IS_ERR(fbi->clk_dvo)) {
+ dev_err(&pdev->dev, "Error retrieving clock\n");
+ return PTR_ERR(fbi->clk_dvo);
+ }
+
+ clk_prepare_enable(fbi->clk_dvo);
+
fb_videomode_to_var(&fbi->fb.var, &mode);
fbi->fb.var.nonstd = 0;
@@ -421,7 +441,7 @@ static int wm8505fb_probe(struct platform_device *pdev)
fb_mem_virt = dmam_alloc_coherent(&pdev->dev, fb_mem_len, &fb_mem_phys,
GFP_KERNEL);
if (!fb_mem_virt) {
- pr_err("%s: Failed to allocate framebuffer\n", __func__);
+ dev_err(&pdev->dev, "Failed to allocate framebuffer\n");
return -ENOMEM;
}
@@ -480,6 +500,8 @@ static int wm8505fb_remove(struct platform_device *pdev)
unregister_framebuffer(&fbi->fb);
+ clk_disable_unprepare(fbi->clk_dvo);
+
writel(0, fbi->regbase);
if (fbi->fb.cmap.len)
--
1.7.9.5
^ permalink raw reply related
* [PATCH 2/4] fb: vt8500: Convert to use vendor register names
From: Tony Prisk @ 2013-05-18 9:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1368868514-18975-1-git-send-email-linux@prisktech.co.nz>
Change all the #defines to match the vendor defined names, and change the
references in wm8505fb.c and wmt_ge_rops.c.
Add all the missing register offsets as well to prevent churn in the future.
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
---
drivers/video/wm8505fb.c | 159 ++++++++++++++++--------
drivers/video/wmt_ge_rops.c | 280 +++++++++++++++++++++++++++++++++----------
2 files changed, 332 insertions(+), 107 deletions(-)
diff --git a/drivers/video/wm8505fb.c b/drivers/video/wm8505fb.c
index f824af8..167a9e2 100644
--- a/drivers/video/wm8505fb.c
+++ b/drivers/video/wm8505fb.c
@@ -38,29 +38,94 @@
#define DRIVER_NAME "wm8505-fb"
-#define WMT_GOVR_COLORSPACE1 0x030
-#define WMT_GOVR_MIF_ENABLE 0x080
-#define WMT_GOVR_FBADDR 0x090
-#define WMT_GOVR_FBADDR1 0x094
-#define WMT_GOVR_XRES 0x098
-#define WMT_GOVR_XRES_VIRTUAL 0x09c
-#define WMT_GOVR_YPAN 0x0a0
-#define WMT_GOVR_XPAN 0x0a4
-#define WMT_GOVR_FHI 0x0a8
-#define WMT_GOVR_REG_UPDATE 0x0e4
-#define WMT_GOVR_TG 0x100
-#define WMT_GOVR_TIMING_H_ALL 0x108
-#define WMT_GOVR_TIMING_V_ALL 0x10c
-#define WMT_GOVR_TIMING_V_START 0x110
-#define WMT_GOVR_TIMING_V_END 0x114
-#define WMT_GOVR_TIMING_H_START 0x118
-#define WMT_GOVR_TIMING_H_END 0x11c
-#define WMT_GOVR_TIMING_V_SYNC 0x128
-#define WMT_GOVR_TIMING_H_SYNC 0x12c
-#define WMT_GOVR_DVO_SET 0x148
-#define WMT_GOVR_CONTRAST 0x1b8
-#define WMT_GOVR_BRGHTNESS 0x1bc
-#define WMT_GOVR_COLORSPACE 0x1e4
+#define REG_GOVRH_CUR_ADDR 0x0000
+#define REG_GOVRH_CUR_WIDTH 0x0004
+#define REG_GOVRH_CUR_FB_WIDTH 0x0008
+#define REG_GOVRH_CUR_VCROP 0x000C
+#define REG_GOVRH_CUR_HCROP 0x0010
+#define REG_GOVRH_CUR_HCOORD 0x0014
+#define REG_GOVRH_CUR_VCOORD 0x0018
+#define REG_GOVRH_CUR_STATUS 0x001C
+#define REG_GOVRH_CUR_COLOR_KEY 0x0020
+#define REG_GOVRH_DVO_PIX 0x0030
+#define REG_GOVRH_DVO_DLY_SEL 0x0034
+#define REG_GOVRH_INT 0x0038
+#define REG_GOVRH_DVO_BLANK_DATA 0x003C
+#define REG_GOVRH_DIRPATH 0x0040 /* WM8750+ */
+#define REG_GOVRH_MIF 0x0080
+#define REG_GOVRH_COLFMT 0x0084
+#define REG_GOVRH_SRCFMT 0x0088
+#define REG_GOVRH_DSTFMT 0x008C
+#define REG_GOVRH_YSA 0x0090
+#define REG_GOVRH_CSA 0x0094
+#define REG_GOVRH_PIXWID 0x0098
+#define REG_GOVRH_BUFWID 0x009C
+#define REG_GOVRH_VCROP 0x00A0
+#define REG_GOVRH_HCROP 0x00A4
+#define REG_GOVRH_FHI 0x00A8
+#define REG_GOVRH_COLFMT2 0x00AC
+#define REG_GOVRH_YSA2 0x00B0 /* WM8950 */
+#define REG_GOVRH_CSA2 0x00B4 /* WM8950 */
+#define REG_GOVRH_MIF_FRAME_MODE 0x00B8 /* WM8950 */
+#define REG_GOVRH_REG_STS 0x00E4
+#define REG_GOVRH_SWFLD 0x00E8
+#define REG_GOVRH_TG_ENABLE 0x0100
+#define REG_GOVRH_READ_CYC 0x0104
+#define REG_GOVRH_H_ALLPXL 0x0108
+#define REG_GOVRH_V_ALLLN 0x010C
+#define REG_GOVRH_ACTLN_BG 0x0110
+#define REG_GOVRH_ACTLN_END 0x0114
+#define REG_GOVRH_ACTPX_BG 0x0118
+#define REG_GOVRH_ACTPX_END 0x011C
+#define REG_GOVRH_VBIE_LINE 0x0120
+#define REG_GOVRH_PVBI_LINE 0x0124
+#define REG_GOVRH_HDMI_VBISW 0x0128
+#define REG_GOVRH_HDMI_HSYNW 0x012C
+#define REG_GOVRH_VSYNC_OFFSET 0x0130
+#define REG_GOVRH_FIELD_STATUS 0x0134
+#define REG_GOVRH_HDMI_3D 0x013C /* WM8950 */
+#define REG_GOVRH_DVO_SET 0x0148
+#define REG_GOVRH_CB_ENABLE 0x0150
+#define REG_GOVRH_H_ALLPXL2 0x0158
+#define REG_GOVRH_V_ALLLN2 0x015C
+#define REG_GOVRH_ACTLN_BG2 0x0160
+#define REG_GOVRH_ACTLN_END2 0x0164
+#define REG_GOVRH_ACTPX_BG2 0x0168
+#define REG_GOVRH_ACTPX_END2 0x016C
+#define REG_GOVRH_VBIE_LINE2 0x0170
+#define REG_GOVRH_PVBI_LINE2 0x0174
+#define REG_GOVRH_HDMI_VBISW2 0x0178
+#define REG_GOVRH_HDMI_HSYNW2 0x017C
+#define REG_GOVRH_LVDS_CTRL 0x0180 /* WM8750+ */
+#define REG_GOVRH_LVDS_CTRL2 0x0184 /* WM8750+ */
+#define REG_GOVRH_DAC_LP_SENSE_VAL 0x0188 /* WM8750 */
+#define REG_GOVRH_DAC_TEST_MODE 0x018C /* WM8750 */
+#define REG_GOVRH_VGA_HSYNW 0x0190 /* WM8750 */
+#define REG_GOVRH_VGA_VSYNW 0x0194 /* WM8750 */
+#define REG_GOVRH_VGA_SYNPOLAR 0x0198 /* WM8750 */
+#define REG_GOVRH_DAC_MOD 0x019C /* WM8750 */
+#define REG_GOVRH_DAC_VAL 0x01A0 /* WM8750 */
+#define REG_GOVRH_DAC_CON 0x01A4 /* WM8750 */
+#define REG_GOVRH_DAC_TEST 0x01A8 /* WM8750 */
+#define REG_GOVRH_DAC_BTEST 0x01AC /* WM8750 */
+#define REG_GOVRH_DAC_CTEST 0x01B0 /* WM8750 */
+#define REG_GOVRH_DAC_DBG 0x01B4 /* WM8750 */
+#define REG_GOVRH_CONTRAST 0x01B8
+#define REG_GOVRH_BRIGHTNESS 0x01BC
+#define REG_GOVRH_DMACSC_COEF0 0x01C0
+#define REG_GOVRH_DMACSC_COEF1 0x01C4
+#define REG_GOVRH_DMACSC_COEF2 0x01C8
+#define REG_GOVRH_DMACSC_COEF3 0x01CC
+#define REG_GOVRH_DMACSC_COEF4 0x01D0
+#define REG_GOVRH_DMACSC_COEF5 0x01D8
+#define REG_GOVRH_DMACSC_COEF6 0x01DC
+#define REG_GOVRH_CSC_MODE 0x01E0
+#define REG_GOVRH_YUVRGB 0x01E4
+#define REG_GOVRH_H264_INPUT_EN 0x01E8
+#define REG_GOVRH_DISP_EN 0x01EC /* WM8750 */
+#define REG_GOVRH_HSCALE_UP 0x01F4
+#define REG_GOVRH_IGS_MODE 0x01F8
+#define REG_GOVRH_IGS_MODE2 0x01FC
#define to_wm8505fb_info(__info) container_of(__info, \
struct wm8505fb_info, fb)
@@ -82,26 +147,26 @@ static int wm8505fb_init_hw(struct fb_info *info)
writel(0, fbi->regbase + i);
/* Set frame buffer address */
- writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR);
- writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR1);
+ writel(fbi->fb.fix.smem_start, fbi->regbase + REG_GOVRH_YSA);
+ writel(fbi->fb.fix.smem_start, fbi->regbase + REG_GOVRH_CSA);
/*
* Set in-memory picture format to RGB
* 0x31C sets the correct color mode (RGB565) for WM8650
* Bit 8+9 (0x300) are ignored on WM8505 as reserved
*/
- writel(0x31c, fbi->regbase + WMT_GOVR_COLORSPACE);
- writel(1, fbi->regbase + WMT_GOVR_COLORSPACE1);
+ writel(0x31c, fbi->regbase + REG_GOVRH_YUVRGB);
+ writel(1, fbi->regbase + REG_GOVRH_DVO_PIX);
/* Virtual buffer size */
- writel(info->var.xres, fbi->regbase + WMT_GOVR_XRES);
- writel(info->var.xres_virtual, fbi->regbase + WMT_GOVR_XRES_VIRTUAL);
+ writel(info->var.xres, fbi->regbase + REG_GOVRH_PIXWID);
+ writel(info->var.xres_virtual, fbi->regbase + REG_GOVRH_BUFWID);
/* black magic ;) */
- writel(0xf, fbi->regbase + WMT_GOVR_FHI);
- writel(4, fbi->regbase + WMT_GOVR_DVO_SET);
- writel(1, fbi->regbase + WMT_GOVR_MIF_ENABLE);
- writel(1, fbi->regbase + WMT_GOVR_REG_UPDATE);
+ writel(0xf, fbi->regbase + REG_GOVRH_FHI);
+ writel(4, fbi->regbase + REG_GOVRH_DVO_SET);
+ writel(1, fbi->regbase + REG_GOVRH_MIF);
+ writel(1, fbi->regbase + REG_GOVRH_REG_STS);
return 0;
}
@@ -120,19 +185,19 @@ static int wm8505fb_set_timing(struct fb_info *info)
int v_all = v_end + info->var.lower_margin;
int v_sync = info->var.vsync_len;
- writel(0, fbi->regbase + WMT_GOVR_TG);
+ writel(0, fbi->regbase + REG_GOVRH_TG_ENABLE);
- writel(h_start, fbi->regbase + WMT_GOVR_TIMING_H_START);
- writel(h_end, fbi->regbase + WMT_GOVR_TIMING_H_END);
- writel(h_all, fbi->regbase + WMT_GOVR_TIMING_H_ALL);
- writel(h_sync, fbi->regbase + WMT_GOVR_TIMING_H_SYNC);
+ writel(h_start, fbi->regbase + REG_GOVRH_ACTPX_BG);
+ writel(h_end, fbi->regbase + REG_GOVRH_ACTPX_END);
+ writel(h_all, fbi->regbase + REG_GOVRH_H_ALLPXL);
+ writel(h_sync, fbi->regbase + REG_GOVRH_HDMI_HSYNW);
- writel(v_start, fbi->regbase + WMT_GOVR_TIMING_V_START);
- writel(v_end, fbi->regbase + WMT_GOVR_TIMING_V_END);
- writel(v_all, fbi->regbase + WMT_GOVR_TIMING_V_ALL);
- writel(v_sync, fbi->regbase + WMT_GOVR_TIMING_V_SYNC);
+ writel(v_start, fbi->regbase + REG_GOVRH_ACTLN_BG);
+ writel(v_end, fbi->regbase + REG_GOVRH_ACTLN_END);
+ writel(v_all, fbi->regbase + REG_GOVRH_V_ALLLN);
+ writel(v_sync, fbi->regbase + REG_GOVRH_HDMI_VBISW);
- writel(1, fbi->regbase + WMT_GOVR_TG);
+ writel(1, fbi->regbase + REG_GOVRH_TG_ENABLE);
return 0;
}
@@ -174,7 +239,7 @@ static int wm8505fb_set_par(struct fb_info *info)
wm8505fb_set_timing(info);
writel(fbi->contrast<<16 | fbi->contrast<<8 | fbi->contrast,
- fbi->regbase + WMT_GOVR_CONTRAST);
+ fbi->regbase + REG_GOVRH_CONTRAST);
return 0;
}
@@ -250,8 +315,8 @@ static int wm8505fb_pan_display(struct fb_var_screeninfo *var,
{
struct wm8505fb_info *fbi = to_wm8505fb_info(info);
- writel(var->xoffset, fbi->regbase + WMT_GOVR_XPAN);
- writel(var->yoffset, fbi->regbase + WMT_GOVR_YPAN);
+ writel(var->xoffset, fbi->regbase + REG_GOVRH_VCROP);
+ writel(var->yoffset, fbi->regbase + REG_GOVRH_HCROP);
return 0;
}
@@ -264,7 +329,7 @@ static int wm8505fb_blank(int blank, struct fb_info *info)
wm8505fb_set_timing(info);
break;
default:
- writel(0, fbi->regbase + WMT_GOVR_TIMING_V_SYNC);
+ writel(0, fbi->regbase + REG_GOVRH_HDMI_VBISW);
break;
}
diff --git a/drivers/video/wmt_ge_rops.c b/drivers/video/wmt_ge_rops.c
index 4aaeb18..68de46a 100644
--- a/drivers/video/wmt_ge_rops.c
+++ b/drivers/video/wmt_ge_rops.c
@@ -20,29 +20,189 @@
#include <linux/platform_device.h>
#include "fb_draw.h"
-#define GE_COMMAND_OFF 0x00
-#define GE_DEPTH_OFF 0x04
-#define GE_HIGHCOLOR_OFF 0x08
-#define GE_ROPCODE_OFF 0x14
-#define GE_FIRE_OFF 0x18
-#define GE_SRCBASE_OFF 0x20
-#define GE_SRCDISPW_OFF 0x24
-#define GE_SRCDISPH_OFF 0x28
-#define GE_SRCAREAX_OFF 0x2c
-#define GE_SRCAREAY_OFF 0x30
-#define GE_SRCAREAW_OFF 0x34
-#define GE_SRCAREAH_OFF 0x38
-#define GE_DESTBASE_OFF 0x3c
-#define GE_DESTDISPW_OFF 0x40
-#define GE_DESTDISPH_OFF 0x44
-#define GE_DESTAREAX_OFF 0x48
-#define GE_DESTAREAY_OFF 0x4c
-#define GE_DESTAREAW_OFF 0x50
-#define GE_DESTAREAH_OFF 0x54
-#define GE_PAT0C_OFF 0x88 /* Pattern 0 color */
-#define GE_ENABLE_OFF 0xec
-#define GE_INTEN_OFF 0xf0
-#define GE_STATUS_OFF 0xf8
+#define GE_COMMAND 0x0000
+#define GE_COLOR_DEPTH 0x0004
+#define GE_HM_SEL 0x0008
+#define GE_PAT_TRAN_EN 0x000C
+#define GE_FONT_TRAN_EN 0x0010
+#define GE_ROP_CODE 0x0014
+#define GE_FIRE 0x0018
+#define GE_ROP_BG_CODE 0x001C
+#define GE_SRC_BADDR 0x0020
+#define GE_SRC_DISP_W 0x0024
+#define GE_SRC_DISP_H 0x0028
+#define GE_SRC_X_START 0x002C
+#define GE_SRC_Y_START 0x0030
+#define GE_SRC_WIDTH 0x0034
+#define GE_SRC_HEIGHT 0x0038
+#define GE_DES_BADDR 0x003C
+#define GE_DES_DISP_W 0x0040
+#define GE_DES_DISP_H 0x0044
+#define GE_DES_X_START 0x0048
+#define GE_DES_Y_START 0x004C
+#define GE_DES_WIDTH 0x0050
+#define GE_DES_HEIGHT 0x0054
+#define GE_FONT0_BUF 0x0058
+#define GE_FONT1_BUF 0x005C
+#define GE_FONT2_BUF 0x0060
+#define GE_FONT3_BUF 0x0064
+#define GE_PAT0_BUF 0x0068
+#define GE_PAT1_BUF 0x006C
+#define GE_PAT2_BUF 0x0070
+#define GE_PAT3_BUF 0x0074
+#define GE_PAT4_BUF 0x0078
+#define GE_PAT5_BUF 0x007C
+#define GE_PAT6_BUF 0x0080
+#define GE_PAT7_BUF 0x0084
+#define GE_PAT0_COLOR 0x0088
+#define GE_PAT1_COLOR 0x008C
+#define GE_PAT2_COLOR 0x0090
+#define GE_PAT3_COLOR 0x0094
+#define GE_PAT4_COLOR 0x0098
+#define GE_PAT5_COLOR 0x009C
+#define GE_PAT6_COLOR 0x00A0
+#define GE_PAT7_COLOR 0x00A4
+#define GE_PAT8_COLOR 0x00A8
+#define GE_PAT9_COLOR 0x00AC
+#define GE_PAT10_COLOR 0x00B0
+#define GE_PAT11_COLOR 0x00B4
+#define GE_PAT12_COLOR 0x00B8
+#define GE_PAT13_COLOR 0x00BC
+#define GE_PAT14_COLOR 0x00C0
+#define GE_PAT15_COLOR 0x00C4
+#define GE_CK_SEL 0x00C8
+#define GE_SRC_CK 0x00CC
+#define GE_DES_CK 0x00D0
+#define GE_ALPHA_SEL 0x00D4
+#define GE_BITBLT_ALPHA 0x00D8
+#define GE_DES_PATH_EN 0x00DC
+#define GE_ROTATE_MODE 0x00E0
+#define GE_MIRROR_MODE 0x00E4
+#define GE_GE_DELAY 0x00E8
+#define GE_ENABLE 0x00EC
+#define GE_INT_EN 0x00F0
+#define GE_INT_FLAG 0x00F4
+#define GE_STATUS 0x00F8
+#define GE_SWID 0x00FC
+#define GE_LN_X_START 0x0100
+#define GE_LN_X_END 0x0104
+#define GE_LN_Y_START 0x0108
+#define GE_LN_Y_END 0x0110
+#define GE_LN_TCK 0x0114
+#define GE_AMX_CSC_BYPASS 0x0118
+#define GE_C1_COEF 0x011C
+#define GE_LN_STL_TB 0x0120
+#define GE_LN_STL_RTN 0x0124
+#define GE_LN_STL_DATA 0x0128
+#define GE_LN_STL_APA 0x012C
+#define GE_BC_P1X 0x0130
+#define GE_BC_P1Y 0x0134
+#define GE_BC_P2X 0x0138
+#define GE_BC_P2Y 0x013C
+#define GE_BC_P3X 0x0140
+#define GE_BC_P3Y 0x0144
+#define GE_BC_COLOR 0x0148
+#define GE_BC_ALPHA 0x014C
+#define GE_BC_DELTA_T 0x0150
+#define GE_BC_L_STL 0x0154
+#define GE_BC_L_STL_RTN 0x0158
+#define GE_C2_COEF 0x015C
+#define GE_C3_COEF 0x0160
+#define GE_C4_COEF 0x0164
+#define GE_C5_COEF 0x0168
+#define GE_C6_COEF 0x016C
+#define GE_C7_COEF 0x0170
+#define GE_C8_COEF 0x0174
+#define GE_YUV2_Y_BADDR 0x0178
+#define GE_YUV2_C_BADDR 0x017C
+#define GE_VQ_EN 0x0180
+#define GE_VQ_SIZE 0x0184
+#define GE_VQ_UDPTR 0x0188
+#define GE_VQ_BASEADDR 0x018C
+#define GE_VQ_WRSIZE 0x0190
+#define GE_VQ_STADDRW 0x0194
+#define GE_VQ_THR 0x0198
+#define GE_VQ_YUV2_Y_FBW 0x019C
+#define GE_ROP4_EN 0x01A0
+#define GE_ALPHA_PLANE_EN 0x01A4
+#define GE_MASK_BADDR 0x01A8
+#define GE_MASK_DISP_W 0x01AC
+#define GE_MASK_DISP_H 0x01B0
+#define GE_MASK_X_START 0x01B4
+#define GE_MASK_Y_START 0x01B8
+#define GE_MASK_WIDTH 0x01BC
+#define GE_MASK_HEIGHT 0x01C0
+#define GE_DW_MASK_BADDR 0x01C4
+#define GE_ALPHA_PLANE_WBE 0x01C8
+#define GE_YUV2_C_FBW 0x01CC
+#define GE_ADAP_BLEND_EN 0x01D0
+#define GE_SRC_ALPHA_SEL 0x01D4
+#define GE_SRC_BLEND_APA 0x01D8
+#define GE_DES_ALPHA_SEL 0x01DC
+#define GE_DES_BLEND_APA 0x01E0
+#define GE_ADAP_CLAMP_EN 0x01E4
+#define GE_YUV2_C_BLEND_SEL 0x01E8
+#define GE_SRC_INDEP_MODE 0x01EC
+#define GE_C9_COEF 0x01F0
+#define GE_COEF_I 0x01F4
+#define GE_COEF_J 0x01F8
+#define GE_COEF_K 0x01FC
+#define GE_G1_CD 0x0200
+#define GE_G2_CD 0x0204
+#define GE_G1_FG_ADDR 0x0210
+#define GE_G1_BG_ADDR 0x0214
+#define GE_G1_FB_SEL 0x0218
+#define GE_G2_FG_ADDR 0x021C
+#define GE_G2_BG_ADDR 0x0220
+#define GE_G2_FB_SEL 0x0224
+#define GE_G1_X_START 0x0230
+#define GE_G1_X_END 0x0234
+#define GE_G1_Y_START 0x0238
+#define GE_G1_Y_END 0x023C
+#define GE_G2_X_START 0x0240
+#define GE_G2_X_END 0x0244
+#define GE_G2_Y_START 0x0248
+#define GE_G2_Y_END 0x024C
+#define GE_DISP_X_END 0x0250
+#define GE_DISP_Y_END 0x0254
+#define GE_AMX_CB 0x0258
+#define GE_G1_YUV_MODE_EN 0x025C
+#define GE_G2_YUV_MODE_EN 0x0260
+#define GE_G1_YUV_FMT_SEL 0x0264
+#define GE_G1_YUV_OUTP_SEL 0x0268
+#define GE_G2_YUV_FMT_SEL 0x026C
+#define GE_G2_YUV_OUTP_SEL 0x0270
+#define GE_AMX_CSC_CFG 0x0274
+#define GE_AMX_CSC_MODE 0x0278
+#define GE_AMX_Y_SUB_16_EN 0x027C
+#define GE_G1_YUV_ADDR 0x0280
+#define GE_G2_YUV_ADDR 0x0284
+#define GE_G1_CK_EN 0x0298
+#define GE_G2_CK_EN 0x029C
+#define GE_G1_C_KEY 0x02A0
+#define GE_G2_C_KEY 0x02A4
+#define GE_G1_AMX_EN 0x02A8
+#define GE_G2_AMX_EN 0x02AC
+#define GE_CK2_APA 0x02B0
+#define GE_AMX_CTL 0x02B4
+#define GE_CK_APA 0x02B8
+#define GE_FIX_APA 0x02BC
+#define GE_G1_AMX_HM 0x02C0
+#define GE_G2_AMX_HM 0x02C4
+#define GE_NH_DATA 0x02C8
+#define GE_VSYNC_STS 0x02CC
+#define GE_REG_UPD 0x02D0
+#define GE_REG_SEL 0x02D4
+#define GE_REG_AMX2_CTL 0x02D8
+#define GE_FIX2_APA 0x02DC
+#define GE_G1_H_SCALE 0x02E0
+#define GE_G2_H_SCALE 0x02E4
+#define GE_G1_FBW 0x02E8
+#define GE_G1_VCROP 0x02EC
+#define GE_G1_HCROP 0x02F0
+#define GE_G2_FBW 0x02F4
+#define GE_G2_VCROP 0x02F8
+#define GE_G2_HCROP 0x02FC
static void __iomem *regbase;
@@ -65,20 +225,20 @@ void wmt_ge_fillrect(struct fb_info *p, const struct fb_fillrect *rect)
p->fbops->fb_sync(p);
writel(p->var.bits_per_pixel = 32 ? 3 :
- (p->var.bits_per_pixel = 8 ? 0 : 1), regbase + GE_DEPTH_OFF);
- writel(p->var.bits_per_pixel = 15 ? 1 : 0, regbase + GE_HIGHCOLOR_OFF);
- writel(p->fix.smem_start, regbase + GE_DESTBASE_OFF);
- writel(p->var.xres_virtual - 1, regbase + GE_DESTDISPW_OFF);
- writel(p->var.yres_virtual - 1, regbase + GE_DESTDISPH_OFF);
- writel(rect->dx, regbase + GE_DESTAREAX_OFF);
- writel(rect->dy, regbase + GE_DESTAREAY_OFF);
- writel(rect->width - 1, regbase + GE_DESTAREAW_OFF);
- writel(rect->height - 1, regbase + GE_DESTAREAH_OFF);
-
- writel(pat, regbase + GE_PAT0C_OFF);
- writel(1, regbase + GE_COMMAND_OFF);
- writel(rect->rop = ROP_XOR ? 0x5a : 0xf0, regbase + GE_ROPCODE_OFF);
- writel(1, regbase + GE_FIRE_OFF);
+ (p->var.bits_per_pixel = 8 ? 0 : 1), regbase + GE_COLOR_DEPTH);
+ writel(p->var.bits_per_pixel = 15 ? 1 : 0, regbase + GE_HM_SEL);
+ writel(p->fix.smem_start, regbase + GE_DES_BADDR);
+ writel(p->var.xres_virtual - 1, regbase + GE_DES_DISP_W);
+ writel(p->var.yres_virtual - 1, regbase + GE_DES_DISP_H);
+ writel(rect->dx, regbase + GE_DES_X_START);
+ writel(rect->dy, regbase + GE_DES_Y_START);
+ writel(rect->width - 1, regbase + GE_DES_WIDTH);
+ writel(rect->height - 1, regbase + GE_DES_HEIGHT);
+
+ writel(pat, regbase + GE_PAT0_COLOR);
+ writel(1, regbase + GE_COMMAND);
+ writel(rect->rop = ROP_XOR ? 0x5a : 0xf0, regbase + GE_ROP_CODE);
+ writel(1, regbase + GE_FIRE);
}
EXPORT_SYMBOL_GPL(wmt_ge_fillrect);
@@ -91,34 +251,34 @@ void wmt_ge_copyarea(struct fb_info *p, const struct fb_copyarea *area)
p->fbops->fb_sync(p);
writel(p->var.bits_per_pixel > 16 ? 3 :
- (p->var.bits_per_pixel > 8 ? 1 : 0), regbase + GE_DEPTH_OFF);
-
- writel(p->fix.smem_start, regbase + GE_SRCBASE_OFF);
- writel(p->var.xres_virtual - 1, regbase + GE_SRCDISPW_OFF);
- writel(p->var.yres_virtual - 1, regbase + GE_SRCDISPH_OFF);
- writel(area->sx, regbase + GE_SRCAREAX_OFF);
- writel(area->sy, regbase + GE_SRCAREAY_OFF);
- writel(area->width - 1, regbase + GE_SRCAREAW_OFF);
- writel(area->height - 1, regbase + GE_SRCAREAH_OFF);
-
- writel(p->fix.smem_start, regbase + GE_DESTBASE_OFF);
- writel(p->var.xres_virtual - 1, regbase + GE_DESTDISPW_OFF);
- writel(p->var.yres_virtual - 1, regbase + GE_DESTDISPH_OFF);
- writel(area->dx, regbase + GE_DESTAREAX_OFF);
- writel(area->dy, regbase + GE_DESTAREAY_OFF);
- writel(area->width - 1, regbase + GE_DESTAREAW_OFF);
- writel(area->height - 1, regbase + GE_DESTAREAH_OFF);
-
- writel(0xcc, regbase + GE_ROPCODE_OFF);
- writel(1, regbase + GE_COMMAND_OFF);
- writel(1, regbase + GE_FIRE_OFF);
+ (p->var.bits_per_pixel > 8 ? 1 : 0), regbase + GE_COLOR_DEPTH);
+
+ writel(p->fix.smem_start, regbase + GE_SRC_BADDR);
+ writel(p->var.xres_virtual - 1, regbase + GE_SRC_DISP_W);
+ writel(p->var.yres_virtual - 1, regbase + GE_SRC_DISP_H);
+ writel(area->sx, regbase + GE_SRC_X_START);
+ writel(area->sy, regbase + GE_SRC_Y_START);
+ writel(area->width - 1, regbase + GE_SRC_WIDTH);
+ writel(area->height - 1, regbase + GE_SRC_HEIGHT);
+
+ writel(p->fix.smem_start, regbase + GE_DES_BADDR);
+ writel(p->var.xres_virtual - 1, regbase + GE_DES_DISP_W);
+ writel(p->var.yres_virtual - 1, regbase + GE_DES_DISP_H);
+ writel(area->dx, regbase + GE_DES_X_START);
+ writel(area->dy, regbase + GE_DES_Y_START);
+ writel(area->width - 1, regbase + GE_DES_WIDTH);
+ writel(area->height - 1, regbase + GE_DES_HEIGHT);
+
+ writel(0xcc, regbase + GE_ROP_CODE);
+ writel(1, regbase + GE_COMMAND);
+ writel(1, regbase + GE_FIRE);
}
EXPORT_SYMBOL_GPL(wmt_ge_copyarea);
int wmt_ge_sync(struct fb_info *p)
{
int loops = 5000000;
- while ((readl(regbase + GE_STATUS_OFF) & 4) && --loops)
+ while ((readl(regbase + GE_STATUS) & 4) && --loops)
cpu_relax();
return loops > 0 ? 0 : -EBUSY;
}
@@ -146,7 +306,7 @@ static int wmt_ge_rops_probe(struct platform_device *pdev)
return -EBUSY;
}
- writel(1, regbase + GE_ENABLE_OFF);
+ writel(1, regbase + GE_ENABLE);
printk(KERN_INFO "Enabled support for WMT GE raster acceleration\n");
return 0;
--
1.7.9.5
^ permalink raw reply related
* [PATCH 1/4] fb: vt8500: Move register defines inside driver
From: Tony Prisk @ 2013-05-18 9:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1368868514-18975-1-git-send-email-linux@prisktech.co.nz>
The #defines in wm8505fb_regs.h are only used in the wm8505fb driver,
and don't need to be visible outside.
Move the defines into the driver and remove the header.
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
---
drivers/video/wm8505fb.c | 25 +++++++++++++-
drivers/video/wm8505fb_regs.h | 76 -----------------------------------------
2 files changed, 24 insertions(+), 77 deletions(-)
delete mode 100644 drivers/video/wm8505fb_regs.h
diff --git a/drivers/video/wm8505fb.c b/drivers/video/wm8505fb.c
index 01f9ace..f824af8 100644
--- a/drivers/video/wm8505fb.c
+++ b/drivers/video/wm8505fb.c
@@ -34,11 +34,34 @@
#include <linux/wait.h>
#include <video/of_display_timing.h>
-#include "wm8505fb_regs.h"
#include "wmt_ge_rops.h"
#define DRIVER_NAME "wm8505-fb"
+#define WMT_GOVR_COLORSPACE1 0x030
+#define WMT_GOVR_MIF_ENABLE 0x080
+#define WMT_GOVR_FBADDR 0x090
+#define WMT_GOVR_FBADDR1 0x094
+#define WMT_GOVR_XRES 0x098
+#define WMT_GOVR_XRES_VIRTUAL 0x09c
+#define WMT_GOVR_YPAN 0x0a0
+#define WMT_GOVR_XPAN 0x0a4
+#define WMT_GOVR_FHI 0x0a8
+#define WMT_GOVR_REG_UPDATE 0x0e4
+#define WMT_GOVR_TG 0x100
+#define WMT_GOVR_TIMING_H_ALL 0x108
+#define WMT_GOVR_TIMING_V_ALL 0x10c
+#define WMT_GOVR_TIMING_V_START 0x110
+#define WMT_GOVR_TIMING_V_END 0x114
+#define WMT_GOVR_TIMING_H_START 0x118
+#define WMT_GOVR_TIMING_H_END 0x11c
+#define WMT_GOVR_TIMING_V_SYNC 0x128
+#define WMT_GOVR_TIMING_H_SYNC 0x12c
+#define WMT_GOVR_DVO_SET 0x148
+#define WMT_GOVR_CONTRAST 0x1b8
+#define WMT_GOVR_BRGHTNESS 0x1bc
+#define WMT_GOVR_COLORSPACE 0x1e4
+
#define to_wm8505fb_info(__info) container_of(__info, \
struct wm8505fb_info, fb)
struct wm8505fb_info {
diff --git a/drivers/video/wm8505fb_regs.h b/drivers/video/wm8505fb_regs.h
deleted file mode 100644
index 4dd4166..0000000
--- a/drivers/video/wm8505fb_regs.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * GOVR registers list for WM8505 chips
- *
- * Copyright (C) 2010 Ed Spiridonov <edo.rus@gmail.com>
- * Based on VIA/WonderMedia wm8510-govrh-reg.h
- * http://github.com/projectgus/kernel_wm8505/blob/wm8505_2.6.29/
- * drivers/video/wmt/register/wm8510/wm8510-govrh-reg.h
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _WM8505FB_REGS_H
-#define _WM8505FB_REGS_H
-
-/*
- * Color space select register, default value 0x1c
- * BIT0 GOVRH_DVO_YUV2RGB_ENABLE
- * BIT1 GOVRH_VGA_YUV2RGB_ENABLE
- * BIT2 GOVRH_RGB_MODE
- * BIT3 GOVRH_DAC_CLKINV
- * BIT4 GOVRH_BLANK_ZERO
- */
-#define WMT_GOVR_COLORSPACE 0x1e4
-/*
- * Another colorspace select register, default value 1
- * BIT0 GOVRH_DVO_RGB
- * BIT1 GOVRH_DVO_YUV422
- */
-#define WMT_GOVR_COLORSPACE1 0x30
-
-#define WMT_GOVR_CONTRAST 0x1b8
-#define WMT_GOVR_BRGHTNESS 0x1bc /* incompatible with RGB? */
-
-/* Framubeffer address */
-#define WMT_GOVR_FBADDR 0x90
-#define WMT_GOVR_FBADDR1 0x94 /* UV offset in YUV mode */
-
-/* Offset of visible window */
-#define WMT_GOVR_XPAN 0xa4
-#define WMT_GOVR_YPAN 0xa0
-
-#define WMT_GOVR_XRES 0x98
-#define WMT_GOVR_XRES_VIRTUAL 0x9c
-
-#define WMT_GOVR_MIF_ENABLE 0x80
-#define WMT_GOVR_FHI 0xa8
-#define WMT_GOVR_REG_UPDATE 0xe4
-
-/*
- * BIT0 GOVRH_DVO_OUTWIDTH
- * BIT1 GOVRH_DVO_SYNC_POLAR
- * BIT2 GOVRH_DVO_ENABLE
- */
-#define WMT_GOVR_DVO_SET 0x148
-
-/* Timing generator? */
-#define WMT_GOVR_TG 0x100
-
-/* Timings */
-#define WMT_GOVR_TIMING_H_ALL 0x108
-#define WMT_GOVR_TIMING_V_ALL 0x10c
-#define WMT_GOVR_TIMING_V_START 0x110
-#define WMT_GOVR_TIMING_V_END 0x114
-#define WMT_GOVR_TIMING_H_START 0x118
-#define WMT_GOVR_TIMING_H_END 0x11c
-#define WMT_GOVR_TIMING_V_SYNC 0x128
-#define WMT_GOVR_TIMING_H_SYNC 0x12c
-
-#endif /* _WM8505FB_REGS_H */
--
1.7.9.5
^ permalink raw reply related
* [PATCH 0/4] FB updates for 3.11
From: Tony Prisk @ 2013-05-18 9:15 UTC (permalink / raw)
To: linux-arm-kernel
Patch #1 - Move register defines inside the driver and drop the header.
Patch #2 - Convert the register defines to use the vendor preferred names.
Patch #3 - Add a device clock to wm8505fb. Without it, only the uboot
initialized resolution is supported.
Patch #4 - Add support for the VGA output found on the APC8750 board.
Tony Prisk (4):
fb: vt8500: Move register defines inside driver
fb: vt8500: Convert to use vendor register names
fb: vt8500: Require a device clock for wm8505fb driver
fb: vt8500: Add VGA output support to wm8505fb driver.
.../devicetree/bindings/video/wm,wm8505-fb.txt | 9 +-
drivers/video/wm8505fb.c | 195 ++++++++++++--
drivers/video/wm8505fb_regs.h | 76 ------
drivers/video/wmt_ge_rops.c | 280 +++++++++++++++-----
4 files changed, 394 insertions(+), 166 deletions(-)
delete mode 100644 drivers/video/wm8505fb_regs.h
--
1.7.9.5
^ permalink raw reply
* [PATCH v7, part3 07/16] mm, acornfb: use free_reserved_area() to simplify code
From: Jiang Liu @ 2013-05-17 15:45 UTC (permalink / raw)
To: Andrew Morton
Cc: Jiang Liu, David Rientjes, Wen Congyang, Mel Gorman, Minchan Kim,
KAMEZAWA Hiroyuki, Michal Hocko, James Bottomley, Sergei Shtylyov,
David Howells, Mark Salter, Jianguo Wu, linux-mm, linux-arch,
linux-kernel, Florian Tobias Schandinat, linux-fbdev
In-Reply-To: <1368805518-2634-1-git-send-email-jiang.liu@huawei.com>
Use common help function free_reserved_area() to simplify code.
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Cc: linux-fbdev@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
drivers/video/acornfb.c | 28 ++--------------------------
1 file changed, 2 insertions(+), 26 deletions(-)
diff --git a/drivers/video/acornfb.c b/drivers/video/acornfb.c
index 6488a73..344f2bb 100644
--- a/drivers/video/acornfb.c
+++ b/drivers/video/acornfb.c
@@ -1188,32 +1188,8 @@ static int acornfb_detect_monitortype(void)
static inline void
free_unused_pages(unsigned int virtual_start, unsigned int virtual_end)
{
- int mb_freed = 0;
-
- /*
- * Align addresses
- */
- virtual_start = PAGE_ALIGN(virtual_start);
- virtual_end = PAGE_ALIGN(virtual_end);
-
- while (virtual_start < virtual_end) {
- struct page *page;
-
- /*
- * Clear page reserved bit,
- * set count to 1, and free
- * the page.
- */
- page = virt_to_page(virtual_start);
- ClearPageReserved(page);
- init_page_count(page);
- free_page(virtual_start);
-
- virtual_start += PAGE_SIZE;
- mb_freed += PAGE_SIZE / 1024;
- }
-
- printk("acornfb: freed %dK memory\n", mb_freed);
+ free_reserved_area(virtual_start, PAGE_ALIGN(virtual_end),
+ -1, "acornfb");
}
static int acornfb_probe(struct platform_device *dev)
--
1.8.1.2
^ permalink raw reply related
* Re: [PATCH 1/2] video: exynos_dp: Add parsing of gpios pins to exynos-dp driver
From: Tomasz Figa @ 2013-05-17 12:29 UTC (permalink / raw)
To: jg1.han
Cc: Vikas Sajjan, linux-samsung-soc@vger.kernel.org,
김국진, devicetree-discuss@lists.ozlabs.org,
patches@linaro.org, linaro-kernel@lists.linaro.org,
rpurdie@rpsys.net, FlorianSchandinat@gmx.de,
linux-fbdev@vger.kernel.org
In-Reply-To: <26364319.123371368669839202.JavaMail.weblogic@epml12>
Hi Jingoo,
On Thursday 16 of May 2013 02:03:59 한진구 wrote:
> Tuesday, May 14, 2013 11:17 PM, Vikas Sajjan wrote:
>
> >
> > Hi Vikas,
> >
> > On Tuesday 14 of May 2013 18:25:51 Vikas Sajjan wrote:
> >
> > > Adds GPIO parsing functionality for "LCD backlight" and "LCD enable"
> > > GPIO pins of exynos dp controller.
> > >
> > >
> > >
> > > Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
> > > ---
> > >
> > > drivers/video/exynos/exynos_dp_core.c | 45
> > >
> > > +++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+)
> > >
> > >
> >
> >
> > I don't think that Exynos DP driver is right place for such code.
> > Backlight
and LCD drivers are responsible for backlight and LCD power
> > control using backlight and LCD subsystems.
> >
> > IMHO the correct solution would be to either extend existing
> > backlight/lcd
> > drivers found in drivers/video/backlight to support direct GPIO control
> > and
parse GPIO pins from device tree or create new gpio_bl and gpio_lcd
> > drivers.
>
> Hi Vikas Sajian,
>
> I agree with Tomasz Figa's opinion.
> Backlight/LCD framework should be used.
> eDP panel backlight on SMDK5210 board can be controlled by PWM;
> thus, pwm-backlight driver should be used.
> Also, eDP panel reset pin should be controlled by using
> platform-lcd driver.
>
>
> >
> > CCing Richard, Florian and linux-fbdev.
>
>
> Also, I have been doing backlight reviews instead of Richard,
> please do CC'ing me.
OK. I used get_maintainers script, but it seems like the result was a bit off
in this case. Will remember for future.
Best regards,
--
Tomasz Figa
Linux Kernel Developer
Samsung R&D Institute Poland
Samsung Electronics
^ permalink raw reply
* Re: Introduce a new helper framework for buffer synchronization
From: Daniel Vetter @ 2013-05-17 4:19 UTC (permalink / raw)
To: Rob Clark
Cc: Inki Dae, linux-fbdev, YoungJun Cho, Kyungmin Park, myungjoo.ham,
DRI mailing list, linux-arm-kernel@lists.infradead.org,
linux-media@vger.kernel.org
In-Reply-To: <CAF6AEGuBexKUpTwm9cjGjkxCTKgEaDhAakeP0RN=rtLS6Qy=Mg@mail.gmail.com>
On Wed, May 15, 2013 at 4:06 PM, Rob Clark <robdclark@gmail.com> wrote:
> So while it seems nice and orthogonal/clean to couple cache and
> synchronization and handle dma->cpu and cpu->cpu and cpu->dma in the
> same generic way, but I think in practice we have to make things more
> complex than they otherwise need to be to do this. Otherwise I think
> we'll be having problems with badly behaved or crashing userspace.
I haven't read through the entire thread careful but imo this is very
important. If we add a fence interface which allows userspace to block
dma this is a no-go. The only thing we need is to sync up with all
outstanding dma operations and flush caches for cpu access. If broken
userspace starts to issue new dma (or multiple thread stomp onto each
another) that's not a problem dma fences/syncpoints should try to
solve. This way we can concentrate on solving the (already
challenging) device-to-device sync issues without additional
complexities which cpu->cpu sync would impose.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply
* Re: [PATCH v3 6/9] radeon: Switch to arch_phys_wc_add and add a missing ..._del
From: Andy Lutomirski @ 2013-05-16 21:00 UTC (permalink / raw)
To: Jerome Glisse
Cc: Alex Deucher, linux-kernel, dri-devel, linux-fbdev, Daniel Vetter,
Dave Airlie
In-Reply-To: <CAH3drwY0vVGnf05v-coSmS4OQyHuufycLojEn9que6iL_r3AUw@mail.gmail.com>
On Thu, May 16, 2013 at 6:50 AM, Jerome Glisse <j.glisse@gmail.com> wrote:
> On Wed, May 15, 2013 at 2:22 PM, Andy Lutomirski <luto@amacapital.net> wrote:
>> On Wed, May 15, 2013 at 7:49 AM, Jerome Glisse <j.glisse@gmail.com> wrote:
>>> On Tue, May 14, 2013 at 5:35 PM, Andy Lutomirski <luto@amacapital.net> wrote:
>>>> On Tue, May 14, 2013 at 6:37 AM, Jerome Glisse <j.glisse@gmail.com> wrote:
>>>>> On Tue, May 14, 2013 at 8:58 AM, Alex Deucher <alexdeucher@gmail.com> wrote:
>>>>>> On Mon, May 13, 2013 at 7:58 PM, Andy Lutomirski <luto@amacapital.net> wrote:
>>>>>>> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>>>>>>> Signed-off-by: Andy Lutomirski <luto@amacapital.net>
>>>>>>
>>>>>> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>>>>>
>>>>> I believe it will break something but we could deal with the fallout
>>>>> once it happens.
>>>>
>>>> FWIW, I'm running with this code on my machine right now using the
>>>> radeon driver. Everything seems fine. If I build without MTRRs and
>>>> without PAT, though, graphics are slow (as expected). So I think
>>>> everything's okay.
>>>>
>>>> --Andy
>>>
>>> I am worried on p4 where i last see issue with that notably with agp.
>>
>> Do you remember any details? It looks like PAT is enabled on Pentium
>> 4 (i.e. famliy 0xF).
>>
>> --Andy
>
> No i don't, i think it was some pat errata on those about non real ram
> address and with agp. Memory is fuzzy. I might have time in couple of
> week to plug back my p4 and see how it behave.
Hmm. I couldn't find any PAT errata related to AGP.
Is it possible that the issue was that, if there was no MTRR covering
the AGP aperture, that the mapping ended up as writeback? If so, I
fixed that in this series.
In any case, if you see any problems, please let me know.
--Andy
^ permalink raw reply
* Re: [PATCH v3 6/9] radeon: Switch to arch_phys_wc_add and add a missing ..._del
From: Jerome Glisse @ 2013-05-16 13:50 UTC (permalink / raw)
To: Andy Lutomirski
Cc: Alex Deucher, linux-kernel, dri-devel, linux-fbdev, Daniel Vetter,
Dave Airlie
In-Reply-To: <CALCETrXA-nbdDEv1TyU9e4mcGZzAoCTTDX33M1o31rZkgHHTFg@mail.gmail.com>
On Wed, May 15, 2013 at 2:22 PM, Andy Lutomirski <luto@amacapital.net> wrote:
> On Wed, May 15, 2013 at 7:49 AM, Jerome Glisse <j.glisse@gmail.com> wrote:
>> On Tue, May 14, 2013 at 5:35 PM, Andy Lutomirski <luto@amacapital.net> wrote:
>>> On Tue, May 14, 2013 at 6:37 AM, Jerome Glisse <j.glisse@gmail.com> wrote:
>>>> On Tue, May 14, 2013 at 8:58 AM, Alex Deucher <alexdeucher@gmail.com> wrote:
>>>>> On Mon, May 13, 2013 at 7:58 PM, Andy Lutomirski <luto@amacapital.net> wrote:
>>>>>> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>>>>>> Signed-off-by: Andy Lutomirski <luto@amacapital.net>
>>>>>
>>>>> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>>>>
>>>> I believe it will break something but we could deal with the fallout
>>>> once it happens.
>>>
>>> FWIW, I'm running with this code on my machine right now using the
>>> radeon driver. Everything seems fine. If I build without MTRRs and
>>> without PAT, though, graphics are slow (as expected). So I think
>>> everything's okay.
>>>
>>> --Andy
>>
>> I am worried on p4 where i last see issue with that notably with agp.
>
> Do you remember any details? It looks like PAT is enabled on Pentium
> 4 (i.e. famliy 0xF).
>
> --Andy
No i don't, i think it was some pat errata on those about non real ram
address and with agp. Memory is fuzzy. I might have time in couple of
week to plug back my p4 and see how it behave.
Cheers,
Jerome
^ permalink raw reply
* [PATCH 2/2] videomode: implement public of_get_display_timing()
From: Tomi Valkeinen @ 2013-05-16 13:00 UTC (permalink / raw)
To: linux-fbdev, dri-devel; +Cc: Tomi Valkeinen, Steffen Trumtrar, Laurent Pinchart
In-Reply-To: <1368709202-1056-1-git-send-email-tomi.valkeinen@ti.com>
The current of_get_display_timings() reads multiple display timings,
allocating memory for the entries. However, most of the time when
parsing display timings from DT data is needed, there's only one display
timing as it's not common for a LCD panel to support multiple videomodes.
This patch creates a new function:
int of_get_display_timing(struct device_node *np, const char *name,
struct display_timing *dt);
which can be used to parse a single display timing entry from the given
node name.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
---
drivers/video/of_display_timing.c | 33 ++++++++++++++++++++++++++++++---
include/video/of_display_timing.h | 2 ++
2 files changed, 32 insertions(+), 3 deletions(-)
diff --git a/drivers/video/of_display_timing.c b/drivers/video/of_display_timing.c
index 0e81023..9c0f17b 100644
--- a/drivers/video/of_display_timing.c
+++ b/drivers/video/of_display_timing.c
@@ -53,10 +53,10 @@ static int parse_timing_property(struct device_node *np, const char *name,
}
/**
- * of_get_display_timing - parse display_timing entry from device_node
+ * of_parse_display_timing - parse display_timing entry from device_node
* @np: device_node with the properties
**/
-static int of_get_display_timing(struct device_node *np,
+static int of_parse_display_timing(struct device_node *np,
struct display_timing *dt)
{
u32 val = 0;
@@ -103,6 +103,33 @@ static int of_get_display_timing(struct device_node *np,
}
/**
+ * of_get_display_timing - parse a display_timing entry
+ * @np: device_node with the timing subnode
+ * @name: name of the timing node
+ * @dt: display_timing struct to fill
+ **/
+int of_get_display_timing(struct device_node *np, const char *name,
+ struct display_timing *dt)
+{
+ struct device_node *timing_np;
+
+ if (!np) {
+ pr_err("%s: no devicenode given\n", of_node_full_name(np));
+ return -EINVAL;
+ }
+
+ timing_np = of_find_node_by_name(np, name);
+ if (!timing_np) {
+ pr_err("%s: could not find node '%s'\n",
+ of_node_full_name(np), name);
+ return -ENOENT;
+ }
+
+ return of_parse_display_timing(timing_np, dt);
+}
+EXPORT_SYMBOL_GPL(of_get_display_timing);
+
+/**
* of_get_display_timings - parse all display_timing entries from a device_node
* @np: device_node with the subnodes
**/
@@ -177,7 +204,7 @@ struct display_timings *of_get_display_timings(struct device_node *np)
goto timingfail;
}
- r = of_get_display_timing(entry, dt);
+ r = of_parse_display_timing(entry, dt);
if (r) {
/*
* to not encourage wrong devicetrees, fail in case of
diff --git a/include/video/of_display_timing.h b/include/video/of_display_timing.h
index 8016eb7..6562ad9 100644
--- a/include/video/of_display_timing.h
+++ b/include/video/of_display_timing.h
@@ -14,6 +14,8 @@ struct display_timings;
#define OF_USE_NATIVE_MODE -1
+int of_get_display_timing(struct device_node *np, const char *name,
+ struct display_timing *dt);
struct display_timings *of_get_display_timings(struct device_node *np);
int of_display_timings_exist(struct device_node *np);
--
1.8.1.2
^ permalink raw reply related
* [PATCH 1/2] videomode: don't allocate mem in of_get_display_timing()
From: Tomi Valkeinen @ 2013-05-16 13:00 UTC (permalink / raw)
To: linux-fbdev, dri-devel; +Cc: Tomi Valkeinen, Steffen Trumtrar, Laurent Pinchart
Move the allocation of display_timing memory from of_get_display_timing() to
of_get_display_timings(). This allows us to use of_get_display_timing()
in a way that doesn't require dynamic memory allocation.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
---
drivers/video/of_display_timing.c | 26 ++++++++++++++------------
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/video/of_display_timing.c b/drivers/video/of_display_timing.c
index 56009bc..0e81023 100644
--- a/drivers/video/of_display_timing.c
+++ b/drivers/video/of_display_timing.c
@@ -56,18 +56,13 @@ static int parse_timing_property(struct device_node *np, const char *name,
* of_get_display_timing - parse display_timing entry from device_node
* @np: device_node with the properties
**/
-static struct display_timing *of_get_display_timing(struct device_node *np)
+static int of_get_display_timing(struct device_node *np,
+ struct display_timing *dt)
{
- struct display_timing *dt;
u32 val = 0;
int ret = 0;
- dt = kzalloc(sizeof(*dt), GFP_KERNEL);
- if (!dt) {
- pr_err("%s: could not allocate display_timing struct\n",
- of_node_full_name(np));
- return NULL;
- }
+ memset(dt, 0, sizeof(*dt));
ret |= parse_timing_property(np, "hback-porch", &dt->hback_porch);
ret |= parse_timing_property(np, "hfront-porch", &dt->hfront_porch);
@@ -101,11 +96,10 @@ static struct display_timing *of_get_display_timing(struct device_node *np)
if (ret) {
pr_err("%s: error reading timing properties\n",
of_node_full_name(np));
- kfree(dt);
- return NULL;
+ return -EINVAL;
}
- return dt;
+ return 0;
}
/**
@@ -174,9 +168,17 @@ struct display_timings *of_get_display_timings(struct device_node *np)
for_each_child_of_node(timings_np, entry) {
struct display_timing *dt;
+ int r;
- dt = of_get_display_timing(entry);
+ dt = kzalloc(sizeof(*dt), GFP_KERNEL);
if (!dt) {
+ pr_err("%s: could not allocate display_timing struct\n",
+ of_node_full_name(np));
+ goto timingfail;
+ }
+
+ r = of_get_display_timing(entry, dt);
+ if (r) {
/*
* to not encourage wrong devicetrees, fail in case of
* an error
--
1.8.1.2
^ permalink raw reply related
* RE: fb driver for logiCVC
From: Davor Joja @ 2013-05-16 11:51 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Bruno Prémont, linux-kernel, Linux Fbdev development list
In-Reply-To: <CAMuHMdUW-tVY6=Bu9mabKrkNJsTxJM+Umo6jjcnXpWpzh_5AVw@mail.gmail.com>
VGhhbmtzIEdlZXJ0IQ0KDQpSZWdhcmRzLA0KRGF2b3INCg0KLS0tLS1PcmlnaW5hbCBNZXNzYWdl
LS0tLS0NCkZyb206IGdlZXJ0LnV5dHRlcmhvZXZlbkBnbWFpbC5jb20gW21haWx0bzpnZWVydC51
eXR0ZXJob2V2ZW5AZ21haWwuY29tXSBPbiBCZWhhbGYgT2YgR2VlcnQgVXl0dGVyaG9ldmVuDQpT
ZW50OiBUaHVyc2RheSwgTWF5IDE2LCAyMDEzIDE6MjMgUE0NClRvOiBEYXZvciBKb2phDQpDYzog
QnJ1bm8gUHLDqW1vbnQ7IGxpbnV4LWtlcm5lbEB2Z2VyLmtlcm5lbC5vcmc7IExpbnV4IEZiZGV2
IGRldmVsb3BtZW50IGxpc3QNClN1YmplY3Q6IFJlOiBmYiBkcml2ZXIgZm9yIGxvZ2lDVkMNCg0K
T24gVGh1LCBNYXkgMTYsIDIwMTMgYXQgMTI6MzUgUE0sIERhdm9yIEpvamEgPERhdm9yLkpvamFA
bG9naWNicmlja3MuY29tPiB3cm90ZToNCj4gVW5mb3J0dW5hdGVseSwgSSBoYXZlIHRoaXMgZHJp
dmVyIG9uIG1lbnRpb25lZCBnaXQgb25seSBmb3IgZmV3IHdlZWtzLCBzbyB0aGVyZSBpcyBubyB1
c2FibGUgaGlzdG9yeS4NCj4gU2luY2UgdGhpcyBpcyBuZXcgZHJpdmVyLCB0ZXN0ZWQgYW5kIGZ1
bmN0aW9uYWwgKG9uIGtlcm5lbCAzLjgpLCB3aXRob3V0IGdpdCBoaXN0b3J5IGFzIHN0YXRlZCBh
Ym92ZSwgZG8geW91IGhhdmUgaWRlYSBob3cgdG8gYnJlYWsgaXQgdG8gc21hbGxlciBwaWVjZXM/
IEkgY2FuIG9ubHkgdGhpbmsgb2ZmIGFzIG9uZSBiaWcgcGF0Y2ggYWdhaW5zdCAzLjgueCB2ZXJz
aW9uLg0KPiBUaGF0IGNvdWxkIGJlIGFjY2VwdGVkIGZvciBuZXcgZHJpdmVyPw0KDQpBIHNpbmds
ZSBwYXRjaCBpcyBPSyBmb3IgYSBuZXcgZHJpdmVyLg0KDQpHcntvZXRqZSxlZXRpbmd9cywNCg0K
ICAgICAgICAgICAgICAgICAgICAgICAgR2VlcnQNCg0KLS0NCkdlZXJ0IFV5dHRlcmhvZXZlbiAt
LSBUaGVyZSdzIGxvdHMgb2YgTGludXggYmV5b25kIGlhMzIgLS0gZ2VlcnRAbGludXgtbTY4ay5v
cmcNCg0KSW4gcGVyc29uYWwgY29udmVyc2F0aW9ucyB3aXRoIHRlY2huaWNhbCBwZW9wbGUsIEkg
Y2FsbCBteXNlbGYgYSBoYWNrZXIuIEJ1dCB3aGVuIEknbSB0YWxraW5nIHRvIGpvdXJuYWxpc3Rz
IEkganVzdCBzYXkgInByb2dyYW1tZXIiIG9yIHNvbWV0aGluZyBsaWtlIHRoYXQuDQogICAgICAg
ICAgICAgICAgICAgICAgICAgICAgICAgIC0tIExpbnVzIFRvcnZhbGRzDQo
^ permalink raw reply
* Re: fb driver for logiCVC
From: Geert Uytterhoeven @ 2013-05-16 11:23 UTC (permalink / raw)
To: Davor Joja
Cc: Bruno Prémont, linux-kernel@vger.kernel.org,
Linux Fbdev development list
In-Reply-To: <ABCSCiTtUDvkm6WeI5J00000073@abc.logicbricks.com>
On Thu, May 16, 2013 at 12:35 PM, Davor Joja <Davor.Joja@logicbricks.com> wrote:
> Unfortunately, I have this driver on mentioned git only for few weeks, so there is no usable history.
> Since this is new driver, tested and functional (on kernel 3.8), without git history as stated above, do you have idea how to break it to smaller pieces? I can only think off as one big patch against 3.8.x version.
> That could be accepted for new driver?
A single patch is OK for a new driver.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH 26/33] drivers/video/omap2/dss: don't check resource with devm_ioremap_resource
From: Wolfram Sang @ 2013-05-16 11:15 UTC (permalink / raw)
To: linux-kernel
Cc: Wolfram Sang, Tomi Valkeinen, Florian Tobias Schandinat,
linux-omap, linux-fbdev
In-Reply-To: <1368702961-4325-1-git-send-email-wsa@the-dreams.de>
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
---
drivers/video/omap2/dss/hdmi.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 17f4d55..a109934 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -1065,10 +1065,6 @@ static int omapdss_hdmihw_probe(struct platform_device *pdev)
mutex_init(&hdmi.ip_data.lock);
res = platform_get_resource(hdmi.pdev, IORESOURCE_MEM, 0);
- if (!res) {
- DSSERR("can't get IORESOURCE_MEM HDMI\n");
- return -EINVAL;
- }
/* Base address taken from platform */
hdmi.ip_data.base_wp = devm_ioremap_resource(&pdev->dev, res);
--
1.7.10.4
^ permalink raw reply related
* [PATCH 25/33] drivers/video/omap2: don't check resource with devm_ioremap_resource
From: Wolfram Sang @ 2013-05-16 11:15 UTC (permalink / raw)
To: linux-kernel
Cc: Wolfram Sang, Tomi Valkeinen, Florian Tobias Schandinat,
linux-omap, linux-fbdev
In-Reply-To: <1368702961-4325-1-git-send-email-wsa@the-dreams.de>
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
---
drivers/video/omap2/vrfb.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/video/omap2/vrfb.c b/drivers/video/omap2/vrfb.c
index 5261229..f346b02 100644
--- a/drivers/video/omap2/vrfb.c
+++ b/drivers/video/omap2/vrfb.c
@@ -353,11 +353,6 @@ static int __init vrfb_probe(struct platform_device *pdev)
/* first resource is the register res, the rest are vrfb contexts */
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!mem) {
- dev_err(&pdev->dev, "can't get vrfb base address\n");
- return -EINVAL;
- }
-
vrfb_base = devm_ioremap_resource(&pdev->dev, mem);
if (IS_ERR(vrfb_base))
return PTR_ERR(vrfb_base);
--
1.7.10.4
^ permalink raw reply related
* [PATCH] acornfb: remove dead code
From: Paul Bolle @ 2013-05-16 10:51 UTC (permalink / raw)
To: Florian Tobias Schandinat; +Cc: linux-fbdev, linux-kernel
acornfb checks for HAS_VIDC while support for that macro was removed in
v2.6.23 (when the arm26 port was removed). So we can remove a bit of
dead code.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
---
Untested (do not have the hardware, do not build with CONFIG_FB_ACORN
set myself, etc.).
drivers/video/acornfb.c | 266 +-----------------------------------------------
drivers/video/acornfb.h | 29 ------
2 files changed, 1 insertion(+), 294 deletions(-)
diff --git a/drivers/video/acornfb.c b/drivers/video/acornfb.c
index 6488a73..7e8346e 100644
--- a/drivers/video/acornfb.c
+++ b/drivers/video/acornfb.c
@@ -38,14 +38,6 @@
#include "acornfb.h"
/*
- * VIDC machines can't do 16 or 32BPP modes.
- */
-#ifdef HAS_VIDC
-#undef FBCON_HAS_CFB16
-#undef FBCON_HAS_CFB32
-#endif
-
-/*
* Default resolution.
* NOTE that it has to be supported in the table towards
* the end of this file.
@@ -106,238 +98,6 @@ static struct vidc_timing current_vidc;
extern unsigned int vram_size; /* set by setup.c */
-#ifdef HAS_VIDC
-
-#define MAX_SIZE 480*1024
-
-/* CTL VIDC Actual
- * 24.000 0 8.000
- * 25.175 0 8.392
- * 36.000 0 12.000
- * 24.000 1 12.000
- * 25.175 1 12.588
- * 24.000 2 16.000
- * 25.175 2 16.783
- * 36.000 1 18.000
- * 24.000 3 24.000
- * 36.000 2 24.000
- * 25.175 3 25.175
- * 36.000 3 36.000
- */
-struct pixclock {
- u_long min_clock;
- u_long max_clock;
- u_int vidc_ctl;
- u_int vid_ctl;
-};
-
-static struct pixclock arc_clocks[] = {
- /* we allow +/-1% on these */
- { 123750, 126250, VIDC_CTRL_DIV3, VID_CTL_24MHz }, /* 8.000MHz */
- { 82500, 84167, VIDC_CTRL_DIV2, VID_CTL_24MHz }, /* 12.000MHz */
- { 61875, 63125, VIDC_CTRL_DIV1_5, VID_CTL_24MHz }, /* 16.000MHz */
- { 41250, 42083, VIDC_CTRL_DIV1, VID_CTL_24MHz }, /* 24.000MHz */
-};
-
-static struct pixclock *
-acornfb_valid_pixrate(struct fb_var_screeninfo *var)
-{
- u_long pixclock = var->pixclock;
- u_int i;
-
- if (!var->pixclock)
- return NULL;
-
- for (i = 0; i < ARRAY_SIZE(arc_clocks); i++)
- if (pixclock > arc_clocks[i].min_clock &&
- pixclock < arc_clocks[i].max_clock)
- return arc_clocks + i;
-
- return NULL;
-}
-
-/* VIDC Rules:
- * hcr : must be even (interlace, hcr/2 must be even)
- * hswr : must be even
- * hdsr : must be odd
- * hder : must be odd
- *
- * vcr : must be odd
- * vswr : >= 1
- * vdsr : >= 1
- * vder : >= vdsr
- * if interlaced, then hcr/2 must be even
- */
-static void
-acornfb_set_timing(struct fb_var_screeninfo *var)
-{
- struct pixclock *pclk;
- struct vidc_timing vidc;
- u_int horiz_correction;
- u_int sync_len, display_start, display_end, cycle;
- u_int is_interlaced;
- u_int vid_ctl, vidc_ctl;
- u_int bandwidth;
-
- memset(&vidc, 0, sizeof(vidc));
-
- pclk = acornfb_valid_pixrate(var);
- vidc_ctl = pclk->vidc_ctl;
- vid_ctl = pclk->vid_ctl;
-
- bandwidth = var->pixclock * 8 / var->bits_per_pixel;
- /* 25.175, 4bpp = 79.444ns per byte, 317.776ns per word: fifo = 2,6 */
- if (bandwidth > 143500)
- vidc_ctl |= VIDC_CTRL_FIFO_3_7;
- else if (bandwidth > 71750)
- vidc_ctl |= VIDC_CTRL_FIFO_2_6;
- else if (bandwidth > 35875)
- vidc_ctl |= VIDC_CTRL_FIFO_1_5;
- else
- vidc_ctl |= VIDC_CTRL_FIFO_0_4;
-
- switch (var->bits_per_pixel) {
- case 1:
- horiz_correction = 19;
- vidc_ctl |= VIDC_CTRL_1BPP;
- break;
-
- case 2:
- horiz_correction = 11;
- vidc_ctl |= VIDC_CTRL_2BPP;
- break;
-
- case 4:
- horiz_correction = 7;
- vidc_ctl |= VIDC_CTRL_4BPP;
- break;
-
- default:
- case 8:
- horiz_correction = 5;
- vidc_ctl |= VIDC_CTRL_8BPP;
- break;
- }
-
- if (var->sync & FB_SYNC_COMP_HIGH_ACT) /* should be FB_SYNC_COMP */
- vidc_ctl |= VIDC_CTRL_CSYNC;
- else {
- if (!(var->sync & FB_SYNC_HOR_HIGH_ACT))
- vid_ctl |= VID_CTL_HS_NHSYNC;
-
- if (!(var->sync & FB_SYNC_VERT_HIGH_ACT))
- vid_ctl |= VID_CTL_VS_NVSYNC;
- }
-
- sync_len = var->hsync_len;
- display_start = sync_len + var->left_margin;
- display_end = display_start + var->xres;
- cycle = display_end + var->right_margin;
-
- /* if interlaced, then hcr/2 must be even */
- is_interlaced = (var->vmode & FB_VMODE_MASK) = FB_VMODE_INTERLACED;
-
- if (is_interlaced) {
- vidc_ctl |= VIDC_CTRL_INTERLACE;
- if (cycle & 2) {
- cycle += 2;
- var->right_margin += 2;
- }
- }
-
- vidc.h_cycle = (cycle - 2) / 2;
- vidc.h_sync_width = (sync_len - 2) / 2;
- vidc.h_border_start = (display_start - 1) / 2;
- vidc.h_display_start = (display_start - horiz_correction) / 2;
- vidc.h_display_end = (display_end - horiz_correction) / 2;
- vidc.h_border_end = (display_end - 1) / 2;
- vidc.h_interlace = (vidc.h_cycle + 1) / 2;
-
- sync_len = var->vsync_len;
- display_start = sync_len + var->upper_margin;
- display_end = display_start + var->yres;
- cycle = display_end + var->lower_margin;
-
- if (is_interlaced)
- cycle = (cycle - 3) / 2;
- else
- cycle = cycle - 1;
-
- vidc.v_cycle = cycle;
- vidc.v_sync_width = sync_len - 1;
- vidc.v_border_start = display_start - 1;
- vidc.v_display_start = vidc.v_border_start;
- vidc.v_display_end = display_end - 1;
- vidc.v_border_end = vidc.v_display_end;
-
- if (machine_is_a5k())
- __raw_writeb(vid_ctl, IOEB_VID_CTL);
-
- if (memcmp(¤t_vidc, &vidc, sizeof(vidc))) {
- current_vidc = vidc;
-
- vidc_writel(0xe0000000 | vidc_ctl);
- vidc_writel(0x80000000 | (vidc.h_cycle << 14));
- vidc_writel(0x84000000 | (vidc.h_sync_width << 14));
- vidc_writel(0x88000000 | (vidc.h_border_start << 14));
- vidc_writel(0x8c000000 | (vidc.h_display_start << 14));
- vidc_writel(0x90000000 | (vidc.h_display_end << 14));
- vidc_writel(0x94000000 | (vidc.h_border_end << 14));
- vidc_writel(0x98000000);
- vidc_writel(0x9c000000 | (vidc.h_interlace << 14));
- vidc_writel(0xa0000000 | (vidc.v_cycle << 14));
- vidc_writel(0xa4000000 | (vidc.v_sync_width << 14));
- vidc_writel(0xa8000000 | (vidc.v_border_start << 14));
- vidc_writel(0xac000000 | (vidc.v_display_start << 14));
- vidc_writel(0xb0000000 | (vidc.v_display_end << 14));
- vidc_writel(0xb4000000 | (vidc.v_border_end << 14));
- vidc_writel(0xb8000000);
- vidc_writel(0xbc000000);
- }
-#ifdef DEBUG_MODE_SELECTION
- printk(KERN_DEBUG "VIDC registers for %dx%dx%d:\n", var->xres,
- var->yres, var->bits_per_pixel);
- printk(KERN_DEBUG " H-cycle : %d\n", vidc.h_cycle);
- printk(KERN_DEBUG " H-sync-width : %d\n", vidc.h_sync_width);
- printk(KERN_DEBUG " H-border-start : %d\n", vidc.h_border_start);
- printk(KERN_DEBUG " H-display-start : %d\n", vidc.h_display_start);
- printk(KERN_DEBUG " H-display-end : %d\n", vidc.h_display_end);
- printk(KERN_DEBUG " H-border-end : %d\n", vidc.h_border_end);
- printk(KERN_DEBUG " H-interlace : %d\n", vidc.h_interlace);
- printk(KERN_DEBUG " V-cycle : %d\n", vidc.v_cycle);
- printk(KERN_DEBUG " V-sync-width : %d\n", vidc.v_sync_width);
- printk(KERN_DEBUG " V-border-start : %d\n", vidc.v_border_start);
- printk(KERN_DEBUG " V-display-start : %d\n", vidc.v_display_start);
- printk(KERN_DEBUG " V-display-end : %d\n", vidc.v_display_end);
- printk(KERN_DEBUG " V-border-end : %d\n", vidc.v_border_end);
- printk(KERN_DEBUG " VIDC Ctrl (E) : 0x%08X\n", vidc_ctl);
- printk(KERN_DEBUG " IOEB Ctrl : 0x%08X\n", vid_ctl);
-#endif
-}
-
-static int
-acornfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
- u_int trans, struct fb_info *info)
-{
- union palette pal;
-
- if (regno >= current_par.palette_size)
- return 1;
-
- pal.p = 0;
- pal.vidc.reg = regno;
- pal.vidc.red = red >> 12;
- pal.vidc.green = green >> 12;
- pal.vidc.blue = blue >> 12;
-
- current_par.palette[regno] = pal;
-
- vidc_writel(pal.p);
-
- return 0;
-}
-#endif
-
#ifdef HAS_VIDC20
#include <mach/acornfb.h>
@@ -634,16 +394,7 @@ acornfb_adjust_timing(struct fb_info *info, struct fb_var_screeninfo *var, u_int
/* hsync_len must be even */
var->hsync_len = (var->hsync_len + 1) & ~1;
-#ifdef HAS_VIDC
- /* left_margin must be odd */
- if ((var->left_margin & 1) = 0) {
- var->left_margin -= 1;
- var->right_margin += 1;
- }
-
- /* right_margin must be odd */
- var->right_margin |= 1;
-#elif defined(HAS_VIDC20)
+#if defined(HAS_VIDC20)
/* left_margin must be even */
if (var->left_margin & 1) {
var->left_margin += 1;
@@ -787,11 +538,7 @@ static int acornfb_set_par(struct fb_info *info)
break;
case 8:
current_par.palette_size = VIDC_PALETTE_SIZE;
-#ifdef HAS_VIDC
- info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
-#else
info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
-#endif
break;
#ifdef HAS_VIDC20
case 16:
@@ -971,9 +718,6 @@ static void acornfb_init_fbinfo(void)
#if defined(HAS_VIDC20)
fb_info.var.red.length = 8;
fb_info.var.transp.length = 4;
-#elif defined(HAS_VIDC)
- fb_info.var.red.length = 4;
- fb_info.var.transp.length = 1;
#endif
fb_info.var.green = fb_info.var.red;
fb_info.var.blue = fb_info.var.red;
@@ -1310,14 +1054,6 @@ static int acornfb_probe(struct platform_device *dev)
fb_info.fix.smem_start = handle;
}
#endif
-#if defined(HAS_VIDC)
- /*
- * Archimedes/A5000 machines use a fixed address for their
- * framebuffers. Free unused pages
- */
- free_unused_pages(PAGE_OFFSET + size, PAGE_OFFSET + MAX_SIZE);
-#endif
-
fb_info.fix.smem_len = size;
current_par.palette_size = VIDC_PALETTE_SIZE;
diff --git a/drivers/video/acornfb.h b/drivers/video/acornfb.h
index fb2a7ff..175c8ff 100644
--- a/drivers/video/acornfb.h
+++ b/drivers/video/acornfb.h
@@ -13,10 +13,6 @@
#include <asm/hardware/iomd.h>
#define VIDC_PALETTE_SIZE 256
#define VIDC_NAME "VIDC20"
-#elif defined(HAS_VIDC)
-#include <asm/hardware/memc.h>
-#define VIDC_PALETTE_SIZE 16
-#define VIDC_NAME "VIDC"
#endif
#define EXTEND8(x) ((x)|(x)<<8)
@@ -101,31 +97,6 @@ struct modex_params {
const struct modey_params *modey;
};
-#ifdef HAS_VIDC
-
-#define VID_CTL_VS_NVSYNC (1 << 3)
-#define VID_CTL_HS_NHSYNC (1 << 2)
-#define VID_CTL_24MHz (0)
-#define VID_CTL_25MHz (1)
-#define VID_CTL_36MHz (2)
-
-#define VIDC_CTRL_CSYNC (1 << 7)
-#define VIDC_CTRL_INTERLACE (1 << 6)
-#define VIDC_CTRL_FIFO_0_4 (0 << 4)
-#define VIDC_CTRL_FIFO_1_5 (1 << 4)
-#define VIDC_CTRL_FIFO_2_6 (2 << 4)
-#define VIDC_CTRL_FIFO_3_7 (3 << 4)
-#define VIDC_CTRL_1BPP (0 << 2)
-#define VIDC_CTRL_2BPP (1 << 2)
-#define VIDC_CTRL_4BPP (2 << 2)
-#define VIDC_CTRL_8BPP (3 << 2)
-#define VIDC_CTRL_DIV3 (0 << 0)
-#define VIDC_CTRL_DIV2 (1 << 0)
-#define VIDC_CTRL_DIV1_5 (2 << 0)
-#define VIDC_CTRL_DIV1 (3 << 0)
-
-#endif
-
#ifdef HAS_VIDC20
/*
* VIDC20 registers
--
1.7.11.7
^ permalink raw reply related
* RE: fb driver for logiCVC
From: Davor Joja @ 2013-05-16 10:35 UTC (permalink / raw)
To: Bruno Prémont; +Cc: linux-kernel, linux-fbdev
In-Reply-To: <20130515184112.251bb949@neptune.home>
SGVsbG8gQnJ1bm8sDQoNClRoYW5rIHlvdSBmb3IgdGhlIGFuc3dlciENCg0KSSBkaWQgbm90IHNl
bmQgaXQgYmVmb3JlIHRvIGxpbnV4LWZiZGV2IHNpbmNlIEkgdGhvdWdodCB0aGF0IGl0IGlzIG1v
cmUgbGlrZWx5IHRvIGdldCBhbnN3ZXIgYXQgbGludXgta2VybmVsIGxpc3QuDQpXaWxsIGRvIHRo
YXQgZnJvbSBub3cuDQoNClVuZm9ydHVuYXRlbHksIEkgaGF2ZSB0aGlzIGRyaXZlciBvbiBtZW50
aW9uZWQgZ2l0IG9ubHkgZm9yIGZldyB3ZWVrcywgc28gdGhlcmUgaXMgbm8gdXNhYmxlIGhpc3Rv
cnkuDQpTaW5jZSB0aGlzIGlzIG5ldyBkcml2ZXIsIHRlc3RlZCBhbmQgZnVuY3Rpb25hbCAob24g
a2VybmVsIDMuOCksIHdpdGhvdXQgZ2l0IGhpc3RvcnkgYXMgc3RhdGVkIGFib3ZlLCBkbyB5b3Ug
aGF2ZSBpZGVhIGhvdyB0byBicmVhayBpdCB0byBzbWFsbGVyIHBpZWNlcz8gSSBjYW4gb25seSB0
aGluayBvZmYgYXMgb25lIGJpZyBwYXRjaCBhZ2FpbnN0IDMuOC54IHZlcnNpb24uDQpUaGF0IGNv
dWxkIGJlIGFjY2VwdGVkIGZvciBuZXcgZHJpdmVyPw0KDQpZb3UgYXJlIHJpZ2h0IGFib3V0IGdp
dCwgaXQgaXMgbm90IG9yZ2FuaXplZCBpbiBzdGFuZGFyZCB3YXkuDQpJdCBpcyBjcmVhdGVkIGZv
ciBvdXIgY3VzdG9tZXJzIHRvIGVhc2lseSBnZXQgbGF0ZXN0IGRyaXZlcnMgZm9yIFh5bG9uIElQ
IGNvcmVzIGJlY2F1c2UgdGhleSBhbHJlYWR5IGtub3cgd2hhdCB0aGV5IG5lZWQgYW5kIGluIHdo
aWNoIGZvbGRlciB0byBzZWFyY2guIE1heWJlIHRoaXMgd2FzIG5vdCBnb29kIGlkZWEgdG8gc2Vu
ZCB0aGF0IGdpdCBsaW5rIGZvciByZXZpZXcuIFdpbGwgc3RpdGNoIHRvIHBhdGNoZXMgaW4gdGhl
IGZ1dHVyZSwgZXZlbiBmb3IgbmV3IGRyaXZlcnMuDQoNClJlZ2FyZHMsDQpEYXZvcg0KDQoNCi0t
LS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0tDQpGcm9tOiBCcnVubyBQcsOpbW9udCBbbWFpbHRvOmJv
bmJvbnNAbGludXgtdnNlcnZlci5vcmddIA0KU2VudDogV2VkbmVzZGF5LCBNYXkgMTUsIDIwMTMg
Njo0MSBQTQ0KVG86IERhdm9yIEpvamENCkNjOiBsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3Jn
OyBsaW51eC1mYmRldkB2Z2VyLmtlcm5lbC5vcmcNClN1YmplY3Q6IFJlOiBmYiBkcml2ZXIgZm9y
IGxvZ2lDVkMNCg0KSGVsbG8gRGF2b3IsDQoNCk9uIFR1ZSwgMTQgTWF5IDIwMTMgIkRhdm9yIEpv
amEiIHdyb3RlOg0KPiBDYW4gSSBnZXQgc3VnZ2VzdGlvbiBob3cgdG8gc2VuZCBkcml2ZXIgdG8g
dGhpcyBsaXN0IHdoaWNoIGNvbnNpc3RzIG9mIA0KPiBzZXZlcmFsIGZpbGVzIGFuZCBmb2xkZXJz
LCBhcyBvbmUgKGJpZykgcGF0Y2ggb3IgYXMgZGVzY3JpYmVkIGluIA0KPiAiaG93LXRvIiBhcyBs
aW5rIHRvIHNvbWUgZnRwIG9yIGdpdD8NCj4gTXkgcHJldmlvdXMgbWFpbCBoYXMgbm90IGJlZW4g
cmVwbGllZCwgYmVjYXVzZSBvZiBsaW5rIHRvIGRyaXZlciBvciANCj4gb3RoZXIgaXNzdWUgKHRl
c3RlZCBvbiBrZXJuZWwgMy44KT8NCg0KWW91IHNob3VsZCBhbHNvIHNlbmQgaXQgdG8gbGludXgt
ZmJkZXYgKENDZWQpIHNvIGludGVyZXN0ZWQgcGVvcGxlIGhhdmUgYSBiZXR0ZXIgY2hhbmNlIG9m
IHNlZWluZyBpdCAoYW5kIHF1b3RpbmcgcHJldmlvdXMgbWFpbCBiZWxvdykuDQoNCklmIHlvdSBo
YXZlIGEgZ2l0IHRyZWUgd2l0aCBoaXN0b3J5IGl0IG1pZ2h0IGJlIG5pY2UuIE90aGVyd2lzZSBp
dCdzIGVhc2llciB0byByZXZpZXcgaWYgeW91IGNhbiBzcGxpdCB0aGUgYmlnLXBhdGNoIGludG8g
bXVsdGlwbGUgaW5jcmVtZW50YWwgcGFydHMgYWRkaW5nIHNvbWUgZnVuY3Rpb25hbGl0eSBlYWNo
ICh0aGF0IGluY3JlbWVudGFsIG5hdHVyZSB3b3VsZCBhbHNvIGJlIGV4cGVjdGVkIGZyb20gYSBn
aXQgdHJlZSkuDQoNCllvdXIgdHJlZSBhdCBodHRwczovL2dpdGh1Yi5jb20vbG9naWNicmlja3Mv
bGludXhfa2VybmVsIGxvb2tzIHdlaXJkLCB5b3Ugc2VlbSB0byBoYXZlIGltcG9ydGVkIGp1c3Qg
dGhlIHN1YmZvbGRlcnMgb2Yga2VybmVsIHRyZWUgeW91IHdvcmtlZCBvbiBpbnN0ZWFkIG9mIGNs
b25pbmcgZS5nLiB2My44IHJlbGVhc2UgYW5kIGFwcGx5aW5nIHlvdXIgZHJpdmVyIG9uIHRvcCBv
ZiBpdC4gVGhpcyB3YXkgaXQncyBub3QgcG9zc2libGUgdG8gbWVyZ2UgeW91ciB0cmVlIGFuZCBp
dCdzIHJhdGhlciBoYXJkIHRvIGZpbmQgb3V0IHdoYXQgYmVsb25ncyB0byB5b3VyIGRyaXZlciBv
ciBub3QuDQoNCkJydW5vDQoNCk9uIFdlZCwgMDggTWF5IDIwMTMgIkRhdm9yIEpvamEiIHdyb3Rl
Og0KPiBJIGFtIHNlbmRpbmcgbGluayB0byBmcmFtZSBidWZmZXIgZHJpdmVyIGZvciBYeWxvbiAi
bG9naUNWQyIgRlBHQSBJUCANCj4gY29yZSwgc28gSSB3b3VsZCBraW5kbHkgYXNrIGZvciBkcml2
ZXIgcmV2aWV3Lg0KPiBsb2dpQ1ZDIGlzIENvbmZpZ3VyYWJsZSBWaWRlbyBDb250cm9sbGVyIGRl
dmVsb3BlZCBmb3IgWGlsaW54IEZQR0EgDQo+IGRldmljZXMuDQo+IGxvZ2lDVkMgZGV2aWNlIHRv
Z2V0aGVyIHdpdGggeHlsb25mYiBkcml2ZXIgaXMgd2lkZWx5IHVzZWQgaW4gWGlsaW54IA0KPiBU
YXJnZXRlZCBSZWZlcmVudCBEZXNpZ25zIG9uIFp5bnEgU29DIHBsYXRmb3JtcyAoWkM3MDIsIFpD
NzA2LCBaRUQsIA0KPiBURUQsIFhpbGlueCBjdXN0b21lcnMgYW5kIFhpbGlueCB1bml2ZXJzaXR5
IHByb2dyYW0pIGFuZCBvbiBjdXN0b20gDQo+IHByb2plY3RzIGZyb20gWHlsb24gYW5kIFh5bG9u
IGN1c3RvbWVycy4NCj4gDQo+IERyaXZlciBpbXBsZW1lbnRzIHBsYXRmb3JtIGFuZCBvcGVuIGZp
cm13YXJlIHJlZ2lzdHJhdGlvbiB0eXBlcy4NCj4gSXQgaGFzIGJ1aWx0IGluIGludGVyZmFjZSB3
aXRoIFY0TDIgQURWNzUxMSBIRE1JIHRyYW5zbWl0dGVyIGRyaXZlciANCj4gZm9yIGhhbmRsaW5n
IEVESUQgYW5kIG1pc2NlbGxhbmVvdXMgY2xvY2sgZ2VuZXJhdG9yIFNJNTcwIGRyaXZlci4NCj4g
SSB3b3VsZCBzZWVrIGFuIGFkdmljZSBmb3IgYWJvdmUgbWVudGlvbmVkIGFuZCBvdGhlciBpc3N1
ZXMgd2hpY2ggd2lsbCANCj4gZ2V0IHRvIHN1cmZhY2UgaW4gcmV2aWV3Lg0KPiANCj4gRm9yIG5v
dyBmYiBkcml2ZXIgcnVucyBvbiAzLjgga2VybmVsIChBUk0gYXJjaGl0ZWN0dXJlKSwgYW5kIGl0
IHdhcyANCj4gdGVzdGVkIGluIGFsbCBpdHMgY29uZmlndXJhdGlvbnMgd2l0aDoNCj4gLSBYeWxv
biB0ZXN0IGFwcGxpY2F0aW9uDQo+IC0gZmJkZXYgLSBGcmFtZSBidWZmZXIgZGV2aWNlIHRlc3Qg
YXBwbGljYXRpb24NCj4gLSBEaXJlY3RGQiwNCj4gLSBRVA0KPiAtIFVidW50dSAxMC4wNCAoMTZi
cHAgYW5kIDMyYnBwIGNvbG9yIGRlcHRoKSBEcml2ZXIgYnVpbGQgd2FzIHRlc3RlZCANCj4gYnkg
T3BlbiBTb3VyY2UgVGVjaG5vbG9neSBDZW50ZXIuDQo+IA0KPiBMYXRlc3QgZHJpdmVyIGlzIGF2
YWlsYWJsZSBhdA0KPiBodHRwczovL2dpdGh1Yi5jb20vbG9naWNicmlja3MvbGludXhfa2VybmVs
LmdpdCB1bmRlciANCj4gImRyaXZlcnMvdmlkZW8veHlsb24iIGFuZCAiaW5jbHVkZS9saW51eCIg
IkRvY3VtZW50YXRpb24gKHh5bG9uZmIgDQo+IGRldmljZXRyZWUgcGFyYW1ldGVycykiDQo+IEl0
IGlzIGF2YWlsYWJsZSBvbiBodHRwczovL2dpdGh1Yi5jb20veGlsaW54IGJ1dCBub3QgbGF0ZXN0
IHZlcnNpb24uDQo+IA0KPiBJIGhhdmUgcGxhY2VkIG9uIGZ0cC5sb2dpY2JyaWNrcy5jb20gbG9n
aUNWQyBkYXRhc2hlZXQsIGFwcGxpY2F0aW9uIA0KPiBub3RlLCBjdXJyZW50IHh5bG9uZmIgZHJp
dmVyIHVzZXIgbWFudWFsIGFuZCB0ZXN0IGFwcGxpY2F0aW9ucy4NCj4gVXNlcm5hbWU6IHh5bG9u
ZmINCj4gUGFzc3dvcmQ6IHh5bG9uZmINCg=
^ permalink raw reply
* Re: [PATCH] drivers: video: mxsfb: clean use of devm_ioremap_resource()
From: Laurent Navet @ 2013-05-16 9:46 UTC (permalink / raw)
To: jg1.han
Cc: FlorianSchandinat@gmx.de, linux-fbdev@vger.kernel.org,
linux-kernel@vger.kernel.org
In-Reply-To: <19650694.136921368693687337.JavaMail.weblogic@epml12>
2013/5/16, Jingoo Han <jg1.han@samsung.com>:
> It makes build warning as below:
>
> drivers/video/mxsfb.c:887:13: warning: 'host' is used uninitialized in this
> function [-Wuninitialized]
> drivers/video/mxsfb.c:965:21: warning: 'fb_info' may be used uninitialized
> in this function [-Wuninitialized]
>
> It breaks the assignment.
> host = to_imxfb_host(fb_info);
>
> Also, 'goto fb_release;' is not good.
> Please use ' return PTR_ERR(host->base);' as below:
> + host->base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(host->base))
> + return PTR_ERR(host->base);
>
>
> Best regards,
> Jingoo Han
Thank's for reviewing, I'll look at and resend.
Laurent,
^ permalink raw reply
* Re: [PATCH] drivers: video: mxsfb: clean use of devm_ioremap_resource()
From: Jingoo Han @ 2013-05-16 8:41 UTC (permalink / raw)
To: Laurent Navet, FlorianSchandinat@gmx.de
Cc: linux-fbdev@vger.kernel.org, linux-kernel@vger.kernel.org,
Jingoo Han
In-Reply-To: <1368523508-30967-1-git-send-email-laurent.navet@gmail.com>
VHVlc2RheSwgTWF5IDE0LCAyMDEzIDY6MjUgUE0sIExhdXJlbnQgTmF2ZXQgd3JvdGU6DQo+IA0K
PiBDaGVjayBvZiAncmVzJyBhbmQgY2FsbHMgdG8gZGV2X2VyciBhcmUgYWxyZWFkeSBkb25lIGlu
IGRldm1faW9yZW1hcF9yZXNvdXJjZSwNCj4gc28gbm8gbmVlZCB0byBkbyB0aGVtIHR3aWNlLg0K
PiANCj4gU2lnbmVkLW9mZi1ieTogTGF1cmVudCBOYXZldCA8bGF1cmVudC5uYXZldEBnbWFpbC5j
b20+DQo+IC0tLQ0KPiAgZHJpdmVycy92aWRlby9teHNmYi5jIHwgICAxNCArKysrLS0tLS0tLS0t
LQ0KPiAgMSBmaWxlIGNoYW5nZWQsIDQgaW5zZXJ0aW9ucygrKSwgMTAgZGVsZXRpb25zKC0pDQo+
IA0KPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy92aWRlby9teHNmYi5jIGIvZHJpdmVycy92aWRlby9t
eHNmYi5jDQo+IGluZGV4IDIxMjIzZDQuLjBmM2QwZmMgMTAwNjQ0DQo+IC0tLSBhL2RyaXZlcnMv
dmlkZW8vbXhzZmIuYw0KPiArKysgYi9kcml2ZXJzL3ZpZGVvL214c2ZiLmMNCj4gQEAgLTg4NCw5
ICs4ODQsMTAgQEAgc3RhdGljIGludCBteHNmYl9wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNl
ICpwZGV2KQ0KPiAgCQlwZGV2LT5pZF9lbnRyeSA9IG9mX2lkLT5kYXRhOw0KPiANCj4gIAlyZXMg
PSBwbGF0Zm9ybV9nZXRfcmVzb3VyY2UocGRldiwgSU9SRVNPVVJDRV9NRU0sIDApOw0KPiAtCWlm
ICghcmVzKSB7DQo+IC0JCWRldl9lcnIoJnBkZXYtPmRldiwgIkNhbm5vdCBnZXQgbWVtb3J5IElP
IHJlc291cmNlXG4iKTsNCj4gLQkJcmV0dXJuIC1FTk9ERVY7DQo+ICsJaG9zdC0+YmFzZSA9IGRl
dm1faW9yZW1hcF9yZXNvdXJjZSgmcGRldi0+ZGV2LCByZXMpOw0KPiArCWlmIChJU19FUlIoaG9z
dC0+YmFzZSkpIHsNCj4gKwkJcmV0ID0gUFRSX0VSUihob3N0LT5iYXNlKTsNCj4gKwkJZ290byBm
Yl9yZWxlYXNlOw0KDQpJdCBtYWtlcyBidWlsZCB3YXJuaW5nIGFzIGJlbG93Og0KDQpkcml2ZXJz
L3ZpZGVvL214c2ZiLmM6ODg3OjEzOiB3YXJuaW5nOiAnaG9zdCcgaXMgdXNlZCB1bmluaXRpYWxp
emVkIGluIHRoaXMgZnVuY3Rpb24gWy1XdW5pbml0aWFsaXplZF0NCmRyaXZlcnMvdmlkZW8vbXhz
ZmIuYzo5NjU6MjE6IHdhcm5pbmc6ICdmYl9pbmZvJyBtYXkgYmUgdXNlZCB1bmluaXRpYWxpemVk
IGluIHRoaXMgZnVuY3Rpb24gWy1XdW5pbml0aWFsaXplZF0NCg0KSXQgYnJlYWtzIHRoZSBhc3Np
Z25tZW50Lg0KCWhvc3QgPSB0b19pbXhmYl9ob3N0KGZiX2luZm8pOw0KDQpBbHNvLCAnZ290byBm
Yl9yZWxlYXNlOycgaXMgbm90IGdvb2QuDQpQbGVhc2UgdXNlICcgcmV0dXJuIFBUUl9FUlIoaG9z
dC0+YmFzZSk7JyBhcyBiZWxvdzoNCisgICAgICAgaG9zdC0+YmFzZSA9IGRldm1faW9yZW1hcF9y
ZXNvdXJjZSgmcGRldi0+ZGV2LCByZXMpOw0KKyAgICAgICBpZiAoSVNfRVJSKGhvc3QtPmJhc2Up
KQ0KKyAgICAgICAgICAgICAgIHJldHVybiBQVFJfRVJSKGhvc3QtPmJhc2UpOw0KDQoNCkJlc3Qg
cmVnYXJkcywNCkppbmdvbyBIYW4NCg0KPiAgCX0NCj4gDQo+ICAJZmJfaW5mbyA9IGZyYW1lYnVm
ZmVyX2FsbG9jKHNpemVvZihzdHJ1Y3QgbXhzZmJfaW5mbyksICZwZGV2LT5kZXYpOw0KPiBAQCAt
ODk3LDEzICs4OTgsNiBAQCBzdGF0aWMgaW50IG14c2ZiX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9k
ZXZpY2UgKnBkZXYpDQo+IA0KPiAgCWhvc3QgPSB0b19pbXhmYl9ob3N0KGZiX2luZm8pOw0KPiAN
Cj4gLQlob3N0LT5iYXNlID0gZGV2bV9pb3JlbWFwX3Jlc291cmNlKCZwZGV2LT5kZXYsIHJlcyk7
DQo+IC0JaWYgKElTX0VSUihob3N0LT5iYXNlKSkgew0KPiAtCQlkZXZfZXJyKCZwZGV2LT5kZXYs
ICJpb3JlbWFwIGZhaWxlZFxuIik7DQo+IC0JCXJldCA9IFBUUl9FUlIoaG9zdC0+YmFzZSk7DQo+
IC0JCWdvdG8gZmJfcmVsZWFzZTsNCj4gLQl9DQo+IC0NCj4gIAlob3N0LT5wZGV2ID0gcGRldjsN
Cj4gIAlwbGF0Zm9ybV9zZXRfZHJ2ZGF0YShwZGV2LCBob3N0KTsNCj4gDQo+IC0tDQo+IDEuNy4x
MC40DQo
^ permalink raw reply
* [PATCH 2/2] video:da8xx-fb: Convert to devm_* api
From: Lad Prabhakar @ 2013-05-16 7:22 UTC (permalink / raw)
To: DLOS, LFBDEV, Florian Tobias Schandinat; +Cc: LKML, Lad, Prabhakar
In-Reply-To: <1368688257-18705-1-git-send-email-prabhakar.csengg@gmail.com>
From: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Use devm_ioremap_resource instead of reques_mem_region()/ioremap() and
devm_request_irq() instead of request_irq().
This ensures more consistent error values and simplifies error paths.
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
---
drivers/video/da8xx-fb.c | 39 +++++++--------------------------------
1 files changed, 7 insertions(+), 32 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index aafe8b9..d35ea1d 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -134,7 +134,6 @@
#define LOWER_MARGIN 32
static void __iomem *da8xx_fb_reg_base;
-static struct resource *lcdc_regs;
static unsigned int lcd_revision;
static irq_handler_t lcdc_irq_handler;
static wait_queue_head_t frame_done_wq;
@@ -1015,12 +1014,9 @@ static int fb_remove(struct platform_device *dev)
par->p_palette_base);
dma_free_coherent(NULL, par->vram_size, par->vram_virt,
par->vram_phys);
- free_irq(par->irq, par);
pm_runtime_put_sync(&dev->dev);
pm_runtime_disable(&dev->dev);
framebuffer_release(info);
- iounmap(da8xx_fb_reg_base);
- release_mem_region(lcdc_regs->start, resource_size(lcdc_regs));
}
return 0;
@@ -1212,12 +1208,12 @@ static int fb_probe(struct platform_device *device)
{
struct da8xx_lcdc_platform_data *fb_pdata device->dev.platform_data;
+ static struct resource *lcdc_regs;
struct lcd_ctrl_config *lcd_cfg;
struct fb_videomode *lcdc_info;
struct fb_info *da8xx_fb_info;
struct clk *fb_clk = NULL;
struct da8xx_fb_par *par;
- resource_size_t len;
int ret, i;
unsigned long ulcm;
@@ -1227,29 +1223,14 @@ static int fb_probe(struct platform_device *device)
}
lcdc_regs = platform_get_resource(device, IORESOURCE_MEM, 0);
- if (!lcdc_regs) {
- dev_err(&device->dev,
- "Can not get memory resource for LCD controller\n");
- return -ENOENT;
- }
-
- len = resource_size(lcdc_regs);
-
- lcdc_regs = request_mem_region(lcdc_regs->start, len, lcdc_regs->name);
- if (!lcdc_regs)
- return -EBUSY;
-
- da8xx_fb_reg_base = ioremap(lcdc_regs->start, len);
- if (!da8xx_fb_reg_base) {
- ret = -EBUSY;
- goto err_request_mem;
- }
+ da8xx_fb_reg_base = devm_ioremap_resource(&device->dev, lcdc_regs);
+ if (IS_ERR(da8xx_fb_reg_base))
+ return PTR_ERR(da8xx_fb_reg_base);
fb_clk = clk_get(&device->dev, "fck");
if (IS_ERR(fb_clk)) {
dev_err(&device->dev, "Can not get device clock\n");
- ret = -ENODEV;
- goto err_ioremap;
+ return -ENODEV;
}
pm_runtime_enable(&device->dev);
@@ -1430,8 +1411,8 @@ static int fb_probe(struct platform_device *device)
lcdc_irq_handler = lcdc_irq_handler_rev02;
}
- ret = request_irq(par->irq, lcdc_irq_handler, 0,
- DRIVER_NAME, par);
+ ret = devm_request_irq(&device->dev, par->irq, lcdc_irq_handler, 0,
+ DRIVER_NAME, par);
if (ret)
goto irq_freq;
return 0;
@@ -1460,12 +1441,6 @@ err_pm_runtime_disable:
pm_runtime_put_sync(&device->dev);
pm_runtime_disable(&device->dev);
-err_ioremap:
- iounmap(da8xx_fb_reg_base);
-
-err_request_mem:
- release_mem_region(lcdc_regs->start, len);
-
return ret;
}
--
1.7.4.1
^ permalink raw reply related
* [PATCH 1/2] video: da8xx-fb: remove unwanted header inclusion and sort the alphabetically
From: Lad Prabhakar @ 2013-05-16 7:22 UTC (permalink / raw)
To: DLOS, LFBDEV, Florian Tobias Schandinat; +Cc: LKML, Lad, Prabhakar
In-Reply-To: <1368688257-18705-1-git-send-email-prabhakar.csengg@gmail.com>
From: Lad, Prabhakar <prabhakar.csengg@gmail.com>
This patch removes unwanted header inclusion and sorts them alphabetically
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
---
drivers/video/da8xx-fb.c | 23 ++++++++++-------------
1 files changed, 10 insertions(+), 13 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 0810939..aafe8b9 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -19,25 +19,22 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/fb.h>
+
+#include <linux/clk.h>
+#include <linux/console.h>
+#include <linux/cpufreq.h>
#include <linux/dma-mapping.h>
-#include <linux/device.h>
+#include <linux/fb.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
#include <linux/platform_device.h>
-#include <linux/uaccess.h>
#include <linux/pm_runtime.h>
-#include <linux/interrupt.h>
-#include <linux/wait.h>
-#include <linux/clk.h>
-#include <linux/cpufreq.h>
-#include <linux/console.h>
-#include <linux/spinlock.h>
-#include <linux/slab.h>
+#include <linux/uaccess.h>
+
#include <linux/delay.h>
#include <linux/lcm.h>
+
#include <video/da8xx-fb.h>
-#include <asm/div64.h>
#define DRIVER_NAME "da8xx_lcdc"
--
1.7.4.1
^ permalink raw reply related
* [PATCH 0/2] video: da8xx-fb trival cleanup
From: Lad Prabhakar @ 2013-05-16 7:22 UTC (permalink / raw)
To: DLOS, LFBDEV, Florian Tobias Schandinat; +Cc: LKML, Lad, Prabhakar
From: Lad, Prabhakar <prabhakar.csengg@gmail.com>
This patch series cleans the header inclusion and uses devm_* api
in the driver.
This patch series applies on 3.10-rc1 and is only boot
tested enabling FB driver.
Lad, Prabhakar (2):
video: da8xx-fb: remove unwanted header inclusion and sort the
alphabetically
video:da8xx-fb: Convert to devm_* api
drivers/video/da8xx-fb.c | 62 ++++++++++++---------------------------------
1 files changed, 17 insertions(+), 45 deletions(-)
--
1.7.4.1
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox