* Re: [PATCH] OMAP: DSS: Fix for dsi_pll to dpll4 clk switch
[not found] <FF55437E1F14DA4BAEB721A458B6701706BDA5E730@dbde02.ent.ti.com>
@ 2010-06-21 13:38 ` Grazvydas Ignotas
0 siblings, 0 replies; only message in thread
From: Grazvydas Ignotas @ 2010-06-21 13:38 UTC (permalink / raw)
To: Nagarajan, Rajkumar
Cc: linux-omap@vger.kernel.org, Tomi Valkeinen, linux-fbdev
when sending DSS patches, CC Tomi and fbdev.
On Thu, Jun 17, 2010 at 8:12 AM, Nagarajan, Rajkumar <x0133774@ti.com> wrote:
>
> When switching between clocks, The new functional clock is
> effective when the next vertical blanking interval occurs.
> GOLCD bit has to be set for the new clock to take effect.
>
> Signed-off-by: Kishore Y <kishore.y@ti.com>
> Signed-off-by: Mukund Mittal <mmittal@ti.com>
> Signed-off-by: Rajkumar N <rajkumar.nagarajan@ti.com>
> ---
> drivers/video/omap2/dss/dpi.c | 5 +++++
> 1 files changed, 5 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c
> index 960e977..5d778d6 100644
> --- a/drivers/video/omap2/dss/dpi.c
> +++ b/drivers/video/omap2/dss/dpi.c
> @@ -214,10 +214,15 @@ void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
>
> #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
> dss_select_dispc_clk_source(DSS_SRC_DSS1_ALWON_FCLK);
> + dispc_go(OMAP_DSS_CHANNEL_LCD);
> + while (dispc_go_busy(OMAP_DSS_CHANNEL_LCD))
> + ;
> dsi_pll_uninit();
> dss_clk_disable(DSS_CLK_FCK2);
> #endif
>
> + dispc_enable_channel(OMAP_DSS_CHANNEL_LCD, 0);
> +
> dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
>
> if (cpu_is_omap34xx())
> --
> 1.5.4.3
> --
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