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[212.51.149.33]) by smtp.gmail.com with ESMTPSA id k5-20020a17090627c500b00773f3ccd989sm7434902ejc.68.2022.11.23.08.57.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Nov 2022 08:57:47 -0800 (PST) Date: Wed, 23 Nov 2022 17:57:45 +0100 From: Daniel Vetter To: Geert Uytterhoeven Cc: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Gerd Hoffmann , dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, linux-m68k@lists.linux-m68k.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH resend v2] drm/fourcc: Add missing big-endian XRGB1555 and RGB565 formats Message-ID: Mail-Followup-To: Geert Uytterhoeven , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Gerd Hoffmann , dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, linux-m68k@lists.linux-m68k.org, linux-kernel@vger.kernel.org References: <3ee1f8144feb96c28742b22384189f1f83bcfc1a.1669221671.git.geert@linux-m68k.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3ee1f8144feb96c28742b22384189f1f83bcfc1a.1669221671.git.geert@linux-m68k.org> X-Operating-System: Linux phenom 5.19.0-2-amd64 Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org On Wed, Nov 23, 2022 at 05:43:10PM +0100, Geert Uytterhoeven wrote: > As of commit eae06120f1974e1a ("drm: refuse ADDFB2 ioctl for broken > bigendian drivers"), drivers must set the > quirk_addfb_prefer_host_byte_order quirk to make the drm_mode_addfb() > compat code work correctly on big-endian machines. > > While that works fine for big-endian XRGB8888 and ARGB8888, which are > mapped to the existing little-endian BGRX8888 and BGRA8888 formats, it > does not work for big-endian XRGB1555 and RGB565, as the latter are not > listed in the format database. > > Fix this by adding the missing formats. Limit this to big-endian > platforms, as there is currently no need to support these formats on > little-endian platforms. > > Fixes: 6960e6da9cec3f66 ("drm: fix drm_mode_addfb() on big endian machines.") > Signed-off-by: Geert Uytterhoeven > --- > v2: > - Use "DRM_FORMAT_foo | DRM_FORMAT_BIG_ENDIAN" instead of > "DRM_FORMAT_HOST_foo", > - Turn into a lone patch, as all other patches from series > https://lore.kernel.org/r/cover.1657300532.git.geert@linux-m68k.org > were applied to drm-misc/for-linux-next. > --- > drivers/gpu/drm/drm_fourcc.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c > index e09331bb3bc73f21..265671a7f9134c1f 100644 > --- a/drivers/gpu/drm/drm_fourcc.c > +++ b/drivers/gpu/drm/drm_fourcc.c > @@ -190,6 +190,10 @@ const struct drm_format_info *__drm_format_info(u32 format) > { .format = DRM_FORMAT_BGRA5551, .depth = 15, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true }, > { .format = DRM_FORMAT_RGB565, .depth = 16, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 }, > { .format = DRM_FORMAT_BGR565, .depth = 16, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 }, > +#ifdef __BIG_ENDIAN Why do we need the #ifdef here? Iirc some hw has big endian flags in the scanout registers, so could supprt this unconditionally if there's no #ifdef around the format defines. Some drivers might then also want a DRM_FORMAT_FOO_BE define to simplify tables and stuff, but that's more a bikeshed. Otherwise this makes sense to me. -Daniel > + { .format = DRM_FORMAT_XRGB1555 | DRM_FORMAT_BIG_ENDIAN, .depth = 15, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 }, > + { .format = DRM_FORMAT_RGB565 | DRM_FORMAT_BIG_ENDIAN, .depth = 16, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 }, > +#endif > { .format = DRM_FORMAT_RGB888, .depth = 24, .num_planes = 1, .cpp = { 3, 0, 0 }, .hsub = 1, .vsub = 1 }, > { .format = DRM_FORMAT_BGR888, .depth = 24, .num_planes = 1, .cpp = { 3, 0, 0 }, .hsub = 1, .vsub = 1 }, > { .format = DRM_FORMAT_XRGB8888, .depth = 24, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 }, > -- > 2.25.1 > -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch