* Re: Patch fixing savagefb driver typo/regression in linux-3.0.0
From: Tormod Volden @ 2011-08-01 22:56 UTC (permalink / raw)
To: linux-fbdev
On Sun, Jul 31, 2011 at 12:04 PM, John Stanley wrote:
> I have an old T22 Thinkpad with integrated Savage/IX-MV video. As of
> linux-3.0, the video is non-functional; the PC either hard hangs immediately
> or has totally garbled video, and then hard hangs, as soon as I attempt to
> edit a file or cat a file with more than a screen-full of text. The
> foregoing details are actually not important any more as in looking at the
> code changes I discovered a typo in
> linux-3.0.0/drivers/video/savage/savagefb.h and have applied the attached
> patch to fix the issue.
John, you are absolutely correct. My bad, this was from a commit of
mine. You may add my
Reviewed-by: Tormod Volden <debian.tormod@gmail.com>
to your patch. I'd suggest you change the patch description (mail
subject) to "[PATCH] Fix typo in savage4 series definition" or
something similar.
The patch should also go into the stable series (by cc'ing
stable@vger.kernel.org if I remember correctly).
> PLEASE NOTE:
> I realize that the patch does not quite adhere to linux kernel patch
> coding-style conventions (in particular, spaces around logical operators,
> and lines not exceeding 80 chars), but I have simply changed an
> '||' to an '&&' -- and NOT attempted to resolve pre-existing coding-style
> violations.
I also preserved the old coding style, which is the same in the xorg
driver which shares much of this code. We can always change it there
as well if somebody would like to fix it up.
>
> thanks much,
> John
>
> P.S. Many, many thanks for lifting the 800x600 resolution limit! I've been
> using a patch/hack to bump the limit to 1024x768 for an very long time...
Glad to hear that! So there are still other savagefb users around :)
My apologies to those who were affected by the typo.
Cheers,
Tormod
^ permalink raw reply
* Re: [PATCHv2 17/28] OMAP2420: HWMOD: Add DSS opt clocks
From: Paul Walmsley @ 2011-08-02 1:14 UTC (permalink / raw)
To: Tomi Valkeinen; +Cc: linux-omap, linux-fbdev, b-cousson, khilman
In-Reply-To: <alpine.DEB.2.00.1107150047160.16606@utopia.booyaka.com>
Hello Tomi
On Fri, 15 Jul 2011, Paul Walmsley wrote:
> On Thu, 9 Jun 2011, Tomi Valkeinen wrote:
>
> > Add DSS optional clocks to HWMOD data for OMAP2420.
This patch has been combined with the 2430 patch and the OMAP2xxx portion
of the temporary hack in the DSS driver has been removed. Care to review
the new changes before it's sent to Tony?
- Paul
From: Tomi Valkeinen <tomi.valkeinen@ti.com>
Date: Mon, 1 Aug 2011 19:02:23 -0600
Subject: [PATCH 1/2] OMAP2xxx: HWMOD: Add DSS opt clocks
Add DSS optional clocks to HWMOD data for OMAP2420 and OMAP2430.
Revert OMAP2xxx portion of commit
9ede365aa6f74428a1f69c21ca1cf21213167576 ("HACK: OMAP: DSS2: clk hack
for OMAP2/3").
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[paul@pwsan.com: merge 2420 and 2430 patches; remove temporary DSS driver hack;
update changelog]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 17 ++++++++---------
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 17 ++++++++---------
drivers/video/omap2/dss/rfbi.c | 2 +-
3 files changed, 17 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index a015c69..b075188 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -873,11 +873,6 @@ static struct omap_hwmod_ocp_if *omap2420_dss_slaves[] = {
&omap2420_l4_core__dss,
};
-static struct omap_hwmod_opt_clk dss_opt_clks[] = {
- { .role = "tv_clk", .clk = "dss_54m_fck" },
- { .role = "sys_clk", .clk = "dss2_fck" },
-};
-
static struct omap_hwmod omap2420_dss_core_hwmod = {
.name = "dss_core",
.class = &omap2_dss_hwmod_class,
@@ -892,8 +887,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
.idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
},
},
- .opt_clks = dss_opt_clks,
- .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
.slaves = omap2420_dss_slaves,
.slaves_cnt = ARRAY_SIZE(omap2420_dss_slaves),
.masters = omap2420_dss_masters,
@@ -962,6 +955,10 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = {
&omap2420_l4_core__dss_rfbi,
};
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+ { .role = "ick", .clk = "dss_ick" },
+};
+
static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
.name = "dss_rfbi",
.class = &omap2_rfbi_hwmod_class,
@@ -973,6 +970,8 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
.module_offs = CORE_MOD,
},
},
+ .opt_clks = dss_rfbi_opt_clks,
+ .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
.slaves = omap2420_dss_rfbi_slaves,
.slaves_cnt = ARRAY_SIZE(omap2420_dss_rfbi_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
@@ -983,7 +982,7 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
.master = &omap2420_l4_core_hwmod,
.slave = &omap2420_dss_venc_hwmod,
- .clk = "dss_54m_fck",
+ .clk = "dss_ick",
.addr = omap2_dss_venc_addrs,
.fw = {
.omap2 = {
@@ -1003,7 +1002,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = {
static struct omap_hwmod omap2420_dss_venc_hwmod = {
.name = "dss_venc",
.class = &omap2_venc_hwmod_class,
- .main_clk = "dss1_fck",
+ .main_clk = "dss_54m_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 16743c7..3569084 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -939,11 +939,6 @@ static struct omap_hwmod_ocp_if *omap2430_dss_slaves[] = {
&omap2430_l4_core__dss,
};
-static struct omap_hwmod_opt_clk dss_opt_clks[] = {
- { .role = "tv_clk", .clk = "dss_54m_fck" },
- { .role = "sys_clk", .clk = "dss2_fck" },
-};
-
static struct omap_hwmod omap2430_dss_core_hwmod = {
.name = "dss_core",
.class = &omap2_dss_hwmod_class,
@@ -958,8 +953,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
.idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
},
},
- .opt_clks = dss_opt_clks,
- .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
.slaves = omap2430_dss_slaves,
.slaves_cnt = ARRAY_SIZE(omap2430_dss_slaves),
.masters = omap2430_dss_masters,
@@ -1016,6 +1009,10 @@ static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {
&omap2430_l4_core__dss_rfbi,
};
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+ { .role = "ick", .clk = "dss_ick" },
+};
+
static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
.name = "dss_rfbi",
.class = &omap2_rfbi_hwmod_class,
@@ -1027,6 +1024,8 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
.module_offs = CORE_MOD,
},
},
+ .opt_clks = dss_rfbi_opt_clks,
+ .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
.slaves = omap2430_dss_rfbi_slaves,
.slaves_cnt = ARRAY_SIZE(omap2430_dss_rfbi_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
@@ -1037,7 +1036,7 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
.master = &omap2430_l4_core_hwmod,
.slave = &omap2430_dss_venc_hwmod,
- .clk = "dss_54m_fck",
+ .clk = "dss_ick",
.addr = omap2_dss_venc_addrs,
.flags = OCPIF_SWSUP_IDLE,
.user = OCP_USER_MPU | OCP_USER_SDMA,
@@ -1051,7 +1050,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {
static struct omap_hwmod omap2430_dss_venc_hwmod = {
.name = "dss_venc",
.class = &omap2_venc_hwmod_class,
- .main_clk = "dss1_fck",
+ .main_clk = "dss_54m_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c
index 39f4c59..457f1ac 100644
--- a/drivers/video/omap2/dss/rfbi.c
+++ b/drivers/video/omap2/dss/rfbi.c
@@ -952,7 +952,7 @@ static int omap_rfbihw_probe(struct platform_device *pdev)
msleep(10);
- if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap3630())
+ if (cpu_is_omap34xx() || cpu_is_omap3630())
clk = dss_get_ick();
else
clk = clk_get(&pdev->dev, "ick");
--
1.7.5.4
^ permalink raw reply related
* Re: [PATCHv2 16/28] OMAP3: HWMOD: Add DSS opt clocks
From: Paul Walmsley @ 2011-08-02 1:27 UTC (permalink / raw)
To: Tomi Valkeinen; +Cc: linux-omap, linux-fbdev, b-cousson, khilman
In-Reply-To: <alpine.DEB.2.00.1107150048530.16606@utopia.booyaka.com>
Hello Tomi,
On Fri, 15 Jul 2011, Paul Walmsley wrote:
> On Thu, 9 Jun 2011, Tomi Valkeinen wrote:
>
> > Add DSS optional clocks to HWMOD data for OMAP3xxx.
>
> Thanks; queued for 3.1-rc fixes at git://git.pwsan.com/linux-2.6 in the
> branch 'omap2_3_hwmod_dss_fixes_3.1rc'.
This patch has been updated to remove the temporary hack added to the DSS
driver. Care to review it before it's sent to Tony?
- Paul
From: Tomi Valkeinen <tomi.valkeinen@ti.com>
Date: Fri, 15 Jul 2011 00:54:34 -0600
Subject: [PATCH 2/2] OMAP3: HWMOD: Add DSS opt clocks
Add DSS optional clocks to HWMOD data for OMAP3xxx.
Revert OMAP3 portion of commit
9ede365aa6f74428a1f69c21ca1cf21213167576 ("HACK: OMAP: DSS2: clk hack
for OMAP2/3").
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[paul@pwsan.com: remove temporary DSS driver hack; update changelog]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 32 ++++++++++++++++++++++++---
drivers/video/omap2/dss/dsi.c | 2 +-
drivers/video/omap2/dss/dss.h | 2 -
drivers/video/omap2/dss/rfbi.c | 5 +---
drivers/video/omap2/dss/venc.c | 5 +---
5 files changed, 31 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 25bf43b..38ee033 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1365,9 +1365,14 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = {
};
static struct omap_hwmod_opt_clk dss_opt_clks[] = {
- { .role = "tv_clk", .clk = "dss_tv_fck" },
- { .role = "video_clk", .clk = "dss_96m_fck" },
+ /*
+ * The rest of the clocks are not needed by the driver,
+ * but are needed by the hwmod to reset DSS properly.
+ */
{ .role = "sys_clk", .clk = "dss2_alwon_fck" },
+ { .role = "tv_clk", .clk = "dss_tv_fck" },
+ /* required only on OMAP3430 */
+ { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
};
static struct omap_hwmod omap3430es1_dss_core_hwmod = {
@@ -1504,6 +1509,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = {
&omap3xxx_l4_core__dss_dsi1,
};
+static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {
+ { .role = "sys_clk", .clk = "dss2_alwon_fck" },
+};
+
static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
.name = "dss_dsi1",
.class = &omap3xxx_dsi_hwmod_class,
@@ -1516,6 +1525,8 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
.module_offs = OMAP3430_DSS_MOD,
},
},
+ .opt_clks = dss_dsi1_opt_clks,
+ .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks),
.slaves = omap3xxx_dss_dsi1_slaves,
.slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
@@ -1545,6 +1556,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = {
&omap3xxx_l4_core__dss_rfbi,
};
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+ { .role = "ick", .clk = "dss_ick" },
+};
+
static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
.name = "dss_rfbi",
.class = &omap2_rfbi_hwmod_class,
@@ -1556,6 +1571,8 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
.module_offs = OMAP3430_DSS_MOD,
},
},
+ .opt_clks = dss_rfbi_opt_clks,
+ .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
.slaves = omap3xxx_dss_rfbi_slaves,
.slaves_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
@@ -1568,7 +1585,7 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
.master = &omap3xxx_l4_core_hwmod,
.slave = &omap3xxx_dss_venc_hwmod,
- .clk = "dss_tv_fck",
+ .clk = "dss_ick",
.addr = omap2_dss_venc_addrs,
.fw = {
.omap2 = {
@@ -1586,10 +1603,15 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = {
&omap3xxx_l4_core__dss_venc,
};
+static struct omap_hwmod_opt_clk dss_venc_opt_clks[] = {
+ /* required only on OMAP3430 */
+ { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
+};
+
static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
.name = "dss_venc",
.class = &omap2_venc_hwmod_class,
- .main_clk = "dss1_alwon_fck",
+ .main_clk = "dss_tv_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
@@ -1597,6 +1619,8 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
.module_offs = OMAP3430_DSS_MOD,
},
},
+ .opt_clks = dss_venc_opt_clks,
+ .opt_clks_cnt = ARRAY_SIZE(dss_venc_opt_clks),
.slaves = omap3xxx_dss_venc_slaves,
.slaves_cnt = ARRAY_SIZE(omap3xxx_dss_venc_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index 7adbbeb..0645170 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -4427,7 +4427,7 @@ static int dsi_get_clocks(struct platform_device *dsidev)
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
struct clk *clk;
- clk = clk_get(&dsidev->dev, "fck");
+ clk = clk_get(&dsidev->dev, "sys_clk");
if (IS_ERR(clk)) {
DSSERR("can't get fck\n");
return PTR_ERR(clk);
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index 9c94b11..adeff04 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -209,8 +209,6 @@ void dss_uninit_platform_driver(void);
int dss_runtime_get(void);
void dss_runtime_put(void);
-struct clk *dss_get_ick(void);
-
void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select);
const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src);
void dss_dump_clocks(struct seq_file *s);
diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c
index 457f1ac..2d31cc1 100644
--- a/drivers/video/omap2/dss/rfbi.c
+++ b/drivers/video/omap2/dss/rfbi.c
@@ -952,10 +952,7 @@ static int omap_rfbihw_probe(struct platform_device *pdev)
msleep(10);
- if (cpu_is_omap34xx() || cpu_is_omap3630())
- clk = dss_get_ick();
- else
- clk = clk_get(&pdev->dev, "ick");
+ clk = clk_get(&pdev->dev, "ick");
if (IS_ERR(clk)) {
DSSERR("can't get ick\n");
r = PTR_ERR(clk);
diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c
index 173c664..71e005d 100644
--- a/drivers/video/omap2/dss/venc.c
+++ b/drivers/video/omap2/dss/venc.c
@@ -741,10 +741,7 @@ static int venc_get_clocks(struct platform_device *pdev)
venc.tv_clk = clk;
if (dss_has_feature(FEAT_VENC_REQUIRES_TV_DAC_CLK)) {
- if (cpu_is_omap34xx() || cpu_is_omap3630())
- clk = clk_get(&pdev->dev, "dss_96m_fck");
- else
- clk = clk_get(&pdev->dev, "tv_dac_clk");
+ clk = clk_get(&pdev->dev, "tv_dac_clk");
if (IS_ERR(clk)) {
DSSERR("can't get tv_dac_clk\n");
clk_put(venc.tv_clk);
--
1.7.5.4
^ permalink raw reply related
* [PATCH] Fix typo in savage4 series definition in linux-3.0.0
From: John Stanley @ 2011-08-02 3:19 UTC (permalink / raw)
To: linux-fbdev
[-- Attachment #1: Type: text/plain, Size: 2127 bytes --]
Thanks Tormod,
Attached is the same patch, but with your 'Reviewed-by' added.
Yeah, the T22 is rather old, and a bit of a 'Frankenstein PC' at this
point, but its quite functional even with Linux-3.0 and KDE-4.7
thanks again,
John
On 08/01/2011 06:56 PM, Tormod Volden wrote:
> On Sun, Jul 31, 2011 at 12:04 PM, John Stanley wrote:
>> I have an old T22 Thinkpad with integrated Savage/IX-MV video. As of
>> linux-3.0, the video is non-functional; the PC either hard hangs immediately
>> or has totally garbled video, and then hard hangs, as soon as I attempt to
>> edit a file or cat a file with more than a screen-full of text. The
>> foregoing details are actually not important any more as in looking at the
>> code changes I discovered a typo in
>> linux-3.0.0/drivers/video/savage/savagefb.h and have applied the attached
>> patch to fix the issue.
> John, you are absolutely correct. My bad, this was from a commit of
> mine. You may add my
> Reviewed-by: Tormod Volden<debian.tormod@gmail.com>
> to your patch. I'd suggest you change the patch description (mail
> subject) to "[PATCH] Fix typo in savage4 series definition" or
> something similar.
>
> The patch should also go into the stable series (by cc'ing
> stable@vger.kernel.org if I remember correctly).
>
>> PLEASE NOTE:
>> I realize that the patch does not quite adhere to linux kernel patch
>> coding-style conventions (in particular, spaces around logical operators,
>> and lines not exceeding 80 chars), but I have simply changed an
>> '||' to an'&&' -- and NOT attempted to resolve pre-existing coding-style
>> violations.
> I also preserved the old coding style, which is the same in the xorg
> driver which shares much of this code. We can always change it there
> as well if somebody would like to fix it up.
>
>> thanks much,
>> John
>>
>> P.S. Many, many thanks for lifting the 800x600 resolution limit! I've been
>> using a patch/hack to bump the limit to 1024x768 for an very long time...
> Glad to hear that! So there are still other savagefb users around :)
> My apologies to those who were affected by the typo.
>
> Cheers,
> Tormod
>
[-- Attachment #2: linux-3.0.0-savagefb-savage4-series-def-fix.patch --]
[-- Type: text/plain, Size: 1344 bytes --]
This patch corrects a typo/regression in the savage driver code occurring in going
from linux-2.6.39.3 to linux-3.0.0.
In linux-2.6.39.3, there were two savage4 variants (S3_SAVAGE4 and S3_PROSAVAGE).
Hence, S3_SAVAGE4_SERIES was defined as
S3_SAVAGE4 or S3_PROSAVAGE
In linux-3.0.0, two additional savage4 variants (S3_TWISTER and S3_PROSAVAGEDDR) have
been added. Hence S3_SAVAGE4_SERIES should be defined as
S3_SAVAGE4, S3_PROSAVAGE, S3_TWISTER, or S3_PROSAVAGEDDR
In going from linux-2.6.39.3 to linux-3.0.0, the define statement for S3_SAVAGE4_SERIES
was incompletely modified: the '||' should have been changed to an '&&'; for an '||' will
set S3_SAVAGE4_SERIES true for any card.
Signed-off-by: John P. Stanley <jpsinthemix@verizon.net>
Reviewed-by: Tormod Volden <debian.tormod@gmail.com>
--- linux-3.0.0/drivers/video/savage/savagefb.h.orig 2011-07-21 22:17:23.000000000 -0400
+++ linux-3.0.0/drivers/video/savage/savagefb.h 2011-07-31 05:27:47.314798215 -0400
@@ -55,7 +55,7 @@
#define S3_SAVAGE3D_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
-#define S3_SAVAGE4_SERIES(chip) ((chip>=S3_SAVAGE4) || (chip<=S3_PROSAVAGEDDR))
+#define S3_SAVAGE4_SERIES(chip) ((chip>=S3_SAVAGE4) && (chip<=S3_PROSAVAGEDDR))
#define S3_SAVAGE_MOBILE_SERIES(chip) ((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE))
^ permalink raw reply
* [PATCH 1/5] udlfb: add more comprehensive support for DPMS FB_BLANK_* modes
From: bernie @ 2011-08-02 5:54 UTC (permalink / raw)
To: linux-fbdev
From: Bernie Thompson <bernie@plugable.com>
Fixes earlier problems where monitor would not return from blank
Test with any DisplayLink-based USB 2.0 graphics adapter
sudo nano /sys/class/graphics/fb?/blank
and write out single digit FB_BLANK_* code from include/linux/fb.h
Supports on (0), blank (1), suspend (2,3), powerdown (4)
Signed-off-by: Bernie Thompson <bernie@plugable.com>
---
drivers/video/udlfb.c | 97 +++++++++++++++++++++++++++++++++++++------------
include/video/udlfb.h | 1 +
2 files changed, 74 insertions(+), 24 deletions(-)
diff --git a/drivers/video/udlfb.c b/drivers/video/udlfb.c
index 4e13375..844b371 100644
--- a/drivers/video/udlfb.c
+++ b/drivers/video/udlfb.c
@@ -104,17 +104,39 @@ static char *dlfb_vidreg_unlock(char *buf)
}
/*
- * On/Off for driving the DisplayLink framebuffer to the display
- * 0x00 H and V sync on
- * 0x01 H and V sync off (screen blank but powered)
- * 0x07 DPMS powerdown (requires modeset to come back)
+ * Map FB_BLANK_* to DisplayLink register
+ * DLReg FB_BLANK_*
+ * ----- -----------------------------
+ * 0x00 FB_BLANK_UNBLANK (0)
+ * 0x01 FB_BLANK (1)
+ * 0x03 FB_BLANK_VSYNC_SUSPEND (2)
+ * 0x05 FB_BLANK_HSYNC_SUSPEND (3)
+ * 0x07 FB_BLANK_POWERDOWN (4) Note: requires modeset to come back
*/
-static char *dlfb_enable_hvsync(char *buf, bool enable)
+static char *dlfb_blanking(char *buf, int fb_blank)
{
- if (enable)
- return dlfb_set_register(buf, 0x1F, 0x00);
- else
- return dlfb_set_register(buf, 0x1F, 0x07);
+ u8 reg;
+
+ switch (fb_blank) {
+ case FB_BLANK_POWERDOWN:
+ reg = 0x07;
+ break;
+ case FB_BLANK_HSYNC_SUSPEND:
+ reg = 0x05;
+ break;
+ case FB_BLANK_VSYNC_SUSPEND:
+ reg = 0x03;
+ break;
+ case FB_BLANK_NORMAL:
+ reg = 0x01;
+ break;
+ default:
+ reg = 0x00;
+ }
+
+ buf = dlfb_set_register(buf, 0x1F, reg);
+
+ return buf;
}
static char *dlfb_set_color_depth(char *buf, u8 selection)
@@ -282,13 +304,15 @@ static int dlfb_set_video_mode(struct dlfb_data *dev,
wrptr = dlfb_set_base8bpp(wrptr, dev->info->fix.smem_len);
wrptr = dlfb_set_vid_cmds(wrptr, var);
- wrptr = dlfb_enable_hvsync(wrptr, true);
+ wrptr = dlfb_blanking(wrptr, FB_BLANK_UNBLANK);
wrptr = dlfb_vidreg_unlock(wrptr);
writesize = wrptr - buf;
retval = dlfb_submit_urb(dev, urb, writesize);
+ dev->blank_mode = FB_BLANK_UNBLANK;
+
return retval;
}
@@ -1049,32 +1073,57 @@ static int dlfb_ops_set_par(struct fb_info *info)
return result;
}
+/* To fonzi the jukebox (e.g. make blanking changes take effect) */
+static char *dlfb_dummy_render(char *buf)
+{
+ *buf++ = 0xAF;
+ *buf++ = 0x6A; /* copy */
+ *buf++ = 0x00; /* from address*/
+ *buf++ = 0x00;
+ *buf++ = 0x00;
+ *buf++ = 0x01; /* one pixel */
+ *buf++ = 0x00; /* to address */
+ *buf++ = 0x00;
+ *buf++ = 0x00;
+ return buf;
+}
+
/*
* In order to come back from full DPMS off, we need to set the mode again
*/
static int dlfb_ops_blank(int blank_mode, struct fb_info *info)
{
struct dlfb_data *dev = info->par;
+ char *bufptr;
+ struct urb *urb;
- if (blank_mode != FB_BLANK_UNBLANK) {
- char *bufptr;
- struct urb *urb;
-
- urb = dlfb_get_urb(dev);
- if (!urb)
- return 0;
+ pr_info("/dev/fb%d FB_BLANK mode %d --> %d\n",
+ info->node, dev->blank_mode, blank_mode);
- bufptr = (char *) urb->transfer_buffer;
- bufptr = dlfb_vidreg_lock(bufptr);
- bufptr = dlfb_enable_hvsync(bufptr, false);
- bufptr = dlfb_vidreg_unlock(bufptr);
+ if ((dev->blank_mode = FB_BLANK_POWERDOWN) &&
+ (blank_mode != FB_BLANK_POWERDOWN)) {
- dlfb_submit_urb(dev, urb, bufptr -
- (char *) urb->transfer_buffer);
- } else {
+ /* returning from powerdown requires a fresh modeset */
dlfb_set_video_mode(dev, &info->var);
}
+ urb = dlfb_get_urb(dev);
+ if (!urb)
+ return 0;
+
+ bufptr = (char *) urb->transfer_buffer;
+ bufptr = dlfb_vidreg_lock(bufptr);
+ bufptr = dlfb_blanking(bufptr, blank_mode);
+ bufptr = dlfb_vidreg_unlock(bufptr);
+
+ /* seems like a render op is needed to have blank change take effect */
+ bufptr = dlfb_dummy_render(bufptr);
+
+ dlfb_submit_urb(dev, urb, bufptr -
+ (char *) urb->transfer_buffer);
+
+ dev->blank_mode = blank_mode;
+
return 0;
}
diff --git a/include/video/udlfb.h b/include/video/udlfb.h
index 69d485a..c41f308 100644
--- a/include/video/udlfb.h
+++ b/include/video/udlfb.h
@@ -50,6 +50,7 @@ struct dlfb_data {
int base16;
int base8;
u32 pseudo_palette[256];
+ int blank_mode; /*one of FB_BLANK_ */
/* blit-only rendering path metrics, exposed through sysfs */
atomic_t bytes_rendered; /* raw pixel-bytes driver asked to render */
atomic_t bytes_identical; /* saved effort with backbuffer comparison */
--
1.7.4.1
^ permalink raw reply related
* [PATCH 2/5] udlfb: Search config descriptor if not at device level
From: bernie @ 2011-08-02 5:54 UTC (permalink / raw)
To: linux-fbdev
From: Andrew Kephart <akephart@akephart.org>
For at least one DisplayLink device, the vendor-specific information can
be found in the config descriptor instead of as a separate, device-level
descriptor. This patch searches the current interface (of the current
config descriptor) for the DL vendor-specific descriptor.
Signed-off-by: Andrew Kephart <akephart@akephart.org>
Signed-off-by: Bernie Thompson <bernie@plugable.com>
---
drivers/video/udlfb.c | 21 ++++++++++++++++-----
1 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/video/udlfb.c b/drivers/video/udlfb.c
index 844b371..bdd21de 100644
--- a/drivers/video/udlfb.c
+++ b/drivers/video/udlfb.c
@@ -1489,21 +1489,30 @@ static int dlfb_select_std_channel(struct dlfb_data *dev)
}
static int dlfb_parse_vendor_descriptor(struct dlfb_data *dev,
- struct usb_device *usbdev)
+ struct usb_interface *interface)
{
char *desc;
char *buf;
char *desc_end;
- u8 total_len = 0;
+ int total_len = 0;
buf = kzalloc(MAX_VENDOR_DESCRIPTOR_SIZE, GFP_KERNEL);
if (!buf)
return false;
desc = buf;
- total_len = usb_get_descriptor(usbdev, 0x5f, /* vendor specific */
- 0, desc, MAX_VENDOR_DESCRIPTOR_SIZE);
+ total_len = usb_get_descriptor(interface_to_usbdev(interface),
+ 0x5f, /* vendor specific */
+ 0, desc, MAX_VENDOR_DESCRIPTOR_SIZE);
+
+ /* if not found, look in configuration descriptor */
+ if (total_len < 0) {
+ if (0 = usb_get_extra_descriptor(interface->cur_altsetting,
+ 0x5f, &desc))
+ total_len = (int) desc[0];
+ }
+
if (total_len > 5) {
pr_info("vendor descriptor length:%x data:%02x %02x %02x %02x" \
"%02x %02x %02x %02x %02x %02x %02x\n",
@@ -1544,6 +1553,8 @@ static int dlfb_parse_vendor_descriptor(struct dlfb_data *dev,
}
desc += length;
}
+ } else {
+ pr_info("vendor descriptor not available (%d)\n", total_len);
}
goto success;
@@ -1593,7 +1604,7 @@ static int dlfb_usb_probe(struct usb_interface *interface,
dev->sku_pixel_limit = 2048 * 1152; /* default to maximum */
- if (!dlfb_parse_vendor_descriptor(dev, usbdev)) {
+ if (!dlfb_parse_vendor_descriptor(dev, interface)) {
pr_err("firmware not recognized. Assume incompatible device\n");
goto error;
}
--
1.7.4.1
^ permalink raw reply related
* [PATCH 3/5] udlfb: fix issues found with Sparse static analysis
From: bernie @ 2011-08-02 5:54 UTC (permalink / raw)
To: linux-fbdev
From: Dr. David Alan Gilbert <linux@treblig.org>
Add __user casting, a missing copy_from_user, and proper boolean
Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Bernie Thompson <bernie@plugable.com>
---
drivers/video/udlfb.c | 30 ++++++++++++++++--------------
1 files changed, 16 insertions(+), 14 deletions(-)
diff --git a/drivers/video/udlfb.c b/drivers/video/udlfb.c
index bdd21de..f5df3d3 100644
--- a/drivers/video/udlfb.c
+++ b/drivers/video/udlfb.c
@@ -786,14 +786,13 @@ static int dlfb_ops_ioctl(struct fb_info *info, unsigned int cmd,
{
struct dlfb_data *dev = info->par;
- struct dloarea *area = NULL;
if (!atomic_read(&dev->usb_active))
return 0;
/* TODO: Update X server to get this from sysfs instead */
if (cmd = DLFB_IOCTL_RETURN_EDID) {
- char *edid = (char *)arg;
+ void __user *edid = (void __user *)arg;
if (copy_to_user(edid, dev->edid, dev->edid_size))
return -EFAULT;
return 0;
@@ -801,6 +800,11 @@ static int dlfb_ops_ioctl(struct fb_info *info, unsigned int cmd,
/* TODO: Help propose a standard fb.h ioctl to report mmap damage */
if (cmd = DLFB_IOCTL_REPORT_DAMAGE) {
+ struct dloarea area;
+
+ if (copy_from_user(&area, (void __user *)arg,
+ sizeof(struct dloarea)))
+ return -EFAULT;
/*
* If we have a damage-aware client, turn fb_defio "off"
@@ -812,21 +816,19 @@ static int dlfb_ops_ioctl(struct fb_info *info, unsigned int cmd,
if (info->fbdefio)
info->fbdefio->delay = DL_DEFIO_WRITE_DISABLE;
- area = (struct dloarea *)arg;
-
- if (area->x < 0)
- area->x = 0;
+ if (area.x < 0)
+ area.x = 0;
- if (area->x > info->var.xres)
- area->x = info->var.xres;
+ if (area.x > info->var.xres)
+ area.x = info->var.xres;
- if (area->y < 0)
- area->y = 0;
+ if (area.y < 0)
+ area.y = 0;
- if (area->y > info->var.yres)
- area->y = info->var.yres;
+ if (area.y > info->var.yres)
+ area.y = info->var.yres;
- dlfb_handle_damage(dev, area->x, area->y, area->w, area->h,
+ dlfb_handle_damage(dev, area.x, area.y, area.w, area.h,
info->screen_base);
}
@@ -874,7 +876,7 @@ static int dlfb_ops_open(struct fb_info *info, int user)
* preventing other clients (X) from working properly. Usually
* not what the user wants. Fail by default with option to enable.
*/
- if ((user = 0) & (!console))
+ if ((user = 0) && (!console))
return -EBUSY;
/* If the USB device is gone, we don't accept new opens */
--
1.7.4.1
^ permalink raw reply related
* [PATCH 4/5] udlfb: Add module option to do without shadow framebuffer
From: bernie @ 2011-08-02 5:54 UTC (permalink / raw)
To: linux-fbdev
From: Stuart Hopkins <stuart@linux-depot.com>
By default, udlfb allocates a 2nd buffer to shadow what's across
the bus on the USB device. It can operate without this shadow,
but then it cannot tell which pixels have changed, and must send all.
Saves host memory, but worsens the USB 2.0 bus bottleneck.
This option allows users in very low memory situations (e.g.
bifferboard) to optionally turn off this shadow framebuffer.
Signed-off-by: Bernie Thompson <bernie@plugable.com>
Signed-off-by: Stuart Hopkins <stuart@linux-depot.com>
---
Documentation/fb/udlfb.txt | 5 +++++
drivers/video/udlfb.c | 10 ++++++++--
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/Documentation/fb/udlfb.txt b/Documentation/fb/udlfb.txt
index 7fdde2a..473ceed 100644
--- a/Documentation/fb/udlfb.txt
+++ b/Documentation/fb/udlfb.txt
@@ -105,6 +105,11 @@ console Allow fbcon to attach to udlfb provided framebuffers. This
the first framebuffer it finds, which isn't usually what the
user wants in the case of USB displays.
+shadow Allocate a 2nd framebuffer to shadow what's currently across
+ the USB bus in device memory. If any pixels are unchanged,
+ do not transmit. Spends host memory to save USB transfers.
+ Enabled by default. Only disable on very low memory systems.
+
Sysfs Attributes
========
diff --git a/drivers/video/udlfb.c b/drivers/video/udlfb.c
index f5df3d3..5a13dc5 100644
--- a/drivers/video/udlfb.c
+++ b/drivers/video/udlfb.c
@@ -72,6 +72,7 @@ MODULE_DEVICE_TABLE(usb, id_table);
/* module options */
static int console; /* Optionally allow fbcon to consume first framebuffer */
static int fb_defio; /* Optionally enable experimental fb_defio mmap support */
+static int shadow = 1; /* Optionally disable shadow framebuffer */
/* dlfb keeps a list of urbs for efficient bulk transfers */
static void dlfb_urb_completion(struct urb *urb);
@@ -1158,7 +1159,7 @@ static int dlfb_realloc_framebuffer(struct dlfb_data *dev, struct fb_info *info)
int new_len;
unsigned char *old_fb = info->screen_base;
unsigned char *new_fb;
- unsigned char *new_back;
+ unsigned char *new_back = 0;
pr_warn("Reallocating framebuffer. Addresses will change!\n");
@@ -1190,7 +1191,8 @@ static int dlfb_realloc_framebuffer(struct dlfb_data *dev, struct fb_info *info)
* But with imperfect damage info we may send pixels over USB
* that were, in fact, unchanged - wasting limited USB bandwidth
*/
- new_back = vzalloc(new_len);
+ if (shadow)
+ new_back = vzalloc(new_len);
if (!new_back)
pr_info("No shadow/backing buffer allocated\n");
else {
@@ -1603,6 +1605,7 @@ static int dlfb_usb_probe(struct usb_interface *interface,
usbdev->descriptor.bcdDevice, dev);
pr_info("console enable=%d\n", console);
pr_info("fb_defio enable=%d\n", fb_defio);
+ pr_info("shadow enable=%d\n", shadow);
dev->sku_pixel_limit = 2048 * 1152; /* default to maximum */
@@ -1960,6 +1963,9 @@ MODULE_PARM_DESC(console, "Allow fbcon to consume first framebuffer found");
module_param(fb_defio, bool, S_IWUSR | S_IRUSR | S_IWGRP | S_IRGRP);
MODULE_PARM_DESC(fb_defio, "Enable fb_defio mmap support. *Experimental*");
+module_param(shadow, bool, S_IWUSR | S_IRUSR | S_IWGRP | S_IRGRP);
+MODULE_PARM_DESC(shadow, "Shadow vid mem. Disable to save mem but lose perf");
+
MODULE_AUTHOR("Roberto De Ioris <roberto@unbit.it>, "
"Jaya Kumar <jayakumar.lkml@gmail.com>, "
"Bernie Thompson <bernie@plugable.com>");
--
1.7.4.1
^ permalink raw reply related
* [PATCH 5/5] udlfb: Enable fb_defio by default
From: bernie @ 2011-08-02 5:54 UTC (permalink / raw)
To: linux-fbdev
From: Bernie Thompson <bernie@plugable.com>
Enables page fault based detection of mmap writes to the framebuffer,
which allows standard fbdev apps (like the generic fbdev xorg driver)
to work on DisplayLink devices.
Not all bugs are shaken out of the fb_defio path of udlfb, but it's
tantalizingly close, so this seems a good time to enable by default.
Alternatively, option can be disabled when running with an xorg driver
that can more directly communicate damaged regions of the framebuffer
via IOCTL. This is a simpler, higher perf option, when available.
Signed-off-by: Bernie Thompson <bernie@plugable.com>
---
Documentation/fb/udlfb.txt | 24 ++++++++++++++++--------
drivers/video/udlfb.c | 4 ++--
2 files changed, 18 insertions(+), 10 deletions(-)
diff --git a/Documentation/fb/udlfb.txt b/Documentation/fb/udlfb.txt
index 473ceed..c6d90a6 100644
--- a/Documentation/fb/udlfb.txt
+++ b/Documentation/fb/udlfb.txt
@@ -87,20 +87,28 @@ Special configuration for udlfb is usually unnecessary. There are a few
options, however.
From the command line, pass options to modprobe
-modprobe udlfb defio=1 console=1
+modprobe udlfb fb_defio=0 console=1 shadow=1
-Or for permanent option, create file like /etc/modprobe.d/options with text
-options udlfb defio=1 console=1
+Or modify options on the fly at /sys/module/udlfb/parameters directory via
+sudo nano fb_defio
+change the parameter in place, and save the file.
-Accepted options:
+Unplug/replug USB device to apply with new settings
+
+Or for permanent option, create file like /etc/modprobe.d/udlfb.conf with text
+options udlfb fb_defio=0 console=1 shadow=1
+
+Accepted boolean options:
fb_defio Make use of the fb_defio (CONFIG_FB_DEFERRED_IO) kernel
module to track changed areas of the framebuffer by page faults.
- Standard fbdev applications that use mmap but that do not
- report damage, may be able to work with this enabled.
- Disabled by default because of overhead and other issues.
+ Standard fbdev applications that use mmap but that do not
+ report damage, should be able to work with this enabled.
+ Disable when running with X server that supports reporting
+ changed regions via ioctl, as this method is simpler,
+ more stable, and higher performance.
-console Allow fbcon to attach to udlfb provided framebuffers. This
+console Allow fbcon to attach to udlfb provided framebuffers. This
is disabled by default because fbcon will aggressively consume
the first framebuffer it finds, which isn't usually what the
user wants in the case of USB displays.
diff --git a/drivers/video/udlfb.c b/drivers/video/udlfb.c
index 5a13dc5..5207bd2 100644
--- a/drivers/video/udlfb.c
+++ b/drivers/video/udlfb.c
@@ -71,7 +71,7 @@ MODULE_DEVICE_TABLE(usb, id_table);
/* module options */
static int console; /* Optionally allow fbcon to consume first framebuffer */
-static int fb_defio; /* Optionally enable experimental fb_defio mmap support */
+static int fb_defio = 1; /* Detect mmap writes using page faults */
static int shadow = 1; /* Optionally disable shadow framebuffer */
/* dlfb keeps a list of urbs for efficient bulk transfers */
@@ -1961,7 +1961,7 @@ module_param(console, bool, S_IWUSR | S_IRUSR | S_IWGRP | S_IRGRP);
MODULE_PARM_DESC(console, "Allow fbcon to consume first framebuffer found");
module_param(fb_defio, bool, S_IWUSR | S_IRUSR | S_IWGRP | S_IRGRP);
-MODULE_PARM_DESC(fb_defio, "Enable fb_defio mmap support. *Experimental*");
+MODULE_PARM_DESC(fb_defio, "Page fault detection of mmap writes");
module_param(shadow, bool, S_IWUSR | S_IRUSR | S_IWGRP | S_IRGRP);
MODULE_PARM_DESC(shadow, "Shadow vid mem. Disable to save mem but lose perf");
--
1.7.4.1
^ permalink raw reply related
* Re: [PATCHv2 16/28] OMAP3: HWMOD: Add DSS opt clocks
From: Tomi Valkeinen @ 2011-08-02 7:47 UTC (permalink / raw)
To: Paul Walmsley; +Cc: linux-omap, linux-fbdev, b-cousson, khilman
In-Reply-To: <alpine.DEB.2.00.1108011914280.28427@utopia.booyaka.com>
HI,
On Mon, 2011-08-01 at 19:27 -0600, Paul Walmsley wrote:
> Hello Tomi,
>
> On Fri, 15 Jul 2011, Paul Walmsley wrote:
>
> > On Thu, 9 Jun 2011, Tomi Valkeinen wrote:
> >
> > > Add DSS optional clocks to HWMOD data for OMAP3xxx.
> >
> > Thanks; queued for 3.1-rc fixes at git://git.pwsan.com/linux-2.6 in the
> > branch 'omap2_3_hwmod_dss_fixes_3.1rc'.
>
> This patch has been updated to remove the temporary hack added to the DSS
> driver. Care to review it before it's sent to Tony?
My hacks (for the OMAP2 case also) use the clocks from the clockdata,
thus fixing the hwmod data won't make the hacks break. So I think it's
cleaner if the HWMOD patches go separately through you, and I'll revert
the hacks in my tree.
But a few comments inline, which I noticed just now.
> - Paul
>
> From: Tomi Valkeinen <tomi.valkeinen@ti.com>
> Date: Fri, 15 Jul 2011 00:54:34 -0600
> Subject: [PATCH 2/2] OMAP3: HWMOD: Add DSS opt clocks
>
> Add DSS optional clocks to HWMOD data for OMAP3xxx.
>
> Revert OMAP3 portion of commit
> 9ede365aa6f74428a1f69c21ca1cf21213167576 ("HACK: OMAP: DSS2: clk hack
> for OMAP2/3").
>
> Cc: Benoit Cousson <b-cousson@ti.com>
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
> [paul@pwsan.com: remove temporary DSS driver hack; update changelog]
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> ---
> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 32 ++++++++++++++++++++++++---
> drivers/video/omap2/dss/dsi.c | 2 +-
> drivers/video/omap2/dss/dss.h | 2 -
> drivers/video/omap2/dss/rfbi.c | 5 +---
> drivers/video/omap2/dss/venc.c | 5 +---
> 5 files changed, 31 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> index 25bf43b..38ee033 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> @@ -1365,9 +1365,14 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = {
> };
>
> static struct omap_hwmod_opt_clk dss_opt_clks[] = {
> - { .role = "tv_clk", .clk = "dss_tv_fck" },
> - { .role = "video_clk", .clk = "dss_96m_fck" },
> + /*
> + * The rest of the clocks are not needed by the driver,
> + * but are needed by the hwmod to reset DSS properly.
> + */
I think this wording should be changed, as with the latest hwmod code
changes the dss_core does not use any opt clocks, and these all are just
to make the dss reset work.
Perhaps something like "The DSS HW needs all DSS clocks enabled during
reset. The dss_core driver does not use these clocks."
> { .role = "sys_clk", .clk = "dss2_alwon_fck" },
> + { .role = "tv_clk", .clk = "dss_tv_fck" },
> + /* required only on OMAP3430 */
> + { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
> };
The dss_96m_fck exists only on OMAP3430. What happens when the HWMOD
code tries to reset DSS on OMAP3630, and it first enables all the opt
clocks, and encounters the dss_96m_fck which doesn't exist?
Although, looking at the clock3xxx_data.c, it looks like dss_96m_fck is
there, but I'm not sure what it is controlling. Does the clock exist in
the HW, but it's just not connected to DSS?
The hwmod code should also set HWMOD_CONTROL_OPT_CLKS_IN_RESET for
dss_core, shouldn't it?
> static struct omap_hwmod omap3430es1_dss_core_hwmod = {
> @@ -1504,6 +1509,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = {
> &omap3xxx_l4_core__dss_dsi1,
> };
>
> +static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {
> + { .role = "sys_clk", .clk = "dss2_alwon_fck" },
> +};
> +
DSI is missing the interface clock in omap3xxx_l4_core__dss_dsi1. Should
it have .clk = "dss_ick" like the other dss modules?
I can make a new patch with these changes if they look correct to you.
Tomi
^ permalink raw reply
* Re: [PATCHv2 17/28] OMAP2420: HWMOD: Add DSS opt clocks
From: Tomi Valkeinen @ 2011-08-02 7:57 UTC (permalink / raw)
To: Paul Walmsley; +Cc: linux-omap, linux-fbdev, b-cousson, khilman
In-Reply-To: <alpine.DEB.2.00.1108011910410.28427@utopia.booyaka.com>
Hi,
On Mon, 2011-08-01 at 19:14 -0600, Paul Walmsley wrote:
> Hello Tomi
>
> On Fri, 15 Jul 2011, Paul Walmsley wrote:
>
> > On Thu, 9 Jun 2011, Tomi Valkeinen wrote:
> >
> > > Add DSS optional clocks to HWMOD data for OMAP2420.
>
> This patch has been combined with the 2430 patch and the OMAP2xxx portion
> of the temporary hack in the DSS driver has been removed. Care to review
> the new changes before it's sent to Tony?
Same thing here, I can revert the dss hacks separately.
>
> - Paul
>
>
> From: Tomi Valkeinen <tomi.valkeinen@ti.com>
> Date: Mon, 1 Aug 2011 19:02:23 -0600
> Subject: [PATCH 1/2] OMAP2xxx: HWMOD: Add DSS opt clocks
>
> Add DSS optional clocks to HWMOD data for OMAP2420 and OMAP2430.
>
> Revert OMAP2xxx portion of commit
> 9ede365aa6f74428a1f69c21ca1cf21213167576 ("HACK: OMAP: DSS2: clk hack
> for OMAP2/3").
>
> Cc: Benoit Cousson <b-cousson@ti.com>
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
> [paul@pwsan.com: merge 2420 and 2430 patches; remove temporary DSS driver hack;
> update changelog]
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> ---
> arch/arm/mach-omap2/omap_hwmod_2420_data.c | 17 ++++++++---------
> arch/arm/mach-omap2/omap_hwmod_2430_data.c | 17 ++++++++---------
> drivers/video/omap2/dss/rfbi.c | 2 +-
> 3 files changed, 17 insertions(+), 19 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> index a015c69..b075188 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> @@ -873,11 +873,6 @@ static struct omap_hwmod_ocp_if *omap2420_dss_slaves[] = {
> &omap2420_l4_core__dss,
> };
>
> -static struct omap_hwmod_opt_clk dss_opt_clks[] = {
> - { .role = "tv_clk", .clk = "dss_54m_fck" },
> - { .role = "sys_clk", .clk = "dss2_fck" },
> -};
I removed the opt clocks as the TRM doesn't say that the clocks need to
be enabled when resetting the DSS, but now thinking about it, I feel
it's safer to enable the clocks like we do on OMAP3. I think it's
unlikely that the HW could finish the reset if the clocks are off.
So let's forget this removal of dss opt clocks and add them back. And
also I think HWMOD_CONTROL_OPT_CLKS_IN_RESET is needed for dss_core.
I can make a new patch for this also.
Tomi
^ permalink raw reply
* Re: [PATCH 1/4] fbdev: sh_mobile_meram: Replace hardcoded register
From: Damian Hobson-Garcia @ 2011-08-02 8:43 UTC (permalink / raw)
To: linux-fbdev
Hi Laurent,
> -#define MExxCTL 0x0
> -#define MExxBSIZE 0x4
> -#define MExxMNCF 0x8
> -#define MExxSARA 0x10
> -#define MExxSARB 0x14
> -#define MExxSBSIZE 0x18
[snip]
> +#define MExxCTL 0x400
> +#define MExxBSIZE 0x404
> +#define MExxMNCF 0x408
> +#define MExxSARA 0x410
> +#define MExxSARB 0x414
> +#define MExxSBSIZE 0x418
One small comment on the definition of these register offsets and
explanation of what I was originally thinking. Since each of these
actually reprents a series of registers, one per ICB, (i.e. ME00CTL,
ME01CTL, etc.) it makes sense to me to represent them as an offset from
the base address (0x400) + the start of each ICB address (0x20 * index).
Other than that, looks great.
Thanks very much,
Damian
^ permalink raw reply
* [PATCH] OMAP: DSS2: Don't allow moving managers away from enabled displays
From: Daniel Morsing @ 2011-08-03 20:10 UTC (permalink / raw)
To: Tomi Valkeinen; +Cc: linux-omap, Daniel Morsing, linux-fbdev
If a manager is moved while attached to an enabled display, the DSS
system will be left in an inconsistent state. This will eventually cause
a kernel oops when the enabled display is disabled.
Fix this by not allowing the user to move a manager away from an enabled
display.
Signed-off-by: Daniel Morsing <daniel.morsing@gmail.com>
---
drivers/video/omap2/dss/manager.c | 7 +++++++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/video/omap2/dss/manager.c b/drivers/video/omap2/dss/manager.c
index 9aeea50..d3372d1 100644
--- a/drivers/video/omap2/dss/manager.c
+++ b/drivers/video/omap2/dss/manager.c
@@ -502,6 +502,13 @@ static int omap_dss_unset_device(struct omap_overlay_manager *mgr)
return -EINVAL;
}
+ /*
+ * Don't allow currently enabled displays to have the overlay manager
+ * pulled out from underneath them
+ */
+ if (mgr->device->state != OMAP_DSS_DISPLAY_DISABLED)
+ return -EINVAL;
+
mgr->device->manager = NULL;
mgr->device = NULL;
mgr->device_changed = true;
--
1.7.6
^ permalink raw reply related
* [PATCH] savagedb: Fix savage4 series video chip detection regression
From: John Stanley @ 2011-08-04 0:41 UTC (permalink / raw)
To: torvalds; +Cc: linux-kernel, adaplas, Andrew Morton, linux-fbdev
From: John Stanley <jpsinthemix@verizon.net>
savagedb: Fix typo causing regression in savage4 series video chip detection
Two additional savage4 variants were added, but the S3_SAVAGE4_SERIES
macro was incompletely modified, resulting in a false positive detection
of a savage4 card regardless of which savage card is actually present.
For non-savage4 series
cards, such as a Savage/IX-MV card, this results in garbled video and/or
a hard-hang at boot time. Fix this by changing an '||' to an '&&' in the
S3_SAVAGE4_SERIES macro.
Signed-off-by: John P. Stanley <jpsinthemix@verizon.net>
Reviewed-by: Tormod Volden <debian.tormod@gmail.com>
---
Specifically, prior to linux-3.0, there were two savage4 variants
(S3_SAVAGE4 and S3_PROSAVAGE). Hence, S3_SAVAGE4_SERIES was defined as
S3_SAVAGE4 or S3_PROSAVAGE
In linux-3.0, two additional savage4 variants (S3_TWISTER and
S3_PROSAVAGEDDR) have been added. Hence S3_SAVAGE4_SERIES should be
defined as
S3_SAVAGE4, S3_PROSAVAGE, S3_TWISTER, or S3_PROSAVAGEDDR
However, the #define macro for S3_SAVAGE4_SERIES was incompletely
updated: the '||' should have been changed to an '&&'.
--- linux-3.0.0/drivers/video/savage/savagefb.h.orig 2011-07-21
22:17:23.000000000 -0400
+++ linux-3.0.0/drivers/video/savage/savagefb.h 2011-07-31
05:27:47.314798215 -0400
@@ -55,7 +55,7 @@
#define S3_SAVAGE3D_SERIES(chip) ((chip>=S3_SAVAGE3D) &&
(chip<=S3_SAVAGE_MX))
-#define S3_SAVAGE4_SERIES(chip) ((chip>=S3_SAVAGE4) ||
(chip<=S3_PROSAVAGEDDR))
+#define S3_SAVAGE4_SERIES(chip) ((chip>=S3_SAVAGE4) &&
(chip<=S3_PROSAVAGEDDR))
#define S3_SAVAGE_MOBILE_SERIES(chip) ((chip=S3_SAVAGE_MX) ||
(chip=S3_SUPERSAVAGE))
^ permalink raw reply
* Re: [Bugme-new] [Bug 40492] New: FB_BACKLIGHT should be set by
From: Randy Dunlap @ 2011-08-04 0:55 UTC (permalink / raw)
To: linux-fbdev
On Wed, 3 Aug 2011 18:55:41 GMT bugzilla-daemon@bugzilla.kernel.org wrote:
> https://bugzilla.kernel.org/show_bug.cgi?id@492
>
> Summary: FB_BACKLIGHT should be set by BACKLIGHT_CLASS_DEVICE
> Product: Other
> Version: 2.5
> Kernel Version: 3.0.0
> Platform: All
> OS/Version: Linux
> Tree: Mainline
> Status: NEW
> Severity: normal
> Priority: P1
> Component: Configuration
> AssignedTo: other_configuration@kernel-bugs.osdl.org
> ReportedBy: StormByte@gmail.com
> Regression: No
>
>
> Created an attachment (idg432)
> --> (https://bugzilla.kernel.org/attachment.cgi?idg432)
> Kernel's config
>
> I discovered a scenario in which menuconfig fails to set FB_BACKLIGHT symbol
> when needed.
>
> In my case, I have propietary nvidia drivers once loaded Xorg, but in the
> meanwhile, I have configured an uvesafb framebuffer (thus, no other framebuffer
> active nor compiled).
>
> System works ok, but when trying to install nvidiabl[1] (to control nvidia's
> backlight) I find that FB_BACKLIGHT is not set where it should be because I
> have BACKLIGHT_CLASS_DEVICE set.
>
> The result is that nvidiabl does not compile.
>
> The workarround for this now is to enable as a modile any component with
> support for backlight [Nvidia Framebuffer (CONFIG_FB_NVIDIA), ATI Radeon
> display (CONFIG_FB_RADEON), etc...]
>
> I propose either enabling it automatically with CONFIG_BACKLIGHT_CLASS_DEVICE,
> or either having a separate option to allow it to be selected manually for
> external modules.
>
> I add an attachment of a kernel config showing this scenario with FB_BACKLIGHT
> not set nor any other framebuffer than uvesafb
>
> --
Any fbdev comments on this bug report?
---
~Randy
*** Remember to use Documentation/SubmitChecklist when testing your code ***
^ permalink raw reply
* Re: [Bugme-new] [Bug 40492] New: FB_BACKLIGHT should be set by
From: Michel Dänzer @ 2011-08-04 5:55 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <20110803175541.7ed2fb24.rdunlap@xenotime.net>
On Mit, 2011-08-03 at 17:55 -0700, Randy Dunlap wrote:
> On Wed, 3 Aug 2011 18:55:41 GMT bugzilla-daemon@bugzilla.kernel.org wrote:
>
> > https://bugzilla.kernel.org/show_bug.cgi?id@492
> >
> > Summary: FB_BACKLIGHT should be set by BACKLIGHT_CLASS_DEVICE
> > Product: Other
> > Version: 2.5
> > Kernel Version: 3.0.0
> > Platform: All
> > OS/Version: Linux
> > Tree: Mainline
> > Status: NEW
> > Severity: normal
> > Priority: P1
> > Component: Configuration
> > AssignedTo: other_configuration@kernel-bugs.osdl.org
> > ReportedBy: StormByte@gmail.com
> > Regression: No
> >
> >
> > Created an attachment (idg432)
> > --> (https://bugzilla.kernel.org/attachment.cgi?idg432)
> > Kernel's config
> >
> > I discovered a scenario in which menuconfig fails to set FB_BACKLIGHT symbol
> > when needed.
> >
> > In my case, I have propietary nvidia drivers once loaded Xorg, but in the
> > meanwhile, I have configured an uvesafb framebuffer (thus, no other framebuffer
> > active nor compiled).
> >
> > System works ok, but when trying to install nvidiabl[1] (to control nvidia's
> > backlight) I find that FB_BACKLIGHT is not set where it should be because I
> > have BACKLIGHT_CLASS_DEVICE set.
> >
> > The result is that nvidiabl does not compile.
Sounds like an nvidiabl bug. I'm successfully using backlight control
with radeon KMS with
# CONFIG_FB_BACKLIGHT is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=m
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Debian, X and DRI developer
^ permalink raw reply
* Re: [PATCH] OMAP: DSS2: Don't allow moving managers away from
From: Tomi Valkeinen @ 2011-08-04 8:08 UTC (permalink / raw)
To: Daniel Morsing; +Cc: linux-omap, linux-fbdev
In-Reply-To: <1312402251-31588-1-git-send-email-daniel.morsing@gmail.com>
On Wed, 2011-08-03 at 22:10 +0200, Daniel Morsing wrote:
> If a manager is moved while attached to an enabled display, the DSS
> system will be left in an inconsistent state. This will eventually cause
> a kernel oops when the enabled display is disabled.
>
> Fix this by not allowing the user to move a manager away from an enabled
> display.
Thanks, applying.
Tomi
^ permalink raw reply
* Re: [PATCH] OMAPFB: make debug message more useful
From: Tomi Valkeinen @ 2011-08-04 8:09 UTC (permalink / raw)
To: Andy Doan; +Cc: linux-fbdev, linux-omap
In-Reply-To: <1309972109-23778-1-git-send-email-andy.doan@linaro.org>
On Wed, 2011-07-06 at 12:08 -0500, Andy Doan wrote:
> Make the debug message useful by printing the name of the device
> that no associated driver could be found for.
>
> Signed-off-by: Andy Doan <andy.doan@linaro.org>
> ---
> drivers/video/omap2/omapfb/omapfb-main.c | 3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c
> index 602b71a..e5a64b3 100644
> --- a/drivers/video/omap2/omapfb/omapfb-main.c
> +++ b/drivers/video/omap2/omapfb/omapfb-main.c
> @@ -2373,7 +2373,8 @@ static int omapfb_probe(struct platform_device *pdev)
> omap_dss_get_device(dssdev);
>
> if (!dssdev->driver) {
> - dev_err(&pdev->dev, "no driver for display\n");
> + dev_err(&pdev->dev, "no driver for display: %s\n",
> + dssdev->name);
> r = -ENODEV;
> }
>
Thanks, applying.
Tomi
^ permalink raw reply
* Re: [Bugme-new] [Bug 40492] New: FB_BACKLIGHT should be set by BACKLIGHT_CLASS_DEVICE
From: David @ 2011-08-04 12:04 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <20110803175541.7ed2fb24.rdunlap@xenotime.net>
On Thursday 04 August 2011 07:55:16 you wrote:
> On Mit, 2011-08-03 at 17:55 -0700, Randy Dunlap wrote:
> > On Wed, 3 Aug 2011 18:55:41 GMT bugzilla-daemon@bugzilla.kernel.org wrote:
> > > https://bugzilla.kernel.org/show_bug.cgi?id@492
> > >
> > > Summary: FB_BACKLIGHT should be set by
> > > BACKLIGHT_CLASS_DEVICE Product: Other
> > > Version: 2.5
> > >
> > > Kernel Version: 3.0.0
> > >
> > > Platform: All
> > >
> > > OS/Version: Linux
> > >
> > > Tree: Mainline
> > >
> > > Status: NEW
> > >
> > > Severity: normal
> > > Priority: P1
> > >
> > > Component: Configuration
> > >
> > > AssignedTo: other_configuration@kernel-bugs.osdl.org
> > > ReportedBy: StormByte@gmail.com
> > > Regression: No
> > >
> > > Created an attachment (idg432)
> > >
> > > --> (https://bugzilla.kernel.org/attachment.cgi?idg432)
> > >
> > > Kernel's config
> > >
> > > I discovered a scenario in which menuconfig fails to set
> > > FB_BACKLIGHT symbol when needed.
> > >
> > > In my case, I have propietary nvidia drivers once loaded Xorg, but
> > > in the meanwhile, I have configured an uvesafb framebuffer (thus,
> > > no other framebuffer active nor compiled).
> > >
> > > System works ok, but when trying to install nvidiabl[1] (to control
> > > nvidia's backlight) I find that FB_BACKLIGHT is not set where it
> > > should be because I have BACKLIGHT_CLASS_DEVICE set.
> > >
> > > The result is that nvidiabl does not compile.
>
> Sounds like an nvidiabl bug. I'm successfully using backlight control
> with radeon KMS with
>
> # CONFIG_FB_BACKLIGHT is not set
> CONFIG_BACKLIGHT_CLASS_DEVICE=m
It does not seem a bug in nvidiabl, it needs this symbol in order to get 2
defines (from include/linux/fb.h)
394 #ifdef CONFIG_FB_BACKLIGHT
395 /* Settings for the generic backlight code */
396 #define FB_BACKLIGHT_LEVELS 128
397 #define FB_BACKLIGHT_MAX 0xFF
398 #endif
I think nvidiabl uses those instead of having them hardcoded in its source,
and thus not a bug really.
^ permalink raw reply
* Re: [Bugme-new] [Bug 40492] New: FB_BACKLIGHT should be set by
From: Michel Dänzer @ 2011-08-04 12:09 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <20110803175541.7ed2fb24.rdunlap@xenotime.net>
On Don, 2011-08-04 at 14:04 +0200, David wrote:
> On Thursday 04 August 2011 07:55:16 you wrote:
> > On Mit, 2011-08-03 at 17:55 -0700, Randy Dunlap wrote:
> > > On Wed, 3 Aug 2011 18:55:41 GMT bugzilla-daemon@bugzilla.kernel.org wrote:
> > > > https://bugzilla.kernel.org/show_bug.cgi?id@492
> > > >
> > > > Summary: FB_BACKLIGHT should be set by
> > > > BACKLIGHT_CLASS_DEVICE Product: Other
> > > > Version: 2.5
> > > >
> > > > Kernel Version: 3.0.0
> > > >
> > > > Platform: All
> > > >
> > > > OS/Version: Linux
> > > >
> > > > Tree: Mainline
> > > >
> > > > Status: NEW
> > > >
> > > > Severity: normal
> > > > Priority: P1
> > > >
> > > > Component: Configuration
> > > >
> > > > AssignedTo: other_configuration@kernel-bugs.osdl.org
> > > > ReportedBy: StormByte@gmail.com
> > > > Regression: No
> > > >
> > > > Created an attachment (idg432)
> > > >
> > > > --> (https://bugzilla.kernel.org/attachment.cgi?idg432)
> > > >
> > > > Kernel's config
> > > >
> > > > I discovered a scenario in which menuconfig fails to set
> > > > FB_BACKLIGHT symbol when needed.
> > > >
> > > > In my case, I have propietary nvidia drivers once loaded Xorg, but
> > > > in the meanwhile, I have configured an uvesafb framebuffer (thus,
> > > > no other framebuffer active nor compiled).
> > > >
> > > > System works ok, but when trying to install nvidiabl[1] (to control
> > > > nvidia's backlight) I find that FB_BACKLIGHT is not set where it
> > > > should be because I have BACKLIGHT_CLASS_DEVICE set.
> > > >
> > > > The result is that nvidiabl does not compile.
> >
> > Sounds like an nvidiabl bug. I'm successfully using backlight control
> > with radeon KMS with
> >
> > # CONFIG_FB_BACKLIGHT is not set
> > CONFIG_BACKLIGHT_CLASS_DEVICE=m
>
> It does not seem a bug in nvidiabl, it needs this symbol in order to get 2
> defines (from include/linux/fb.h)
> 394 #ifdef CONFIG_FB_BACKLIGHT
> 395 /* Settings for the generic backlight code */
> 396 #define FB_BACKLIGHT_LEVELS 128
> 397 #define FB_BACKLIGHT_MAX 0xFF
> 398 #endif
>
> I think nvidiabl uses those instead of having them hardcoded in its source,
> and thus not a bug really.
If those defines are relevant outside of CONFIG_FB_BACKLIGHT (radeon KMS
doesn't use them), they should probably be defined somewhere else.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Debian, X and DRI developer
^ permalink raw reply
* Re: [PATCH] ARM: OMAP2+ Add Primview dispalys to panel-generic
From: Tomi Valkeinen @ 2011-08-04 12:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1310122034-6561-1-git-send-email-j.weitzel@phytec.de>
Hi,
On Fri, 2011-07-08 at 12:47 +0200, Jan Weitzel wrote:
> Add displays to panel-generic-dpi.c
> Prime View PD035VL1 (640 x 480)
> Prime View PD050VL1 (640 x 480)
> Prime View PD104SLF (800 x 600)
> Prime View PM070WL4 (800 x 480)
Did you copy the acb and power_on/off_delay values from the sharp panel?
acbi and acb are not needed at all, and you should check if
power_on/off_delay are needed and if they are, what they should be.
Also, the first two panels look identical. While there's nothing wrong
with that, I wonder if could be a more generic "family" name for the
panels, and there would be need to define the timings only once.
Tomi
> Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
> ---
> drivers/video/omap2/displays/panel-generic-dpi.c | 100 ++++++++++++++++++++++
> 1 files changed, 100 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/video/omap2/displays/panel-generic-dpi.c b/drivers/video/omap2/displays/panel-generic-dpi.c
> index 9c90f75..87d9ba1 100644
> --- a/drivers/video/omap2/displays/panel-generic-dpi.c
> +++ b/drivers/video/omap2/displays/panel-generic-dpi.c
> @@ -232,6 +232,106 @@ static struct panel_config generic_dpi_panels[] = {
> .power_off_delay = 0,
> .name = "powertip_ph480272t",
> },
> +
> + /* Prime-View PD035VL1 */
> + {
> + {
> + .x_res = 640,
> + .y_res = 480,
> +
> + .pixel_clock = 25000,
> +
> + .hsw = 96,
> + .hfp = 18,
> + .hbp = 46,
> +
> + .vsw = 2,
> + .vfp = 10,
> + .vbp = 33,
> + },
> + .acbi = 0x0,
> + .acb = 0x28,
> + .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |
> + OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC,
> + .power_on_delay = 50,
> + .power_off_delay = 100,
> + .name = "pd035vl1",
> + },
> +
> + /* Prime-View PD050VL1 */
> + {
> + {
> + .x_res = 640,
> + .y_res = 480,
> +
> + .pixel_clock = 25000,
> +
> + .hsw = 96,
> + .hfp = 18,
> + .hbp = 46,
> +
> + .vsw = 2,
> + .vfp = 10,
> + .vbp = 33,
> + },
> + .acbi = 0x0,
> + .acb = 0x28,
> + .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |
> + OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC,
> + .power_on_delay = 50,
> + .power_off_delay = 100,
> + .name = "pd050vl1",
> + },
> +
> + /* Prime-View PM070WL4 */
> + {
> + {
> + .x_res = 800,
> + .y_res = 480,
> +
> + .pixel_clock = 32000,
> +
> + .hsw = 128,
> + .hfp = 42,
> + .hbp = 86,
> +
> + .vsw = 2,
> + .vfp = 10,
> + .vbp = 33,
> + },
> + .acbi = 0x0,
> + .acb = 0x28,
> + .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |
> + OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC,
> + .power_on_delay = 50,
> + .power_off_delay = 100,
> + .name = "pm070wl4",
> + },
> +
> + /* Prime-View PD104SLF */
> + {
> + {
> + .x_res = 800,
> + .y_res = 600,
> +
> + .pixel_clock = 40000,
> +
> + .hsw = 128,
> + .hfp = 42,
> + .hbp = 86,
> +
> + .vsw = 4,
> + .vfp = 1,
> + .vbp = 23,
> + },
> + .acbi = 0x0,
> + .acb = 0x28,
> + .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |
> + OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC,
> + .power_on_delay = 50,
> + .power_off_delay = 100,
> + .name = "pd104slf",
> + },
> };
>
> struct panel_drv_data {
^ permalink raw reply
* Re: [Bugme-new] [Bug 40492] New: FB_BACKLIGHT should be set by
From: Randy Dunlap @ 2011-08-04 15:46 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <20110803175541.7ed2fb24.rdunlap@xenotime.net>
On Thu, 04 Aug 2011 14:04:46 +0200 David wrote:
> On Thursday 04 August 2011 07:55:16 you wrote:
> > On Mit, 2011-08-03 at 17:55 -0700, Randy Dunlap wrote:
> > > On Wed, 3 Aug 2011 18:55:41 GMT bugzilla-daemon@bugzilla.kernel.org wrote:
> > > > https://bugzilla.kernel.org/show_bug.cgi?id@492
> > > >
> > > > Summary: FB_BACKLIGHT should be set by
> > > > BACKLIGHT_CLASS_DEVICE Product: Other
> > > > Version: 2.5
> > > >
> > > > Kernel Version: 3.0.0
> > > >
> > > > Platform: All
> > > >
> > > > OS/Version: Linux
> > > >
> > > > Tree: Mainline
> > > >
> > > > Status: NEW
> > > >
> > > > Severity: normal
> > > > Priority: P1
> > > >
> > > > Component: Configuration
> > > >
> > > > AssignedTo: other_configuration@kernel-bugs.osdl.org
> > > > ReportedBy: StormByte@gmail.com
> > > > Regression: No
> > > >
> > > > Created an attachment (idg432)
> > > >
> > > > --> (https://bugzilla.kernel.org/attachment.cgi?idg432)
> > > >
> > > > Kernel's config
> > > >
> > > > I discovered a scenario in which menuconfig fails to set
> > > > FB_BACKLIGHT symbol when needed.
> > > >
> > > > In my case, I have propietary nvidia drivers once loaded Xorg, but
> > > > in the meanwhile, I have configured an uvesafb framebuffer (thus,
> > > > no other framebuffer active nor compiled).
> > > >
> > > > System works ok, but when trying to install nvidiabl[1] (to control
> > > > nvidia's backlight) I find that FB_BACKLIGHT is not set where it
> > > > should be because I have BACKLIGHT_CLASS_DEVICE set.
> > > >
> > > > The result is that nvidiabl does not compile.
> >
> > Sounds like an nvidiabl bug. I'm successfully using backlight control
> > with radeon KMS with
> >
> > # CONFIG_FB_BACKLIGHT is not set
> > CONFIG_BACKLIGHT_CLASS_DEVICE=m
>
> It does not seem a bug in nvidiabl, it needs this symbol in order to get 2
> defines (from include/linux/fb.h)
> 394 #ifdef CONFIG_FB_BACKLIGHT
> 395 /* Settings for the generic backlight code */
> 396 #define FB_BACKLIGHT_LEVELS 128
> 397 #define FB_BACKLIGHT_MAX 0xFF
> 398 #endif
>
> I think nvidiabl uses those instead of having them hardcoded in its source,
> and thus not a bug really.
David,
You could propose a patch that makes those 2 defines not be conditional
on the CONFIB_FB_BACKLIGHT symbol.
Or you could propose a patch that makes the FB_BACKLIGHT symbol
user-configurable. Currently it is not user-configurable since it
does not have a prompt string. I think all it would take is
changing the "bool" line to include a prompt string and adding some
help text. Something like (not tested, probably needs some
wordsmithing):
config FB_BACKLIGHT
bool "Generic video backlight support"
depends on FB
select BACKLIGHT_LCD_SUPPORT
select BACKLIGHT_CLASS_DEVICE
default n
help
This option provides a little video backlight support.
Most drivers that need it enable it automatically.
---
~Randy
*** Remember to use Documentation/SubmitChecklist when testing your code ***
^ permalink raw reply
* [PATCH 1/6] viafb: use more compact modesetting functions
From: Florian Tobias Schandinat @ 2011-08-05 21:44 UTC (permalink / raw)
To: linux-fbdev; +Cc: linux-kernel, Florian Tobias Schandinat
In-Reply-To: <cover.1312578946.git.FlorianSchandinat@gmx.de>
This patch replaces the old timing setup code with a redesigned one.
The new code might be slightly faster as it has no conditinals and
does not write the same register multiple times. Also it makes the
comparison to the documentation easier.
Regressions are unlikely but could happen as a lot of hardware is
undocumented.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
---
drivers/video/via/hw.c | 296 +----------------------------------
drivers/video/via/hw.h | 273 --------------------------------
drivers/video/via/share.h | 19 +--
drivers/video/via/via_modesetting.c | 100 ++++++++++++
drivers/video/via/via_modesetting.h | 18 ++
5 files changed, 128 insertions(+), 578 deletions(-)
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 47b1353..372ce4f 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -191,67 +191,6 @@ static struct fetch_count fetch_count_reg = {
{IGA2_FETCH_COUNT_REG_NUM, {{CR65, 0, 7}, {CR67, 2, 3} } }
};
-static struct iga1_crtc_timing iga1_crtc_reg = {
- /* IGA1 Horizontal Total */
- {IGA1_HOR_TOTAL_REG_NUM, {{CR00, 0, 7}, {CR36, 3, 3} } },
- /* IGA1 Horizontal Addressable Video */
- {IGA1_HOR_ADDR_REG_NUM, {{CR01, 0, 7} } },
- /* IGA1 Horizontal Blank Start */
- {IGA1_HOR_BLANK_START_REG_NUM, {{CR02, 0, 7} } },
- /* IGA1 Horizontal Blank End */
- {IGA1_HOR_BLANK_END_REG_NUM,
- {{CR03, 0, 4}, {CR05, 7, 7}, {CR33, 5, 5} } },
- /* IGA1 Horizontal Sync Start */
- {IGA1_HOR_SYNC_START_REG_NUM, {{CR04, 0, 7}, {CR33, 4, 4} } },
- /* IGA1 Horizontal Sync End */
- {IGA1_HOR_SYNC_END_REG_NUM, {{CR05, 0, 4} } },
- /* IGA1 Vertical Total */
- {IGA1_VER_TOTAL_REG_NUM,
- {{CR06, 0, 7}, {CR07, 0, 0}, {CR07, 5, 5}, {CR35, 0, 0} } },
- /* IGA1 Vertical Addressable Video */
- {IGA1_VER_ADDR_REG_NUM,
- {{CR12, 0, 7}, {CR07, 1, 1}, {CR07, 6, 6}, {CR35, 2, 2} } },
- /* IGA1 Vertical Blank Start */
- {IGA1_VER_BLANK_START_REG_NUM,
- {{CR15, 0, 7}, {CR07, 3, 3}, {CR09, 5, 5}, {CR35, 3, 3} } },
- /* IGA1 Vertical Blank End */
- {IGA1_VER_BLANK_END_REG_NUM, {{CR16, 0, 7} } },
- /* IGA1 Vertical Sync Start */
- {IGA1_VER_SYNC_START_REG_NUM,
- {{CR10, 0, 7}, {CR07, 2, 2}, {CR07, 7, 7}, {CR35, 1, 1} } },
- /* IGA1 Vertical Sync End */
- {IGA1_VER_SYNC_END_REG_NUM, {{CR11, 0, 3} } }
-};
-
-static struct iga2_crtc_timing iga2_crtc_reg = {
- /* IGA2 Horizontal Total */
- {IGA2_HOR_TOTAL_REG_NUM, {{CR50, 0, 7}, {CR55, 0, 3} } },
- /* IGA2 Horizontal Addressable Video */
- {IGA2_HOR_ADDR_REG_NUM, {{CR51, 0, 7}, {CR55, 4, 6} } },
- /* IGA2 Horizontal Blank Start */
- {IGA2_HOR_BLANK_START_REG_NUM, {{CR52, 0, 7}, {CR54, 0, 2} } },
- /* IGA2 Horizontal Blank End */
- {IGA2_HOR_BLANK_END_REG_NUM,
- {{CR53, 0, 7}, {CR54, 3, 5}, {CR5D, 6, 6} } },
- /* IGA2 Horizontal Sync Start */
- {IGA2_HOR_SYNC_START_REG_NUM,
- {{CR56, 0, 7}, {CR54, 6, 7}, {CR5C, 7, 7}, {CR5D, 7, 7} } },
- /* IGA2 Horizontal Sync End */
- {IGA2_HOR_SYNC_END_REG_NUM, {{CR57, 0, 7}, {CR5C, 6, 6} } },
- /* IGA2 Vertical Total */
- {IGA2_VER_TOTAL_REG_NUM, {{CR58, 0, 7}, {CR5D, 0, 2} } },
- /* IGA2 Vertical Addressable Video */
- {IGA2_VER_ADDR_REG_NUM, {{CR59, 0, 7}, {CR5D, 3, 5} } },
- /* IGA2 Vertical Blank Start */
- {IGA2_VER_BLANK_START_REG_NUM, {{CR5A, 0, 7}, {CR5C, 0, 2} } },
- /* IGA2 Vertical Blank End */
- {IGA2_VER_BLANK_END_REG_NUM, {{CR5B, 0, 7}, {CR5C, 3, 5} } },
- /* IGA2 Vertical Sync Start */
- {IGA2_VER_SYNC_START_REG_NUM, {{CR5E, 0, 7}, {CR5F, 5, 7} } },
- /* IGA2 Vertical Sync End */
- {IGA2_VER_SYNC_END_REG_NUM, {{CR5F, 0, 4} } }
-};
-
static struct rgbLUT palLUT_table[] = {
/* {R,G,B} */
/* Index 0x00~0x03 */
@@ -1531,234 +1470,15 @@ void viafb_set_vclock(u32 clk, int set_iga)
void viafb_load_crtc_timing(struct display_timing device_timing,
int set_iga)
{
- int i;
- int viafb_load_reg_num = 0;
- int reg_value = 0;
- struct io_register *reg = NULL;
-
- viafb_unlock_crt();
-
- for (i = 0; i < 12; i++) {
- if (set_iga = IGA1) {
- switch (i) {
- case H_TOTAL_INDEX:
- reg_value - IGA1_HOR_TOTAL_FORMULA(device_timing.
- hor_total);
- viafb_load_reg_num - iga1_crtc_reg.hor_total.reg_num;
- reg = iga1_crtc_reg.hor_total.reg;
- break;
- case H_ADDR_INDEX:
- reg_value - IGA1_HOR_ADDR_FORMULA(device_timing.
- hor_addr);
- viafb_load_reg_num - iga1_crtc_reg.hor_addr.reg_num;
- reg = iga1_crtc_reg.hor_addr.reg;
- break;
- case H_BLANK_START_INDEX:
- reg_value - IGA1_HOR_BLANK_START_FORMULA
- (device_timing.hor_blank_start);
- viafb_load_reg_num - iga1_crtc_reg.hor_blank_start.reg_num;
- reg = iga1_crtc_reg.hor_blank_start.reg;
- break;
- case H_BLANK_END_INDEX:
- reg_value - IGA1_HOR_BLANK_END_FORMULA
- (device_timing.hor_blank_start,
- device_timing.hor_blank_end);
- viafb_load_reg_num - iga1_crtc_reg.hor_blank_end.reg_num;
- reg = iga1_crtc_reg.hor_blank_end.reg;
- break;
- case H_SYNC_START_INDEX:
- reg_value - IGA1_HOR_SYNC_START_FORMULA
- (device_timing.hor_sync_start);
- viafb_load_reg_num - iga1_crtc_reg.hor_sync_start.reg_num;
- reg = iga1_crtc_reg.hor_sync_start.reg;
- break;
- case H_SYNC_END_INDEX:
- reg_value - IGA1_HOR_SYNC_END_FORMULA
- (device_timing.hor_sync_start,
- device_timing.hor_sync_end);
- viafb_load_reg_num - iga1_crtc_reg.hor_sync_end.reg_num;
- reg = iga1_crtc_reg.hor_sync_end.reg;
- break;
- case V_TOTAL_INDEX:
- reg_value - IGA1_VER_TOTAL_FORMULA(device_timing.
- ver_total);
- viafb_load_reg_num - iga1_crtc_reg.ver_total.reg_num;
- reg = iga1_crtc_reg.ver_total.reg;
- break;
- case V_ADDR_INDEX:
- reg_value - IGA1_VER_ADDR_FORMULA(device_timing.
- ver_addr);
- viafb_load_reg_num - iga1_crtc_reg.ver_addr.reg_num;
- reg = iga1_crtc_reg.ver_addr.reg;
- break;
- case V_BLANK_START_INDEX:
- reg_value - IGA1_VER_BLANK_START_FORMULA
- (device_timing.ver_blank_start);
- viafb_load_reg_num - iga1_crtc_reg.ver_blank_start.reg_num;
- reg = iga1_crtc_reg.ver_blank_start.reg;
- break;
- case V_BLANK_END_INDEX:
- reg_value - IGA1_VER_BLANK_END_FORMULA
- (device_timing.ver_blank_start,
- device_timing.ver_blank_end);
- viafb_load_reg_num - iga1_crtc_reg.ver_blank_end.reg_num;
- reg = iga1_crtc_reg.ver_blank_end.reg;
- break;
- case V_SYNC_START_INDEX:
- reg_value - IGA1_VER_SYNC_START_FORMULA
- (device_timing.ver_sync_start);
- viafb_load_reg_num - iga1_crtc_reg.ver_sync_start.reg_num;
- reg = iga1_crtc_reg.ver_sync_start.reg;
- break;
- case V_SYNC_END_INDEX:
- reg_value - IGA1_VER_SYNC_END_FORMULA
- (device_timing.ver_sync_start,
- device_timing.ver_sync_end);
- viafb_load_reg_num - iga1_crtc_reg.ver_sync_end.reg_num;
- reg = iga1_crtc_reg.ver_sync_end.reg;
- break;
-
- }
- }
-
- if (set_iga = IGA2) {
- switch (i) {
- case H_TOTAL_INDEX:
- reg_value - IGA2_HOR_TOTAL_FORMULA(device_timing.
- hor_total);
- viafb_load_reg_num - iga2_crtc_reg.hor_total.reg_num;
- reg = iga2_crtc_reg.hor_total.reg;
- break;
- case H_ADDR_INDEX:
- reg_value - IGA2_HOR_ADDR_FORMULA(device_timing.
- hor_addr);
- viafb_load_reg_num - iga2_crtc_reg.hor_addr.reg_num;
- reg = iga2_crtc_reg.hor_addr.reg;
- break;
- case H_BLANK_START_INDEX:
- reg_value - IGA2_HOR_BLANK_START_FORMULA
- (device_timing.hor_blank_start);
- viafb_load_reg_num - iga2_crtc_reg.hor_blank_start.reg_num;
- reg = iga2_crtc_reg.hor_blank_start.reg;
- break;
- case H_BLANK_END_INDEX:
- reg_value - IGA2_HOR_BLANK_END_FORMULA
- (device_timing.hor_blank_start,
- device_timing.hor_blank_end);
- viafb_load_reg_num - iga2_crtc_reg.hor_blank_end.reg_num;
- reg = iga2_crtc_reg.hor_blank_end.reg;
- break;
- case H_SYNC_START_INDEX:
- reg_value - IGA2_HOR_SYNC_START_FORMULA
- (device_timing.hor_sync_start);
- if (UNICHROME_CN700 <- viaparinfo->chip_info->gfx_chip_name)
- viafb_load_reg_num - iga2_crtc_reg.hor_sync_start.
- reg_num;
- else
- viafb_load_reg_num = 3;
- reg = iga2_crtc_reg.hor_sync_start.reg;
- break;
- case H_SYNC_END_INDEX:
- reg_value - IGA2_HOR_SYNC_END_FORMULA
- (device_timing.hor_sync_start,
- device_timing.hor_sync_end);
- viafb_load_reg_num - iga2_crtc_reg.hor_sync_end.reg_num;
- reg = iga2_crtc_reg.hor_sync_end.reg;
- break;
- case V_TOTAL_INDEX:
- reg_value - IGA2_VER_TOTAL_FORMULA(device_timing.
- ver_total);
- viafb_load_reg_num - iga2_crtc_reg.ver_total.reg_num;
- reg = iga2_crtc_reg.ver_total.reg;
- break;
- case V_ADDR_INDEX:
- reg_value - IGA2_VER_ADDR_FORMULA(device_timing.
- ver_addr);
- viafb_load_reg_num - iga2_crtc_reg.ver_addr.reg_num;
- reg = iga2_crtc_reg.ver_addr.reg;
- break;
- case V_BLANK_START_INDEX:
- reg_value - IGA2_VER_BLANK_START_FORMULA
- (device_timing.ver_blank_start);
- viafb_load_reg_num - iga2_crtc_reg.ver_blank_start.reg_num;
- reg = iga2_crtc_reg.ver_blank_start.reg;
- break;
- case V_BLANK_END_INDEX:
- reg_value - IGA2_VER_BLANK_END_FORMULA
- (device_timing.ver_blank_start,
- device_timing.ver_blank_end);
- viafb_load_reg_num - iga2_crtc_reg.ver_blank_end.reg_num;
- reg = iga2_crtc_reg.ver_blank_end.reg;
- break;
- case V_SYNC_START_INDEX:
- reg_value - IGA2_VER_SYNC_START_FORMULA
- (device_timing.ver_sync_start);
- viafb_load_reg_num - iga2_crtc_reg.ver_sync_start.reg_num;
- reg = iga2_crtc_reg.ver_sync_start.reg;
- break;
- case V_SYNC_END_INDEX:
- reg_value - IGA2_VER_SYNC_END_FORMULA
- (device_timing.ver_sync_start,
- device_timing.ver_sync_end);
- viafb_load_reg_num - iga2_crtc_reg.ver_sync_end.reg_num;
- reg = iga2_crtc_reg.ver_sync_end.reg;
- break;
+ device_timing.hor_blank_end += device_timing.hor_blank_start;
+ device_timing.hor_sync_end += device_timing.hor_sync_start;
+ device_timing.ver_blank_end += device_timing.ver_blank_start;
+ device_timing.ver_sync_end += device_timing.ver_sync_start;
- }
- }
- viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR);
- }
-
- viafb_lock_crt();
+ if (set_iga = IGA1)
+ via_set_primary_timing(&device_timing);
+ else if (set_iga = IGA2)
+ via_set_secondary_timing(&device_timing);
}
void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h
index c7239eb..267c669 100644
--- a/drivers/video/via/hw.h
+++ b/drivers/video/via/hw.h
@@ -51,40 +51,6 @@
#define VIA_HSYNC_NEGATIVE 0x01
#define VIA_VSYNC_NEGATIVE 0x02
-/***************************************************
-* Definition IGA1 Design Method of CRTC Registers *
-****************************************************/
-#define IGA1_HOR_TOTAL_FORMULA(x) (((x)/8)-5)
-#define IGA1_HOR_ADDR_FORMULA(x) (((x)/8)-1)
-#define IGA1_HOR_BLANK_START_FORMULA(x) (((x)/8)-1)
-#define IGA1_HOR_BLANK_END_FORMULA(x, y) (((x+y)/8)-1)
-#define IGA1_HOR_SYNC_START_FORMULA(x) ((x)/8)
-#define IGA1_HOR_SYNC_END_FORMULA(x, y) ((x+y)/8)
-
-#define IGA1_VER_TOTAL_FORMULA(x) ((x)-2)
-#define IGA1_VER_ADDR_FORMULA(x) ((x)-1)
-#define IGA1_VER_BLANK_START_FORMULA(x) ((x)-1)
-#define IGA1_VER_BLANK_END_FORMULA(x, y) ((x+y)-1)
-#define IGA1_VER_SYNC_START_FORMULA(x) ((x)-1)
-#define IGA1_VER_SYNC_END_FORMULA(x, y) ((x+y)-1)
-
-/***************************************************
-** Definition IGA2 Design Method of CRTC Registers *
-****************************************************/
-#define IGA2_HOR_TOTAL_FORMULA(x) ((x)-1)
-#define IGA2_HOR_ADDR_FORMULA(x) ((x)-1)
-#define IGA2_HOR_BLANK_START_FORMULA(x) ((x)-1)
-#define IGA2_HOR_BLANK_END_FORMULA(x, y) ((x+y)-1)
-#define IGA2_HOR_SYNC_START_FORMULA(x) ((x)-1)
-#define IGA2_HOR_SYNC_END_FORMULA(x, y) ((x+y)-1)
-
-#define IGA2_VER_TOTAL_FORMULA(x) ((x)-1)
-#define IGA2_VER_ADDR_FORMULA(x) ((x)-1)
-#define IGA2_VER_BLANK_START_FORMULA(x) ((x)-1)
-#define IGA2_VER_BLANK_END_FORMULA(x, y) ((x+y)-1)
-#define IGA2_VER_SYNC_START_FORMULA(x) ((x)-1)
-#define IGA2_VER_SYNC_END_FORMULA(x, y) ((x+y)-1)
-
/**********************************************************/
/* Definition IGA2 Design Method of CRTC Shadow Registers */
/**********************************************************/
@@ -97,33 +63,6 @@
#define IGA2_VER_SYNC_START_SHADOW_FORMULA(x) (x)
#define IGA2_VER_SYNC_END_SHADOW_FORMULA(x, y) (x+y)
-/* Define Register Number for IGA1 CRTC Timing */
-
-/* location: {CR00,0,7},{CR36,3,3} */
-#define IGA1_HOR_TOTAL_REG_NUM 2
-/* location: {CR01,0,7} */
-#define IGA1_HOR_ADDR_REG_NUM 1
-/* location: {CR02,0,7} */
-#define IGA1_HOR_BLANK_START_REG_NUM 1
-/* location: {CR03,0,4},{CR05,7,7},{CR33,5,5} */
-#define IGA1_HOR_BLANK_END_REG_NUM 3
-/* location: {CR04,0,7},{CR33,4,4} */
-#define IGA1_HOR_SYNC_START_REG_NUM 2
-/* location: {CR05,0,4} */
-#define IGA1_HOR_SYNC_END_REG_NUM 1
-/* location: {CR06,0,7},{CR07,0,0},{CR07,5,5},{CR35,0,0} */
-#define IGA1_VER_TOTAL_REG_NUM 4
-/* location: {CR12,0,7},{CR07,1,1},{CR07,6,6},{CR35,2,2} */
-#define IGA1_VER_ADDR_REG_NUM 4
-/* location: {CR15,0,7},{CR07,3,3},{CR09,5,5},{CR35,3,3} */
-#define IGA1_VER_BLANK_START_REG_NUM 4
-/* location: {CR16,0,7} */
-#define IGA1_VER_BLANK_END_REG_NUM 1
-/* location: {CR10,0,7},{CR07,2,2},{CR07,7,7},{CR35,1,1} */
-#define IGA1_VER_SYNC_START_REG_NUM 4
-/* location: {CR11,0,3} */
-#define IGA1_VER_SYNC_END_REG_NUM 1
-
/* Define Register Number for IGA2 Shadow CRTC Timing */
/* location: {CR6D,0,7},{CR71,3,3} */
@@ -143,37 +82,6 @@
/* location: {CR76,0,3} */
#define IGA2_SHADOW_VER_SYNC_END_REG_NUM 1
-/* Define Register Number for IGA2 CRTC Timing */
-
-/* location: {CR50,0,7},{CR55,0,3} */
-#define IGA2_HOR_TOTAL_REG_NUM 2
-/* location: {CR51,0,7},{CR55,4,6} */
-#define IGA2_HOR_ADDR_REG_NUM 2
-/* location: {CR52,0,7},{CR54,0,2} */
-#define IGA2_HOR_BLANK_START_REG_NUM 2
-/* location: CLE266: {CR53,0,7},{CR54,3,5} => CLE266's CR5D[6]
-is reserved, so it may have problem to set 1600x1200 on IGA2. */
-/* Others: {CR53,0,7},{CR54,3,5},{CR5D,6,6} */
-#define IGA2_HOR_BLANK_END_REG_NUM 3
-/* location: {CR56,0,7},{CR54,6,7},{CR5C,7,7} */
-/* VT3314 and Later: {CR56,0,7},{CR54,6,7},{CR5C,7,7}, {CR5D,7,7} */
-#define IGA2_HOR_SYNC_START_REG_NUM 4
-
-/* location: {CR57,0,7},{CR5C,6,6} */
-#define IGA2_HOR_SYNC_END_REG_NUM 2
-/* location: {CR58,0,7},{CR5D,0,2} */
-#define IGA2_VER_TOTAL_REG_NUM 2
-/* location: {CR59,0,7},{CR5D,3,5} */
-#define IGA2_VER_ADDR_REG_NUM 2
-/* location: {CR5A,0,7},{CR5C,0,2} */
-#define IGA2_VER_BLANK_START_REG_NUM 2
-/* location: {CR5E,0,7},{CR5C,3,5} */
-#define IGA2_VER_BLANK_END_REG_NUM 2
-/* location: {CR5E,0,7},{CR5F,5,7} */
-#define IGA2_VER_SYNC_START_REG_NUM 2
-/* location: {CR5F,0,4} */
-#define IGA2_VER_SYNC_END_REG_NUM 1
-
/* Define Fetch Count Register*/
/* location: {SR1C,0,7},{SR1D,0,1} */
@@ -446,87 +354,12 @@ is reserved, so it may have problem to set 1600x1200 on IGA2. */
/* location: {CR78,0,7},{CR79,6,7} */
#define LCD_VER_SCALING_FACTOR_REG_NUM_CLE 2
-/************************************************
- ***** Define IGA1 Display Timing *****
- ************************************************/
struct io_register {
u8 io_addr;
u8 start_bit;
u8 end_bit;
};
-/* IGA1 Horizontal Total */
-struct iga1_hor_total {
- int reg_num;
- struct io_register reg[IGA1_HOR_TOTAL_REG_NUM];
-};
-
-/* IGA1 Horizontal Addressable Video */
-struct iga1_hor_addr {
- int reg_num;
- struct io_register reg[IGA1_HOR_ADDR_REG_NUM];
-};
-
-/* IGA1 Horizontal Blank Start */
-struct iga1_hor_blank_start {
- int reg_num;
- struct io_register reg[IGA1_HOR_BLANK_START_REG_NUM];
-};
-
-/* IGA1 Horizontal Blank End */
-struct iga1_hor_blank_end {
- int reg_num;
- struct io_register reg[IGA1_HOR_BLANK_END_REG_NUM];
-};
-
-/* IGA1 Horizontal Sync Start */
-struct iga1_hor_sync_start {
- int reg_num;
- struct io_register reg[IGA1_HOR_SYNC_START_REG_NUM];
-};
-
-/* IGA1 Horizontal Sync End */
-struct iga1_hor_sync_end {
- int reg_num;
- struct io_register reg[IGA1_HOR_SYNC_END_REG_NUM];
-};
-
-/* IGA1 Vertical Total */
-struct iga1_ver_total {
- int reg_num;
- struct io_register reg[IGA1_VER_TOTAL_REG_NUM];
-};
-
-/* IGA1 Vertical Addressable Video */
-struct iga1_ver_addr {
- int reg_num;
- struct io_register reg[IGA1_VER_ADDR_REG_NUM];
-};
-
-/* IGA1 Vertical Blank Start */
-struct iga1_ver_blank_start {
- int reg_num;
- struct io_register reg[IGA1_VER_BLANK_START_REG_NUM];
-};
-
-/* IGA1 Vertical Blank End */
-struct iga1_ver_blank_end {
- int reg_num;
- struct io_register reg[IGA1_VER_BLANK_END_REG_NUM];
-};
-
-/* IGA1 Vertical Sync Start */
-struct iga1_ver_sync_start {
- int reg_num;
- struct io_register reg[IGA1_VER_SYNC_START_REG_NUM];
-};
-
-/* IGA1 Vertical Sync End */
-struct iga1_ver_sync_end {
- int reg_num;
- struct io_register reg[IGA1_VER_SYNC_END_REG_NUM];
-};
-
/*****************************************************
** Define IGA2 Shadow Display Timing ****
*****************************************************/
@@ -579,82 +412,6 @@ struct iga2_shadow_ver_sync_end {
struct io_register reg[IGA2_SHADOW_VER_SYNC_END_REG_NUM];
};
-/*****************************************************
-** Define IGA2 Display Timing ****
-******************************************************/
-
-/* IGA2 Horizontal Total */
-struct iga2_hor_total {
- int reg_num;
- struct io_register reg[IGA2_HOR_TOTAL_REG_NUM];
-};
-
-/* IGA2 Horizontal Addressable Video */
-struct iga2_hor_addr {
- int reg_num;
- struct io_register reg[IGA2_HOR_ADDR_REG_NUM];
-};
-
-/* IGA2 Horizontal Blank Start */
-struct iga2_hor_blank_start {
- int reg_num;
- struct io_register reg[IGA2_HOR_BLANK_START_REG_NUM];
-};
-
-/* IGA2 Horizontal Blank End */
-struct iga2_hor_blank_end {
- int reg_num;
- struct io_register reg[IGA2_HOR_BLANK_END_REG_NUM];
-};
-
-/* IGA2 Horizontal Sync Start */
-struct iga2_hor_sync_start {
- int reg_num;
- struct io_register reg[IGA2_HOR_SYNC_START_REG_NUM];
-};
-
-/* IGA2 Horizontal Sync End */
-struct iga2_hor_sync_end {
- int reg_num;
- struct io_register reg[IGA2_HOR_SYNC_END_REG_NUM];
-};
-
-/* IGA2 Vertical Total */
-struct iga2_ver_total {
- int reg_num;
- struct io_register reg[IGA2_VER_TOTAL_REG_NUM];
-};
-
-/* IGA2 Vertical Addressable Video */
-struct iga2_ver_addr {
- int reg_num;
- struct io_register reg[IGA2_VER_ADDR_REG_NUM];
-};
-
-/* IGA2 Vertical Blank Start */
-struct iga2_ver_blank_start {
- int reg_num;
- struct io_register reg[IGA2_VER_BLANK_START_REG_NUM];
-};
-
-/* IGA2 Vertical Blank End */
-struct iga2_ver_blank_end {
- int reg_num;
- struct io_register reg[IGA2_VER_BLANK_END_REG_NUM];
-};
-
-/* IGA2 Vertical Sync Start */
-struct iga2_ver_sync_start {
- int reg_num;
- struct io_register reg[IGA2_VER_SYNC_START_REG_NUM];
-};
-
-/* IGA2 Vertical Sync End */
-struct iga2_ver_sync_end {
- int reg_num;
- struct io_register reg[IGA2_VER_SYNC_END_REG_NUM];
-};
-
/* IGA1 Fetch Count Register */
struct iga1_fetch_count {
int reg_num;
@@ -817,21 +574,6 @@ struct display_queue_expire_num {
iga2_display_queue_expire_num_reg;
};
-struct iga1_crtc_timing {
- struct iga1_hor_total hor_total;
- struct iga1_hor_addr hor_addr;
- struct iga1_hor_blank_start hor_blank_start;
- struct iga1_hor_blank_end hor_blank_end;
- struct iga1_hor_sync_start hor_sync_start;
- struct iga1_hor_sync_end hor_sync_end;
- struct iga1_ver_total ver_total;
- struct iga1_ver_addr ver_addr;
- struct iga1_ver_blank_start ver_blank_start;
- struct iga1_ver_blank_end ver_blank_end;
- struct iga1_ver_sync_start ver_sync_start;
- struct iga1_ver_sync_end ver_sync_end;
-};
-
struct iga2_shadow_crtc_timing {
struct iga2_shadow_hor_total hor_total_shadow;
struct iga2_shadow_hor_blank_end hor_blank_end_shadow;
@@ -843,21 +585,6 @@ struct iga2_shadow_crtc_timing {
struct iga2_shadow_ver_sync_end ver_sync_end_shadow;
};
-struct iga2_crtc_timing {
- struct iga2_hor_total hor_total;
- struct iga2_hor_addr hor_addr;
- struct iga2_hor_blank_start hor_blank_start;
- struct iga2_hor_blank_end hor_blank_end;
- struct iga2_hor_sync_start hor_sync_start;
- struct iga2_hor_sync_end hor_sync_end;
- struct iga2_ver_total ver_total;
- struct iga2_ver_addr ver_addr;
- struct iga2_ver_blank_start ver_blank_start;
- struct iga2_ver_blank_end ver_blank_end;
- struct iga2_ver_sync_start ver_sync_start;
- struct iga2_ver_sync_end ver_sync_end;
-};
-
/* device ID */
#define CLE266_FUNCTION3 0x3123
#define KM400_FUNCTION3 0x3205
diff --git a/drivers/video/via/share.h b/drivers/video/via/share.h
index 61b0bd5..2906b2d 100644
--- a/drivers/video/via/share.h
+++ b/drivers/video/via/share.h
@@ -22,6 +22,8 @@
#ifndef __SHARE_H__
#define __SHARE_H__
+#include "via_modesetting.h"
+
/* Define Bit Field */
#define BIT0 0x01
#define BIT1 0x02
@@ -648,23 +650,6 @@
#define LCD_OPENLDI 0x00
#define LCD_SPWG 0x01
-/* Define display timing
-*/
-struct display_timing {
- u16 hor_total;
- u16 hor_addr;
- u16 hor_blank_start;
- u16 hor_blank_end;
- u16 hor_sync_start;
- u16 hor_sync_end;
- u16 ver_total;
- u16 ver_addr;
- u16 ver_blank_start;
- u16 ver_blank_end;
- u16 ver_sync_start;
- u16 ver_sync_end;
-};
-
struct crt_mode_table {
int refresh_rate;
int h_sync_polarity;
diff --git a/drivers/video/via/via_modesetting.c b/drivers/video/via/via_modesetting.c
index 3cddcff..016d457 100644
--- a/drivers/video/via/via_modesetting.c
+++ b/drivers/video/via/via_modesetting.c
@@ -29,6 +29,106 @@
#include "share.h"
#include "debug.h"
+
+void via_set_primary_timing(const struct display_timing *timing)
+{
+ struct display_timing raw;
+
+ raw.hor_total = timing->hor_total / 8 - 5;
+ raw.hor_addr = timing->hor_addr / 8 - 1;
+ raw.hor_blank_start = timing->hor_blank_start / 8 - 1;
+ raw.hor_blank_end = timing->hor_blank_end / 8 - 1;
+ raw.hor_sync_start = timing->hor_sync_start / 8;
+ raw.hor_sync_end = timing->hor_sync_end / 8;
+ raw.ver_total = timing->ver_total - 2;
+ raw.ver_addr = timing->ver_addr - 1;
+ raw.ver_blank_start = timing->ver_blank_start - 1;
+ raw.ver_blank_end = timing->ver_blank_end - 1;
+ raw.ver_sync_start = timing->ver_sync_start - 1;
+ raw.ver_sync_end = timing->ver_sync_end - 1;
+
+ /* unlock timing registers */
+ via_write_reg_mask(VIACR, 0x11, 0x00, 0x80);
+
+ via_write_reg(VIACR, 0x00, raw.hor_total & 0xFF);
+ via_write_reg(VIACR, 0x01, raw.hor_addr & 0xFF);
+ via_write_reg(VIACR, 0x02, raw.hor_blank_start & 0xFF);
+ via_write_reg_mask(VIACR, 0x03, raw.hor_blank_end & 0x1F, 0x1F);
+ via_write_reg(VIACR, 0x04, raw.hor_sync_start & 0xFF);
+ via_write_reg_mask(VIACR, 0x05, (raw.hor_sync_end & 0x1F)
+ | (raw.hor_blank_end << (7 - 5) & 0x80), 0x9F);
+ via_write_reg(VIACR, 0x06, raw.ver_total & 0xFF);
+ via_write_reg_mask(VIACR, 0x07, (raw.ver_total >> 8 & 0x01)
+ | (raw.ver_addr >> (8 - 1) & 0x02)
+ | (raw.ver_sync_start >> (8 - 2) & 0x04)
+ | (raw.ver_blank_start >> (8 - 3) & 0x08)
+ | (raw.ver_total >> (9 - 5) & 0x20)
+ | (raw.ver_addr >> (9 - 6) & 0x40)
+ | (raw.ver_sync_start >> (9 - 7) & 0x80), 0xEF);
+ via_write_reg_mask(VIACR, 0x09, raw.ver_blank_start >> (9 - 5) & 0x20,
+ 0x20);
+ via_write_reg(VIACR, 0x10, raw.ver_sync_start & 0xFF);
+ via_write_reg_mask(VIACR, 0x11, raw.ver_sync_end & 0x0F, 0x0F);
+ via_write_reg(VIACR, 0x12, raw.ver_addr & 0xFF);
+ via_write_reg(VIACR, 0x15, raw.ver_blank_start & 0xFF);
+ via_write_reg(VIACR, 0x16, raw.ver_blank_end & 0xFF);
+ via_write_reg_mask(VIACR, 0x33, (raw.hor_sync_start >> (8 - 4) & 0x10)
+ | (raw.hor_blank_end >> (6 - 5) & 0x20), 0x30);
+ via_write_reg_mask(VIACR, 0x35, (raw.ver_total >> 10 & 0x01)
+ | (raw.ver_sync_start >> (10 - 1) & 0x02)
+ | (raw.ver_addr >> (10 - 2) & 0x04)
+ | (raw.ver_blank_start >> (10 - 3) & 0x08), 0x0F);
+ via_write_reg_mask(VIACR, 0x36, raw.hor_total >> (8 - 3) & 0x08, 0x08);
+
+ /* lock timing registers */
+ via_write_reg_mask(VIACR, 0x11, 0x80, 0x80);
+}
+
+void via_set_secondary_timing(const struct display_timing *timing)
+{
+ struct display_timing raw;
+
+ raw.hor_total = timing->hor_total - 1;
+ raw.hor_addr = timing->hor_addr - 1;
+ raw.hor_blank_start = timing->hor_blank_start - 1;
+ raw.hor_blank_end = timing->hor_blank_end - 1;
+ raw.hor_sync_start = timing->hor_sync_start - 1;
+ raw.hor_sync_end = timing->hor_sync_end - 1;
+ raw.ver_total = timing->ver_total - 1;
+ raw.ver_addr = timing->ver_addr - 1;
+ raw.ver_blank_start = timing->ver_blank_start - 1;
+ raw.ver_blank_end = timing->ver_blank_end - 1;
+ raw.ver_sync_start = timing->ver_sync_start - 1;
+ raw.ver_sync_end = timing->ver_sync_end - 1;
+
+ via_write_reg(VIACR, 0x50, raw.hor_total & 0xFF);
+ via_write_reg(VIACR, 0x51, raw.hor_addr & 0xFF);
+ via_write_reg(VIACR, 0x52, raw.hor_blank_start & 0xFF);
+ via_write_reg(VIACR, 0x53, raw.hor_blank_end & 0xFF);
+ via_write_reg(VIACR, 0x54, (raw.hor_blank_start >> 8 & 0x07)
+ | (raw.hor_blank_end >> (8 - 3) & 0x38)
+ | (raw.hor_sync_start >> (8 - 6) & 0xC0));
+ via_write_reg_mask(VIACR, 0x55, (raw.hor_total >> 8 & 0x0F)
+ | (raw.hor_addr >> (8 - 4) & 0x70), 0x7F);
+ via_write_reg(VIACR, 0x56, raw.hor_sync_start & 0xFF);
+ via_write_reg(VIACR, 0x57, raw.hor_sync_end & 0xFF);
+ via_write_reg(VIACR, 0x58, raw.ver_total & 0xFF);
+ via_write_reg(VIACR, 0x59, raw.ver_addr & 0xFF);
+ via_write_reg(VIACR, 0x5A, raw.ver_blank_start & 0xFF);
+ via_write_reg(VIACR, 0x5B, raw.ver_blank_end & 0xFF);
+ via_write_reg(VIACR, 0x5C, (raw.ver_blank_start >> 8 & 0x07)
+ | (raw.ver_blank_end >> (8 - 3) & 0x38)
+ | (raw.hor_sync_end >> (8 - 6) & 0x40)
+ | (raw.hor_sync_start >> (10 - 7) & 0x80));
+ via_write_reg(VIACR, 0x5D, (raw.ver_total >> 8 & 0x07)
+ | (raw.ver_addr >> (8 - 3) & 0x38)
+ | (raw.hor_blank_end >> (11 - 6) & 0x40)
+ | (raw.hor_sync_start >> (11 - 7) & 0x80));
+ via_write_reg(VIACR, 0x5E, raw.ver_sync_start & 0xFF);
+ via_write_reg(VIACR, 0x5F, (raw.ver_sync_end & 0x1F)
+ | (raw.ver_sync_start >> (8 - 5) & 0xE0));
+}
+
void via_set_primary_address(u32 addr)
{
DEBUG_MSG(KERN_DEBUG "via_set_primary_address(0x%08X)\n", addr);
diff --git a/drivers/video/via/via_modesetting.h b/drivers/video/via/via_modesetting.h
index 0138845..06e09fe 100644
--- a/drivers/video/via/via_modesetting.h
+++ b/drivers/video/via/via_modesetting.h
@@ -33,6 +33,24 @@
#define VIA_PITCH_MAX 0x3FF8
+struct display_timing {
+ u16 hor_total;
+ u16 hor_addr;
+ u16 hor_blank_start;
+ u16 hor_blank_end;
+ u16 hor_sync_start;
+ u16 hor_sync_end;
+ u16 ver_total;
+ u16 ver_addr;
+ u16 ver_blank_start;
+ u16 ver_blank_end;
+ u16 ver_sync_start;
+ u16 ver_sync_end;
+};
+
+
+void via_set_primary_timing(const struct display_timing *timing);
+void via_set_secondary_timing(const struct display_timing *timing);
void via_set_primary_address(u32 addr);
void via_set_secondary_address(u32 addr);
void via_set_primary_pitch(u32 pitch);
--
1.6.3.2
^ permalink raw reply related
* [PATCH 2/6] viafb: kill viafb_load_crtc_timing
From: Florian Tobias Schandinat @ 2011-08-05 21:45 UTC (permalink / raw)
To: linux-fbdev; +Cc: linux-kernel, Florian Tobias Schandinat
In-Reply-To: <cover.1312578946.git.FlorianSchandinat@gmx.de>
This patch replaces calls to viafb_load_crtc_timing with the code.
This should make it easier to fix the oddity that in the modetable
the blank and sync end entries contain the length and we need to add
the start values to get those to be written to the hardware.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
---
drivers/video/via/hw.c | 30 ++++++++----------------------
drivers/video/via/lcd.c | 41 +++++++++++++++++++----------------------
drivers/video/via/lcd.h | 2 --
3 files changed, 27 insertions(+), 46 deletions(-)
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 372ce4f..52d41f0 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -1467,20 +1467,6 @@ void viafb_set_vclock(u32 clk, int set_iga)
via_write_misc_reg_mask(0x0C, 0x0C); /* select external clock */
}
-void viafb_load_crtc_timing(struct display_timing device_timing,
- int set_iga)
-{
- device_timing.hor_blank_end += device_timing.hor_blank_start;
- device_timing.hor_sync_end += device_timing.hor_sync_start;
- device_timing.ver_blank_end += device_timing.ver_blank_start;
- device_timing.ver_sync_end += device_timing.ver_sync_start;
-
- if (set_iga = IGA1)
- via_set_primary_timing(&device_timing);
- else if (set_iga = IGA2)
- via_set_secondary_timing(&device_timing);
-}
-
void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
struct VideoModeTable *video_mode, int bpp_byte, int set_iga)
{
@@ -1515,6 +1501,10 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
crt_reg.hor_blank_end = crt_reg.hor_blank_end + 16;
}
+ crt_reg.hor_blank_end += crt_reg.hor_blank_start;
+ crt_reg.hor_sync_end += crt_reg.hor_sync_start;
+ crt_reg.ver_blank_end += crt_reg.ver_blank_start;
+ crt_reg.ver_sync_end += crt_reg.ver_sync_start;
h_addr = crt_reg.hor_addr;
v_addr = crt_reg.ver_addr;
if (set_iga = IGA1) {
@@ -1522,14 +1512,10 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);
}
- switch (set_iga) {
- case IGA1:
- viafb_load_crtc_timing(crt_reg, IGA1);
- break;
- case IGA2:
- viafb_load_crtc_timing(crt_reg, IGA2);
- break;
- }
+ if (set_iga = IGA1)
+ via_set_primary_timing(&crt_reg);
+ else if (set_iga = IGA2)
+ via_set_secondary_timing(&crt_reg);
viafb_lock_crt();
viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c
index 6e06981..0a38e4d 100644
--- a/drivers/video/via/lcd.c
+++ b/drivers/video/via/lcd.c
@@ -559,7 +559,7 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
int panel_hres = plvds_setting_info->lcd_panel_hres;
int panel_vres = plvds_setting_info->lcd_panel_vres;
u32 clock;
- struct display_timing mode_crt_reg, panel_crt_reg;
+ struct display_timing mode_crt_reg, panel_crt_reg, timing;
struct crt_mode_table *panel_crt_table = NULL;
struct VideoModeTable *vmode_tbl = viafb_get_mode(panel_hres,
panel_vres);
@@ -576,31 +576,28 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
clock = panel_crt_reg.hor_total * panel_crt_reg.ver_total
* panel_crt_table->refresh_rate;
plvds_setting_info->vclk = clock;
- if (set_iga = IGA1) {
- /* IGA1 doesn't have LCD scaling, so set it as centering. */
- viafb_load_crtc_timing(lcd_centering_timging
- (mode_crt_reg, panel_crt_reg), IGA1);
+
+ if (set_iga = IGA2 && (set_hres < panel_hres || set_vres < panel_vres)
+ && plvds_setting_info->display_method = LCD_EXPANDSION) {
+ timing = panel_crt_reg;
+ load_lcd_scaling(set_hres, set_vres, panel_hres, panel_vres);
} else {
- /* Expansion */
- if (plvds_setting_info->display_method = LCD_EXPANDSION
- && (set_hres < panel_hres || set_vres < panel_vres)) {
- /* expansion timing IGA2 loaded panel set timing*/
- viafb_load_crtc_timing(panel_crt_reg, IGA2);
- DEBUG_MSG(KERN_INFO "viafb_load_crtc_timing!!\n");
- load_lcd_scaling(set_hres, set_vres, panel_hres,
- panel_vres);
- DEBUG_MSG(KERN_INFO "load_lcd_scaling!!\n");
- } else { /* Centering */
- /* centering timing IGA2 always loaded panel
- and mode releative timing */
- viafb_load_crtc_timing(lcd_centering_timging
- (mode_crt_reg, panel_crt_reg), IGA2);
- viafb_write_reg_mask(CR79, VIACR, 0x00,
+ timing = lcd_centering_timging(mode_crt_reg, panel_crt_reg);
+ if (set_iga = IGA2)
+ /* disable scaling */
+ via_write_reg_mask(VIACR, 0x79, 0x00,
BIT0 + BIT1 + BIT2);
- /* LCD scaling disabled */
- }
}
+ timing.hor_blank_end += timing.hor_blank_start;
+ timing.hor_sync_end += timing.hor_sync_start;
+ timing.ver_blank_end += timing.ver_blank_start;
+ timing.ver_sync_end += timing.ver_sync_start;
+ if (set_iga = IGA1)
+ via_set_primary_timing(&timing);
+ else if (set_iga = IGA2)
+ via_set_secondary_timing(&timing);
+
/* Fetch count for IGA2 only */
viafb_load_fetch_count_reg(set_hres, mode_bpp / 8, set_iga);
diff --git a/drivers/video/via/lcd.h b/drivers/video/via/lcd.h
index 75f60a6..3b9e539 100644
--- a/drivers/video/via/lcd.h
+++ b/drivers/video/via/lcd.h
@@ -85,7 +85,5 @@ void viafb_init_lvds_output_interface(struct lvds_chip_information
struct lvds_setting_information
*plvds_setting_info);
bool viafb_lcd_get_mobile_state(bool *mobile);
-void viafb_load_crtc_timing(struct display_timing device_timing,
- int set_iga);
#endif /* __LCD_H__ */
--
1.6.3.2
^ permalink raw reply related
* [PATCH 3/6] viafb: remove superfluous register unlocking/locking
From: Florian Tobias Schandinat @ 2011-08-05 21:46 UTC (permalink / raw)
To: linux-fbdev; +Cc: linux-kernel, Florian Tobias Schandinat
In-Reply-To: <cover.1312578946.git.FlorianSchandinat@gmx.de>
The locking is done within the viafb_set_*_timing functions so there
is no need to do it here. Move a missing hardware reset into the
modesetting function.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
---
drivers/video/via/hw.c | 7 -------
drivers/video/via/via_modesetting.c | 4 ++++
2 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 52d41f0..8b4bdf5 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -1507,18 +1507,11 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
crt_reg.ver_sync_end += crt_reg.ver_sync_start;
h_addr = crt_reg.hor_addr;
v_addr = crt_reg.ver_addr;
- if (set_iga = IGA1) {
- viafb_unlock_crt();
- viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);
- }
-
if (set_iga = IGA1)
via_set_primary_timing(&crt_reg);
else if (set_iga = IGA2)
via_set_secondary_timing(&crt_reg);
- viafb_lock_crt();
- viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);
viafb_load_fetch_count_reg(h_addr, bpp_byte, set_iga);
/* load FIFO */
diff --git a/drivers/video/via/via_modesetting.c b/drivers/video/via/via_modesetting.c
index 016d457..0e431ae 100644
--- a/drivers/video/via/via_modesetting.c
+++ b/drivers/video/via/via_modesetting.c
@@ -82,6 +82,10 @@ void via_set_primary_timing(const struct display_timing *timing)
/* lock timing registers */
via_write_reg_mask(VIACR, 0x11, 0x80, 0x80);
+
+ /* reset timing control */
+ via_write_reg_mask(VIACR, 0x17, 0x00, 0x80);
+ via_write_reg_mask(VIACR, 0x17, 0x80, 0x80);
}
void via_set_secondary_timing(const struct display_timing *timing)
--
1.6.3.2
^ permalink raw reply related
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