* [PATCH 04/15] fbdev: sh_mipi_dsi: tidyup VMCTR2 parameter expression
From: Kuninori Morimoto @ 2011-11-09 4:34 UTC (permalink / raw)
To: linux-fbdev
VMCTR2 parameter will be supported more in the future.
1 << xx style is easy to understand.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/video/sh_mipi_dsi.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/sh_mipi_dsi.c b/drivers/video/sh_mipi_dsi.c
index 94bb1bb..20ccc23 100644
--- a/drivers/video/sh_mipi_dsi.c
+++ b/drivers/video/sh_mipi_dsi.c
@@ -317,9 +317,9 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
* HSA period allowed, no commands in LP
*/
if (pdata->flags & SH_MIPI_DSI_HSABM)
- vmctr2 |= 0x20;
+ vmctr2 |= 1 << 5;
if (pdata->flags & SH_MIPI_DSI_HBPBM)
- vmctr2 |= 0x10;
+ vmctr2 |= 1 << 4;
iowrite32(vmctr2, mipi->linkbase + VMCTR2);
/*
--
1.7.5.4
^ permalink raw reply related
* [PATCH 05/15] fbdev: sh_mipi_dsi: add SH_MIPI_DSI_HFPBM flag
From: Kuninori Morimoto @ 2011-11-09 4:34 UTC (permalink / raw)
To: linux-fbdev
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/video/sh_mipi_dsi.c | 2 ++
include/video/sh_mipi_dsi.h | 1 +
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/video/sh_mipi_dsi.c b/drivers/video/sh_mipi_dsi.c
index 20ccc23..c9fac13 100644
--- a/drivers/video/sh_mipi_dsi.c
+++ b/drivers/video/sh_mipi_dsi.c
@@ -320,6 +320,8 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
vmctr2 |= 1 << 5;
if (pdata->flags & SH_MIPI_DSI_HBPBM)
vmctr2 |= 1 << 4;
+ if (pdata->flags & SH_MIPI_DSI_HFPBM)
+ vmctr2 |= 1 << 3;
iowrite32(vmctr2, mipi->linkbase + VMCTR2);
/*
diff --git a/include/video/sh_mipi_dsi.h b/include/video/sh_mipi_dsi.h
index 4e2bcb5..86a72c0 100644
--- a/include/video/sh_mipi_dsi.h
+++ b/include/video/sh_mipi_dsi.h
@@ -29,6 +29,7 @@ struct sh_mobile_lcdc_chan_cfg;
#define SH_MIPI_DSI_HSABM (1 << 0)
#define SH_MIPI_DSI_HBPBM (1 << 1)
+#define SH_MIPI_DSI_HFPBM (1 << 2)
struct sh_mipi_dsi_info {
enum sh_mipi_dsi_data_fmt data_format;
--
1.7.5.4
^ permalink raw reply related
* [PATCH 06/15] fbdev: sh_mipi_dsi: add SH_MIPI_DSI_BL2E flag
From: Kuninori Morimoto @ 2011-11-09 4:34 UTC (permalink / raw)
To: linux-fbdev
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/video/sh_mipi_dsi.c | 2 ++
include/video/sh_mipi_dsi.h | 1 +
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/video/sh_mipi_dsi.c b/drivers/video/sh_mipi_dsi.c
index c9fac13..dfd5154 100644
--- a/drivers/video/sh_mipi_dsi.c
+++ b/drivers/video/sh_mipi_dsi.c
@@ -316,6 +316,8 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
* Non-burst mode with sync pulses: VSE and HSE are output,
* HSA period allowed, no commands in LP
*/
+ if (pdata->flags & SH_MIPI_DSI_BL2E)
+ vmctr2 |= 1 << 17;
if (pdata->flags & SH_MIPI_DSI_HSABM)
vmctr2 |= 1 << 5;
if (pdata->flags & SH_MIPI_DSI_HBPBM)
diff --git a/include/video/sh_mipi_dsi.h b/include/video/sh_mipi_dsi.h
index 86a72c0..58b78f8 100644
--- a/include/video/sh_mipi_dsi.h
+++ b/include/video/sh_mipi_dsi.h
@@ -30,6 +30,7 @@ struct sh_mobile_lcdc_chan_cfg;
#define SH_MIPI_DSI_HSABM (1 << 0)
#define SH_MIPI_DSI_HBPBM (1 << 1)
#define SH_MIPI_DSI_HFPBM (1 << 2)
+#define SH_MIPI_DSI_BL2E (1 << 3)
struct sh_mipi_dsi_info {
enum sh_mipi_dsi_data_fmt data_format;
--
1.7.5.4
^ permalink raw reply related
* [PATCH 07/15] fbdev: sh_mipi_dsi: add lane control support
From: Kuninori Morimoto @ 2011-11-09 4:34 UTC (permalink / raw)
To: linux-fbdev
SH MIPI DSI can use 0-4 lane
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
arch/arm/mach-shmobile/board-ag5evm.c | 1 +
arch/arm/mach-shmobile/board-ap4evb.c | 1 +
drivers/video/sh_mipi_dsi.c | 10 +++++++++-
include/video/sh_mipi_dsi.h | 1 +
4 files changed, 12 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 83624e2..dd3881a 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -324,6 +324,7 @@ static struct resource mipidsi0_resources[] = {
static struct sh_mipi_dsi_info mipidsi0_info = {
.data_format = MIPI_RGB888,
.lcd_chan = &lcdc0_info.ch[0],
+ .lane = 2,
.vsynw_offset = 20,
.clksrc = 1,
.flags = SH_MIPI_DSI_HSABM,
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index a3aa0f6..187d6fc 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -580,6 +580,7 @@ static struct resource mipidsi0_resources[] = {
static struct sh_mipi_dsi_info mipidsi0_info = {
.data_format = MIPI_RGB888,
.lcd_chan = &lcdc_info.ch[0],
+ .lane = 2,
.vsynw_offset = 17,
};
diff --git a/drivers/video/sh_mipi_dsi.c b/drivers/video/sh_mipi_dsi.c
index dfd5154..af6bec2 100644
--- a/drivers/video/sh_mipi_dsi.c
+++ b/drivers/video/sh_mipi_dsi.c
@@ -8,6 +8,7 @@
* published by the Free Software Foundation.
*/
+#include <linux/bitmap.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/init.h>
@@ -153,6 +154,7 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
struct sh_mobile_lcdc_chan_cfg *ch = pdata->lcd_chan;
u32 pctype, datatype, pixfmt, linelength, vmctr2 = 0x00e00000;
bool yuv;
+ u32 tmp;
/*
* Select data format. MIPI DSI is not hot-pluggable, so, we just use
@@ -253,6 +255,9 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
(!yuv && ch->interface_type != RGB24))
return -EINVAL;
+ if (!pdata->lane)
+ return -EINVAL;
+
/* reset DSI link */
iowrite32(0x00000001, base + SYSCTRL);
/* Hold reset for 100 cycles of the slowest of bus, HS byte and LP clock */
@@ -269,7 +274,10 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
* ECC check enable
* additionally enable first two lanes
*/
- iowrite32(0x00003703, base + SYSCONF);
+ bitmap_fill((unsigned long *)&tmp, pdata->lane);
+ tmp |= 0x00003700;
+ iowrite32(tmp, base + SYSCONF);
+
/*
* T_wakeup = 0x7000
* T_hs-trail = 3
diff --git a/include/video/sh_mipi_dsi.h b/include/video/sh_mipi_dsi.h
index 58b78f8..3d0ec50 100644
--- a/include/video/sh_mipi_dsi.h
+++ b/include/video/sh_mipi_dsi.h
@@ -35,6 +35,7 @@ struct sh_mobile_lcdc_chan_cfg;
struct sh_mipi_dsi_info {
enum sh_mipi_dsi_data_fmt data_format;
struct sh_mobile_lcdc_chan_cfg *lcd_chan;
+ int lane;
unsigned long flags;
u32 clksrc;
unsigned int vsynw_offset;
--
1.7.5.4
^ permalink raw reply related
* [PATCH 08/15] fbdev: sh_mipi_dsi: add sync_pulses/sync_events/burst mode
From: Kuninori Morimoto @ 2011-11-09 4:34 UTC (permalink / raw)
To: linux-fbdev
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
arch/arm/mach-shmobile/board-ag5evm.c | 3 ++-
arch/arm/mach-shmobile/board-ap4evb.c | 1 +
drivers/video/sh_mipi_dsi.c | 9 ++++++++-
include/video/sh_mipi_dsi.h | 9 +++++++++
4 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index dd3881a..0895671 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -327,7 +327,8 @@ static struct sh_mipi_dsi_info mipidsi0_info = {
.lane = 2,
.vsynw_offset = 20,
.clksrc = 1,
- .flags = SH_MIPI_DSI_HSABM,
+ .flags = SH_MIPI_DSI_HSABM |
+ SH_MIPI_DSI_SYNC_PULSES_MODE,
};
static struct platform_device mipidsi0_device = {
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 187d6fc..9b39e86 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -582,6 +582,7 @@ static struct sh_mipi_dsi_info mipidsi0_info = {
.lcd_chan = &lcdc_info.ch[0],
.lane = 2,
.vsynw_offset = 17,
+ .flags = SH_MIPI_DSI_SYNC_PULSES_MODE,
};
static struct platform_device mipidsi0_device = {
diff --git a/drivers/video/sh_mipi_dsi.c b/drivers/video/sh_mipi_dsi.c
index af6bec2..b8c4873 100644
--- a/drivers/video/sh_mipi_dsi.c
+++ b/drivers/video/sh_mipi_dsi.c
@@ -152,7 +152,7 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
{
void __iomem *base = mipi->base;
struct sh_mobile_lcdc_chan_cfg *ch = pdata->lcd_chan;
- u32 pctype, datatype, pixfmt, linelength, vmctr2 = 0x00e00000;
+ u32 pctype, datatype, pixfmt, linelength, vmctr2;
bool yuv;
u32 tmp;
@@ -324,6 +324,13 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
* Non-burst mode with sync pulses: VSE and HSE are output,
* HSA period allowed, no commands in LP
*/
+ vmctr2 = 0;
+ if (pdata->flags & SH_MIPI_DSI_VSEE)
+ vmctr2 |= 1 << 23;
+ if (pdata->flags & SH_MIPI_DSI_HSEE)
+ vmctr2 |= 1 << 22;
+ if (pdata->flags & SH_MIPI_DSI_HSAE)
+ vmctr2 |= 1 << 21;
if (pdata->flags & SH_MIPI_DSI_BL2E)
vmctr2 |= 1 << 17;
if (pdata->flags & SH_MIPI_DSI_HSABM)
diff --git a/include/video/sh_mipi_dsi.h b/include/video/sh_mipi_dsi.h
index 3d0ec50..c8225b4 100644
--- a/include/video/sh_mipi_dsi.h
+++ b/include/video/sh_mipi_dsi.h
@@ -31,6 +31,15 @@ struct sh_mobile_lcdc_chan_cfg;
#define SH_MIPI_DSI_HBPBM (1 << 1)
#define SH_MIPI_DSI_HFPBM (1 << 2)
#define SH_MIPI_DSI_BL2E (1 << 3)
+#define SH_MIPI_DSI_VSEE (1 << 4)
+#define SH_MIPI_DSI_HSEE (1 << 5)
+#define SH_MIPI_DSI_HSAE (1 << 6)
+
+#define SH_MIPI_DSI_SYNC_PULSES_MODE (SH_MIPI_DSI_VSEE | \
+ SH_MIPI_DSI_HSEE | \
+ SH_MIPI_DSI_HSAE)
+#define SH_MIPI_DSI_SYNC_EVENTS_MODE (0)
+#define SH_MIPI_DSI_SYNC_BURST_MODE (SH_MIPI_DSI_BL2E)
struct sh_mipi_dsi_info {
enum sh_mipi_dsi_data_fmt data_format;
--
1.7.5.4
^ permalink raw reply related
* [PATCH 09/15] fbdev: sh_mipi_dsi: add VMLEN1/VMLEN2 calculation
From: Kuninori Morimoto @ 2011-11-09 4:35 UTC (permalink / raw)
To: linux-fbdev
VMLEN1/VMLEN2 needs blanking length which is calculated from
video image size.
The calculation methods are explained on
[SH MIPI] - [Video Mode] - [Blanking Packet setting]
But HFPLEN (= VMLEN2) is un-understandable.
For example, if SH-MIPI input was RGB888 (3byte),
output was RGB888 (3byte)
and 3lane connection, the date goes straight.
But if SH-MIPI input was RGB888 (3byte),
output was RGB565 (2byte)
and 4lane connection, it needs delay in HFPLEN.
Then (input cycle - output cycle) * lane is necessary the delay
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/video/sh_mipi_dsi.c | 45 ++++++++++++++++++++++++++++++++++++++----
1 files changed, 40 insertions(+), 5 deletions(-)
diff --git a/drivers/video/sh_mipi_dsi.c b/drivers/video/sh_mipi_dsi.c
index b8c4873..190e941 100644
--- a/drivers/video/sh_mipi_dsi.c
+++ b/drivers/video/sh_mipi_dsi.c
@@ -42,6 +42,7 @@
#define VMCTR1 0x0020
#define VMCTR2 0x0024
#define VMLEN1 0x0028
+#define VMLEN2 0x002c
#define CMTSRTREQ 0x0070
#define CMTSRTCTR 0x00d0
@@ -153,8 +154,9 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
void __iomem *base = mipi->base;
struct sh_mobile_lcdc_chan_cfg *ch = pdata->lcd_chan;
u32 pctype, datatype, pixfmt, linelength, vmctr2;
+ u32 tmp, top, bottom, delay;
bool yuv;
- u32 tmp;
+ int bpp;
/*
* Select data format. MIPI DSI is not hot-pluggable, so, we just use
@@ -342,11 +344,44 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
iowrite32(vmctr2, mipi->linkbase + VMCTR2);
/*
- * 0x660 = 1632 bytes per line (RGB24, 544 pixels: see
- * sh_mobile_lcdc_info.ch[0].lcd_cfg[0].xres), HSALEN = 1 - default
- * (unused if VMCTR2[HSABM] = 0)
+ * VMLEN1 = RGBLEN | HSALEN
+ *
+ * see
+ * Video mode - Blanking Packet setting
*/
- iowrite32(1 | (linelength << 16), mipi->linkbase + VMLEN1);
+ top = linelength << 16; /* RGBLEN */
+ bottom = 0x00000001;
+ if (pdata->flags & SH_MIPI_DSI_HSABM) /* HSALEN */
+ bottom = (pdata->lane * ch->lcd_cfg[0].hsync_len) - 10;
+ iowrite32(top | bottom , mipi->linkbase + VMLEN1);
+
+ /*
+ * VMLEN2 = HBPLEN | HFPLEN
+ *
+ * see
+ * Video mode - Blanking Packet setting
+ */
+ top = 0x00010000;
+ bottom = 0x00000001;
+ delay = 0;
+
+ if (pdata->flags & SH_MIPI_DSI_HFPBM) { /* HBPLEN */
+ top = ch->lcd_cfg[0].hsync_len + ch->lcd_cfg[0].left_margin;
+ top = ((pdata->lane * top) - 10) << 16;
+ }
+ if (pdata->flags & SH_MIPI_DSI_HBPBM) { /* HFPLEN */
+ bottom = ch->lcd_cfg[0].right_margin;
+ bottom = (pdata->lane * bottom) - 12;
+ }
+
+ bpp = linelength / ch->lcd_cfg[0].xres; /* byte / pixel */
+ if (pdata->lane > bpp) {
+ tmp = ch->lcd_cfg[0].xres / bpp; /* output cycle */
+ tmp = ch->lcd_cfg[0].xres - tmp; /* (input - output) cycle */
+ delay = (pdata->lane * tmp);
+ }
+
+ iowrite32(top | (bottom + delay) , mipi->linkbase + VMLEN2);
msleep(5);
--
1.7.5.4
^ permalink raw reply related
* [PATCH 10/15] fbdev: sh_mipi_dsi: add set_dot_clock() for each platform
From: Kuninori Morimoto @ 2011-11-09 4:35 UTC (permalink / raw)
To: linux-fbdev
Dot clock of SH MIPI are depends on each platform board.
This patch adds set_dot_clock() function for it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
arch/arm/mach-shmobile/board-ag5evm.c | 36 ++++++++++++++++++++++---
arch/arm/mach-shmobile/board-ap4evb.c | 25 ++++++++++++++++++
drivers/video/sh_mipi_dsi.c | 45 ++++++++-------------------------
include/video/sh_mipi_dsi.h | 3 ++
4 files changed, 70 insertions(+), 39 deletions(-)
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 0895671..a0b7f8d 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -321,6 +321,36 @@ static struct resource mipidsi0_resources[] = {
},
};
+#define DSI0PHYCR 0xe615006c
+static int sh_mipi_set_dot_clock(struct platform_device *pdev,
+ void __iomem *base,
+ int enable)
+{
+ struct clk *pck;
+ int ret;
+
+ pck = clk_get(&pdev->dev, "dsip_clk");
+ if (IS_ERR(pck)) {
+ ret = PTR_ERR(pck);
+ goto sh_mipi_set_dot_clock_pck_err;
+ }
+
+ if (enable) {
+ clk_set_rate(pck, clk_round_rate(pck, 24000000));
+ __raw_writel(0x2a809010, DSI0PHYCR);
+ clk_enable(pck);
+ } else {
+ clk_disable(pck);
+ }
+
+ ret = 0;
+
+ clk_put(pck);
+
+sh_mipi_set_dot_clock_pck_err:
+ return ret;
+}
+
static struct sh_mipi_dsi_info mipidsi0_info = {
.data_format = MIPI_RGB888,
.lcd_chan = &lcdc0_info.ch[0],
@@ -329,6 +359,7 @@ static struct sh_mipi_dsi_info mipidsi0_info = {
.clksrc = 1,
.flags = SH_MIPI_DSI_HSABM |
SH_MIPI_DSI_SYNC_PULSES_MODE,
+ .set_dot_clock = sh_mipi_set_dot_clock,
};
static struct platform_device mipidsi0_device = {
@@ -476,8 +507,6 @@ static void __init ag5evm_map_io(void)
shmobile_setup_console();
}
-#define DSI0PHYCR 0xe615006c
-
static void __init ag5evm_init(void)
{
sh73a0_pinmux_init();
@@ -558,9 +587,6 @@ static void __init ag5evm_init(void)
gpio_direction_output(GPIO_PORT235, 0);
lcd_backlight_reset();
- /* MIPI-DSI clock setup */
- __raw_writel(0x2a809010, DSI0PHYCR);
-
/* enable SDHI0 on CN15 [SD I/F] */
gpio_request(GPIO_FN_SDHICD0, NULL);
gpio_request(GPIO_FN_SDHIWP0, NULL);
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 9b39e86..47f899b 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -564,6 +564,30 @@ static struct platform_device keysc_device = {
};
/* MIPI-DSI */
+#define PHYCTRL 0x0070
+static int sh_mipi_set_dot_clock(struct platform_device *pdev,
+ void __iomem *base,
+ int enable)
+{
+ struct clk *pck = clk_get(&pdev->dev, "dsip_clk");
+ void __iomem *phy = base + PHYCTRL;
+
+ if (IS_ERR(pck))
+ return PTR_ERR(pck);
+
+ if (enable) {
+ clk_set_rate(pck, clk_round_rate(pck, 24000000));
+ iowrite32(ioread32(phy) | (0xb << 8), phy);
+ clk_enable(pck);
+ } else {
+ clk_disable(pck);
+ }
+
+ clk_put(pck);
+
+ return 0;
+}
+
static struct resource mipidsi0_resources[] = {
[0] = {
.start = 0xffc60000,
@@ -583,6 +607,7 @@ static struct sh_mipi_dsi_info mipidsi0_info = {
.lane = 2,
.vsynw_offset = 17,
.flags = SH_MIPI_DSI_SYNC_PULSES_MODE,
+ .set_dot_clock = sh_mipi_set_dot_clock,
};
static struct platform_device mipidsi0_device = {
diff --git a/drivers/video/sh_mipi_dsi.c b/drivers/video/sh_mipi_dsi.c
index 190e941..77743f4 100644
--- a/drivers/video/sh_mipi_dsi.c
+++ b/drivers/video/sh_mipi_dsi.c
@@ -53,7 +53,6 @@ struct sh_mipi {
void __iomem *base;
void __iomem *linkbase;
struct clk *dsit_clk;
- struct clk *dsip_clk;
struct device *dev;
void *next_board_data;
@@ -307,8 +306,8 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
/* DSI-Tx bias on */
iowrite32(0x00000001, base + PHYCTRL);
udelay(200);
- /* Deassert resets, power on, set multiplier */
- iowrite32(0x03070b01, base + PHYCTRL);
+ /* Deassert resets, power on */
+ iowrite32(0x03070001, base + PHYCTRL);
/* setup l-bridge */
@@ -421,6 +420,9 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
if (!res || !res2 || idx >= ARRAY_SIZE(mipi_dsi) || !pdata)
return -ENODEV;
+ if (!pdata->set_dot_clock)
+ return -EINVAL;
+
mutex_lock(&array_lock);
if (idx < 0)
for (idx = 0; idx < ARRAY_SIZE(mipi_dsi) && mipi_dsi[idx]; idx++)
@@ -481,34 +483,10 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
dev_dbg(&pdev->dev, "DSI-T clk %lu -> %lu\n", f_current, rate);
- mipi->dsip_clk = clk_get(&pdev->dev, "dsip_clk");
- if (IS_ERR(mipi->dsip_clk)) {
- ret = PTR_ERR(mipi->dsip_clk);
- goto eclkpget;
- }
-
- f_current = clk_get_rate(mipi->dsip_clk);
- /* Between 10 and 50MHz */
- rate = clk_round_rate(mipi->dsip_clk, 24000000);
- if (rate > 0 && rate != f_current)
- ret = clk_set_rate(mipi->dsip_clk, rate);
- else
- ret = rate;
- if (ret < 0)
- goto esetprate;
-
- dev_dbg(&pdev->dev, "DSI-P clk %lu -> %lu\n", f_current, rate);
-
- msleep(10);
-
ret = clk_enable(mipi->dsit_clk);
if (ret < 0)
goto eclkton;
- ret = clk_enable(mipi->dsip_clk);
- if (ret < 0)
- goto eclkpon;
-
mipi_dsi[idx] = mipi;
pm_runtime_enable(&pdev->dev);
@@ -518,6 +496,10 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
if (ret < 0)
goto emipisetup;
+ ret = pdata->set_dot_clock(pdev, mipi->base, 1);
+ if (ret < 0)
+ goto emipisetup;
+
mutex_unlock(&array_lock);
platform_set_drvdata(pdev, mipi);
@@ -537,13 +519,8 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
emipisetup:
mipi_dsi[idx] = NULL;
pm_runtime_disable(&pdev->dev);
- clk_disable(mipi->dsip_clk);
-eclkpon:
clk_disable(mipi->dsit_clk);
eclkton:
-esetprate:
- clk_put(mipi->dsip_clk);
-eclkpget:
esettrate:
clk_put(mipi->dsit_clk);
eclktget:
@@ -594,10 +571,10 @@ static int __exit sh_mipi_remove(struct platform_device *pdev)
pdata->lcd_chan->board_cfg.board_data = NULL;
pm_runtime_disable(&pdev->dev);
- clk_disable(mipi->dsip_clk);
clk_disable(mipi->dsit_clk);
clk_put(mipi->dsit_clk);
- clk_put(mipi->dsip_clk);
+ pdata->set_dot_clock(pdev, mipi->base, 0);
+
iounmap(mipi->linkbase);
if (res2)
release_mem_region(res2->start, resource_size(res2));
diff --git a/include/video/sh_mipi_dsi.h b/include/video/sh_mipi_dsi.h
index c8225b4..310b883 100644
--- a/include/video/sh_mipi_dsi.h
+++ b/include/video/sh_mipi_dsi.h
@@ -48,6 +48,9 @@ struct sh_mipi_dsi_info {
unsigned long flags;
u32 clksrc;
unsigned int vsynw_offset;
+ int (*set_dot_clock)(struct platform_device *pdev,
+ void __iomem *base,
+ int enable);
};
#endif
--
1.7.5.4
^ permalink raw reply related
* [PATCH 11/15] fbdev: sh_mipi_dsi: add HSxxCLK support
From: Kuninori Morimoto @ 2011-11-09 4:35 UTC (permalink / raw)
To: linux-fbdev
SH MIPI manual explains the calculation method of HBP/HFP.
it is based on HSbyteCLK settings.
SH73a0 chip can use HS6divCLK/HS4divCLK for it.
This patch has compatibility to SH7372 mipi
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
arch/arm/mach-shmobile/board-ag5evm.c | 5 +++--
arch/arm/mach-shmobile/board-ap4evb.c | 3 ++-
drivers/video/sh_mipi_dsi.c | 14 ++++++++++----
include/video/sh_mipi_dsi.h | 4 ++++
4 files changed, 19 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index a0b7f8d..d109bed 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -357,8 +357,9 @@ static struct sh_mipi_dsi_info mipidsi0_info = {
.lane = 2,
.vsynw_offset = 20,
.clksrc = 1,
- .flags = SH_MIPI_DSI_HSABM |
- SH_MIPI_DSI_SYNC_PULSES_MODE,
+ .flags = SH_MIPI_DSI_HSABM |
+ SH_MIPI_DSI_SYNC_PULSES_MODE |
+ SH_MIPI_DSI_HSbyteCLK,
.set_dot_clock = sh_mipi_set_dot_clock,
};
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 47f899b..e677c72 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -606,7 +606,8 @@ static struct sh_mipi_dsi_info mipidsi0_info = {
.lcd_chan = &lcdc_info.ch[0],
.lane = 2,
.vsynw_offset = 17,
- .flags = SH_MIPI_DSI_SYNC_PULSES_MODE,
+ .flags = SH_MIPI_DSI_SYNC_PULSES_MODE |
+ SH_MIPI_DSI_HSbyteCLK,
.set_dot_clock = sh_mipi_set_dot_clock,
};
diff --git a/drivers/video/sh_mipi_dsi.c b/drivers/video/sh_mipi_dsi.c
index 77743f4..b8aea8c 100644
--- a/drivers/video/sh_mipi_dsi.c
+++ b/drivers/video/sh_mipi_dsi.c
@@ -153,7 +153,7 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
void __iomem *base = mipi->base;
struct sh_mobile_lcdc_chan_cfg *ch = pdata->lcd_chan;
u32 pctype, datatype, pixfmt, linelength, vmctr2;
- u32 tmp, top, bottom, delay;
+ u32 tmp, top, bottom, delay, div;
bool yuv;
int bpp;
@@ -364,17 +364,23 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
bottom = 0x00000001;
delay = 0;
+ div = 1; /* HSbyteCLK is calculation base
+ * HS4divCLK = HSbyteCLK/2
+ * HS6divCLK is not supported for now */
+ if (pdata->flags & SH_MIPI_DSI_HS4divCLK)
+ div = 2;
+
if (pdata->flags & SH_MIPI_DSI_HFPBM) { /* HBPLEN */
top = ch->lcd_cfg[0].hsync_len + ch->lcd_cfg[0].left_margin;
- top = ((pdata->lane * top) - 10) << 16;
+ top = ((pdata->lane * top / div) - 10) << 16;
}
if (pdata->flags & SH_MIPI_DSI_HBPBM) { /* HFPLEN */
bottom = ch->lcd_cfg[0].right_margin;
- bottom = (pdata->lane * bottom) - 12;
+ bottom = (pdata->lane * bottom / div) - 12;
}
bpp = linelength / ch->lcd_cfg[0].xres; /* byte / pixel */
- if (pdata->lane > bpp) {
+ if ((pdata->lane / div) > bpp) {
tmp = ch->lcd_cfg[0].xres / bpp; /* output cycle */
tmp = ch->lcd_cfg[0].xres - tmp; /* (input - output) cycle */
delay = (pdata->lane * tmp);
diff --git a/include/video/sh_mipi_dsi.h b/include/video/sh_mipi_dsi.h
index 310b883..434d56b 100644
--- a/include/video/sh_mipi_dsi.h
+++ b/include/video/sh_mipi_dsi.h
@@ -35,6 +35,10 @@ struct sh_mobile_lcdc_chan_cfg;
#define SH_MIPI_DSI_HSEE (1 << 5)
#define SH_MIPI_DSI_HSAE (1 << 6)
+#define SH_MIPI_DSI_HSbyteCLK (1 << 24)
+#define SH_MIPI_DSI_HS6divCLK (1 << 25)
+#define SH_MIPI_DSI_HS4divCLK (1 << 26)
+
#define SH_MIPI_DSI_SYNC_PULSES_MODE (SH_MIPI_DSI_VSEE | \
SH_MIPI_DSI_HSEE | \
SH_MIPI_DSI_HSAE)
--
1.7.5.4
^ permalink raw reply related
* [PATCH 12/15] fbdev: sh_mipi_dsi: sh_mipi has pdata instead of dev
From: Kuninori Morimoto @ 2011-11-09 4:35 UTC (permalink / raw)
To: linux-fbdev
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/video/sh_mipi_dsi.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/video/sh_mipi_dsi.c b/drivers/video/sh_mipi_dsi.c
index b8aea8c..7e46505 100644
--- a/drivers/video/sh_mipi_dsi.c
+++ b/drivers/video/sh_mipi_dsi.c
@@ -53,7 +53,7 @@ struct sh_mipi {
void __iomem *base;
void __iomem *linkbase;
struct clk *dsit_clk;
- struct device *dev;
+ struct platform_device *pdev;
void *next_board_data;
void (*next_display_on)(void *board_data, struct fb_info *info);
@@ -129,7 +129,7 @@ static void mipi_display_on(void *arg, struct fb_info *info)
{
struct sh_mipi *mipi = arg;
- pm_runtime_get_sync(mipi->dev);
+ pm_runtime_get_sync(&mipi->pdev->dev);
sh_mipi_dsi_enable(mipi, true);
if (mipi->next_display_on)
@@ -144,7 +144,7 @@ static void mipi_display_off(void *arg)
mipi->next_display_off(mipi->next_board_data);
sh_mipi_dsi_enable(mipi, false);
- pm_runtime_put(mipi->dev);
+ pm_runtime_put(&mipi->pdev->dev);
}
static int __init sh_mipi_setup(struct sh_mipi *mipi,
@@ -469,7 +469,7 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
goto emap2;
}
- mipi->dev = &pdev->dev;
+ mipi->pdev = pdev;
mipi->dsit_clk = clk_get(&pdev->dev, "dsit_clk");
if (IS_ERR(mipi->dsit_clk)) {
--
1.7.5.4
^ permalink raw reply related
* [PATCH 13/15] fbdev: sh_mipi_dsi: fixup setup timing of sh_mipi_setup()
From: Kuninori Morimoto @ 2011-11-09 4:35 UTC (permalink / raw)
To: linux-fbdev
sh_mipi_setup() should be called after setting of CPG
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/video/sh_mipi_dsi.c | 79 ++++++++++++++++++++++++-------------------
1 files changed, 44 insertions(+), 35 deletions(-)
diff --git a/drivers/video/sh_mipi_dsi.c b/drivers/video/sh_mipi_dsi.c
index 7e46505..f2c3f94 100644
--- a/drivers/video/sh_mipi_dsi.c
+++ b/drivers/video/sh_mipi_dsi.c
@@ -125,28 +125,6 @@ static void sh_mipi_shutdown(struct platform_device *pdev)
sh_mipi_dsi_enable(mipi, false);
}
-static void mipi_display_on(void *arg, struct fb_info *info)
-{
- struct sh_mipi *mipi = arg;
-
- pm_runtime_get_sync(&mipi->pdev->dev);
- sh_mipi_dsi_enable(mipi, true);
-
- if (mipi->next_display_on)
- mipi->next_display_on(mipi->next_board_data, info);
-}
-
-static void mipi_display_off(void *arg)
-{
- struct sh_mipi *mipi = arg;
-
- if (mipi->next_display_off)
- mipi->next_display_off(mipi->next_board_data);
-
- sh_mipi_dsi_enable(mipi, false);
- pm_runtime_put(&mipi->pdev->dev);
-}
-
static int __init sh_mipi_setup(struct sh_mipi *mipi,
struct sh_mipi_dsi_info *pdata)
{
@@ -414,6 +392,50 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
return 0;
}
+static void mipi_display_on(void *arg, struct fb_info *info)
+{
+ struct sh_mipi *mipi = arg;
+ struct sh_mipi_dsi_info *pdata = mipi->pdev->dev.platform_data;
+ int ret;
+
+ pm_runtime_get_sync(&mipi->pdev->dev);
+
+ ret = pdata->set_dot_clock(mipi->pdev, mipi->base, 1);
+ if (ret < 0)
+ goto mipi_display_on_fail1;
+
+ ret = sh_mipi_setup(mipi, pdata);
+ if (ret < 0)
+ goto mipi_display_on_fail2;
+
+ sh_mipi_dsi_enable(mipi, true);
+
+ if (mipi->next_display_on)
+ mipi->next_display_on(mipi->next_board_data, info);
+
+ return;
+
+mipi_display_on_fail1:
+ pm_runtime_put_sync(&mipi->pdev->dev);
+mipi_display_on_fail2:
+ pdata->set_dot_clock(mipi->pdev, mipi->base, 0);
+}
+
+static void mipi_display_off(void *arg)
+{
+ struct sh_mipi *mipi = arg;
+ struct sh_mipi_dsi_info *pdata = mipi->pdev->dev.platform_data;
+
+ if (mipi->next_display_off)
+ mipi->next_display_off(mipi->next_board_data);
+
+ sh_mipi_dsi_enable(mipi, false);
+
+ pdata->set_dot_clock(mipi->pdev, mipi->base, 0);
+
+ pm_runtime_put_sync(&mipi->pdev->dev);
+}
+
static int __init sh_mipi_probe(struct platform_device *pdev)
{
struct sh_mipi *mipi;
@@ -498,14 +520,6 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
pm_runtime_enable(&pdev->dev);
pm_runtime_resume(&pdev->dev);
- ret = sh_mipi_setup(mipi, pdata);
- if (ret < 0)
- goto emipisetup;
-
- ret = pdata->set_dot_clock(pdev, mipi->base, 1);
- if (ret < 0)
- goto emipisetup;
-
mutex_unlock(&array_lock);
platform_set_drvdata(pdev, mipi);
@@ -522,10 +536,6 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
return 0;
-emipisetup:
- mipi_dsi[idx] = NULL;
- pm_runtime_disable(&pdev->dev);
- clk_disable(mipi->dsit_clk);
eclkton:
esettrate:
clk_put(mipi->dsit_clk);
@@ -579,7 +589,6 @@ static int __exit sh_mipi_remove(struct platform_device *pdev)
pm_runtime_disable(&pdev->dev);
clk_disable(mipi->dsit_clk);
clk_put(mipi->dsit_clk);
- pdata->set_dot_clock(pdev, mipi->base, 0);
iounmap(mipi->linkbase);
if (res2)
--
1.7.5.4
^ permalink raw reply related
* [PATCH 14/15] fbdev: sh_mipi_dsi: fixup setup timing of SYSCONF
From: Kuninori Morimoto @ 2011-11-09 4:35 UTC (permalink / raw)
To: linux-fbdev
SYSCONF should be set after PHYCTRL
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/video/sh_mipi_dsi.c | 23 +++++++++++------------
1 files changed, 11 insertions(+), 12 deletions(-)
diff --git a/drivers/video/sh_mipi_dsi.c b/drivers/video/sh_mipi_dsi.c
index f2c3f94..187e127 100644
--- a/drivers/video/sh_mipi_dsi.c
+++ b/drivers/video/sh_mipi_dsi.c
@@ -246,18 +246,6 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
/* setup DSI link */
/*
- * Default = ULPS enable |
- * Contention detection enabled |
- * EoT packet transmission enable |
- * CRC check enable |
- * ECC check enable
- * additionally enable first two lanes
- */
- bitmap_fill((unsigned long *)&tmp, pdata->lane);
- tmp |= 0x00003700;
- iowrite32(tmp, base + SYSCONF);
-
- /*
* T_wakeup = 0x7000
* T_hs-trail = 3
* T_hs-prepare = 3
@@ -287,6 +275,17 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
/* Deassert resets, power on */
iowrite32(0x03070001, base + PHYCTRL);
+ /*
+ * Default = ULPS enable |
+ * Contention detection enabled |
+ * EoT packet transmission enable |
+ * CRC check enable |
+ * ECC check enable
+ */
+ bitmap_fill((unsigned long *)&tmp, pdata->lane);
+ tmp |= 0x00003700;
+ iowrite32(tmp, base + SYSCONF);
+
/* setup l-bridge */
/*
--
1.7.5.4
^ permalink raw reply related
* [PATCH 15/15] fbdev: sh_mipi_dsi: fixup setup timing DSICTRL
From: Kuninori Morimoto @ 2011-11-09 4:36 UTC (permalink / raw)
To: linux-fbdev
DSICTRL should be called after all mipi settings
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/video/sh_mipi_dsi.c | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/video/sh_mipi_dsi.c b/drivers/video/sh_mipi_dsi.c
index 187e127..05151b8 100644
--- a/drivers/video/sh_mipi_dsi.c
+++ b/drivers/video/sh_mipi_dsi.c
@@ -265,8 +265,6 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
iowrite32(0x0fffffff, base + TATOVSET);
/* Peripheral reset timeout, default 0xffffffff */
iowrite32(0x0fffffff, base + PRTOVSET);
- /* Enable timeout counters */
- iowrite32(0x00000f00, base + DSICTRL);
/* Interrupts not used, disable all */
iowrite32(0, base + DSIINTE);
/* DSI-Tx bias on */
@@ -388,6 +386,9 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
pixfmt << 4);
sh_mipi_dcs(ch->chan, MIPI_DCS_SET_DISPLAY_ON);
+ /* Enable timeout counters */
+ iowrite32(0x00000f00, base + DSICTRL);
+
return 0;
}
--
1.7.5.4
^ permalink raw reply related
* Re: [PATCH 09/18] MIPS: Alchemy: move au1200fb global functions to
From: Ralf Baechle @ 2011-11-09 14:52 UTC (permalink / raw)
To: Manuel Lauss; +Cc: Linux-MIPS, linux-fbdev
In-Reply-To: <1320174224-27305-10-git-send-email-manuel.lauss@googlemail.com>
No (n)ack or comments received, so I've queued this for 3.3. Thanks,
Ralf
^ permalink raw reply
* Re: [PATCH 0/15] fbdev: sh_mipi_dsi: care un-explained register settings
From: Florian Tobias Schandinat @ 2011-11-11 15:37 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <874nydc3vz.wl%kuninori.morimoto.gx@renesas.com>
Hi Guennadi, Magnus,
On 11/09/2011 04:32 AM, kuninori.morimoto.gx@renesas.com wrote:
> Dear Florian, Paul
>
> These are sh_mipi_dsi update patches.
>
> Kuninori Morimoto (15):
> fbdev: sh_mobile_lcdcfb: fixup LDHAJR :: HSYNPAJ needs mask
> fbdev: sh_mipi_dsi: tidyup dsip_clk
> fbdev: sh_mipi_dsi: typo fix of SH_MIPI_DSI_HBPBM
> fbdev: sh_mipi_dsi: tidyup VMCTR2 parameter expression
> fbdev: sh_mipi_dsi: add SH_MIPI_DSI_HFPBM flag
> fbdev: sh_mipi_dsi: add SH_MIPI_DSI_BL2E flag
> fbdev: sh_mipi_dsi: add lane control support
> fbdev: sh_mipi_dsi: add sync_pulses/sync_events/burst mode
> fbdev: sh_mipi_dsi: add VMLEN1/VMLEN2 calculation
> fbdev: sh_mipi_dsi: add set_dot_clock() for each platform
> fbdev: sh_mipi_dsi: add HSxxCLK support
> fbdev: sh_mipi_dsi: sh_mipi has pdata instead of dev
> fbdev: sh_mipi_dsi: fixup setup timing of sh_mipi_setup()
> fbdev: sh_mipi_dsi: fixup setup timing of SYSCONF
> fbdev: sh_mipi_dsi: fixup setup timing DSICTRL
can you have a look at these patches?
After a quick glance they look okay to me, but as this is all about hardware
(which I don't know) I'd be happier if someone more qualified could have a look
at it.
Thanks,
Florian Tobias Schandinat
> SH MIPI DSI has many registers, but some registers are not explained for detail in SH manual.
> This time, I asked it to Renesas MIPI guys.
> These patches include this result.
>
> for example, if your board is using AP5R chip,
> HS4divCLK is needed for 1920x1080p 60Hz output.
> But you can NOT find its explain and calculation method on AP5R manual.
>
> These are based on latest linus/master tree
>
>>> Paul
>
> Can you please check #2, #7, #8, #10, #11 pache which modify arch/arm/mach-shmobile/xxx
>
^ permalink raw reply
* Re: [RFC] drivers/video: fsl-diu-fb: combine several allocated buffers
From: Florian Tobias Schandinat @ 2011-11-11 16:15 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <1320793445-29562-1-git-send-email-timur@freescale.com>
On 11/08/2011 11:04 PM, Timur Tabi wrote:
> (Florian: this patch is the first of my changes for 3.3, but because it's
> so extensive, I wanted to get your feedback before I continue with the rest
> of my changes).
In general this looks good to me. Just keep in mind that multiple small patches
are preferred.
> The DIU driver allocates several different objects separately, many of
> which are accessed directly by the hardware and must be aligned on various
> boundaries. This results in multiple allocations and awkward data
> structures used to keep track of all the pointers and physical addresses.
>
> Instead, merge all of these objects into the fsl_diu_data structure, and
> enforce the alignment within the structure. Only one physical address
> needs to be remember, and a macro is used to calculate the physical
> address of any field. Frame buffers are still allocated separately,
> since their sizes vary with the resolutions.
The idea to merge multiple DMA objects sounds good. But I think you might want
to have a look at what you put in the DMA area. I think it would be better and
cleaner to put things that should be never accessed by the device, like
fsl_diu_info, irq, reg_lock and so on, in a separate structure.
> Documentation for some affected data structures and variables is added.
You could do this in an separate patch as it's independent of your idea to merge
the DMA objects. Well, I do not care very much in this case.
> The code assume that dma_alloc_coherent() will always return an aligned
> memory block. This function uses a page allocator on every architecture
> that has a DIU, so this is safe. The alternative is to allocate an extra
> 31 bytes that will never be used, and keep track of offsets that will
> always be zero. However, to be future-proof, we still validate the
> alignement.
Okay.
Best regards,
Florian Tobias Schandinat
>
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> drivers/video/fsl-diu-fb.c | 264 ++++++++++++++++++++------------------------
> 1 files changed, 118 insertions(+), 146 deletions(-)
>
> diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
> index a16beeb..68f24a5 100644
> --- a/drivers/video/fsl-diu-fb.c
> +++ b/drivers/video/fsl-diu-fb.c
> @@ -36,11 +36,9 @@
> #include <linux/fsl-diu-fb.h>
> #include "edid.h"
>
> -#define FSL_AOI_NUM 6 /* 5 AOIs and one dummy AOI */
> - /* 1 for plane 0, 2 for plane 1&2 each */
> +#define NUM_AOIS 5 /* 1 for plane 0, 2 for planes 1 & 2 each */
>
> -/* HW cursor parameters */
> -#define MAX_CURS 32
> +#define MAX_CURS 32 /* HW cursor is 32 * 32 pixels, 16 bpp */
>
> /* INT_STATUS/INT_MASK field descriptions */
> #define INT_VSYNC 0x01 /* Vsync interrupt */
> @@ -49,12 +47,6 @@
> #define INT_PARERR 0x08 /* Display parameters error interrupt */
> #define INT_LS_BF_VS 0x10 /* Lines before vsync. interrupt */
>
> -struct diu_addr {
> - void *vaddr; /* Virtual address */
> - dma_addr_t paddr; /* Physical address */
> - __u32 offset;
> -};
> -
> /*
> * List of supported video modes
> *
> @@ -330,22 +322,43 @@ static unsigned int d_cache_line_size;
>
> static DEFINE_SPINLOCK(diu_lock);
>
> +/**
> + * struct fsl_diu_data - per-DIU data structure
> + * @phys: physical address of this structure
> + * @fsl_diu_info: fb_info objects, one per AOI
> + * @dev_attr: sysfs structure
> + * @irq: IRQ
> + * @fb_enabled: TRUE if the DIU is enabled, FALSE if not
> + * @monitor_port: the monitor port this DIU is connected to
> + * @diu_reg: pointer to the DIU hardware registers
> + * @reg_lock: spinlock for register access
> + * @dummy_aoi: video buffer for the 4x4 32-bit dummy AOI
> + * dummy_ad: DIU Area Descriptor for the dummy AOI
> + * @ad[]: Area Descriptors for each real AOI
> + * @gamma: gamma color table
> + * @cursor: hardware cursor data
> + *
> + * This data structure must be allocated with 32-byte alignment, so that the
> + * internal fields can be aligned properly.
> + */
> struct fsl_diu_data {
> - struct fb_info *fsl_diu_info[FSL_AOI_NUM - 1];
> - /*FSL_AOI_NUM has one dummy AOI */
> + dma_addr_t phys;
> + struct fb_info *fsl_diu_info[NUM_AOIS];
> struct device_attribute dev_attr;
> - struct diu_ad *dummy_ad;
> - void *dummy_aoi_virt;
> unsigned int irq;
> int fb_enabled;
> enum fsl_diu_monitor_port monitor_port;
> struct diu __iomem *diu_reg;
> spinlock_t reg_lock;
> - struct diu_addr ad;
> - struct diu_addr gamma;
> - struct diu_addr pallete;
> - struct diu_addr cursor;
> -};
> + u8 dummy_aoi[4 * 4 * 4];
> + struct diu_ad dummy_ad __aligned(8);
> + struct diu_ad ad[NUM_AOIS] __aligned(8);
> + u8 gamma[256 * 3] __aligned(32);
> + u8 cursor[MAX_CURS * MAX_CURS * 2] __aligned(32);
> +} __aligned(32);
> +
> +/* Determine the physical address of a member of the fsl_diu_data structure */
> +#define PHYS_ADDR(p, f) ((p)->phys + offsetof(struct fsl_diu_data, f))
>
> enum mfb_index {
> PLANE0 = 0, /* Plane 0, only one AOI that fills the screen */
> @@ -355,6 +368,21 @@ enum mfb_index {
> PLANE2_AOI1, /* Plane 2, second AOI */
> };
>
> +/**
> + * struct mfb_info - per-AOI data structure
> + * @index: the AOI index
> + * @id: the name of this AOI
> + * @registered: TRUE = this framebuffer has been registed with fbdev
> + * @pseudo_palette: the pseudo-palette
> + * @ad: pointer to the Area Descriptor for this AOI
> + * @cursor_reset: unusued
> + * @g_alpha: the global alpha value, can be set by ioctl
> + * @count: the number of times this framebuffer has been opened
> + * @x_aoi_d: X-offset of the AOI. 0 is the left edge of the physical screen
> + * @y_aoi_d: Y-offset of the AOI. 0 is the top edge of the physical screen
> + * @parent: pointer to fsl_diu_data structure
> + * @edid_data: EDID data
> + */
> struct mfb_info {
> enum mfb_index index;
> char *id;
> @@ -364,8 +392,8 @@ struct mfb_info {
> int cursor_reset;
> unsigned char g_alpha;
> unsigned int count;
> - int x_aoi_d; /* aoi display x offset to physical screen */
> - int y_aoi_d; /* aoi display y offset to physical screen */
> + int x_aoi_d;
> + int y_aoi_d;
> struct fsl_diu_data *parent;
> u8 *edid_data;
> };
> @@ -528,7 +556,7 @@ static void fsl_diu_enable_panel(struct fb_info *info)
> case PLANE1_AOI1:
> pmfbi = machine_data->fsl_diu_info[1]->par;
> ad->next_ad = 0;
> - if (hw->desc[1] = machine_data->dummy_ad->paddr)
> + if (hw->desc[1] = machine_data->dummy_ad.paddr)
> wr_reg_wa(&hw->desc[1], ad->paddr);
> else /* AOI0 open */
> pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
> @@ -536,7 +564,7 @@ static void fsl_diu_enable_panel(struct fb_info *info)
> case PLANE2_AOI1:
> pmfbi = machine_data->fsl_diu_info[3]->par;
> ad->next_ad = 0;
> - if (hw->desc[2] = machine_data->dummy_ad->paddr)
> + if (hw->desc[2] = machine_data->dummy_ad.paddr)
> wr_reg_wa(&hw->desc[2], ad->paddr);
> else /* AOI0 was open */
> pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
> @@ -553,8 +581,8 @@ static void fsl_diu_disable_panel(struct fb_info *info)
>
> switch (mfbi->index) {
> case PLANE0:
> - if (hw->desc[0] != machine_data->dummy_ad->paddr)
> - wr_reg_wa(&hw->desc[0], machine_data->dummy_ad->paddr);
> + if (hw->desc[0] != machine_data->dummy_ad.paddr)
> + wr_reg_wa(&hw->desc[0], machine_data->dummy_ad.paddr);
> break;
> case PLANE1_AOI0:
> cmfbi = machine_data->fsl_diu_info[2]->par;
> @@ -562,7 +590,7 @@ static void fsl_diu_disable_panel(struct fb_info *info)
> wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr);
> /* move AOI1 to the first */
> else /* AOI1 was closed */
> - wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
> + wr_reg_wa(&hw->desc[1], machine_data->dummy_ad.paddr);
> /* close AOI 0 */
> break;
> case PLANE2_AOI0:
> @@ -571,7 +599,7 @@ static void fsl_diu_disable_panel(struct fb_info *info)
> wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr);
> /* move AOI1 to the first */
> else /* AOI1 was closed */
> - wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
> + wr_reg_wa(&hw->desc[2], machine_data->dummy_ad.paddr);
> /* close AOI 0 */
> break;
> case PLANE1_AOI1:
> @@ -582,7 +610,7 @@ static void fsl_diu_disable_panel(struct fb_info *info)
> /* AOI0 is open, must be the first */
> pmfbi->ad->next_ad = 0;
> } else /* AOI1 is the first in the chain */
> - wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
> + wr_reg_wa(&hw->desc[1], machine_data->dummy_ad.paddr);
> /* close AOI 1 */
> break;
> case PLANE2_AOI1:
> @@ -593,7 +621,7 @@ static void fsl_diu_disable_panel(struct fb_info *info)
> /* AOI0 is open, must be the first */
> pmfbi->ad->next_ad = 0;
> } else /* AOI1 is the first in the chain */
> - wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
> + wr_reg_wa(&hw->desc[2], machine_data->dummy_ad.paddr);
> /* close AOI 1 */
> break;
> }
> @@ -812,15 +840,15 @@ static void update_lcdc(struct fb_info *info)
> struct fsl_diu_data *machine_data = mfbi->parent;
> struct diu __iomem *hw;
> int i, j;
> - char __iomem *cursor_base, *gamma_table_base;
> + u8 *gamma_table_base;
>
> u32 temp;
>
> hw = machine_data->diu_reg;
>
> diu_ops.set_monitor_port(machine_data->monitor_port);
> - gamma_table_base = machine_data->gamma.vaddr;
> - cursor_base = machine_data->cursor.vaddr;
> + gamma_table_base = machine_data->gamma;
> +
> /* Prep for DIU init - gamma table, cursor table */
>
> for (i = 0; i <= 2; i++)
> @@ -828,14 +856,14 @@ static void update_lcdc(struct fb_info *info)
> *gamma_table_base++ = j;
>
> diu_ops.set_gamma_table(machine_data->monitor_port,
> - machine_data->gamma.vaddr);
> + machine_data->gamma);
>
> disable_lcdc(info);
>
> /* Program DIU registers */
>
> - out_be32(&hw->gamma, machine_data->gamma.paddr);
> - out_be32(&hw->cursor, machine_data->cursor.paddr);
> + out_be32(&hw->gamma, PHYS_ADDR(machine_data, gamma));
> + out_be32(&hw->cursor, PHYS_ADDR(machine_data, cursor));
>
> out_be32(&hw->bgnd, 0x007F7F7F); /* BGND */
> out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
> @@ -1423,37 +1451,6 @@ static int fsl_diu_resume(struct platform_device *ofdev)
> #define fsl_diu_resume NULL
> #endif /* CONFIG_PM */
>
> -/* Align to 64-bit(8-byte), 32-byte, etc. */
> -static int allocate_buf(struct device *dev, struct diu_addr *buf, u32 size,
> - u32 bytes_align)
> -{
> - u32 offset;
> - dma_addr_t mask;
> -
> - buf->vaddr > - dma_alloc_coherent(dev, size + bytes_align, &buf->paddr,
> - GFP_DMA | __GFP_ZERO);
> - if (!buf->vaddr)
> - return -ENOMEM;
> -
> - mask = bytes_align - 1;
> - offset = buf->paddr & mask;
> - if (offset) {
> - buf->offset = bytes_align - offset;
> - buf->paddr = buf->paddr + offset;
> - } else
> - buf->offset = 0;
> -
> - return 0;
> -}
> -
> -static void free_buf(struct device *dev, struct diu_addr *buf, u32 size,
> - u32 bytes_align)
> -{
> - dma_free_coherent(dev, size + bytes_align, buf->vaddr,
> - buf->paddr - buf->offset);
> -}
> -
> static ssize_t store_monitor(struct device *device,
> struct device_attribute *attr, const char *buf, size_t count)
> {
> @@ -1499,28 +1496,54 @@ static int __devinit fsl_diu_probe(struct platform_device *pdev)
> {
> struct device_node *np = pdev->dev.of_node;
> struct mfb_info *mfbi;
> - phys_addr_t dummy_ad_addr = 0;
> - int ret, i, error = 0;
> struct fsl_diu_data *machine_data;
> int diu_mode;
> + dma_addr_t phys_addr; /* physical addr of machine_data struct */
> + unsigned int i;
> + int ret;
>
> - machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL);
> + machine_data = dma_alloc_coherent(&pdev->dev,
> + sizeof(struct fsl_diu_data), &phys_addr, GFP_DMA | __GFP_ZERO);
> if (!machine_data)
> return -ENOMEM;
> + machine_data->phys = phys_addr;
> +
> + /*
> + * dma_alloc_coherent() uses a page allocator, so the address is
> + * always page-aligned. We need the memory to be 32-byte aligned,
> + * so that's good. However, if one day the allocator changes, we
> + * need to catch that. It's not worth the effort to handle unaligned
> + * alloctions now because it's highly unlikely to ever be a problem.
> + */
> + if ((unsigned long)machine_data & 31) {
> + dev_err(&pdev->dev, "misaligned allocation");
> + ret = -ENOMEM;
> + goto error;
> + }
>
> spin_lock_init(&machine_data->reg_lock);
>
> - for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
> + for (i = 0; i < NUM_AOIS; i++) {
> machine_data->fsl_diu_info[i] > framebuffer_alloc(sizeof(struct mfb_info), &pdev->dev);
> if (!machine_data->fsl_diu_info[i]) {
> dev_err(&pdev->dev, "cannot allocate memory\n");
> ret = -ENOMEM;
> - goto error2;
> + goto error;
> }
> + /*
> + * We store the physical address of the AD in the reserved
> + * 'paddr' field of the AD itself.
> + */
> + machine_data->ad[i].paddr = PHYS_ADDR(machine_data, ad[i]);
> +
> + machine_data->fsl_diu_info[i]->fix.smem_start = 0;
> +
> + /* Initialize the AOI data structure */
> mfbi = machine_data->fsl_diu_info[i]->par;
> memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
> mfbi->parent = machine_data;
> + mfbi->ad = &machine_data->ad[i];
>
> if (mfbi->index = PLANE0) {
> const u8 *prop;
> @@ -1538,7 +1561,7 @@ static int __devinit fsl_diu_probe(struct platform_device *pdev)
> if (!machine_data->diu_reg) {
> dev_err(&pdev->dev, "cannot map DIU registers\n");
> ret = -EFAULT;
> - goto error2;
> + goto error;
> }
>
> diu_mode = in_be32(&machine_data->diu_reg->diu_mode);
> @@ -1555,41 +1578,16 @@ static int __devinit fsl_diu_probe(struct platform_device *pdev)
> }
> machine_data->monitor_port = monitor_port;
>
> - /* Area descriptor memory pool aligns to 64-bit boundary */
> - if (allocate_buf(&pdev->dev, &machine_data->ad,
> - sizeof(struct diu_ad) * FSL_AOI_NUM, 8))
> - return -ENOMEM;
> -
> - /* Get memory for Gamma Table - 32-byte aligned memory */
> - if (allocate_buf(&pdev->dev, &machine_data->gamma, 768, 32)) {
> - ret = -ENOMEM;
> - goto error;
> - }
> -
> - /* For performance, cursor bitmap buffer aligns to 32-byte boundary */
> - if (allocate_buf(&pdev->dev, &machine_data->cursor,
> - MAX_CURS * MAX_CURS * 2, 32)) {
> - ret = -ENOMEM;
> - goto error;
> - }
> -
> - i = ARRAY_SIZE(machine_data->fsl_diu_info);
> - machine_data->dummy_ad = (struct diu_ad *)((u32)machine_data->ad.vaddr +
> - machine_data->ad.offset) + i;
> - machine_data->dummy_ad->paddr = machine_data->ad.paddr +
> - i * sizeof(struct diu_ad);
> - machine_data->dummy_aoi_virt = fsl_diu_alloc(64, &dummy_ad_addr);
> - if (!machine_data->dummy_aoi_virt) {
> - ret = -ENOMEM;
> - goto error;
> - }
> - machine_data->dummy_ad->addr = cpu_to_le32(dummy_ad_addr);
> - machine_data->dummy_ad->pix_fmt = 0x88882317;
> - machine_data->dummy_ad->src_size_g_alpha = cpu_to_le32((4 << 12) | 4);
> - machine_data->dummy_ad->aoi_size = cpu_to_le32((4 << 16) | 2);
> - machine_data->dummy_ad->offset_xyi = 0;
> - machine_data->dummy_ad->offset_xyd = 0;
> - machine_data->dummy_ad->next_ad = 0;
> + /* Initialize the dummy Area Descriptor */
> + machine_data->dummy_ad.addr > + cpu_to_le32(PHYS_ADDR(machine_data, dummy_aoi));
> + machine_data->dummy_ad.pix_fmt = 0x88882317;
> + machine_data->dummy_ad.src_size_g_alpha = cpu_to_le32((4 << 12) | 4);
> + machine_data->dummy_ad.aoi_size = cpu_to_le32((4 << 16) | 2);
> + machine_data->dummy_ad.offset_xyi = 0;
> + machine_data->dummy_ad.offset_xyd = 0;
> + machine_data->dummy_ad.next_ad = 0;
> + machine_data->dummy_ad.paddr = PHYS_ADDR(machine_data, dummy_ad);
>
> /*
> * Let DIU display splash screen if it was pre-initialized
> @@ -1597,18 +1595,12 @@ static int __devinit fsl_diu_probe(struct platform_device *pdev)
> */
> if (diu_mode = MFB_MODE0)
> out_be32(&machine_data->diu_reg->desc[0],
> - machine_data->dummy_ad->paddr);
> + machine_data->dummy_ad.paddr);
>
> - out_be32(&machine_data->diu_reg->desc[1], machine_data->dummy_ad->paddr);
> - out_be32(&machine_data->diu_reg->desc[2], machine_data->dummy_ad->paddr);
> + out_be32(&machine_data->diu_reg->desc[1], machine_data->dummy_ad.paddr);
> + out_be32(&machine_data->diu_reg->desc[2], machine_data->dummy_ad.paddr);
>
> - for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
> - machine_data->fsl_diu_info[i]->fix.smem_start = 0;
> - mfbi = machine_data->fsl_diu_info[i]->par;
> - mfbi->ad = (struct diu_ad *)((u32)machine_data->ad.vaddr
> - + machine_data->ad.offset) + i;
> - mfbi->ad->paddr > - machine_data->ad.paddr + i * sizeof(struct diu_ad);
> + for (i = 0; i < NUM_AOIS; i++) {
> ret = install_fb(machine_data->fsl_diu_info[i]);
> if (ret) {
> dev_err(&pdev->dev, "could not register fb %d\n", i);
> @@ -1626,9 +1618,8 @@ static int __devinit fsl_diu_probe(struct platform_device *pdev)
> machine_data->dev_attr.attr.mode = S_IRUGO|S_IWUSR;
> machine_data->dev_attr.show = show_monitor;
> machine_data->dev_attr.store = store_monitor;
> - error = device_create_file(machine_data->fsl_diu_info[0]->dev,
> - &machine_data->dev_attr);
> - if (error) {
> + ret = device_create_file(&pdev->dev, &machine_data->dev_attr);
> + if (ret) {
> dev_err(&pdev->dev, "could not create sysfs file %s\n",
> machine_data->dev_attr.attr.name);
> }
> @@ -1640,52 +1631,33 @@ error:
> for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
> uninstall_fb(machine_data->fsl_diu_info[i]);
>
> - if (machine_data->ad.vaddr)
> - free_buf(&pdev->dev, &machine_data->ad,
> - sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
> - if (machine_data->gamma.vaddr)
> - free_buf(&pdev->dev, &machine_data->gamma, 768, 32);
> - if (machine_data->cursor.vaddr)
> - free_buf(&pdev->dev, &machine_data->cursor,
> - MAX_CURS * MAX_CURS * 2, 32);
> - if (machine_data->dummy_aoi_virt)
> - fsl_diu_free(machine_data->dummy_aoi_virt, 64);
> iounmap(machine_data->diu_reg);
>
> -error2:
> for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
> if (machine_data->fsl_diu_info[i])
> framebuffer_release(machine_data->fsl_diu_info[i]);
> - kfree(machine_data);
> +
> + dma_free_coherent(&pdev->dev, sizeof(struct fsl_diu_data),
> + machine_data, machine_data->phys);
>
> return ret;
> }
>
> static int fsl_diu_remove(struct platform_device *pdev)
> {
> - struct fsl_diu_data *machine_data;
> - int i;
> + struct fsl_diu_data *machine_data = dev_get_drvdata(&pdev->dev);
> + unsigned int i;
>
> - machine_data = dev_get_drvdata(&pdev->dev);
> disable_lcdc(machine_data->fsl_diu_info[0]);
> free_irq_local(machine_data);
> for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
> uninstall_fb(machine_data->fsl_diu_info[i]);
> - if (machine_data->ad.vaddr)
> - free_buf(&pdev->dev, &machine_data->ad,
> - sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
> - if (machine_data->gamma.vaddr)
> - free_buf(&pdev->dev, &machine_data->gamma, 768, 32);
> - if (machine_data->cursor.vaddr)
> - free_buf(&pdev->dev, &machine_data->cursor,
> - MAX_CURS * MAX_CURS * 2, 32);
> - if (machine_data->dummy_aoi_virt)
> - fsl_diu_free(machine_data->dummy_aoi_virt, 64);
> iounmap(machine_data->diu_reg);
> for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
> if (machine_data->fsl_diu_info[i])
> framebuffer_release(machine_data->fsl_diu_info[i]);
> - kfree(machine_data);
> + dma_free_coherent(&pdev->dev, sizeof(struct fsl_diu_data),
> + machine_data, machine_data->phys);
>
> return 0;
> }
> --
> 1.7.3.4
>
>
>
^ permalink raw reply
* Re: [PATCH v3 0/3] fbdev: Add FOURCC-based format configuration API
From: Florian Tobias Schandinat @ 2011-11-11 16:31 UTC (permalink / raw)
To: Laurent Pinchart
Cc: linux-fbdev, linux-media, magnus.damm, Mauro Carvalho Chehab
In-Reply-To: <201109182249.39536.laurent.pinchart@ideasonboard.com>
On 09/18/2011 08:49 PM, Laurent Pinchart wrote:
>> As the second patch has nothing to do with fbdev it should go mainline via
>> V4L2. Any problems/comments?
>
> The NV24/42 patch will need to reach mainline before the sh_mobile_lcdc YUV
> API patch, or compilation will break.
>
> Mauro, what's your preference ? Should the patch go through the media tree ?
> If so, how should we synchronize it with the fbdev tree ? Should I push it to
> 3.2 ?
ping
What's going on? I could carry the patch but I'd want an Ack to do so.
Best regards,
Florian Tobias Schandinat
^ permalink raw reply
* Re: [RFC] drivers/video: fsl-diu-fb: combine several allocated
From: Tabi Timur-B04825 @ 2011-11-11 16:41 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <1320793445-29562-1-git-send-email-timur@freescale.com>
Florian Tobias Schandinat wrote:
> The idea to merge multiple DMA objects sounds good. But I think you might want
> to have a look at what you put in the DMA area. I think it would be better and
> cleaner to put things that should be never accessed by the device, like
> fsl_diu_info, irq, reg_lock and so on, in a separate structure.
Hmmm... you have a valid point, but I'm not keen on the idea of having two
memory blocks. I was even hoping to put mfb_info objects in fsl_diu_info,
but framebuffer_alloc() won't let me.
>> Documentation for some affected data structures and variables is added.
>
> You could do this in an separate patch as it's independent of your idea to merge
> the DMA objects. Well, I do not care very much in this case.
I can split it out. It will give me the chance to add even more
documentation.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCH v3 0/3] fbdev: Add FOURCC-based format configuration API
From: Mauro Carvalho Chehab @ 2011-11-11 18:41 UTC (permalink / raw)
To: Florian Tobias Schandinat
Cc: Laurent Pinchart, linux-fbdev, linux-media, magnus.damm
In-Reply-To: <4EBD4DD1.7030809@gmx.de>
Em 11-11-2011 14:31, Florian Tobias Schandinat escreveu:
> On 09/18/2011 08:49 PM, Laurent Pinchart wrote:
>>> As the second patch has nothing to do with fbdev it should go mainline via
>>> V4L2. Any problems/comments?
>>
>> The NV24/42 patch will need to reach mainline before the sh_mobile_lcdc YUV
>> API patch, or compilation will break.
>>
>> Mauro, what's your preference ? Should the patch go through the media tree ?
>> If so, how should we synchronize it with the fbdev tree ? Should I push it to
>> 3.2 ?
>
> ping
>
> What's going on? I could carry the patch but I'd want an Ack to do so.
I think I had answered it before, on some previous version. I'm OK if you merge
it via your tree.
Just replied to the patch with my ACK.
>
>
> Best regards,
>
> Florian Tobias Schandinat
^ permalink raw reply
* Re: [PATCH v3 2/3] v4l: Add V4L2_PIX_FMT_NV24 and V4L2_PIX_FMT_NV42
From: Mauro Carvalho Chehab @ 2011-11-11 18:41 UTC (permalink / raw)
To: Laurent Pinchart; +Cc: linux-fbdev, linux-media, magnus.damm
In-Reply-To: <1314789501-824-3-git-send-email-laurent.pinchart@ideasonboard.com>
Em 31-08-2011 08:18, Laurent Pinchart escreveu:
> NV24 and NV42 are planar YCbCr 4:4:4 and YCrCb 4:4:4 formats with a
> luma plane followed by an interleaved chroma plane.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Mauro Carvalho Chehab <mchehab@redhat.com>
> ---
> Documentation/DocBook/media/v4l/pixfmt-nv24.xml | 129 +++++++++++++++++++++++
> Documentation/DocBook/media/v4l/pixfmt.xml | 1 +
> include/linux/videodev2.h | 2 +
> 3 files changed, 132 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/DocBook/media/v4l/pixfmt-nv24.xml
>
> diff --git a/Documentation/DocBook/media/v4l/pixfmt-nv24.xml b/Documentation/DocBook/media/v4l/pixfmt-nv24.xml
> new file mode 100644
> index 0000000..939c803
> --- /dev/null
> +++ b/Documentation/DocBook/media/v4l/pixfmt-nv24.xml
> @@ -0,0 +1,129 @@
> + <refentry>
> + <refmeta>
> + <refentrytitle>V4L2_PIX_FMT_NV24 ('NV24'), V4L2_PIX_FMT_NV42 ('NV42')</refentrytitle>
> + &manvol;
> + </refmeta>
> + <refnamediv>
> + <refname id="V4L2-PIX-FMT-NV24"><constant>V4L2_PIX_FMT_NV24</constant></refname>
> + <refname id="V4L2-PIX-FMT-NV42"><constant>V4L2_PIX_FMT_NV42</constant></refname>
> + <refpurpose>Formats with full horizontal and vertical
> +chroma resolutions, also known as YUV 4:4:4. One luminance and one
> +chrominance plane with alternating chroma samples as opposed to
> +<constant>V4L2_PIX_FMT_YVU420</constant></refpurpose>
> + </refnamediv>
> + <refsect1>
> + <title>Description</title>
> +
> + <para>These are two-plane versions of the YUV 4:4:4 format. The three
> + components are separated into two sub-images or planes. The Y plane is
> + first, with each Y sample stored in one byte per pixel. For
> + <constant>V4L2_PIX_FMT_NV24</constant>, a combined CbCr plane
> + immediately follows the Y plane in memory. The CbCr plane has the same
> + width and height, in pixels, as the Y plane (and the image). Each line
> + contains one CbCr pair per pixel, with each Cb and Cr sample stored in
> + one byte. <constant>V4L2_PIX_FMT_NV42</constant> is the same except that
> + the Cb and Cr samples are swapped, the CrCb plane starts with a Cr
> + sample.</para>
> +
> + <para>If the Y plane has pad bytes after each row, then the CbCr plane
> + has twice as many pad bytes after its rows.</para>
> +
> + <example>
> + <title><constant>V4L2_PIX_FMT_NV24</constant> 4 × 4
> +pixel image</title>
> +
> + <formalpara>
> + <title>Byte Order.</title>
> + <para>Each cell is one byte.
> + <informaltable frame="none">
> + <tgroup cols="9" align="center">
> + <colspec align="left" colwidth="2*" />
> + <tbody valign="top">
> + <row>
> + <entry>start + 0:</entry>
> + <entry>Y'<subscript>00</subscript></entry>
> + <entry>Y'<subscript>01</subscript></entry>
> + <entry>Y'<subscript>02</subscript></entry>
> + <entry>Y'<subscript>03</subscript></entry>
> + </row>
> + <row>
> + <entry>start + 4:</entry>
> + <entry>Y'<subscript>10</subscript></entry>
> + <entry>Y'<subscript>11</subscript></entry>
> + <entry>Y'<subscript>12</subscript></entry>
> + <entry>Y'<subscript>13</subscript></entry>
> + </row>
> + <row>
> + <entry>start + 8:</entry>
> + <entry>Y'<subscript>20</subscript></entry>
> + <entry>Y'<subscript>21</subscript></entry>
> + <entry>Y'<subscript>22</subscript></entry>
> + <entry>Y'<subscript>23</subscript></entry>
> + </row>
> + <row>
> + <entry>start + 12:</entry>
> + <entry>Y'<subscript>30</subscript></entry>
> + <entry>Y'<subscript>31</subscript></entry>
> + <entry>Y'<subscript>32</subscript></entry>
> + <entry>Y'<subscript>33</subscript></entry>
> + </row>
> + <row>
> + <entry>start + 16:</entry>
> + <entry>Cb<subscript>00</subscript></entry>
> + <entry>Cr<subscript>00</subscript></entry>
> + <entry>Cb<subscript>01</subscript></entry>
> + <entry>Cr<subscript>01</subscript></entry>
> + <entry>Cb<subscript>02</subscript></entry>
> + <entry>Cr<subscript>02</subscript></entry>
> + <entry>Cb<subscript>03</subscript></entry>
> + <entry>Cr<subscript>03</subscript></entry>
> + </row>
> + <row>
> + <entry>start + 24:</entry>
> + <entry>Cb<subscript>10</subscript></entry>
> + <entry>Cr<subscript>10</subscript></entry>
> + <entry>Cb<subscript>11</subscript></entry>
> + <entry>Cr<subscript>11</subscript></entry>
> + <entry>Cb<subscript>12</subscript></entry>
> + <entry>Cr<subscript>12</subscript></entry>
> + <entry>Cb<subscript>13</subscript></entry>
> + <entry>Cr<subscript>13</subscript></entry>
> + </row>
> + <row>
> + <entry>start + 32:</entry>
> + <entry>Cb<subscript>20</subscript></entry>
> + <entry>Cr<subscript>20</subscript></entry>
> + <entry>Cb<subscript>21</subscript></entry>
> + <entry>Cr<subscript>21</subscript></entry>
> + <entry>Cb<subscript>22</subscript></entry>
> + <entry>Cr<subscript>22</subscript></entry>
> + <entry>Cb<subscript>23</subscript></entry>
> + <entry>Cr<subscript>23</subscript></entry>
> + </row>
> + <row>
> + <entry>start + 40:</entry>
> + <entry>Cb<subscript>30</subscript></entry>
> + <entry>Cr<subscript>30</subscript></entry>
> + <entry>Cb<subscript>31</subscript></entry>
> + <entry>Cr<subscript>31</subscript></entry>
> + <entry>Cb<subscript>32</subscript></entry>
> + <entry>Cr<subscript>32</subscript></entry>
> + <entry>Cb<subscript>33</subscript></entry>
> + <entry>Cr<subscript>33</subscript></entry>
> + </row>
> + </tbody>
> + </tgroup>
> + </informaltable>
> + </para>
> + </formalpara>
> + </example>
> + </refsect1>
> + </refentry>
> +
> + <!--
> +Local Variables:
> +mode: sgml
> +sgml-parent-document: "pixfmt.sgml"
> +indent-tabs-mode: nil
> +End:
> + -->
> diff --git a/Documentation/DocBook/media/v4l/pixfmt.xml b/Documentation/DocBook/media/v4l/pixfmt.xml
> index 2ff6b77..aef4615 100644
> --- a/Documentation/DocBook/media/v4l/pixfmt.xml
> +++ b/Documentation/DocBook/media/v4l/pixfmt.xml
> @@ -714,6 +714,7 @@ information.</para>
> &sub-nv12m;
> &sub-nv12mt;
> &sub-nv16;
> + &sub-nv24;
> &sub-m420;
> </section>
>
> diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
> index fca24cc..8225163 100644
> --- a/include/linux/videodev2.h
> +++ b/include/linux/videodev2.h
> @@ -343,6 +343,8 @@ struct v4l2_pix_format {
> #define V4L2_PIX_FMT_NV21 v4l2_fourcc('N', 'V', '2', '1') /* 12 Y/CrCb 4:2:0 */
> #define V4L2_PIX_FMT_NV16 v4l2_fourcc('N', 'V', '1', '6') /* 16 Y/CbCr 4:2:2 */
> #define V4L2_PIX_FMT_NV61 v4l2_fourcc('N', 'V', '6', '1') /* 16 Y/CrCb 4:2:2 */
> +#define V4L2_PIX_FMT_NV24 v4l2_fourcc('N', 'V', '2', '4') /* 24 Y/CbCr 4:4:4 */
> +#define V4L2_PIX_FMT_NV42 v4l2_fourcc('N', 'V', '4', '2') /* 24 Y/CrCb 4:4:4 */
>
> /* two non contiguous planes - one Y, one Cr + Cb interleaved */
> #define V4L2_PIX_FMT_NV12M v4l2_fourcc('N', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 */
^ permalink raw reply
* Re: [PATCH 1/2] atmel_lcdfb: Adjust HFP calculation so it matches
From: Florian Tobias Schandinat @ 2011-11-12 0:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317801598-23757-1-git-send-email-alexander.stein@systec-electronic.com>
On 10/05/2011 07:59 AM, Alexander Stein wrote:
> In the AT91SAM9263 Manual the HFP part in LCDTIM2 is described as follows:
> * HFP: Horizontal Front Porch
> Number of idle LCDDOTCK cycles at the end of the line.
> Idle period is (HFP+2) LCDDOTCK cycles.
>
> It is only a minor issue. I also changed all boards using atmel_lcdfb
> I found to respect the new calculation.
Applied both patches of this series.
Thanks,
Florian Tobias Schandinat
>
> Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
> ---
> arch/arm/mach-at91/board-cap9adk.c | 2 +-
> arch/arm/mach-at91/board-neocore926.c | 2 +-
> arch/arm/mach-at91/board-sam9261ek.c | 4 ++--
> arch/arm/mach-at91/board-sam9263ek.c | 2 +-
> arch/arm/mach-at91/board-sam9m10g45ek.c | 2 +-
> arch/arm/mach-at91/board-sam9rlek.c | 2 +-
> drivers/video/atmel_lcdfb.c | 4 ++--
> 7 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
> index 679b0b7..ae962bf 100644
> --- a/arch/arm/mach-at91/board-cap9adk.c
> +++ b/arch/arm/mach-at91/board-cap9adk.c
> @@ -304,7 +304,7 @@ static struct fb_videomode at91_tft_vga_modes[] = {
> .xres = 240, .yres = 320,
> .pixclock = KHZ2PICOS(4965),
>
> - .left_margin = 1, .right_margin = 33,
> + .left_margin = 1, .right_margin = 34,
> .upper_margin = 1, .lower_margin = 0,
> .hsync_len = 5, .vsync_len = 1,
>
> diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
> index 9bc6ab3..583878e 100644
> --- a/arch/arm/mach-at91/board-neocore926.c
> +++ b/arch/arm/mach-at91/board-neocore926.c
> @@ -235,7 +235,7 @@ static struct fb_videomode at91_tft_vga_modes[] = {
> .xres = 240, .yres = 320,
> .pixclock = KHZ2PICOS(5000),
>
> - .left_margin = 1, .right_margin = 33,
> + .left_margin = 1, .right_margin = 34,
> .upper_margin = 1, .lower_margin = 0,
> .hsync_len = 5, .vsync_len = 1,
>
> diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
> index 5096a0e..8dda83b 100644
> --- a/arch/arm/mach-at91/board-sam9261ek.c
> +++ b/arch/arm/mach-at91/board-sam9261ek.c
> @@ -370,7 +370,7 @@ static struct fb_videomode at91_stn_modes[] = {
> .xres = 320, .yres = 240,
> .pixclock = KHZ2PICOS(1440),
>
> - .left_margin = 1, .right_margin = 1,
> + .left_margin = 1, .right_margin = 2,
> .upper_margin = 0, .lower_margin = 0,
> .hsync_len = 1, .vsync_len = 1,
>
> @@ -431,7 +431,7 @@ static struct fb_videomode at91_tft_vga_modes[] = {
> .xres = 240, .yres = 320,
> .pixclock = KHZ2PICOS(4965),
>
> - .left_margin = 1, .right_margin = 33,
> + .left_margin = 1, .right_margin = 34,
> .upper_margin = 1, .lower_margin = 0,
> .hsync_len = 5, .vsync_len = 1,
>
> diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
> index ea8f185..e260070 100644
> --- a/arch/arm/mach-at91/board-sam9263ek.c
> +++ b/arch/arm/mach-at91/board-sam9263ek.c
> @@ -258,7 +258,7 @@ static struct fb_videomode at91_tft_vga_modes[] = {
> .xres = 240, .yres = 320,
> .pixclock = KHZ2PICOS(4965),
>
> - .left_margin = 1, .right_margin = 33,
> + .left_margin = 1, .right_margin = 34,
> .upper_margin = 1, .lower_margin = 0,
> .hsync_len = 5, .vsync_len = 1,
>
> diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
> index ad234cc..5e9a5ca 100644
> --- a/arch/arm/mach-at91/board-sam9m10g45ek.c
> +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
> @@ -197,7 +197,7 @@ static struct fb_videomode at91_tft_vga_modes[] = {
> .xres = 480, .yres = 272,
> .pixclock = KHZ2PICOS(9000),
>
> - .left_margin = 1, .right_margin = 1,
> + .left_margin = 1, .right_margin = 2,
> .upper_margin = 40, .lower_margin = 1,
> .hsync_len = 45, .vsync_len = 1,
>
> diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
> index 4f14b54..ad9e5c9 100644
> --- a/arch/arm/mach-at91/board-sam9rlek.c
> +++ b/arch/arm/mach-at91/board-sam9rlek.c
> @@ -154,7 +154,7 @@ static struct fb_videomode at91_tft_vga_modes[] = {
> .xres = 240, .yres = 320,
> .pixclock = KHZ2PICOS(4965),
>
> - .left_margin = 1, .right_margin = 33,
> + .left_margin = 1, .right_margin = 34,
> .upper_margin = 1, .lower_margin = 0,
> .hsync_len = 5, .vsync_len = 1,
>
> diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
> index 817ab60..816d528 100644
> --- a/drivers/video/atmel_lcdfb.c
> +++ b/drivers/video/atmel_lcdfb.c
> @@ -393,7 +393,7 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
> var->lower_margin = min_t(u32, var->lower_margin,
> ATMEL_LCDC_VFP);
> var->right_margin = min_t(u32, var->right_margin,
> - (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
> + (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 2);
> var->hsync_len = min_t(u32, var->hsync_len,
> (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
> var->left_margin = min_t(u32, var->left_margin,
> @@ -578,7 +578,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
> lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
>
> /* Horizontal timing */
> - value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
> + value = (info->var.right_margin - 2) << ATMEL_LCDC_HFP_OFFSET;
> value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
> value |= (info->var.left_margin - 1);
> dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
^ permalink raw reply
* Re: [PATCHv2] atmel_lcdfb: support new-style palette format
From: Florian Tobias Schandinat @ 2011-11-12 0:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318517152-27578-1-git-send-email-jacmet@sunsite.dk>
On 10/13/2011 02:45 PM, Peter Korsgaard wrote:
> The newer Atmel SoCs use normal 16bit 565 BGR/RGB for the palette data,
> rather than the special intensity + 555 format.
>
> Fill out palette data correctly on these devices, and at the same time
> respect the RGB/BGR wiring mode.
Applied this patch.
Thanks,
Florian Tobias Schandinat
>
> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
> ---
> Changes since v1:
> - ATMEL_LCDC_WIRING_RGB/BGR was swapped
>
> drivers/video/atmel_lcdfb.c | 32 ++++++++++++++++++++++++--------
> 1 files changed, 24 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
> index 63409c1..7ca3eaf 100644
> --- a/drivers/video/atmel_lcdfb.c
> +++ b/drivers/video/atmel_lcdfb.c
> @@ -682,14 +682,30 @@ static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
>
> case FB_VISUAL_PSEUDOCOLOR:
> if (regno < 256) {
> - val = ((red >> 11) & 0x001f);
> - val |= ((green >> 6) & 0x03e0);
> - val |= ((blue >> 1) & 0x7c00);
> -
> - /*
> - * TODO: intensity bit. Maybe something like
> - * ~(red[10] ^ green[10] ^ blue[10]) & 1
> - */
> + if (cpu_is_at91sam9261() || cpu_is_at91sam9263()
> + || cpu_is_at91sam9rl()) {
> + /* old style I+BGR:555 */
> + val = ((red >> 11) & 0x001f);
> + val |= ((green >> 6) & 0x03e0);
> + val |= ((blue >> 1) & 0x7c00);
> +
> + /*
> + * TODO: intensity bit. Maybe something like
> + * ~(red[10] ^ green[10] ^ blue[10]) & 1
> + */
> + } else {
> + /* new style BGR:565 / RGB:565 */
> + if (sinfo->lcd_wiring_mode =
> + ATMEL_LCDC_WIRING_RGB) {
> + val = ((blue >> 11) & 0x001f);
> + val |= ((red >> 0) & 0xf800);
> + } else {
> + val = ((red >> 11) & 0x001f);
> + val |= ((blue >> 0) & 0xf800);
> + }
> +
> + val |= ((green >> 5) & 0x07e0);
> + }
>
> lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
> ret = 0;
^ permalink raw reply
* Re: [PATCH 1/4] zorro: Rename Picasso IV Z2 "MEM" to "RAM" for consistency
From: Florian Tobias Schandinat @ 2011-11-12 0:20 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-fbdev, linux-m68k, Christian T. Steigies, linux-kernel,
Ingo Jürgensmann
In-Reply-To: <1319110945-25684-1-git-send-email-geert@linux-m68k.org>
Applied all four patches.
Thanks,
Florian Tobias Schandinat
On 10/20/2011 11:42 AM, Geert Uytterhoeven wrote:
> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
> ---
> include/linux/zorro_ids.h | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/linux/zorro_ids.h b/include/linux/zorro_ids.h
> index 7e74908..74bc53b 100644
> --- a/include/linux/zorro_ids.h
> +++ b/include/linux/zorro_ids.h
> @@ -360,8 +360,8 @@
> #define ZORRO_PROD_VILLAGE_TRONIC_PICASSO_II_II_PLUS_RAM ZORRO_ID(VILLAGE_TRONIC, 0x0B, 0)
> #define ZORRO_PROD_VILLAGE_TRONIC_PICASSO_II_II_PLUS_REG ZORRO_ID(VILLAGE_TRONIC, 0x0C, 0)
> #define ZORRO_PROD_VILLAGE_TRONIC_PICASSO_II_II_PLUS_SEGMENTED_MODE ZORRO_ID(VILLAGE_TRONIC, 0x0D, 0)
> -#define ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z2_MEM1 ZORRO_ID(VILLAGE_TRONIC, 0x15, 0)
> -#define ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z2_MEM2 ZORRO_ID(VILLAGE_TRONIC, 0x16, 0)
> +#define ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z2_RAM1 ZORRO_ID(VILLAGE_TRONIC, 0x15, 0)
> +#define ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z2_RAM2 ZORRO_ID(VILLAGE_TRONIC, 0x16, 0)
> #define ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z2_REG ZORRO_ID(VILLAGE_TRONIC, 0x17, 0)
> #define ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z3 ZORRO_ID(VILLAGE_TRONIC, 0x18, 0)
> #define ZORRO_PROD_VILLAGE_TRONIC_ARIADNE ZORRO_ID(VILLAGE_TRONIC, 0xC9, 0)
^ permalink raw reply
* Re: [PATCH] video: s3c-fb: fix transparency length for pixel blending
From: Florian Tobias Schandinat @ 2011-11-12 0:21 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <1320645781-9528-1-git-send-email-jg1.han@samsung.com>
On 11/07/2011 06:03 AM, Jingoo Han wrote:
> Transparency length is fixed for pixel blending in order to support
> ARGB 8888 format.
>
> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Applied this patch.
Thanks,
Florian Tobias Schandinat
> ---
> drivers/video/s3c-fb.c | 3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
> index 0753b1c..12eaee0 100644
> --- a/drivers/video/s3c-fb.c
> +++ b/drivers/video/s3c-fb.c
> @@ -621,7 +621,8 @@ static int s3c_fb_set_par(struct fb_info *info)
> } else if (var->transp.length = 1)
> data |= WINCON1_BPPMODE_25BPP_A1888
> | WINCON1_BLD_PIX;
> - else if (var->transp.length = 4)
> + else if ((var->transp.length = 4) ||
> + (var->transp.length = 8))
> data |= WINCON1_BPPMODE_28BPP_A4888
> | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
> else
^ permalink raw reply
* Getting FB to work in Console
From: D.J.J. Ring, Jr. @ 2011-11-12 23:42 UTC (permalink / raw)
To: linux-fbdev
I want to make framebuffer work in console only Debian installation.
I find many of the howto's on the web won't work for current Debian
Stable - or I'm just too stupid to figure them out.
< grin >
I want to get fbi and links2 -g working in console.
I tried entering in console:
sudo mknod /dev/fb0 c 29 0
But when I reboot /dev/fb0 does not exist.
I've had links2 -g working before - I've got libdirectfb-dev
libdirectfb-bin and all the files I can find with directfb to install.
I am working on Debian Stable command line only.
David
^ permalink raw reply
* Re: Getting FB to work in Console
From: Florian Tobias Schandinat @ 2011-11-13 1:00 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <CADO5RbhunU1X7mWwGDbVRc1FSPKBaLudAVav0TMkBoQ_1zp0Mw@mail.gmail.com>
Hi,
On 11/12/2011 11:42 PM, D.J.J. Ring, Jr. wrote:
> I want to make framebuffer work in console only Debian installation.
> I find many of the howto's on the web won't work for current Debian
> Stable - or I'm just too stupid to figure them out.
what graphic card/chip do you have?
You might have to remove the corresponding framebuffer from
/etc/modprobe.d/fbdev-blacklist.conf
> < grin >
>
> I want to get fbi and links2 -g working in console.
>
> I tried entering in console:
>
> sudo mknod /dev/fb0 c 29 0
Shouldn't be necessary. If the correct driver is loaded the device should appear
immediately.
Best regards,
Florian Tobias Schandinat
>
> But when I reboot /dev/fb0 does not exist.
>
> I've had links2 -g working before - I've got libdirectfb-dev
> libdirectfb-bin and all the files I can find with directfb to install.
>
> I am working on Debian Stable command line only.
>
> David
> --
> To unsubscribe from this list: send the line "unsubscribe linux-fbdev" in
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> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
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