* [PATCH 4/4] Drivers: video: sbuslib: fixed a brace coding style issue
From: Zac Storer @ 2011-11-18 4:38 UTC (permalink / raw)
To: FlorianSchandinat; +Cc: linux-fbdev, linux-kernel, Zac Storer
Fixed a brace coding style issue.
Signed-off-by: Zac Storer <zac.3.14159@gmail.com>
---
drivers/video/sbuslib.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/video/sbuslib.c b/drivers/video/sbuslib.c
index 37d764a..3c1de98 100644
--- a/drivers/video/sbuslib.c
+++ b/drivers/video/sbuslib.c
@@ -76,7 +76,7 @@ int sbusfb_mmap_helper(struct sbus_mmap_map *map,
map_offset = (physbase + map[i].poff) & POFF_MASK;
break;
}
- if (!map_size){
+ if (!map_size) {
page += PAGE_SIZE;
continue;
}
--
1.7.7.3
^ permalink raw reply related
* [PATCH 3/3] Drivers: video: controlfb: fixed a brace coding style issue
From: Zac Storer @ 2011-11-18 4:34 UTC (permalink / raw)
To: FlorianSchandinat; +Cc: linux-fbdev, linux-kernel, Zac Storer
Fixed a brace coding style issue.
Signed-off-by: Zac Storer <zac.3.14159@gmail.com>
---
drivers/video/controlfb.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/video/controlfb.c b/drivers/video/controlfb.c
index 7b2c40a..0c189b3 100644
--- a/drivers/video/controlfb.c
+++ b/drivers/video/controlfb.c
@@ -420,7 +420,7 @@ static int __init init_control(struct fb_info_control *p)
/* Try to pick a video mode out of NVRAM if we have one. */
#ifdef CONFIG_NVRAM
- if (default_cmode = CMODE_NVRAM){
+ if (default_cmode = CMODE_NVRAM) {
cmode = nvram_read_byte(NV_CMODE);
if(cmode < CMODE_8 || cmode > CMODE_32)
cmode = CMODE_8;
--
1.7.7.3
^ permalink raw reply related
* Re: Recent viafb changes break OLPC DCON freeze
From: Florian Tobias Schandinat @ 2011-11-18 2:14 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <CAMLZHHQHZL9zZMsQgvXBi6MoG9_TXWqPN5D19sqeKSjsoV3unA@mail.gmail.com>
Hi Daniel,
thanks a lot for your debugging. I'm busy at the moment so I'll keep it short.
On 11/17/2011 04:24 PM, Daniel Drake wrote:
> A further data point on this issue: we once hit exactly the same thing
> on XO-1 (geode lxfb). A non-OLPC commit caused the v/h sync output
> polarity to change. The display still worked correctly, but the DCON
> freeze functionality caused garbage in exactly the same way as this
> viafb issue. This suggests that the display itself isn't too fussy
> about video signal parameters, but the DCON controller is picky and
> expects certain parameters. (see commit ad913da61aeb for the lxfb
> fix).
As you mentioned it, I had a look at this driver. It looks like viafb does it
(polarity) just the other way around than geode. So it might be wort a try to
change in
drivers/video/via/share.h:
/* 1200x900@60 Sync Polarity (DCON) */
#define M1200X900_R60_HSP NEGATIVE
#define M1200X900_R60_VSP NEGATIVE
to
/* 1200x900@60 Sync Polarity (DCON) */
#define M1200X900_R60_HSP POSITIVE
#define M1200X900_R60_VSP POSITIVE
> Any thoughts?
If the above works it's just that the thing was initially entered wrong and now
we hit it as we start setting the polarity for the correct devices, similar to
the issue with the refresh rate.
If it does not work I'll have a deeper look at it as soon as possible.
Best regards,
Florian Tobias Schandinat
^ permalink raw reply
* Re: [PATCH] fb: split out framebuffer initialization from allocation
From: Timur Tabi @ 2011-11-17 20:19 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <1321308088-6327-1-git-send-email-timur@freescale.com>
Timur Tabi wrote:
> Introduce functions framebuffer_init() and framebuffer_cleanup() to allow
> the initialization of a user-allocated fb_info object.
>
> framebuffer_alloc() allows for appending a private data structure when it
> allocates the fb_info object. However, a driver that registers multiple
> framebuffers for one device may also need another private data structure
> for the device itself. framebuffer_init() allows such drivers to store
> the fb_info objects in the device-specific private data structure,
> thereby simplifying memory allocation.
>
> Signed-off-by: Timur Tabi <timur@freescale.com>
Florian,
Any comments on this patch? If you're okay with the change, I want to take advantage of it in my framebuffer driver.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* [PATCH] ARM: pxafb: fix overwriting of pixel clock and output enable polarity
From: Marc Kleine-Budde @ 2011-11-17 16:47 UTC (permalink / raw)
To: linux-fbdev
When loading the pxafb driver as a module it's possible to overwrite the
platform data via module parameters. When overwriting the pixel clock or
output enable polarity the parse_opt() function modifies the lccr3 member
of the platform data struct. Later on in pxafb_decode_mach_info() lccr3
is only evaluated if lcd_conn lcd type is not used.
This patch fixes the problem by setting pixel clock and output enable
polarity in inf->lcd_conn, too (which is handled the correct way in
pxafb_decode_mach_info()).
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
drivers/video/pxafb.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c
index 0f4e8c9..119c0a1 100644
--- a/drivers/video/pxafb.c
+++ b/drivers/video/pxafb.c
@@ -1979,17 +1979,21 @@ static int __devinit parse_opt(struct device *dev, char *this_opt)
if (simple_strtoul(this_opt+9, NULL, 0) = 0) {
sprintf(s, "output enable: active low\n");
inf->lccr3 = (inf->lccr3 & ~LCCR3_OEP) | LCCR3_OutEnL;
+ inf->lcd_conn |= LCD_BIAS_ACTIVE_LOW;
} else {
sprintf(s, "output enable: active high\n");
inf->lccr3 = (inf->lccr3 & ~LCCR3_OEP) | LCCR3_OutEnH;
+ inf->lcd_conn &= ~LCD_BIAS_ACTIVE_LOW;
}
} else if (!strncmp(this_opt, "pixclockpol:", 12)) {
if (simple_strtoul(this_opt+12, NULL, 0) = 0) {
sprintf(s, "pixel clock polarity: falling edge\n");
inf->lccr3 = (inf->lccr3 & ~LCCR3_PCP) | LCCR3_PixFlEdg;
+ inf->lcd_conn |= LCD_PCLK_EDGE_FALL;
} else {
sprintf(s, "pixel clock polarity: rising edge\n");
inf->lccr3 = (inf->lccr3 & ~LCCR3_PCP) | LCCR3_PixRsEdg;
+ inf->lcd_conn &= ~LCD_PCLK_EDGE_FALL;
}
} else if (!strncmp(this_opt, "color", 5)) {
inf->lccr0 = (inf->lccr0 & ~LCCR0_CMS) | LCCR0_Color;
--
1.7.4.1
^ permalink raw reply related
* Recent viafb changes break OLPC DCON freeze
From: Daniel Drake @ 2011-11-17 16:24 UTC (permalink / raw)
To: linux-fbdev
Hi,
The OLPC XO-1.5 has a display controller (dcon) which is able to drive
the display while the video device is powered off (e.g. while the
system is in suspend). It works on demand, (approximately) by grabbing
the latest displayed picture (at the hardware level), storing it in
dedicated DCON RAM, and continually reproducing it on the screen. This
is known as "DCON freeze" and can also be triggered while the video
device is still running by executing:
echo 1 > /sys/devices/platform/dcon/freeze
(enabled by CONFIG_FB_OLPC_DCON_1_5)
Unfortunately this has broken in recent kernels due to viafb changes:
when going into "DCON freeze", the DCON fails to capture the display
contents and instead displays garbage. I am testing this on viafb
outside of X.
There are some complications in debugging this and pinpointing a
single responsible commit.
Kernels v2.6.38 and previous work fine. However, in such kernels, OLPC
included an out-of-tree DCON driver. 2.6.38 includes a DCON driver (in
staging) but it was not usable at this point.
v2.6.39 has a functional DCON driver, but viafb in this kernel is
unusable on XO-1.5 due to an unrelated bug which only got fixed for
3.0:
http://www.spinics.net/lists/linux-fbdev/msg03132.html
v3.0 and onwards reproduces the failure.
To debug this, I took the approach of starting with 2.6.38, fixing the
DCON driver in that old kernel, then going through the viafb changes
until the point of breakage was found. This can be done as follows:
git reset --hard v2.6.38
First, fix the DCON driver:
git cherry-pick a90dcd4f7dfc3e664e7d08790a8b39d052e21a2e
git cherry-pick e107e6ebdda9b56be21951a7c58c2fa90d6e685b
git cherry-pick fe2d5b43807ebb38e0e8c7b269ff08fcd4011726
git cherry-pick 8d2d3dd1b4589299ec17b15130fbadfc69996df4
git cherry-pick bb4103544e455e11d9a4379326406a60429b9888
git cherry-pick bada46e5ab10b09b0f86e8b8ede009e759a16adf
git cherry-pick 56463de05a56b80b43d21a442cf2a6e0037762e8
git cherry-pick 9ed62423033d167765a2c6385064acbeeadb2b14
git cherry-pick feaa98b2a5e452d95624d3f217cf1aab9cd25db0
git cherry-pick 45bfe97276856b866dd73fdadb65fb928c0c9bc1
git cherry-pick 31a3da4146c120e87b8d42d033760fe49704a233
git cherry-pick 8f2fb16a9cd015072b3da9038084930287e11985
git cherry-pick 097cd83a4c312e1ae0d9c14526f846666cab4f3a
git cherry-pick bbe963f1b98c90980e33086d726f0963e286d1b4
git cherry-pick 309ef2a25e8d3d5962bb0824c58ea39c12c166ef
git cherry-pick c59eef17f1cc21a984cf077ad45a8355781881b6
git cherry-pick b07b846c333708ce2b95b5cd2a86f51a74331d02
git cherry-pick 6a3a81e7ca9b1ddaaf8d644b4102aff0fe2a7c40
git cherry-pick bed4ab7781e8600a7ebf4378a1b3f26d31517f57
The dcon functionality can now be tested (it works).
Then we can apply all of the viafb changes between 2.6.38 and 2.6.39,
one by one until the commit prior to the one that completely broke
XO-1.5 video:
git cherry-pick a625e305edd8e3ac08888a9b52981205b68cdb0e
git cherry-pick b65d6040e3a7cd75d9287f7ddfd115e85fde4b44
git cherry-pick 23e5abd5555b86fd56af6383e7a832b0cf2a2d95
git cherry-pick dbf85f2326dbb070256ff153853b00f70c27717a
git cherry-pick c8350be26237e2b850b9611dbe55304ad6ebc6c7
git cherry-pick d90108765b64e39e88e59f51d05ac652f0e53fea
git cherry-pick bf5ea02d9058a97a0bc2da9ca04ae4b34989407a
git cherry-pick f5b1c4b3b6d407ec5a9d93ca12738c4c7911000c
git cherry-pick 97597a39778eefb628eb7734a18f32c7880ad0e0
At this point, the dcon functionality is still working.
Now we apply the commit that broke XO-1.5 video display:
git cherry-pick fd3cc69848b7e1873e5f12bbcdd57
[dcon-test3 c8f0551] viafb: remove duplicated clock storage
Author: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
5 files changed, 133 insertions(+), 212 deletions(-)
2b20277ecf3
As expected, the system now boots without working display. So we jump
ahead and grab the fix for that from v3.0:
git cherry-pick b4ce6a285b65be4fb858728b3bbe9011242b769f
[dcon-test3 158fa27] viafb: fix OLPC DCON refresh rate
Author: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
2 files changed, 7 insertions(+), 3 deletions(-)
Regular viafb operation and DCON freeze both work fine at this point.
However, the commit that follows the "fix OLPC DCON refresh rate" is
titled "fix OLPC XO 1.5 device connection" and the message suggests
that it is essential for operation. This doesn't seem to be completely
true - things are working fine with this tree without that patch. And
if I apply it:
git cherry-pick 32fab7bcc79ee0b97277627f456c94202858d851
[dcon-test3 3d690a2] viafb: fix OLPC XO 1.5 device connection
Author: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
1 files changed, 5 insertions(+), 0 deletions(-)
Now the DCON freeze problem appears. So commit 32fab7bcc seems to be
in some way responsible or related to this issue. (However, I have
applied it 'out of context' from the original history).
If I revert this commit from linus master, the system boots with
bad/unreadable display. So in linus master this patch is needed for
the display to come up properly (as the description suggests).
Taking another debugging approach: I start at 2.6.39 (which has
working DCON driver) and apply the OLPC display fix:
git reset --hard v2.6.39
git cherry-pick b4ce6a285b65be4fb858728b3bbe9011242b769f
[dcon-test3 8f8b430] viafb: fix OLPC DCON refresh rate
Author: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
2 files changed, 7 insertions(+), 3 deletions(-)
Regular operation and DCON freeze both work fine at this point.
Now I take the first post-2.6.39 viafb commit:
git cherry-pick 0f8132b7431e241c29e61ac14f22549a6fca9632
[dcon-test3 b66cc33] viafb: move initialization code
Author: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
1 files changed, 7 insertions(+), 5 deletions(-)
Regular operation and DCON freeze continue to work fine.
git cherry-pick 486d4c08dd2eb29b26b4a27f8056155a7a639861
[dcon-test3 e8cfb95] viafb: no need to write CRTC values twice
Author: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
1 files changed, 0 insertions(+), 3 deletions(-)
Now the system boots with bad/unreadable video, so I take an estimated
guess at how to fix it:
git cherry-pick 32fab7bcc79ee0b97277627f456c94202858d851
[dcon-test3 3d690a2] viafb: fix OLPC XO 1.5 device connection
Author: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
1 files changed, 5 insertions(+), 0 deletions(-)
Now the system boots with a readable display, but the DCON bug now
appears. So 486d4c08d also seems to be responsible or related to the
DCON issue in question.
I next tried to revert (only) 486d4c08d from linus master, but this
patch does not revert cleanly:
drivers/video/via/hw.c: In function 'hw_init':
drivers/video/via/hw.c:1827:25: error: 'crt_timing' undeclared (first
use in this function)
drivers/video/via/hw.c:1827:25: note: each undeclared identifier is
reported only once for each function it appears in
drivers/video/via/hw.c:1827:37: error: 'vmode_tbl' undeclared (first
use in this function)
drivers/video/via/hw.c:1827:48: error: 'video_bpp' undeclared (first
use in this function)
drivers/video/via/hw.c:1827:2: error: too many arguments to function
'viafb_fill_crtc_timing'
drivers/video/via/hw.c:1489:6: note: declared here
So here is where I am a bit stuck.
My suspicion is that 486d4c08d is needed (for some reason), and in its
presence, I suspect that 32fab7bc is not needed, and that DCON freeze
will then work under this configuration.
A further data point on this issue: we once hit exactly the same thing
on XO-1 (geode lxfb). A non-OLPC commit caused the v/h sync output
polarity to change. The display still worked correctly, but the DCON
freeze functionality caused garbage in exactly the same way as this
viafb issue. This suggests that the display itself isn't too fussy
about video signal parameters, but the DCON controller is picky and
expects certain parameters. (see commit ad913da61aeb for the lxfb
fix).
Any thoughts?
Thanks,
Daniel
^ permalink raw reply
* Re: [PATCH 2/4] omap_dss: add FocalTech ETM070003DH6 display support
From: Igor Grinberg @ 2011-11-17 6:52 UTC (permalink / raw)
To: Ilya Yanok
Cc: linux-omap, wd, dzu, sasha_d, Tomi Valkeinen,
linux-fbdev@vger.kernel.org
In-Reply-To: <4EC45535.9060708@emcraft.com>
Hi Ilya,
You should have CC'd Tomi and linux-fbdev - done now.
On 11/17/11 02:28, Ilya Yanok wrote:
> Hi guys,
>
> what about this patch? Can it be applied? It's pretty independent from
> other ones.
>
> Regards, Ilya.
>
> On 09.11.2011 04:12, Ilya Yanok wrote:
>> Add data for the FocalTech ETM070003DH6 display to the generic_dpi_panel
>> display driver.
>>
>> Signed-off-by: Ilya Yanok <yanok@emcraft.com>
>> ---
>> drivers/video/omap2/displays/panel-generic-dpi.c | 24 ++++++++++++++++++++++
>> 1 files changed, 24 insertions(+), 0 deletions(-)
>>
>> diff --git a/drivers/video/omap2/displays/panel-generic-dpi.c b/drivers/video/omap2/displays/panel-generic-dpi.c
>> index 519c47d..42bfe47 100644
>> --- a/drivers/video/omap2/displays/panel-generic-dpi.c
>> +++ b/drivers/video/omap2/displays/panel-generic-dpi.c
>> @@ -297,6 +297,30 @@ static struct panel_config generic_dpi_panels[] = {
>>
>> .name = "apollon",
>> },
>> + /* FocalTech ETM070003DH6 */
>> + {
>> + {
>> + .x_res = 800,
>> + .y_res = 480,
>> +
>> + .pixel_clock = 28000,
>> +
>> + .hsw = 48,
>> + .hfp = 40,
>> + .hbp = 40,
>> +
>> + .vsw = 3,
>> + .vfp = 13,
>> + .vbp = 29,
>> + },
>> + .acbi = 0x0,
>> + .acb = 0x28,
>> + .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |
>> + OMAP_DSS_LCD_IHS,
>> + .power_on_delay = 50,
>> + .power_off_delay = 100,
>> + .name = "focaltech_etm070003dh6",
>> + },
>> };
>>
>> struct panel_drv_data {
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
--
Regards,
Igor.
^ permalink raw reply
* [PATCH v2] video: support MIPI-DSI controller driver
From: Kyungmin Park @ 2011-11-16 0:55 UTC (permalink / raw)
To: linux-arm-kernel
From: Donghwa Lee <dh09.lee@samsung.com>
Samsung S5PC210 and EXYNOS SoC platform has MIPI-DSI controller and MIPI-DSI
based LCD Panel could be used with it. This patch supports MIPI-DSI driver
based Samsung SoC chip.
LCD panel driver based MIPI-DSI should be registered to MIPI-DSI driver at
machine code and LCD panel driver specific function registered to mipi_dsim_ddi
structure at lcd panel init function called system init.
In the MIPI-DSI driver, find lcd panel driver by using registered
lcd panel name, and then initialize lcd panel driver.
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Changes since v1:
- /plat/regs-dsim.h moves to /driver/video/s5p_mipi_dsi_regs.h,
- /plat/mipi_dsim.h moves to /linux/mipi_dsim.h
---
drivers/video/Kconfig | 7 +
drivers/video/Makefile | 2 +
drivers/video/s5p_mipi_dsi.c | 601 +++++++++++++++++++++
drivers/video/s5p_mipi_dsi_common.c | 931 +++++++++++++++++++++++++++++++++
drivers/video/s5p_mipi_dsi_common.h | 48 ++
drivers/video/s5p_mipi_dsi_lowlevel.c | 608 +++++++++++++++++++++
drivers/video/s5p_mipi_dsi_lowlevel.h | 108 ++++
drivers/video/s5p_mipi_dsi_regs.h | 153 ++++++
include/linux/mipi_dsim.h | 362 +++++++++++++
9 files changed, 2820 insertions(+), 0 deletions(-)
create mode 100644 drivers/video/s5p_mipi_dsi.c
create mode 100644 drivers/video/s5p_mipi_dsi_common.c
create mode 100644 drivers/video/s5p_mipi_dsi_common.h
create mode 100644 drivers/video/s5p_mipi_dsi_lowlevel.c
create mode 100644 drivers/video/s5p_mipi_dsi_lowlevel.h
create mode 100644 drivers/video/s5p_mipi_dsi_regs.h
create mode 100644 include/linux/mipi_dsim.h
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index d83e967..879177b 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -2082,6 +2082,13 @@ config FB_S3C2410_DEBUG
Turn on debugging messages. Note that you can set/unset at run time
through sysfs
+config S5P_MIPI_DSI
+ tristate "Samsung SoC MIPI-DSI support."
+ depends on FB_S3C && (ARCH_S5PV210 || ARCH_S5PV310 || ARCH_EXYNOS)
+ default n
+ help
+ This enables support for MIPI-DSI device.
+
config FB_NUC900
bool "NUC900 LCD framebuffer support"
depends on FB && ARCH_W90X900
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 9b9d8ff..29eb7c9 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -120,6 +120,8 @@ obj-$(CONFIG_FB_SH7760) += sh7760fb.o
obj-$(CONFIG_FB_IMX) += imxfb.o
obj-$(CONFIG_FB_S3C) += s3c-fb.o
obj-$(CONFIG_FB_S3C2410) += s3c2410fb.o
+obj-$(CONFIG_S5P_MIPI_DSI) += s5p_mipi_dsi.o s5p_mipi_dsi_common.o \
+ s5p_mipi_dsi_lowlevel.o
obj-$(CONFIG_FB_FSL_DIU) += fsl-diu-fb.o
obj-$(CONFIG_FB_COBALT) += cobalt_lcdfb.o
obj-$(CONFIG_FB_PNX4008_DUM) += pnx4008/
diff --git a/drivers/video/s5p_mipi_dsi.c b/drivers/video/s5p_mipi_dsi.c
new file mode 100644
index 0000000..09a4af8
--- /dev/null
+++ b/drivers/video/s5p_mipi_dsi.c
@@ -0,0 +1,601 @@
+/* linux/drivers/video/s5p_mipi_dsi.c
+ *
+ * Samsung SoC MIPI-DSIM driver.
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd
+ *
+ * InKi Dae, <inki.dae@samsung.com>
+ * Donghwa Lee, <dh09.lee@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/clk.h>
+#include <linux/mutex.h>
+#include <linux/wait.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/fb.h>
+#include <linux/ctype.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/memory.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/kthread.h>
+#include <linux/notifier.h>
+#include <linux/mipi_dsim.h>
+
+#include <plat/fb.h>
+#include <linux/mipi_dsim.h>
+
+#include "s5p_mipi_dsi_common.h"
+#include "s5p_mipi_dsi_lowlevel.h"
+
+#define master_to_driver(a) (a->dsim_lcd_drv)
+#define master_to_device(a) (a->dsim_lcd_dev)
+
+struct mipi_dsim_ddi {
+ int bus_id;
+ struct list_head list;
+ struct mipi_dsim_lcd_device *dsim_lcd_dev;
+ struct mipi_dsim_lcd_driver *dsim_lcd_drv;
+};
+
+static LIST_HEAD(dsim_ddi_list);
+
+static DEFINE_MUTEX(mipi_dsim_lock);
+
+static struct s5p_platform_mipi_dsim *to_dsim_plat(struct platform_device *pdev)
+{
+ return (struct s5p_platform_mipi_dsim *)pdev->dev.platform_data;
+}
+
+/* update all register settings to MIPI DSI controller. */
+static void s5p_mipi_update_cfg(struct mipi_dsim_device *dsim)
+{
+ /*
+ * data from Display controller(FIMD) is not transferred in video mode
+ * but in case of command mode, all settings is not updated to
+ * registers.
+ */
+ s5p_mipi_dsi_stand_by(dsim, 0);
+
+ s5p_mipi_dsi_init_dsim(dsim);
+ s5p_mipi_dsi_init_link(dsim);
+
+ s5p_mipi_dsi_set_hs_enable(dsim);
+
+ /* set display timing. */
+ s5p_mipi_dsi_set_display_mode(dsim, dsim->dsim_config);
+
+ /*
+ * data from Display controller(FIMD) is transferred in video mode
+ * but in case of command mode, all settigs is updated to registers.
+ */
+ s5p_mipi_dsi_stand_by(dsim, 1);
+
+}
+
+static int s5p_mipi_dsi_early_blank_mode(struct mipi_dsim_device *dsim,
+ int power)
+{
+ struct platform_device *pdev = to_platform_device(dsim->dev);
+ struct mipi_dsim_lcd_driver *client_drv = master_to_driver(dsim);
+ struct mipi_dsim_lcd_device *client_dev = master_to_device(dsim);
+
+ switch (power) {
+ case FB_BLANK_POWERDOWN:
+ if (client_drv && client_drv->suspend)
+ client_drv->suspend(client_dev);
+
+ clk_disable(dsim->clock);
+
+ if (dsim->pd->mipi_power)
+ dsim->pd->mipi_power(pdev, 0);
+
+ atomic_set(&dsim->power_t, 0);
+
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+static int s5p_mipi_dsi_blank_mode(struct mipi_dsim_device *dsim, int power)
+{
+ struct platform_device *pdev = to_platform_device(dsim->dev);
+ struct mipi_dsim_lcd_driver *client_drv = master_to_driver(dsim);
+ struct mipi_dsim_lcd_device *client_dev = master_to_device(dsim);
+
+ switch (power) {
+ case FB_BLANK_UNBLANK:
+ /* lcd panel power on. */
+ if (client_drv && client_drv->power_on)
+ client_drv->power_on(client_dev);
+
+ if (dsim->pd->mipi_power)
+ dsim->pd->mipi_power(pdev, 1);
+
+ /* enable MIPI-DSI PHY. */
+ if (dsim->pd->phy_enable)
+ dsim->pd->phy_enable(pdev, true);
+
+ clk_enable(dsim->clock);
+
+ s5p_mipi_update_cfg(dsim);
+
+ /* set lcd panel sequence commands. */
+ if (client_drv && client_drv->set_sequence)
+ client_drv->set_sequence(client_dev);
+
+ atomic_set(&dsim->power_t, 1);
+
+ break;
+ case FB_BLANK_NORMAL:
+ /* TODO. */
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+int s5p_mipi_dsi_register_lcd_device(struct mipi_dsim_lcd_device *lcd_dev)
+{
+ struct mipi_dsim_ddi *dsim_ddi;
+
+ if (!lcd_dev) {
+ printk(KERN_ERR "mipi_dsim_lcd_device is NULL.\n");
+ return -EFAULT;
+ }
+
+ if (!lcd_dev->name) {
+ printk(KERN_ERR "dsim_lcd_device name is NULL.\n");
+ return -EFAULT;
+ }
+
+ dsim_ddi = kzalloc(sizeof(struct mipi_dsim_ddi), GFP_KERNEL);
+ if (!dsim_ddi) {
+ printk(KERN_ERR "failed to allocate dsim_ddi object.\n");
+ return -EFAULT;
+ }
+
+ dsim_ddi->dsim_lcd_dev = lcd_dev;
+
+ mutex_lock(&mipi_dsim_lock);
+ list_add_tail(&dsim_ddi->list, &dsim_ddi_list);
+ mutex_unlock(&mipi_dsim_lock);
+
+ return 0;
+}
+
+struct mipi_dsim_ddi
+ *s5p_mipi_dsi_find_lcd_device(struct mipi_dsim_lcd_driver *lcd_drv)
+{
+ struct mipi_dsim_ddi *dsim_ddi;
+ struct mipi_dsim_lcd_device *lcd_dev;
+
+ mutex_lock(&mipi_dsim_lock);
+
+ list_for_each_entry(dsim_ddi, &dsim_ddi_list, list) {
+ if (!dsim_ddi)
+ goto out;
+
+ lcd_dev = dsim_ddi->dsim_lcd_dev;
+ if (!lcd_dev)
+ continue;
+
+ if (lcd_drv->id >= 0) {
+ if ((strcmp(lcd_drv->name, lcd_dev->name)) = 0 &&
+ lcd_drv->id = lcd_dev->id) {
+ /**
+ * bus_id would be used to identify
+ * connected bus.
+ */
+ dsim_ddi->bus_id = lcd_dev->bus_id;
+ mutex_unlock(&mipi_dsim_lock);
+
+ return dsim_ddi;
+ }
+ } else {
+ if ((strcmp(lcd_drv->name, lcd_dev->name)) = 0) {
+ /**
+ * bus_id would be used to identify
+ * connected bus.
+ */
+ dsim_ddi->bus_id = lcd_dev->bus_id;
+ mutex_unlock(&mipi_dsim_lock);
+
+ return dsim_ddi;
+ }
+ }
+
+ kfree(dsim_ddi);
+ list_del(&dsim_ddi->list);
+ }
+
+out:
+ mutex_unlock(&mipi_dsim_lock);
+
+ return NULL;
+}
+
+int s5p_mipi_dsi_register_lcd_driver(struct mipi_dsim_lcd_driver *lcd_drv)
+{
+ struct mipi_dsim_ddi *dsim_ddi;
+
+ if (!lcd_drv) {
+ printk(KERN_ERR "mipi_dsim_lcd_driver is NULL.\n");
+ return -EFAULT;
+ }
+
+ if (!lcd_drv->name) {
+ printk(KERN_ERR "dsim_lcd_driver name is NULL.\n");
+ return -EFAULT;
+ }
+
+ dsim_ddi = s5p_mipi_dsi_find_lcd_device(lcd_drv);
+ if (!dsim_ddi) {
+ printk(KERN_ERR "mipi_dsim_ddi object not found.\n");
+ return -EFAULT;
+ }
+
+ dsim_ddi->dsim_lcd_drv = lcd_drv;
+
+ printk(KERN_INFO "registered panel driver(%s) to mipi-dsi driver.\n",
+ lcd_drv->name);
+
+ return 0;
+
+}
+
+struct mipi_dsim_ddi
+ *s5p_mipi_dsi_bind_lcd_ddi(struct mipi_dsim_device *dsim,
+ const char *name)
+{
+ struct mipi_dsim_ddi *dsim_ddi;
+ struct mipi_dsim_lcd_driver *lcd_drv;
+ struct mipi_dsim_lcd_device *lcd_dev;
+ int ret;
+
+ mutex_lock(&dsim->lock);
+
+ list_for_each_entry(dsim_ddi, &dsim_ddi_list, list) {
+ lcd_drv = dsim_ddi->dsim_lcd_drv;
+ lcd_dev = dsim_ddi->dsim_lcd_dev;
+ if (!lcd_drv || !lcd_dev ||
+ (dsim->id != dsim_ddi->bus_id))
+ continue;
+
+ dev_dbg(dsim->dev, "lcd_drv->id = %d, lcd_dev->id = %d\n",
+ lcd_drv->id, lcd_dev->id);
+ dev_dbg(dsim->dev, "lcd_dev->bus_id = %d, dsim->id = %d\n",
+ lcd_dev->bus_id, dsim->id);
+
+ if ((strcmp(lcd_drv->name, name) = 0)) {
+ lcd_dev->master = dsim;
+
+ lcd_dev->dev.parent = dsim->dev;
+ dev_set_name(&lcd_dev->dev, "%s", lcd_drv->name);
+
+ ret = device_register(&lcd_dev->dev);
+ if (ret < 0) {
+ dev_err(dsim->dev,
+ "can't register %s, status %d\n",
+ dev_name(&lcd_dev->dev), ret);
+ mutex_unlock(&dsim->lock);
+
+ return NULL;
+ }
+
+ dsim->dsim_lcd_dev = lcd_dev;
+ dsim->dsim_lcd_drv = lcd_drv;
+
+ mutex_unlock(&dsim->lock);
+
+ return dsim_ddi;
+ }
+ }
+
+ mutex_unlock(&dsim->lock);
+
+ return NULL;
+}
+
+/* define MIPI-DSI Master operations. */
+static struct mipi_dsim_master_ops master_ops = {
+ .cmd_read = s5p_mipi_dsi_rd_data,
+ .cmd_write = s5p_mipi_dsi_wr_data,
+ .get_dsim_frame_done = s5p_mipi_dsi_get_frame_done_status,
+ .clear_dsim_frame_done = s5p_mipi_dsi_clear_frame_done,
+ .set_early_blank_mode = s5p_mipi_dsi_early_blank_mode,
+ .set_blank_mode = s5p_mipi_dsi_blank_mode,
+};
+
+static int s5p_mipi_dsi_probe(struct platform_device *pdev)
+{
+ struct resource *res;
+ struct mipi_dsim_device *dsim;
+ struct mipi_dsim_config *dsim_config;
+ struct mipi_dsim_platform_data *dsim_pd;
+ struct mipi_dsim_ddi *dsim_ddi;
+ int ret = -EINVAL;
+
+ dsim = kzalloc(sizeof(struct mipi_dsim_device), GFP_KERNEL);
+ if (!dsim) {
+ dev_err(&pdev->dev, "failed to allocate dsim object.\n");
+ return -EFAULT;
+ }
+
+ dsim->pd = to_dsim_plat(pdev);
+ dsim->dev = &pdev->dev;
+ dsim->id = pdev->id;
+
+ /* get mipi_dsim_platform_data. */
+ dsim_pd = (struct mipi_dsim_platform_data *)dsim->pd;
+ if (dsim_pd = NULL) {
+ dev_err(&pdev->dev, "failed to get platform data for dsim.\n");
+ return -EFAULT;
+ }
+ /* get mipi_dsim_config. */
+ dsim_config = dsim_pd->dsim_config;
+ if (dsim_config = NULL) {
+ dev_err(&pdev->dev, "failed to get dsim config data.\n");
+ return -EFAULT;
+ }
+
+ dsim->dsim_config = dsim_config;
+ dsim->master_ops = &master_ops;
+
+ dsim->clock = clk_get(&pdev->dev, "dsim0");
+ if (IS_ERR(dsim->clock)) {
+ dev_err(&pdev->dev, "failed to get dsim clock source\n");
+ goto err_clock_get;
+ }
+
+ clk_enable(dsim->clock);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "failed to get io memory region\n");
+ goto err_platform_get;
+ }
+
+ dsim->res = request_mem_region(res->start, resource_size(res),
+ dev_name(&pdev->dev));
+ if (!dsim->res) {
+ dev_err(&pdev->dev, "failed to request io memory region\n");
+ ret = -ENOMEM;
+ goto err_mem_region;
+ }
+
+ dsim->reg_base = ioremap(res->start, resource_size(res));
+ if (!dsim->reg_base) {
+ dev_err(&pdev->dev, "failed to remap io region\n");
+ ret = -EFAULT;
+ goto err_ioremap;
+ }
+
+ mutex_init(&dsim->lock);
+
+ /* bind lcd ddi matched with panel name. */
+ dsim_ddi = s5p_mipi_dsi_bind_lcd_ddi(dsim, dsim_pd->lcd_panel_name);
+ if (!dsim_ddi) {
+ dev_err(&pdev->dev, "mipi_dsim_ddi object not found.\n");
+ goto err_bind;
+ }
+
+ dsim->irq = platform_get_irq(pdev, 0);
+ if (dsim->irq < 0) {
+ dev_err(&pdev->dev, "failed to request dsim irq resource\n");
+ ret = -EINVAL;
+ goto err_platform_get_irq;
+ }
+
+ ret = request_irq(dsim->irq, s5p_mipi_dsi_interrupt_handler,
+ IRQF_SHARED, pdev->name, dsim);
+ if (ret != 0) {
+ dev_err(&pdev->dev, "failed to request dsim irq\n");
+ ret = -EINVAL;
+ goto err_bind;
+ }
+ init_completion(&dsim_rd_comp);
+
+ /* enable interrupt */
+ s5p_mipi_dsi_init_interrupt(dsim);
+
+ /* initialize mipi-dsi client(lcd panel). */
+ if (dsim_ddi->dsim_lcd_drv && dsim_ddi->dsim_lcd_drv->probe)
+ dsim_ddi->dsim_lcd_drv->probe(dsim_ddi->dsim_lcd_dev);
+
+ /* in case that mipi got enabled at bootloader. */
+ if (dsim_pd->enabled)
+ goto out;
+
+ /* lcd panel power on. */
+ if (dsim_ddi->dsim_lcd_drv && dsim_ddi->dsim_lcd_drv->power_on)
+ dsim_ddi->dsim_lcd_drv->power_on(dsim_ddi->dsim_lcd_dev);
+
+ if (dsim->pd->mipi_power)
+ dsim->pd->mipi_power(pdev, 1);
+
+ /* enable MIPI-DSI PHY. */
+ if (dsim->pd->phy_enable)
+ dsim->pd->phy_enable(pdev, true);
+
+ s5p_mipi_update_cfg(dsim);
+
+ /* set lcd panel sequence commands. */
+ if (dsim_ddi->dsim_lcd_drv && dsim_ddi->dsim_lcd_drv->set_sequence)
+ dsim_ddi->dsim_lcd_drv->set_sequence(dsim_ddi->dsim_lcd_dev);
+
+ atomic_set(&dsim->power_t, 1);
+
+out:
+ platform_set_drvdata(pdev, dsim);
+
+ dev_dbg(&pdev->dev, "mipi-dsi driver(%s mode) has been probed.\n",
+ (dsim_config->e_interface = DSIM_COMMAND) ?
+ "CPU" : "RGB");
+
+ return 0;
+
+err_bind:
+ iounmap((void __iomem *) dsim->reg_base);
+
+err_ioremap:
+ release_mem_region(dsim->res->start, resource_size(dsim->res));
+
+err_mem_region:
+ release_resource(dsim->res);
+
+err_platform_get:
+ clk_disable(dsim->clock);
+ clk_put(dsim->clock);
+
+err_clock_get:
+ kfree(dsim);
+
+err_platform_get_irq:
+ return ret;
+}
+
+static int __devexit s5p_mipi_dsi_remove(struct platform_device *pdev)
+{
+ struct mipi_dsim_device *dsim = platform_get_drvdata(pdev);
+ struct mipi_dsim_ddi *dsim_ddi;
+ struct mipi_dsim_lcd_driver *dsim_lcd_drv;
+
+ iounmap(dsim->reg_base);
+
+ clk_disable(dsim->clock);
+ clk_put(dsim->clock);
+
+ release_resource(dsim->res);
+ release_mem_region(dsim->res->start, resource_size(dsim->res));
+
+ list_for_each_entry(dsim_ddi, &dsim_ddi_list, list) {
+ if (dsim_ddi) {
+ if (dsim->id != dsim_ddi->bus_id)
+ continue;
+
+ dsim_lcd_drv = dsim_ddi->dsim_lcd_drv;
+
+ if (dsim_lcd_drv->remove)
+ dsim_lcd_drv->remove(dsim_ddi->dsim_lcd_dev);
+
+ kfree(dsim_ddi);
+ }
+ }
+
+ kfree(dsim);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int s5p_mipi_dsi_suspend(struct platform_device *pdev,
+ pm_message_t state)
+{
+ struct mipi_dsim_device *dsim = platform_get_drvdata(pdev);
+
+ disable_irq(dsim->irq);
+
+ if (!atomic_read(&dsim->power_t))
+ return 0;
+
+ if (master_to_driver(dsim) && (master_to_driver(dsim))->suspend)
+ (master_to_driver(dsim))->suspend(master_to_device(dsim));
+
+ /* enable MIPI-DSI PHY. */
+ if (dsim->pd->phy_enable)
+ dsim->pd->phy_enable(pdev, false);
+
+ clk_disable(dsim->clock);
+
+ if (dsim->pd->mipi_power)
+ dsim->pd->mipi_power(pdev, 0);
+
+ atomic_set(&dsim->power_t, 0);
+
+ return 0;
+}
+
+static int s5p_mipi_dsi_resume(struct platform_device *pdev)
+{
+ struct mipi_dsim_device *dsim = platform_get_drvdata(pdev);
+ struct mipi_dsim_lcd_driver *client_drv = master_to_driver(dsim);
+ struct mipi_dsim_lcd_device *client_dev = master_to_device(dsim);
+
+ enable_irq(dsim->irq);
+
+ if (atomic_read(&dsim->power_t))
+ return 0;
+
+ /* lcd panel power on. */
+ if (client_drv && client_drv->power_on)
+ client_drv->power_on(client_dev);
+
+ if (dsim->pd->mipi_power)
+ dsim->pd->mipi_power(pdev, 1);
+
+ /* enable MIPI-DSI PHY. */
+ if (dsim->pd->phy_enable)
+ dsim->pd->phy_enable(pdev, true);
+
+ clk_enable(dsim->clock);
+
+ s5p_mipi_update_cfg(dsim);
+
+ /* set lcd panel sequence commands. */
+ if (client_drv && client_drv->set_sequence)
+ client_drv->set_sequence(client_dev);
+
+ atomic_set(&dsim->power_t, 1);
+
+ return 0;
+}
+#else
+#define s5p_mipi_dsi_suspend NULL
+#define s5p_mipi_dsi_resume NULL
+#endif
+
+static struct platform_driver s5p_mipi_dsi_driver = {
+ .probe = s5p_mipi_dsi_probe,
+ .remove = __devexit_p(s5p_mipi_dsi_remove),
+ .suspend = s5p_mipi_dsi_suspend,
+ .resume = s5p_mipi_dsi_resume,
+ .driver = {
+ .name = "s5p-mipi-dsim",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int s5p_mipi_dsi_register(void)
+{
+ platform_driver_register(&s5p_mipi_dsi_driver);
+
+ return 0;
+}
+
+static void s5p_mipi_dsi_unregister(void)
+{
+ platform_driver_unregister(&s5p_mipi_dsi_driver);
+}
+
+module_init(s5p_mipi_dsi_register);
+module_exit(s5p_mipi_dsi_unregister);
+
+MODULE_AUTHOR("InKi Dae <inki.dae@samsung.com>");
+MODULE_DESCRIPTION("Samusung SoC MIPI-DSI driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/video/s5p_mipi_dsi_common.c b/drivers/video/s5p_mipi_dsi_common.c
new file mode 100644
index 0000000..f3452b2
--- /dev/null
+++ b/drivers/video/s5p_mipi_dsi_common.c
@@ -0,0 +1,931 @@
+/* linux/drivers/video/s5p_mipi_dsi_common.c
+ *
+ * Samsung SoC MIPI-DSI common driver.
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd
+ *
+ * InKi Dae, <inki.dae@samsung.com>
+ * Donghwa Lee, <dh09.lee@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/mutex.h>
+#include <linux/wait.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/fb.h>
+#include <linux/ctype.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/memory.h>
+#include <linux/delay.h>
+#include <linux/kthread.h>
+#include <linux/mipi_dsim.h>
+
+#include <video/mipi_display.h>
+
+#include <mach/map.h>
+#include <plat/mipi_dsim.h>
+
+#include "s5p_mipi_dsi_regs.h"
+#include "s5p_mipi_dsi_lowlevel.h"
+#include "s5p_mipi_dsi_common.h"
+
+#define MIPI_RX_TIMEOUT HZ
+#define MIPI_RX_FIFO_READ_DONE 0x30800002
+#define MIPI_MAX_RX_FIFO 20
+#define MHZ (1000 * 1000)
+#define FIN_HZ (24 * MHZ)
+
+#define DFIN_PLL_MIN_HZ (6 * MHZ)
+#define DFIN_PLL_MAX_HZ (12 * MHZ)
+
+#define DFVCO_MIN_HZ (500 * MHZ)
+#define DFVCO_MAX_HZ (1000 * MHZ)
+
+#define TRY_GET_FIFO_TIMEOUT (5000 * 2)
+
+/* MIPI-DSIM status types. */
+enum {
+ DSIM_STATE_INIT, /* should be initialized. */
+ DSIM_STATE_STOP, /* CPU and LCDC are LP mode. */
+ DSIM_STATE_HSCLKEN, /* HS clock was enabled. */
+ DSIM_STATE_ULPS
+};
+
+/* define DSI lane types. */
+enum {
+ DSIM_LANE_CLOCK = (1 << 0),
+ DSIM_LANE_DATA0 = (1 << 1),
+ DSIM_LANE_DATA1 = (1 << 2),
+ DSIM_LANE_DATA2 = (1 << 3),
+ DSIM_LANE_DATA3 = (1 << 4)
+};
+
+static unsigned int dpll_table[15] = {
+ 100, 120, 170, 220, 270,
+ 320, 390, 450, 510, 560,
+ 640, 690, 770, 870, 950
+};
+
+irqreturn_t s5p_mipi_dsi_interrupt_handler(int irq, void *dev_id)
+{
+ int i;
+ unsigned int intsrc = 0;
+ unsigned int intmsk = 0;
+ struct mipi_dsim_device *dsim = NULL;
+
+ dsim = (struct mipi_dsim_device *)dev_id;
+ if (!dsim) {
+ dev_dbg(dsim->dev, "%s:error:wrong parameter\n", __func__);
+ return IRQ_HANDLED;
+ }
+
+ intsrc = s5p_mipi_dsi_read_interrupt(dsim);
+ intmsk = s5p_mipi_dsi_read_interrupt_mask(dsim);
+
+ intmsk = ~(intmsk) & intsrc;
+
+ for (i = 0; i < 32; i++) {
+ switch (intmsk & (0x1 << i)) {
+ case INTMSK_RX_DONE:
+ complete(&dsim_rd_comp);
+ break;
+ case INTMSK_BTA:
+ /* TODO */
+ break;
+ case INTMSK_RX_TIMEOUT:
+ /* TODO */
+ break;
+ case INTMSK_BTA_TIMEOUT:
+ /* TODO */
+ break;
+ case INTMSK_RX_TE:
+ /* TODO */
+ break;
+ case INTMSK_RX_ACK:
+ /* TODO */
+ break;
+ case INTMSK_RX_ECC_ERR:
+ /* TODO */
+ break;
+ case INTMSK_RX_CRC_ERR:
+ /* TODO */
+ break;
+ case INTMSK_FIFO_EMPTY:
+ /* TODO */
+ break;
+ case INTMSK_FRAME_DONE:
+ /* TODO */
+ break;
+ default:
+ break;
+ }
+ }
+
+ /* clear irq */
+ s5p_mipi_dsi_clear_interrupt(dsim);
+
+ return IRQ_HANDLED;
+}
+
+static void s5p_mipi_dsi_long_data_wr(struct mipi_dsim_device *dsim,
+ unsigned int data0, unsigned int data1)
+{
+ unsigned int data_cnt = 0, payload = 0;
+
+ /* in case that data count is more then 4 */
+ for (data_cnt = 0; data_cnt < data1; data_cnt += 4) {
+ /*
+ * after sending 4bytes per one time,
+ * send remainder data less then 4.
+ */
+ if ((data1 - data_cnt) < 4) {
+ if ((data1 - data_cnt) = 3) {
+ payload = *(u8 *)(data0 + data_cnt) |
+ (*(u8 *)(data0 + (data_cnt + 1))) << 8 |
+ (*(u8 *)(data0 + (data_cnt + 2))) << 16;
+ dev_dbg(dsim->dev, "count = 3 payload = %x, %x %x %x\n",
+ payload, *(u8 *)(data0 + data_cnt),
+ *(u8 *)(data0 + (data_cnt + 1)),
+ *(u8 *)(data0 + (data_cnt + 2)));
+ } else if ((data1 - data_cnt) = 2) {
+ payload = *(u8 *)(data0 + data_cnt) |
+ (*(u8 *)(data0 + (data_cnt + 1))) << 8;
+ dev_dbg(dsim->dev,
+ "count = 2 payload = %x, %x %x\n", payload,
+ *(u8 *)(data0 + data_cnt),
+ *(u8 *)(data0 + (data_cnt + 1)));
+ } else if ((data1 - data_cnt) = 1) {
+ payload = *(u8 *)(data0 + data_cnt);
+ }
+
+ s5p_mipi_dsi_wr_tx_data(dsim, payload);
+ /* send 4bytes per one time. */
+ } else {
+ payload = *(u8 *)(data0 + data_cnt) |
+ (*(u8 *)(data0 + (data_cnt + 1))) << 8 |
+ (*(u8 *)(data0 + (data_cnt + 2))) << 16 |
+ (*(u8 *)(data0 + (data_cnt + 3))) << 24;
+
+ dev_dbg(dsim->dev,
+ "count = 4 payload = %x, %x %x %x %x\n",
+ payload, *(u8 *)(data0 + data_cnt),
+ *(u8 *)(data0 + (data_cnt + 1)),
+ *(u8 *)(data0 + (data_cnt + 2)),
+ *(u8 *)(data0 + (data_cnt + 3)));
+
+ s5p_mipi_dsi_wr_tx_data(dsim, payload);
+ }
+ }
+}
+
+int s5p_mipi_dsi_wr_data(struct mipi_dsim_device *dsim, unsigned int data_id,
+ unsigned int data0, unsigned int data1)
+{
+ unsigned int timeout = TRY_GET_FIFO_TIMEOUT;
+ unsigned long delay_val, udelay;
+ unsigned int check_rx_ack = 0;
+
+ if (dsim->state = DSIM_STATE_ULPS) {
+ dev_err(dsim->dev, "state is ULPS.\n");
+
+ return -EINVAL;
+ }
+
+ delay_val = MHZ / dsim->dsim_config->esc_clk;
+ udelay = 10 * delay_val;
+
+ mdelay(udelay);
+
+ /* only if transfer mode is LPDT, wait SFR becomes empty. */
+ if (dsim->state = DSIM_STATE_STOP) {
+ while (!(s5p_mipi_dsi_get_fifo_state(dsim) &
+ SFR_HEADER_EMPTY)) {
+ if ((timeout--) > 0)
+ mdelay(1);
+ else {
+ dev_err(dsim->dev,
+ "SRF header fifo is not empty.\n");
+ return -EINVAL;
+ }
+ }
+ }
+
+ switch (data_id) {
+ /* short packet types of packet types for command. */
+ case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+ case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+ case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+ case MIPI_DSI_DCS_SHORT_WRITE:
+ case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+ case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
+ s5p_mipi_dsi_wr_pkt_header(dsim, data_id, data0, data1);
+ if (check_rx_ack)
+ /* process response func should be implemented */
+ return 0;
+ else
+ return -EINVAL;
+
+ /* general command */
+ case MIPI_DSI_COLOR_MODE_OFF:
+ case MIPI_DSI_COLOR_MODE_ON:
+ case MIPI_DSI_SHUTDOWN_PERIPHERAL:
+ case MIPI_DSI_TURN_ON_PERIPHERAL:
+ s5p_mipi_dsi_wr_pkt_header(dsim, data_id, data0, data1);
+ if (check_rx_ack)
+ /* process response func should be implemented. */
+ return 0;
+ else
+ return -EINVAL;
+
+ /* packet types for video data */
+ case MIPI_DSI_V_SYNC_START:
+ case MIPI_DSI_V_SYNC_END:
+ case MIPI_DSI_H_SYNC_START:
+ case MIPI_DSI_H_SYNC_END:
+ case MIPI_DSI_END_OF_TRANSMISSION:
+ return 0;
+
+ /* short and response packet types for command */
+ case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM:
+ case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM:
+ case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM:
+ case MIPI_DSI_DCS_READ:
+ s5p_mipi_dsi_clear_all_interrupt(dsim);
+ s5p_mipi_dsi_wr_pkt_header(dsim, data_id, data0, data1);
+ /* process response func should be implemented. */
+ return 0;
+
+ /* long packet type and null packet */
+ case MIPI_DSI_NULL_PACKET:
+ case MIPI_DSI_BLANKING_PACKET:
+ return 0;
+ case MIPI_DSI_GENERIC_LONG_WRITE:
+ case MIPI_DSI_DCS_LONG_WRITE:
+ {
+ unsigned int size, data_cnt = 0, payload = 0;
+
+ size = data1 * 4;
+
+ /* if data count is less then 4, then send 3bytes data. */
+ if (data1 < 4) {
+ payload = *(u8 *)(data0) |
+ *(u8 *)(data0 + 1) << 8 |
+ *(u8 *)(data0 + 2) << 16;
+
+ s5p_mipi_dsi_wr_tx_data(dsim, payload);
+
+ dev_dbg(dsim->dev, "count = %d payload = %x,%x %x %x\n",
+ data1, payload,
+ *(u8 *)(data0 + data_cnt),
+ *(u8 *)(data0 + (data_cnt + 1)),
+ *(u8 *)(data0 + (data_cnt + 2)));
+ /* in case that data count is more then 4 */
+ } else
+ s5p_mipi_dsi_long_data_wr(dsim, data0, data1);
+
+ /* put data into header fifo */
+ s5p_mipi_dsi_wr_pkt_header(dsim, data_id, data1 & 0xff,
+ (data1 & 0xff00) >> 8);
+
+ }
+ if (check_rx_ack)
+ /* process response func should be implemented. */
+ return 0;
+ else
+ return -EINVAL;
+
+ /* packet typo for video data */
+ case MIPI_DSI_PACKED_PIXEL_STREAM_16:
+ case MIPI_DSI_PACKED_PIXEL_STREAM_18:
+ case MIPI_DSI_PIXEL_STREAM_3BYTE_18:
+ case MIPI_DSI_PACKED_PIXEL_STREAM_24:
+ if (check_rx_ack)
+ /* process response func should be implemented. */
+ return 0;
+ else
+ return -EINVAL;
+ default:
+ dev_warn(dsim->dev,
+ "data id %x is not supported current DSI spec.\n",
+ data_id);
+
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static unsigned int s5p_mipi_dsi_long_data_rd(struct mipi_dsim_device *dsim,
+ unsigned int req_size, unsigned int rx_data, u8 *rx_buf)
+{
+ unsigned int rcv_pkt, i, j;
+ u16 rxsize;
+
+ /* for long packet */
+ rxsize = (u16)((rx_data & 0x00ffff00) >> 8);
+ dev_dbg(dsim->dev, "mipi dsi rx size : %d\n", rxsize);
+ if (rxsize != req_size) {
+ dev_dbg(dsim->dev,
+ "received data size mismatch\n");
+ dev_dbg(dsim->dev,
+ "received: %d, requested: %d\n", rxsize, req_size);
+ goto err;
+ }
+
+ for (i = 0; i < (rxsize >> 2); i++) {
+ rcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim);
+ dev_dbg(dsim->dev, "received pkt : %08x\n", rcv_pkt);
+ for (j = 0; j < 4; j++) {
+ rx_buf[(i * 4) + j] + (u8)(rcv_pkt >> (j * 8)) & 0xff;
+ dev_dbg(dsim->dev, "received value : %02x\n",
+ (rcv_pkt >> (j * 8)) & 0xff);
+ }
+ }
+ if (rxsize % 4) {
+ rcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim);
+ dev_dbg(dsim->dev, "received pkt : %08x\n", rcv_pkt);
+ for (j = 0; j < (rxsize % 4); j++) {
+ rx_buf[(i * 4) + j] + (u8)(rcv_pkt >> (j * 8)) & 0xff;
+ dev_dbg(dsim->dev, "received value : %02x\n",
+ (rcv_pkt >> (j * 8)) & 0xff);
+ }
+ }
+
+ return rxsize;
+
+err:
+ return -EINVAL;
+}
+
+static unsigned int s5p_mipi_dsi_respense_size(unsigned int req_size)
+{
+ u8 response;
+ switch (req_size) {
+ case 1:
+ response = MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE;
+ break;
+ case 2:
+ response = MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE;
+ break;
+ default:
+ response = MIPI_DSI_RX_GENERIC_LONG_READ_RESPONSE;
+ break;
+ }
+
+ return response;
+}
+
+int s5p_mipi_dsi_rd_data(struct mipi_dsim_device *dsim, unsigned int data_id,
+ unsigned int data0, unsigned int req_size, u8 *rx_buf)
+{
+ unsigned int timeout = TRY_GET_FIFO_TIMEOUT;
+ unsigned long delay_val, udelay;
+ unsigned int rx_data, rcv_pkt, i;
+ u8 response = 0;
+ u16 rxsize;
+
+ if (dsim->state = DSIM_STATE_ULPS) {
+ dev_err(dsim->dev, "state is ULPS.\n");
+
+ return -EINVAL;
+ }
+
+ delay_val = MHZ / dsim->dsim_config->esc_clk;
+ udelay = 10 * delay_val;
+
+ msleep(udelay);
+
+ /* only if transfer mode is LPDT, wait SFR becomes empty. */
+ if (dsim->state = DSIM_STATE_STOP) {
+ while (!(s5p_mipi_dsi_get_fifo_state(dsim) &
+ SFR_HEADER_EMPTY)) {
+ if ((timeout--) > 0)
+ mdelay(1);
+ else {
+ dev_err(dsim->dev,
+ "SRF header fifo is not empty.\n");
+ return -EINVAL;
+ }
+ }
+ }
+
+ mutex_lock(&dsim->lock);
+ INIT_COMPLETION(dsim_rd_comp);
+ s5p_mipi_dsi_rd_pkt_header(dsim,
+ MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE, req_size);
+
+ response = s5p_mipi_dsi_respense_size(req_size);
+
+ msleep(udelay);
+
+ switch (data_id) {
+ case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM:
+ case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM:
+ case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM:
+ case MIPI_DSI_DCS_READ:
+ s5p_mipi_dsi_clear_all_interrupt(dsim);
+ s5p_mipi_dsi_rd_pkt_header(dsim,
+ data_id, data0);
+ /* process response func should be implemented. */
+ break;
+ default:
+ dev_warn(dsim->dev,
+ "data id %x is not supported current DSI spec.\n",
+ data_id);
+
+ return -EINVAL;
+ }
+
+ if (!wait_for_completion_interruptible_timeout(&dsim_rd_comp,
+ MIPI_RX_TIMEOUT)) {
+ printk(KERN_ERR "RX done interrupt timeout\n");
+ mutex_unlock(&dsim->lock);
+ return 0;
+ }
+
+ msleep(20);
+
+ rx_data = s5p_mipi_dsi_rd_rx_fifo(dsim);
+
+ if ((u8)(rx_data & 0xff) != response) {
+ printk(KERN_ERR
+ "mipi dsi wrong response rx_data : %x, response:%x\n",
+ rx_data, response);
+ goto clear_rx_fifo;
+ }
+
+ if (req_size <= 2) {
+ /* for short packet */
+ for (i = 0; i < req_size; i++)
+ rx_buf[i] = (rx_data >> (8 + (i * 8))) & 0xff;
+ rxsize = req_size;
+ } else {
+ /* for long packet */
+ rxsize = s5p_mipi_dsi_long_data_rd(dsim, req_size, rx_data,
+ rx_buf);
+ if (rxsize != req_size)
+ goto clear_rx_fifo;
+ }
+
+ rcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim);
+
+ msleep(20);
+
+ if (rcv_pkt != MIPI_RX_FIFO_READ_DONE) {
+ dev_info(dsim->dev,
+ "Can't found RX FIFO READ DONE FLAG : %x\n", rcv_pkt);
+ goto clear_rx_fifo;
+ }
+
+ mutex_unlock(&dsim->lock);
+
+ return rxsize;
+
+clear_rx_fifo:
+ i = 0;
+ while (1) {
+ rcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim);
+ if ((rcv_pkt = MIPI_RX_FIFO_READ_DONE)
+ || (i > MIPI_MAX_RX_FIFO))
+ break;
+ dev_dbg(dsim->dev,
+ "mipi dsi clear rx fifo : %08x\n", rcv_pkt);
+ i++;
+ }
+ dev_info(dsim->dev,
+ "mipi dsi rx done count : %d, rcv_pkt : %08x\n", i, rcv_pkt);
+
+ mutex_unlock(&dsim->lock);
+
+ return 0;
+}
+
+int s5p_mipi_dsi_pll_on(struct mipi_dsim_device *dsim, unsigned int enable)
+{
+ int sw_timeout;
+
+ if (enable) {
+ sw_timeout = 1000;
+
+ s5p_mipi_dsi_clear_interrupt(dsim);
+ s5p_mipi_dsi_enable_pll(dsim, 1);
+ while (1) {
+ sw_timeout--;
+ if (s5p_mipi_dsi_is_pll_stable(dsim))
+ return 0;
+ if (sw_timeout = 0)
+ return -EINVAL;
+ }
+ } else
+ s5p_mipi_dsi_enable_pll(dsim, 0);
+
+ return 0;
+}
+
+unsigned long s5p_mipi_dsi_change_pll(struct mipi_dsim_device *dsim,
+ unsigned int pre_divider, unsigned int main_divider,
+ unsigned int scaler)
+{
+ unsigned long dfin_pll, dfvco, dpll_out;
+ unsigned int i, freq_band = 0xf;
+
+ dfin_pll = (FIN_HZ / pre_divider);
+
+ /******************************************************
+ * Serial Clock(=ByteClk X 8) FreqBand[3:0] *
+ ******************************************************
+ * ~ 99.99 MHz 0000
+ * 100 ~ 119.99 MHz 0001
+ * 120 ~ 159.99 MHz 0010
+ * 160 ~ 199.99 MHz 0011
+ * 200 ~ 239.99 MHz 0100
+ * 140 ~ 319.99 MHz 0101
+ * 320 ~ 389.99 MHz 0110
+ * 390 ~ 449.99 MHz 0111
+ * 450 ~ 509.99 MHz 1000
+ * 510 ~ 559.99 MHz 1001
+ * 560 ~ 639.99 MHz 1010
+ * 640 ~ 689.99 MHz 1011
+ * 690 ~ 769.99 MHz 1100
+ * 770 ~ 869.99 MHz 1101
+ * 870 ~ 949.99 MHz 1110
+ * 950 ~ 1000 MHz 1111
+ ******************************************************/
+ if (dfin_pll < DFIN_PLL_MIN_HZ || dfin_pll > DFIN_PLL_MAX_HZ) {
+ dev_warn(dsim->dev, "fin_pll range should be 6MHz ~ 12MHz\n");
+ s5p_mipi_dsi_enable_afc(dsim, 0, 0);
+ } else {
+ if (dfin_pll < 7 * MHZ)
+ s5p_mipi_dsi_enable_afc(dsim, 1, 0x1);
+ else if (dfin_pll < 8 * MHZ)
+ s5p_mipi_dsi_enable_afc(dsim, 1, 0x0);
+ else if (dfin_pll < 9 * MHZ)
+ s5p_mipi_dsi_enable_afc(dsim, 1, 0x3);
+ else if (dfin_pll < 10 * MHZ)
+ s5p_mipi_dsi_enable_afc(dsim, 1, 0x2);
+ else if (dfin_pll < 11 * MHZ)
+ s5p_mipi_dsi_enable_afc(dsim, 1, 0x5);
+ else
+ s5p_mipi_dsi_enable_afc(dsim, 1, 0x4);
+ }
+
+ dfvco = dfin_pll * main_divider;
+ dev_dbg(dsim->dev, "dfvco = %lu, dfin_pll = %lu, main_divider = %d\n",
+ dfvco, dfin_pll, main_divider);
+ if (dfvco < DFVCO_MIN_HZ || dfvco > DFVCO_MAX_HZ)
+ dev_warn(dsim->dev, "fvco range should be 500MHz ~ 1000MHz\n");
+
+ dpll_out = dfvco / (1 << scaler);
+ dev_dbg(dsim->dev, "dpll_out = %lu, dfvco = %lu, scaler = %d\n",
+ dpll_out, dfvco, scaler);
+
+ for (i = 0; i < ARRAY_SIZE(dpll_table); i++) {
+ if (dpll_out < dpll_table[i] * MHZ) {
+ freq_band = i;
+ break;
+ }
+ }
+
+ dev_dbg(dsim->dev, "freq_band = %d\n", freq_band);
+
+ s5p_mipi_dsi_pll_freq(dsim, pre_divider, main_divider, scaler);
+
+ s5p_mipi_dsi_hs_zero_ctrl(dsim, 0);
+ s5p_mipi_dsi_prep_ctrl(dsim, 0);
+
+ /* Freq Band */
+ s5p_mipi_dsi_pll_freq_band(dsim, freq_band);
+
+ /* Stable time */
+ s5p_mipi_dsi_pll_stable_time(dsim, dsim->dsim_config->pll_stable_time);
+
+ /* Enable PLL */
+ dev_dbg(dsim->dev, "FOUT of mipi dphy pll is %luMHz\n",
+ (dpll_out / MHZ));
+
+ return dpll_out;
+}
+
+int s5p_mipi_dsi_set_clock(struct mipi_dsim_device *dsim,
+ unsigned int byte_clk_sel, unsigned int enable)
+{
+ unsigned int esc_div;
+ unsigned long esc_clk_error_rate;
+ unsigned long hs_clk = 0, byte_clk = 0, escape_clk = 0;
+
+ if (enable) {
+ dsim->e_clk_src = byte_clk_sel;
+
+ /* Escape mode clock and byte clock source */
+ s5p_mipi_dsi_set_byte_clock_src(dsim, byte_clk_sel);
+
+ /* DPHY, DSIM Link : D-PHY clock out */
+ if (byte_clk_sel = DSIM_PLL_OUT_DIV8) {
+ hs_clk = s5p_mipi_dsi_change_pll(dsim,
+ dsim->dsim_config->p, dsim->dsim_config->m,
+ dsim->dsim_config->s);
+ if (hs_clk = 0) {
+ dev_err(dsim->dev,
+ "failed to get hs clock.\n");
+ return -EINVAL;
+ }
+
+ byte_clk = hs_clk / 8;
+ s5p_mipi_dsi_enable_pll_bypass(dsim, 0);
+ s5p_mipi_dsi_pll_on(dsim, 1);
+ /* DPHY : D-PHY clock out, DSIM link : external clock out */
+ } else if (byte_clk_sel = DSIM_EXT_CLK_DIV8) {
+ dev_warn(dsim->dev, "this project is not support\n");
+ dev_warn(dsim->dev,
+ "external clock source for MIPI DSIM.\n");
+ } else if (byte_clk_sel = DSIM_EXT_CLK_BYPASS) {
+ dev_warn(dsim->dev, "this project is not support\n");
+ dev_warn(dsim->dev,
+ "external clock source for MIPI DSIM\n");
+ }
+
+ /* escape clock divider */
+ esc_div = byte_clk / (dsim->dsim_config->esc_clk);
+ dev_dbg(dsim->dev,
+ "esc_div = %d, byte_clk = %lu, esc_clk = %lu\n",
+ esc_div, byte_clk, dsim->dsim_config->esc_clk);
+ if ((byte_clk / esc_div) >= (20 * MHZ) ||
+ (byte_clk / esc_div) >
+ dsim->dsim_config->esc_clk)
+ esc_div += 1;
+
+ escape_clk = byte_clk / esc_div;
+ dev_dbg(dsim->dev,
+ "escape_clk = %lu, byte_clk = %lu, esc_div = %d\n",
+ escape_clk, byte_clk, esc_div);
+
+ /* enable escape clock. */
+ s5p_mipi_dsi_enable_byte_clock(dsim, 1);
+
+ /* enable byte clk and escape clock */
+ s5p_mipi_dsi_set_esc_clk_prs(dsim, 1, esc_div);
+ /* escape clock on lane */
+ s5p_mipi_dsi_enable_esc_clk_on_lane(dsim,
+ (DSIM_LANE_CLOCK | dsim->data_lane), 1);
+
+ dev_dbg(dsim->dev, "byte clock is %luMHz\n",
+ (byte_clk / MHZ));
+ dev_dbg(dsim->dev, "escape clock that user's need is %lu\n",
+ (dsim->dsim_config->esc_clk / MHZ));
+ dev_dbg(dsim->dev, "escape clock divider is %x\n", esc_div);
+ dev_dbg(dsim->dev, "escape clock is %luMHz\n",
+ ((byte_clk / esc_div) / MHZ));
+
+ if ((byte_clk / esc_div) > escape_clk) {
+ esc_clk_error_rate = escape_clk /
+ (byte_clk / esc_div);
+ dev_warn(dsim->dev, "error rate is %lu over.\n",
+ (esc_clk_error_rate / 100));
+ } else if ((byte_clk / esc_div) < (escape_clk)) {
+ esc_clk_error_rate = (byte_clk / esc_div) /
+ escape_clk;
+ dev_warn(dsim->dev, "error rate is %lu under.\n",
+ (esc_clk_error_rate / 100));
+ }
+ } else {
+ s5p_mipi_dsi_enable_esc_clk_on_lane(dsim,
+ (DSIM_LANE_CLOCK | dsim->data_lane), 0);
+ s5p_mipi_dsi_set_esc_clk_prs(dsim, 0, 0);
+
+ /* disable escape clock. */
+ s5p_mipi_dsi_enable_byte_clock(dsim, 0);
+
+ if (byte_clk_sel = DSIM_PLL_OUT_DIV8)
+ s5p_mipi_dsi_pll_on(dsim, 0);
+ }
+
+ return 0;
+}
+
+int s5p_mipi_dsi_init_dsim(struct mipi_dsim_device *dsim)
+{
+ dsim->state = DSIM_STATE_INIT;
+
+ switch (dsim->dsim_config->e_no_data_lane) {
+ case DSIM_DATA_LANE_1:
+ dsim->data_lane = DSIM_LANE_DATA0;
+ break;
+ case DSIM_DATA_LANE_2:
+ dsim->data_lane = DSIM_LANE_DATA0 | DSIM_LANE_DATA1;
+ break;
+ case DSIM_DATA_LANE_3:
+ dsim->data_lane = DSIM_LANE_DATA0 | DSIM_LANE_DATA1 |
+ DSIM_LANE_DATA2;
+ break;
+ case DSIM_DATA_LANE_4:
+ dsim->data_lane = DSIM_LANE_DATA0 | DSIM_LANE_DATA1 |
+ DSIM_LANE_DATA2 | DSIM_LANE_DATA3;
+ break;
+ default:
+ dev_info(dsim->dev, "data lane is invalid.\n");
+ return -EINVAL;
+ };
+
+ s5p_mipi_dsi_sw_reset(dsim);
+ s5p_mipi_dsi_func_reset(dsim);
+
+ s5p_mipi_dsi_dp_dn_swap(dsim, 0);
+
+ return 0;
+}
+
+void s5p_mipi_dsi_init_interrupt(struct mipi_dsim_device *dsim)
+{
+ unsigned int reg;
+
+ s5p_mipi_dsi_clear_all_interrupt(dsim);
+
+ reg = s5p_mipi_dsi_read_interrupt_mask(dsim);
+
+ reg &= (INTMSK_BTA | INTMSK_RX_TIMEOUT |
+ INTMSK_BTA_TIMEOUT | INTMSK_RX_DONE |
+ INTMSK_RX_TE | INTMSK_RX_ACK |
+ INTMSK_RX_ECC_ERR | INTMSK_RX_CRC_ERR |
+ INTMSK_FIFO_EMPTY);
+
+ s5p_mipi_dsi_set_interrupt_mask(dsim, reg, 0);
+}
+
+int s5p_mipi_dsi_enable_frame_done_int(struct mipi_dsim_device *dsim,
+ unsigned int enable)
+{
+ /* enable only frame done interrupt */
+ s5p_mipi_dsi_set_interrupt_mask(dsim, INTMSK_FRAME_DONE, enable);
+
+ return 0;
+}
+
+void s5p_mipi_dsi_stand_by(struct mipi_dsim_device *dsim,
+ unsigned int enable)
+{
+
+ /* consider Main display and Sub display. */
+
+ s5p_mipi_dsi_set_main_stand_by(dsim, enable);
+}
+
+int s5p_mipi_dsi_set_display_mode(struct mipi_dsim_device *dsim,
+ struct mipi_dsim_config *dsim_config)
+{
+ struct mipi_dsim_platform_data *dsim_pd;
+ struct fb_videomode *timing;
+
+ dsim_pd = (struct mipi_dsim_platform_data *)dsim->pd;
+ timing = (struct fb_videomode *)dsim_pd->lcd_panel_info;
+
+ /* in case of VIDEO MODE (RGB INTERFACE), it sets polarities. */
+ if (dsim_config->e_interface = (u32) DSIM_VIDEO) {
+ if (dsim_config->auto_vertical_cnt = 0) {
+ s5p_mipi_dsi_set_main_disp_vporch(dsim,
+ dsim_config->cmd_allow,
+ timing->upper_margin,
+ timing->lower_margin);
+ s5p_mipi_dsi_set_main_disp_hporch(dsim,
+ timing->left_margin,
+ timing->right_margin);
+ s5p_mipi_dsi_set_main_disp_sync_area(dsim,
+ timing->vsync_len,
+ timing->hsync_len);
+ }
+ }
+
+ s5p_mipi_dsi_set_main_disp_resol(dsim, timing->xres,
+ timing->yres);
+
+ s5p_mipi_dsi_display_config(dsim, dsim_config);
+
+ dev_info(dsim->dev, "lcd panel => width = %d, height = %d\n",
+ timing->xres, timing->yres);
+
+ return 0;
+}
+
+int s5p_mipi_dsi_init_link(struct mipi_dsim_device *dsim)
+{
+ unsigned int time_out = 100;
+
+ switch (dsim->state) {
+ case DSIM_STATE_INIT:
+ s5p_mipi_dsi_init_fifo_pointer(dsim, 0x1f);
+
+ /* dsi configuration */
+ s5p_mipi_dsi_init_config(dsim);
+ s5p_mipi_dsi_enable_lane(dsim, DSIM_LANE_CLOCK, 1);
+ s5p_mipi_dsi_enable_lane(dsim, dsim->data_lane, 1);
+
+ /* set clock configuration */
+ s5p_mipi_dsi_set_clock(dsim, dsim->dsim_config->e_byte_clk, 1);
+
+ /* check clock and data lane state are stop state */
+ while (!(s5p_mipi_dsi_is_lane_state(dsim))) {
+ time_out--;
+ if (time_out = 0) {
+ dev_err(dsim->dev,
+ "DSI Master is not stop state.\n");
+ dev_err(dsim->dev,
+ "Check initialization process\n");
+
+ return -EINVAL;
+ }
+ }
+ if (time_out != 0) {
+ dev_info(dsim->dev,
+ "DSI Master driver has been completed.\n");
+ dev_info(dsim->dev, "DSI Master state is stop state\n");
+ }
+
+ dsim->state = DSIM_STATE_STOP;
+
+ /* BTA sequence counters */
+ s5p_mipi_dsi_set_stop_state_counter(dsim,
+ dsim->dsim_config->stop_holding_cnt);
+ s5p_mipi_dsi_set_bta_timeout(dsim,
+ dsim->dsim_config->bta_timeout);
+ s5p_mipi_dsi_set_lpdr_timeout(dsim,
+ dsim->dsim_config->rx_timeout);
+
+ return 0;
+ default:
+ dev_info(dsim->dev, "DSI Master is already init.\n");
+ return 0;
+ }
+
+ return 0;
+}
+
+int s5p_mipi_dsi_set_hs_enable(struct mipi_dsim_device *dsim)
+{
+ if (dsim->state = DSIM_STATE_STOP) {
+ if (dsim->e_clk_src != DSIM_EXT_CLK_BYPASS) {
+ dsim->state = DSIM_STATE_HSCLKEN;
+
+ /* set LCDC and CPU transfer mode to HS. */
+ s5p_mipi_dsi_set_lcdc_transfer_mode(dsim, 0);
+ s5p_mipi_dsi_set_cpu_transfer_mode(dsim, 0);
+
+ s5p_mipi_dsi_enable_hs_clock(dsim, 1);
+
+ return 0;
+ } else
+ dev_warn(dsim->dev,
+ "clock source is external bypass.\n");
+ } else
+ dev_warn(dsim->dev, "DSIM is not stop state.\n");
+
+ return 0;
+}
+
+int s5p_mipi_dsi_set_data_transfer_mode(struct mipi_dsim_device *dsim,
+ unsigned int mode)
+{
+ if (mode) {
+ if (dsim->state != DSIM_STATE_HSCLKEN) {
+ dev_err(dsim->dev, "HS Clock lane is not enabled.\n");
+ return -EINVAL;
+ }
+
+ s5p_mipi_dsi_set_lcdc_transfer_mode(dsim, 0);
+ } else {
+ if (dsim->state = DSIM_STATE_INIT || dsim->state =
+ DSIM_STATE_ULPS) {
+ dev_err(dsim->dev,
+ "DSI Master is not STOP or HSDT state.\n");
+ return -EINVAL;
+ }
+
+ s5p_mipi_dsi_set_cpu_transfer_mode(dsim, 0);
+ }
+
+ return 0;
+}
+
+int s5p_mipi_dsi_get_frame_done_status(struct mipi_dsim_device *dsim)
+{
+ return _s5p_mipi_dsi_get_frame_done_status(dsim);
+}
+
+int s5p_mipi_dsi_clear_frame_done(struct mipi_dsim_device *dsim)
+{
+ _s5p_mipi_dsi_clear_frame_done(dsim);
+
+ return 0;
+}
+
+MODULE_AUTHOR("InKi Dae <inki.dae@samsung.com>");
+MODULE_DESCRIPTION("Samusung SoC MIPI-DSI common driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/video/s5p_mipi_dsi_common.h b/drivers/video/s5p_mipi_dsi_common.h
new file mode 100644
index 0000000..89f065a
--- /dev/null
+++ b/drivers/video/s5p_mipi_dsi_common.h
@@ -0,0 +1,48 @@
+/* linux/drivers/video/s5p_mipi_dsi_common.h
+ *
+ * Header file for Samsung SoC MIPI-DSI common driver.
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd
+ *
+ * InKi Dae <inki.dae@samsung.com>
+ * Donghwa Lee <dh09.lee@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef _S5P_MIPI_DSI_COMMON_H
+#define _S5P_MIPI_DSI_COMMON_H
+
+static DECLARE_COMPLETION(dsim_rd_comp);
+
+int s5p_mipi_dsi_wr_data(struct mipi_dsim_device *dsim, unsigned int data_id,
+ unsigned int data0, unsigned int data1);
+int s5p_mipi_dsi_rd_data(struct mipi_dsim_device *dsim, unsigned int data_id,
+ unsigned int data0, unsigned int req_size, u8 *rx_buf);
+int s5p_mipi_dsi_pll_on(struct mipi_dsim_device *dsim, unsigned int enable);
+unsigned long s5p_mipi_dsi_change_pll(struct mipi_dsim_device *dsim,
+ unsigned int pre_divider, unsigned int main_divider,
+ unsigned int scaler);
+irqreturn_t s5p_mipi_dsi_interrupt_handler(int irq, void *dev_id);
+void s5p_mipi_dsi_init_interrupt(struct mipi_dsim_device *dsim);
+int s5p_mipi_dsi_set_clock(struct mipi_dsim_device *dsim,
+ unsigned int byte_clk_sel, unsigned int enable);
+int s5p_mipi_dsi_init_dsim(struct mipi_dsim_device *dsim);
+void s5p_mipi_dsi_stand_by(struct mipi_dsim_device *dsim,
+ unsigned int enable);
+int s5p_mipi_dsi_set_display_mode(struct mipi_dsim_device *dsim,
+ struct mipi_dsim_config *dsim_info);
+int s5p_mipi_dsi_init_link(struct mipi_dsim_device *dsim);
+int s5p_mipi_dsi_set_hs_enable(struct mipi_dsim_device *dsim);
+int s5p_mipi_dsi_set_data_transfer_mode(struct mipi_dsim_device *dsim,
+ unsigned int mode);
+int s5p_mipi_dsi_enable_frame_done_int(struct mipi_dsim_device *dsim,
+ unsigned int enable);
+int s5p_mipi_dsi_get_frame_done_status(struct mipi_dsim_device *dsim);
+int s5p_mipi_dsi_clear_frame_done(struct mipi_dsim_device *dsim);
+
+extern struct fb_info *registered_fb[FB_MAX] __read_mostly;
+
+#endif /* _S5P_MIPI_DSI_COMMON_H */
diff --git a/drivers/video/s5p_mipi_dsi_lowlevel.c b/drivers/video/s5p_mipi_dsi_lowlevel.c
new file mode 100644
index 0000000..e6a9358
--- /dev/null
+++ b/drivers/video/s5p_mipi_dsi_lowlevel.c
@@ -0,0 +1,608 @@
+/* linux/drivers/video/s5p_mipi_dsi_lowlevel.c
+ *
+ * Samsung SoC MIPI-DSI lowlevel driver.
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd
+ *
+ * InKi Dae, <inki.dae@samsung.com>
+ * Donghwa Lee, <dh09.lee@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/mutex.h>
+#include <linux/wait.h>
+#include <linux/delay.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/ctype.h>
+#include <linux/io.h>
+#include <linux/mipi_dsim.h>
+
+#include <mach/map.h>
+#include <plat/mipi_dsim.h>
+
+#include "s5p_mipi_dsi_regs.h"
+
+void s5p_mipi_dsi_func_reset(struct mipi_dsim_device *dsim)
+{
+ unsigned int reg;
+
+ reg = readl(dsim->reg_base + S5P_DSIM_SWRST);
+
+ reg |= DSIM_FUNCRST;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_SWRST);
+}
+
+void s5p_mipi_dsi_sw_reset(struct mipi_dsim_device *dsim)
+{
+ unsigned int reg;
+
+ reg = readl(dsim->reg_base + S5P_DSIM_SWRST);
+
+ reg |= DSIM_SWRST;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_SWRST);
+}
+
+unsigned int s5p_mipi_dsi_read_interrupt_mask(struct mipi_dsim_device *dsim)
+{
+ unsigned int reg;
+
+ reg = readl(dsim->reg_base + S5P_DSIM_INTMSK);
+
+ return reg;
+}
+
+void s5p_mipi_dsi_set_interrupt_mask(struct mipi_dsim_device *dsim,
+ unsigned int mode, unsigned int mask)
+{
+ unsigned int reg = readl(dsim->reg_base + S5P_DSIM_INTMSK);
+
+ if (mask)
+ reg |= mode;
+ else
+ reg &= ~mode;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_INTMSK);
+}
+
+void s5p_mipi_dsi_init_fifo_pointer(struct mipi_dsim_device *dsim,
+ unsigned int cfg)
+{
+ unsigned int reg;
+
+ reg = readl(dsim->reg_base + S5P_DSIM_FIFOCTRL);
+
+ writel(reg & ~(cfg), dsim->reg_base + S5P_DSIM_FIFOCTRL);
+ mdelay(10);
+ reg |= cfg;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_FIFOCTRL);
+}
+
+/*
+ * this function set PLL P, M and S value in D-PHY
+ */
+void s5p_mipi_dsi_set_phy_tunning(struct mipi_dsim_device *dsim,
+ unsigned int value)
+{
+ writel(DSIM_AFC_CTL(value), dsim->reg_base + S5P_DSIM_PHYACCHR);
+}
+
+void s5p_mipi_dsi_set_main_stand_by(struct mipi_dsim_device *dsim,
+ unsigned int enable)
+{
+ unsigned int reg;
+
+ reg = readl(dsim->reg_base + S5P_DSIM_MDRESOL);
+
+ reg &= ~DSIM_MAIN_STAND_BY;
+
+ if (enable)
+ reg |= DSIM_MAIN_STAND_BY;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_MDRESOL);
+}
+
+void s5p_mipi_dsi_set_main_disp_resol(struct mipi_dsim_device *dsim,
+ unsigned int width_resol, unsigned int height_resol)
+{
+ unsigned int reg;
+
+ /* standby should be set after configuration so set to not ready*/
+ reg = (readl(dsim->reg_base + S5P_DSIM_MDRESOL)) &
+ ~(DSIM_MAIN_STAND_BY);
+ writel(reg, dsim->reg_base + S5P_DSIM_MDRESOL);
+
+ reg &= ~((0x7ff << 16) | (0x7ff << 0));
+ reg |= DSIM_MAIN_VRESOL(height_resol) | DSIM_MAIN_HRESOL(width_resol);
+
+ reg |= DSIM_MAIN_STAND_BY;
+ writel(reg, dsim->reg_base + S5P_DSIM_MDRESOL);
+}
+
+void s5p_mipi_dsi_set_main_disp_vporch(struct mipi_dsim_device *dsim,
+ unsigned int cmd_allow, unsigned int vfront, unsigned int vback)
+{
+ unsigned int reg;
+
+ reg = (readl(dsim->reg_base + S5P_DSIM_MVPORCH)) &
+ ~((DSIM_CMD_ALLOW_MASK) | (DSIM_STABLE_VFP_MASK) |
+ (DSIM_MAIN_VBP_MASK));
+
+ reg |= ((cmd_allow & 0xf) << DSIM_CMD_ALLOW_SHIFT) |
+ ((vfront & 0x7ff) << DSIM_STABLE_VFP_SHIFT) |
+ ((vback & 0x7ff) << DSIM_MAIN_VBP_SHIFT);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_MVPORCH);
+}
+
+void s5p_mipi_dsi_set_main_disp_hporch(struct mipi_dsim_device *dsim,
+ unsigned int front, unsigned int back)
+{
+ unsigned int reg;
+
+ reg = (readl(dsim->reg_base + S5P_DSIM_MHPORCH)) &
+ ~((DSIM_MAIN_HFP_MASK) | (DSIM_MAIN_HBP_MASK));
+
+ reg |= (front << DSIM_MAIN_HFP_SHIFT) | (back << DSIM_MAIN_HBP_SHIFT);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_MHPORCH);
+}
+
+void s5p_mipi_dsi_set_main_disp_sync_area(struct mipi_dsim_device *dsim,
+ unsigned int vert, unsigned int hori)
+{
+ unsigned int reg;
+
+ reg = (readl(dsim->reg_base + S5P_DSIM_MSYNC)) &
+ ~((DSIM_MAIN_VSA_MASK) | (DSIM_MAIN_HSA_MASK));
+
+ reg |= ((vert & 0x3ff) << DSIM_MAIN_VSA_SHIFT) |
+ (hori << DSIM_MAIN_HSA_SHIFT);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_MSYNC);
+}
+
+void s5p_mipi_dsi_set_sub_disp_resol(struct mipi_dsim_device *dsim,
+ unsigned int vert, unsigned int hori)
+{
+ unsigned int reg;
+
+ reg = (readl(dsim->reg_base + S5P_DSIM_SDRESOL)) &
+ ~(DSIM_SUB_STANDY_MASK);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_SDRESOL);
+
+ reg &= ~(DSIM_SUB_VRESOL_MASK) | ~(DSIM_SUB_HRESOL_MASK);
+ reg |= ((vert & 0x7ff) << DSIM_SUB_VRESOL_SHIFT) |
+ ((hori & 0x7ff) << DSIM_SUB_HRESOL_SHIFT);
+ writel(reg, dsim->reg_base + S5P_DSIM_SDRESOL);
+
+ reg |= (1 << DSIM_SUB_STANDY_SHIFT);
+ writel(reg, dsim->reg_base + S5P_DSIM_SDRESOL);
+}
+
+void s5p_mipi_dsi_init_config(struct mipi_dsim_device *dsim)
+{
+ struct mipi_dsim_config *dsim_config = dsim->dsim_config;
+
+ unsigned int cfg = (readl(dsim->reg_base + S5P_DSIM_CONFIG)) &
+ ~((1 << 28) | (0x1f << 20) | (0x3 << 5));
+
+ cfg = (dsim_config->auto_flush << 29) |
+ (dsim_config->eot_disable << 28) |
+ (dsim_config->auto_vertical_cnt << DSIM_AUTO_MODE_SHIFT) |
+ (dsim_config->hse << DSIM_HSE_MODE_SHIFT) |
+ (dsim_config->hfp << DSIM_HFP_MODE_SHIFT) |
+ (dsim_config->hbp << DSIM_HBP_MODE_SHIFT) |
+ (dsim_config->hsa << DSIM_HSA_MODE_SHIFT) |
+ (dsim_config->e_no_data_lane << DSIM_NUM_OF_DATALANE_SHIFT);
+
+ writel(cfg, dsim->reg_base + S5P_DSIM_CONFIG);
+}
+
+void s5p_mipi_dsi_display_config(struct mipi_dsim_device *dsim,
+ struct mipi_dsim_config *dsim_config)
+{
+ u32 reg = (readl(dsim->reg_base + S5P_DSIM_CONFIG)) &
+ ~((0x3 << 26) | (1 << 25) | (0x3 << 18) | (0x7 << 12) |
+ (0x3 << 16) | (0x7 << 8));
+
+ if (dsim_config->e_interface = DSIM_VIDEO)
+ reg |= (1 << 25);
+ else if (dsim_config->e_interface = DSIM_COMMAND)
+ reg &= ~(1 << 25);
+ else {
+ dev_err(dsim->dev, "unknown lcd type.\n");
+ return;
+ }
+
+ /* main lcd */
+ reg |= ((u8) (dsim_config->e_burst_mode) & 0x3) << 26 |
+ ((u8) (dsim_config->e_virtual_ch) & 0x3) << 18 |
+ ((u8) (dsim_config->e_pixel_format) & 0x7) << 12;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_CONFIG);
+}
+
+void s5p_mipi_dsi_enable_lane(struct mipi_dsim_device *dsim, unsigned int lane,
+ unsigned int enable)
+{
+ unsigned int reg;
+
+ reg = readl(dsim->reg_base + S5P_DSIM_CONFIG);
+
+ if (enable)
+ reg |= DSIM_LANE_ENx(lane);
+ else
+ reg &= ~DSIM_LANE_ENx(lane);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_CONFIG);
+}
+
+
+void s5p_mipi_dsi_set_data_lane_number(struct mipi_dsim_device *dsim,
+ unsigned int count)
+{
+ unsigned int cfg;
+
+ /* get the data lane number. */
+ cfg = DSIM_NUM_OF_DATA_LANE(count);
+
+ writel(cfg, dsim->reg_base + S5P_DSIM_CONFIG);
+}
+
+void s5p_mipi_dsi_enable_afc(struct mipi_dsim_device *dsim, unsigned int enable,
+ unsigned int afc_code)
+{
+ unsigned int reg = readl(dsim->reg_base + S5P_DSIM_PHYACCHR);
+
+ if (enable) {
+ reg |= (1 << 14);
+ reg &= ~(0x7 << 5);
+ reg |= (afc_code & 0x7) << 5;
+ } else
+ reg &= ~(1 << 14);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_PHYACCHR);
+}
+
+void s5p_mipi_dsi_enable_pll_bypass(struct mipi_dsim_device *dsim,
+ unsigned int enable)
+{
+ unsigned int reg = (readl(dsim->reg_base + S5P_DSIM_CLKCTRL)) &
+ ~(DSIM_PLL_BYPASS_EXTERNAL);
+
+ reg |= enable << DSIM_PLL_BYPASS_SHIFT;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_CLKCTRL);
+}
+
+void s5p_mipi_dsi_set_pll_pms(struct mipi_dsim_device *dsim, unsigned int p,
+ unsigned int m, unsigned int s)
+{
+ unsigned int reg = readl(dsim->reg_base + S5P_DSIM_PLLCTRL);
+
+ reg |= ((p & 0x3f) << 13) | ((m & 0x1ff) << 4) | ((s & 0x7) << 1);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_PLLCTRL);
+}
+
+void s5p_mipi_dsi_pll_freq_band(struct mipi_dsim_device *dsim,
+ unsigned int freq_band)
+{
+ unsigned int reg = (readl(dsim->reg_base + S5P_DSIM_PLLCTRL)) &
+ ~(0x1f << DSIM_FREQ_BAND_SHIFT);
+
+ reg |= ((freq_band & 0x1f) << DSIM_FREQ_BAND_SHIFT);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_PLLCTRL);
+}
+
+void s5p_mipi_dsi_pll_freq(struct mipi_dsim_device *dsim,
+ unsigned int pre_divider, unsigned int main_divider,
+ unsigned int scaler)
+{
+ unsigned int reg = (readl(dsim->reg_base + S5P_DSIM_PLLCTRL)) &
+ ~(0x7ffff << 1);
+
+ reg |= (pre_divider & 0x3f) << 13 | (main_divider & 0x1ff) << 4 |
+ (scaler & 0x7) << 1;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_PLLCTRL);
+}
+
+void s5p_mipi_dsi_pll_stable_time(struct mipi_dsim_device *dsim,
+ unsigned int lock_time)
+{
+ writel(lock_time, dsim->reg_base + S5P_DSIM_PLLTMR);
+}
+
+void s5p_mipi_dsi_enable_pll(struct mipi_dsim_device *dsim, unsigned int enable)
+{
+ unsigned int reg = (readl(dsim->reg_base + S5P_DSIM_PLLCTRL)) &
+ ~(0x1 << DSIM_PLL_EN_SHIFT);
+
+ reg |= ((enable & 0x1) << DSIM_PLL_EN_SHIFT);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_PLLCTRL);
+}
+
+void s5p_mipi_dsi_set_byte_clock_src(struct mipi_dsim_device *dsim,
+ unsigned int src)
+{
+ unsigned int reg = (readl(dsim->reg_base + S5P_DSIM_CLKCTRL)) &
+ ~(0x3 << DSIM_BYTE_CLK_SRC_SHIFT);
+
+ reg |= ((unsigned int) src) << DSIM_BYTE_CLK_SRC_SHIFT;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_CLKCTRL);
+}
+
+void s5p_mipi_dsi_enable_byte_clock(struct mipi_dsim_device *dsim,
+ unsigned int enable)
+{
+ unsigned int reg = (readl(dsim->reg_base + S5P_DSIM_CLKCTRL)) &
+ ~(1 << DSIM_BYTE_CLKEN_SHIFT);
+
+ reg |= enable << DSIM_BYTE_CLKEN_SHIFT;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_CLKCTRL);
+}
+
+void s5p_mipi_dsi_set_esc_clk_prs(struct mipi_dsim_device *dsim,
+ unsigned int enable, unsigned int prs_val)
+{
+ unsigned int reg = (readl(dsim->reg_base + S5P_DSIM_CLKCTRL)) &
+ ~((1 << DSIM_ESC_CLKEN_SHIFT) | (0xffff));
+
+ reg |= enable << DSIM_ESC_CLKEN_SHIFT;
+ if (enable)
+ reg |= prs_val;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_CLKCTRL);
+}
+
+void s5p_mipi_dsi_enable_esc_clk_on_lane(struct mipi_dsim_device *dsim,
+ unsigned int lane_sel, unsigned int enable)
+{
+ unsigned int reg = readl(dsim->reg_base + S5P_DSIM_CLKCTRL);
+
+ if (enable)
+ reg |= DSIM_LANE_ESC_CLKEN(lane_sel);
+ else
+
+ reg &= ~DSIM_LANE_ESC_CLKEN(lane_sel);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_CLKCTRL);
+}
+
+void s5p_mipi_dsi_force_dphy_stop_state(struct mipi_dsim_device *dsim,
+ unsigned int enable)
+{
+ unsigned int reg = (readl(dsim->reg_base + S5P_DSIM_ESCMODE)) &
+ ~(0x1 << DSIM_FORCE_STOP_STATE_SHIFT);
+
+ reg |= ((enable & 0x1) << DSIM_FORCE_STOP_STATE_SHIFT);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_ESCMODE);
+}
+
+unsigned int s5p_mipi_dsi_is_lane_state(struct mipi_dsim_device *dsim)
+{
+ unsigned int reg = readl(dsim->reg_base + S5P_DSIM_STATUS);
+
+ /**
+ * check clock and data lane states.
+ * if MIPI-DSI controller was enabled at bootloader then
+ * TX_READY_HS_CLK is enabled otherwise STOP_STATE_CLK.
+ * so it should be checked for two case.
+ */
+ if ((reg & DSIM_STOP_STATE_DAT(0xf)) &&
+ ((reg & DSIM_STOP_STATE_CLK) ||
+ (reg & DSIM_TX_READY_HS_CLK)))
+ return 1;
+ else
+ return 0;
+
+ return 0;
+}
+
+void s5p_mipi_dsi_set_stop_state_counter(struct mipi_dsim_device *dsim,
+ unsigned int cnt_val)
+{
+ unsigned int reg = (readl(dsim->reg_base + S5P_DSIM_ESCMODE)) &
+ ~(0x7ff << DSIM_STOP_STATE_CNT_SHIFT);
+
+ reg |= ((cnt_val & 0x7ff) << DSIM_STOP_STATE_CNT_SHIFT);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_ESCMODE);
+}
+
+void s5p_mipi_dsi_set_bta_timeout(struct mipi_dsim_device *dsim,
+ unsigned int timeout)
+{
+ unsigned int reg = (readl(dsim->reg_base + S5P_DSIM_TIMEOUT)) &
+ ~(0xff << DSIM_BTA_TOUT_SHIFT);
+
+ reg |= (timeout << DSIM_BTA_TOUT_SHIFT);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_TIMEOUT);
+}
+
+void s5p_mipi_dsi_set_lpdr_timeout(struct mipi_dsim_device *dsim,
+ unsigned int timeout)
+{
+ unsigned int reg = (readl(dsim->reg_base + S5P_DSIM_TIMEOUT)) &
+ ~(0xffff << DSIM_LPDR_TOUT_SHIFT);
+
+ reg |= (timeout << DSIM_LPDR_TOUT_SHIFT);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_TIMEOUT);
+}
+
+void s5p_mipi_dsi_set_cpu_transfer_mode(struct mipi_dsim_device *dsim,
+ unsigned int lp)
+{
+ unsigned int reg = readl(dsim->reg_base + S5P_DSIM_ESCMODE);
+
+ reg &= ~DSIM_CMD_LPDT_LP;
+
+ if (lp)
+ reg |= DSIM_CMD_LPDT_LP;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_ESCMODE);
+}
+
+void s5p_mipi_dsi_set_lcdc_transfer_mode(struct mipi_dsim_device *dsim,
+ unsigned int lp)
+{
+ unsigned int reg = readl(dsim->reg_base + S5P_DSIM_ESCMODE);
+
+ reg &= ~DSIM_TX_LPDT_LP;
+
+ if (lp)
+ reg |= DSIM_TX_LPDT_LP;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_ESCMODE);
+}
+
+void s5p_mipi_dsi_enable_hs_clock(struct mipi_dsim_device *dsim,
+ unsigned int enable)
+{
+ unsigned int reg = (readl(dsim->reg_base + S5P_DSIM_CLKCTRL)) &
+ ~(1 << DSIM_TX_REQUEST_HSCLK_SHIFT);
+
+ reg |= enable << DSIM_TX_REQUEST_HSCLK_SHIFT;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_CLKCTRL);
+}
+
+void s5p_mipi_dsi_dp_dn_swap(struct mipi_dsim_device *dsim,
+ unsigned int swap_en)
+{
+ unsigned int reg = readl(dsim->reg_base + S5P_DSIM_PHYACCHR1);
+
+ reg &= ~(0x3 << 0);
+ reg |= (swap_en & 0x3) << 0;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_PHYACCHR1);
+}
+
+void s5p_mipi_dsi_hs_zero_ctrl(struct mipi_dsim_device *dsim,
+ unsigned int hs_zero)
+{
+ unsigned int reg = (readl(dsim->reg_base + S5P_DSIM_PLLCTRL)) &
+ ~(0xf << 28);
+
+ reg |= ((hs_zero & 0xf) << 28);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_PLLCTRL);
+}
+
+void s5p_mipi_dsi_prep_ctrl(struct mipi_dsim_device *dsim, unsigned int prep)
+{
+ unsigned int reg = (readl(dsim->reg_base + S5P_DSIM_PLLCTRL)) &
+ ~(0x7 << 20);
+
+ reg |= ((prep & 0x7) << 20);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_PLLCTRL);
+}
+
+unsigned int s5p_mipi_dsi_read_interrupt(struct mipi_dsim_device *dsim)
+{
+ unsigned int reg = readl(dsim->reg_base + S5P_DSIM_INTSRC);
+
+ return reg;
+}
+
+void s5p_mipi_dsi_clear_interrupt(struct mipi_dsim_device *dsim)
+{
+ unsigned int reg = readl(dsim->reg_base + S5P_DSIM_INTSRC);
+
+ reg |= INTSRC_PLL_STABLE;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_INTSRC);
+}
+
+void s5p_mipi_dsi_clear_all_interrupt(struct mipi_dsim_device *dsim)
+{
+ unsigned int reg = readl(dsim->reg_base + S5P_DSIM_INTSRC);
+
+ reg |= 0xffffffff;
+
+ writel(reg, dsim->reg_base + S5P_DSIM_INTSRC);
+}
+
+unsigned int s5p_mipi_dsi_is_pll_stable(struct mipi_dsim_device *dsim)
+{
+ unsigned int reg;
+
+ reg = readl(dsim->reg_base + S5P_DSIM_STATUS);
+
+ return reg & (1 << 31) ? 1 : 0;
+}
+
+unsigned int s5p_mipi_dsi_get_fifo_state(struct mipi_dsim_device *dsim)
+{
+ unsigned int ret;
+
+ ret = readl(dsim->reg_base + S5P_DSIM_FIFOCTRL) & ~(0x1f);
+
+ return ret;
+}
+
+void s5p_mipi_dsi_wr_pkt_header(struct mipi_dsim_device *dsim,
+ unsigned int di, unsigned int data0, unsigned int data1)
+{
+ unsigned int reg = (data1 << 16) | (data0 << 8) | ((di & 0x3f) << 0);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_PKTHDR);
+}
+
+void s5p_mipi_dsi_rd_pkt_header(struct mipi_dsim_device *dsim,
+ unsigned int di, unsigned int data0)
+{
+ unsigned int reg = (data0 << 8) | (di << 0);
+
+ writel(reg, dsim->reg_base + S5P_DSIM_PKTHDR);
+}
+
+unsigned int s5p_mipi_dsi_rd_rx_fifo(struct mipi_dsim_device *dsim)
+{
+ unsigned int reg = 0;
+
+ reg = readl(dsim->reg_base + S5P_DSIM_RXFIFO);
+
+ return reg;
+}
+
+unsigned int _s5p_mipi_dsi_get_frame_done_status(struct mipi_dsim_device *dsim)
+{
+ unsigned int reg = readl(dsim->reg_base + S5P_DSIM_INTSRC);
+
+ return (reg & INTSRC_FRAME_DONE) ? 1 : 0;
+}
+
+void _s5p_mipi_dsi_clear_frame_done(struct mipi_dsim_device *dsim)
+{
+ unsigned int reg = readl(dsim->reg_base + S5P_DSIM_INTSRC);
+
+ writel(reg | INTSRC_FRAME_DONE, dsim->reg_base +
+ S5P_DSIM_INTSRC);
+}
+
+void s5p_mipi_dsi_wr_tx_data(struct mipi_dsim_device *dsim,
+ unsigned int tx_data)
+{
+ writel(tx_data, dsim->reg_base + S5P_DSIM_PAYLOAD);
+}
diff --git a/drivers/video/s5p_mipi_dsi_lowlevel.h b/drivers/video/s5p_mipi_dsi_lowlevel.h
new file mode 100644
index 0000000..d224fce
--- /dev/null
+++ b/drivers/video/s5p_mipi_dsi_lowlevel.h
@@ -0,0 +1,108 @@
+/* linux/drivers/video/s5p_mipi_dsi_lowlevel.h
+ *
+ * Header file for Samsung SoC MIPI-DSI lowlevel driver.
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd
+ *
+ * InKi Dae <inki.dae@samsung.com>
+ * Donghwa Lee <dh09.lee@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef _S5P_MIPI_DSI_LOWLEVEL_H
+#define _S5P_MIPI_DSI_LOWLEVEL_H
+
+void s5p_mipi_dsi_func_reset(struct mipi_dsim_device *dsim);
+void s5p_mipi_dsi_sw_reset(struct mipi_dsim_device *dsim);
+void s5p_mipi_dsi_set_interrupt_mask(struct mipi_dsim_device *dsim,
+ unsigned int mode, unsigned int mask);
+void s5p_mipi_dsi_set_data_lane_number(struct mipi_dsim_device *dsim,
+ unsigned int count);
+void s5p_mipi_dsi_init_fifo_pointer(struct mipi_dsim_device *dsim,
+ unsigned int cfg);
+void s5p_mipi_dsi_set_phy_tunning(struct mipi_dsim_device *dsim,
+ unsigned int value);
+void s5p_mipi_dsi_set_phy_tunning(struct mipi_dsim_device *dsim,
+ unsigned int value);
+void s5p_mipi_dsi_set_main_stand_by(struct mipi_dsim_device *dsim,
+ unsigned int enable);
+void s5p_mipi_dsi_set_main_disp_resol(struct mipi_dsim_device *dsim,
+ unsigned int width_resol, unsigned int height_resol);
+void s5p_mipi_dsi_set_main_disp_vporch(struct mipi_dsim_device *dsim,
+ unsigned int cmd_allow, unsigned int vfront, unsigned int vback);
+void s5p_mipi_dsi_set_main_disp_hporch(struct mipi_dsim_device *dsim,
+ unsigned int front, unsigned int back);
+void s5p_mipi_dsi_set_main_disp_sync_area(struct mipi_dsim_device *dsim,
+ unsigned int vert, unsigned int hori);
+void s5p_mipi_dsi_set_sub_disp_resol(struct mipi_dsim_device *dsim,
+ unsigned int vert, unsigned int hori);
+void s5p_mipi_dsi_init_config(struct mipi_dsim_device *dsim);
+void s5p_mipi_dsi_display_config(struct mipi_dsim_device *dsim,
+ struct mipi_dsim_config *dsim_config);
+void s5p_mipi_dsi_set_data_lane_number(struct mipi_dsim_device *dsim,
+ unsigned int count);
+void s5p_mipi_dsi_enable_lane(struct mipi_dsim_device *dsim, unsigned int lane,
+ unsigned int enable);
+void s5p_mipi_dsi_enable_afc(struct mipi_dsim_device *dsim, unsigned int enable,
+ unsigned int afc_code);
+void s5p_mipi_dsi_enable_pll_bypass(struct mipi_dsim_device *dsim,
+ unsigned int enable);
+void s5p_mipi_dsi_set_pll_pms(struct mipi_dsim_device *dsim, unsigned int p,
+ unsigned int m, unsigned int s);
+void s5p_mipi_dsi_pll_freq_band(struct mipi_dsim_device *dsim,
+ unsigned int freq_band);
+void s5p_mipi_dsi_pll_freq(struct mipi_dsim_device *dsim,
+ unsigned int pre_divider, unsigned int main_divider,
+ unsigned int scaler);
+void s5p_mipi_dsi_pll_stable_time(struct mipi_dsim_device *dsim,
+ unsigned int lock_time);
+void s5p_mipi_dsi_enable_pll(struct mipi_dsim_device *dsim,
+ unsigned int enable);
+void s5p_mipi_dsi_set_byte_clock_src(struct mipi_dsim_device *dsim,
+ unsigned int src);
+void s5p_mipi_dsi_enable_byte_clock(struct mipi_dsim_device *dsim,
+ unsigned int enable);
+void s5p_mipi_dsi_set_esc_clk_prs(struct mipi_dsim_device *dsim,
+ unsigned int enable, unsigned int prs_val);
+void s5p_mipi_dsi_enable_esc_clk_on_lane(struct mipi_dsim_device *dsim,
+ unsigned int lane_sel, unsigned int enable);
+void s5p_mipi_dsi_force_dphy_stop_state(struct mipi_dsim_device *dsim,
+ unsigned int enable);
+unsigned int s5p_mipi_dsi_is_lane_state(struct mipi_dsim_device *dsim);
+void s5p_mipi_dsi_set_stop_state_counter(struct mipi_dsim_device *dsim,
+ unsigned int cnt_val);
+void s5p_mipi_dsi_set_bta_timeout(struct mipi_dsim_device *dsim,
+ unsigned int timeout);
+void s5p_mipi_dsi_set_lpdr_timeout(struct mipi_dsim_device *dsim,
+ unsigned int timeout);
+void s5p_mipi_dsi_set_lcdc_transfer_mode(struct mipi_dsim_device *dsim,
+ unsigned int lp);
+void s5p_mipi_dsi_set_cpu_transfer_mode(struct mipi_dsim_device *dsim,
+ unsigned int lp);
+void s5p_mipi_dsi_enable_hs_clock(struct mipi_dsim_device *dsim,
+ unsigned int enable);
+void s5p_mipi_dsi_dp_dn_swap(struct mipi_dsim_device *dsim,
+ unsigned int swap_en);
+void s5p_mipi_dsi_hs_zero_ctrl(struct mipi_dsim_device *dsim,
+ unsigned int hs_zero);
+void s5p_mipi_dsi_prep_ctrl(struct mipi_dsim_device *dsim, unsigned int prep);
+unsigned int s5p_mipi_dsi_read_interrupt(struct mipi_dsim_device *dsim);
+unsigned int s5p_mipi_dsi_read_interrupt_mask(struct mipi_dsim_device *dsim);
+void s5p_mipi_dsi_clear_interrupt(struct mipi_dsim_device *dsim);
+void s5p_mipi_dsi_clear_all_interrupt(struct mipi_dsim_device *dsim);
+unsigned int s5p_mipi_dsi_is_pll_stable(struct mipi_dsim_device *dsim);
+unsigned int s5p_mipi_dsi_get_fifo_state(struct mipi_dsim_device *dsim);
+unsigned int _s5p_mipi_dsi_get_frame_done_status(struct mipi_dsim_device *dsim);
+void _s5p_mipi_dsi_clear_frame_done(struct mipi_dsim_device *dsim);
+void s5p_mipi_dsi_wr_pkt_header(struct mipi_dsim_device *dsim, unsigned int di,
+ unsigned int data0, unsigned int data1);
+void s5p_mipi_dsi_wr_tx_data(struct mipi_dsim_device *dsim,
+ unsigned int tx_data);
+void s5p_mipi_dsi_rd_pkt_header(struct mipi_dsim_device *dsim,
+ unsigned int data0, unsigned int data1);
+unsigned int s5p_mipi_dsi_rd_rx_fifo(struct mipi_dsim_device *dsim);
+
+#endif /* _S5P_MIPI_DSI_LOWLEVEL_H */
diff --git a/drivers/video/s5p_mipi_dsi_regs.h b/drivers/video/s5p_mipi_dsi_regs.h
new file mode 100644
index 0000000..e1e488f
--- /dev/null
+++ b/drivers/video/s5p_mipi_dsi_regs.h
@@ -0,0 +1,153 @@
+/* linux/driver/video/s5p_mipi_dsi_regs.h
+ *
+ * Register definition file for Samsung MIPI-DSIM driver
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd
+ *
+ * InKi Dae <inki.dae@samsung.com>
+ * Donghwa Lee <dh09.lee@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef _REGS_DSIM_H
+#define _REGS_DSIM_H
+
+#define S5P_DSIM_STATUS (0x0) /* Status register */
+#define S5P_DSIM_SWRST (0x4) /* Software reset register */
+#define S5P_DSIM_CLKCTRL (0x8) /* Clock control register */
+#define S5P_DSIM_TIMEOUT (0xc) /* Time out register */
+#define S5P_DSIM_CONFIG (0x10) /* Configuration register */
+#define S5P_DSIM_ESCMODE (0x14) /* Escape mode register */
+
+/* Main display image resolution register */
+#define S5P_DSIM_MDRESOL (0x18)
+#define S5P_DSIM_MVPORCH (0x1c) /* Main display Vporch register */
+#define S5P_DSIM_MHPORCH (0x20) /* Main display Hporch register */
+#define S5P_DSIM_MSYNC (0x24) /* Main display sync area register */
+
+/* Sub display image resolution register */
+#define S5P_DSIM_SDRESOL (0x28)
+#define S5P_DSIM_INTSRC (0x2c) /* Interrupt source register */
+#define S5P_DSIM_INTMSK (0x30) /* Interrupt mask register */
+#define S5P_DSIM_PKTHDR (0x34) /* Packet Header FIFO register */
+#define S5P_DSIM_PAYLOAD (0x38) /* Payload FIFO register */
+#define S5P_DSIM_RXFIFO (0x3c) /* Read FIFO register */
+#define S5P_DSIM_FIFOTHLD (0x40) /* FIFO threshold level register */
+#define S5P_DSIM_FIFOCTRL (0x44) /* FIFO status and control register */
+
+/* FIFO memory AC characteristic register */
+#define S5P_DSIM_PLLCTRL (0x4c) /* PLL control register */
+#define S5P_DSIM_PLLTMR (0x50) /* PLL timer register */
+#define S5P_DSIM_PHYACCHR (0x54) /* D-PHY AC characteristic register */
+#define S5P_DSIM_PHYACCHR1 (0x58) /* D-PHY AC characteristic register1 */
+
+/* DSIM_STATUS */
+#define DSIM_STOP_STATE_DAT(x) (((x) & 0xf) << 0)
+#define DSIM_STOP_STATE_CLK (1 << 8)
+#define DSIM_TX_READY_HS_CLK (1 << 10)
+
+/* DSIM_SWRST */
+#define DSIM_FUNCRST (1 << 16)
+#define DSIM_SWRST (1 << 0)
+
+/* S5P_DSIM_TIMEOUT */
+#define DSIM_LPDR_TOUT_SHIFT (0)
+#define DSIM_BTA_TOUT_SHIFT (16)
+
+/* S5P_DSIM_CLKCTRL */
+#define DSIM_LANE_ESC_CLKEN_SHIFT (19)
+#define DSIM_BYTE_CLKEN_SHIFT (24)
+#define DSIM_BYTE_CLK_SRC_SHIFT (25)
+#define DSIM_PLL_BYPASS_SHIFT (27)
+#define DSIM_ESC_CLKEN_SHIFT (28)
+#define DSIM_TX_REQUEST_HSCLK_SHIFT (31)
+#define DSIM_LANE_ESC_CLKEN(x) (((x) & 0x1f) << \
+ DSIM_LANE_ESC_CLKEN_SHIFT)
+#define DSIM_BYTE_CLK_ENABLE (1 << DSIM_BYTE_CLKEN_SHIFT)
+#define DSIM_BYTE_CLK_DISABLE (0 << DSIM_BYTE_CLKEN_SHIFT)
+#define DSIM_PLL_BYPASS_EXTERNAL (1 << DSIM_PLL_BYPASS_SHIFT)
+#define DSIM_ESC_CLKEN_ENABLE (1 << DSIM_ESC_CLKEN_SHIFT)
+#define DSIM_ESC_CLKEN_DISABLE (0 << DSIM_ESC_CLKEN_SHIFT)
+
+/* S5P_DSIM_CONFIG */
+#define DSIM_NUM_OF_DATALANE_SHIFT (5)
+#define DSIM_HSA_MODE_SHIFT (20)
+#define DSIM_HBP_MODE_SHIFT (21)
+#define DSIM_HFP_MODE_SHIFT (22)
+#define DSIM_HSE_MODE_SHIFT (23)
+#define DSIM_AUTO_MODE_SHIFT (24)
+#define DSIM_LANE_ENx(x) (((x) & 0x1f) << 0)
+
+#define DSIM_NUM_OF_DATA_LANE(x) ((x) << DSIM_NUM_OF_DATALANE_SHIFT)
+
+/* S5P_DSIM_ESCMODE */
+#define DSIM_TX_LPDT_SHIFT (6)
+#define DSIM_CMD_LPDT_SHIFT (7)
+#define DSIM_TX_LPDT_LP (1 << DSIM_TX_LPDT_SHIFT)
+#define DSIM_CMD_LPDT_LP (1 << DSIM_CMD_LPDT_SHIFT)
+#define DSIM_STOP_STATE_CNT_SHIFT (21)
+#define DSIM_FORCE_STOP_STATE_SHIFT (20)
+
+/* S5P_DSIM_MDRESOL */
+#define DSIM_MAIN_STAND_BY (1 << 31)
+#define DSIM_MAIN_VRESOL(x) (((x) & 0x7ff) << 16)
+#define DSIM_MAIN_HRESOL(x) (((x) & 0X7ff) << 0)
+
+/* S5P_DSIM_MVPORCH */
+#define DSIM_CMD_ALLOW_SHIFT (28)
+#define DSIM_STABLE_VFP_SHIFT (16)
+#define DSIM_MAIN_VBP_SHIFT (0)
+#define DSIM_CMD_ALLOW_MASK (0xf << DSIM_CMD_ALLOW_SHIFT)
+#define DSIM_STABLE_VFP_MASK (0x7ff << DSIM_STABLE_VFP_SHIFT)
+#define DSIM_MAIN_VBP_MASK (0x7ff << DSIM_MAIN_VBP_SHIFT)
+
+/* S5P_DSIM_MHPORCH */
+#define DSIM_MAIN_HFP_SHIFT (16)
+#define DSIM_MAIN_HBP_SHIFT (0)
+#define DSIM_MAIN_HFP_MASK ((0xffff) << DSIM_MAIN_HFP_SHIFT)
+#define DSIM_MAIN_HBP_MASK ((0xffff) << DSIM_MAIN_HBP_SHIFT)
+
+/* S5P_DSIM_MSYNC */
+#define DSIM_MAIN_VSA_SHIFT (22)
+#define DSIM_MAIN_HSA_SHIFT (0)
+#define DSIM_MAIN_VSA_MASK ((0x3ff) << DSIM_MAIN_VSA_SHIFT)
+#define DSIM_MAIN_HSA_MASK ((0xffff) << DSIM_MAIN_HSA_SHIFT)
+
+/* S5P_DSIM_SDRESOL */
+#define DSIM_SUB_STANDY_SHIFT (31)
+#define DSIM_SUB_VRESOL_SHIFT (16)
+#define DSIM_SUB_HRESOL_SHIFT (0)
+#define DSIM_SUB_STANDY_MASK ((0x1) << DSIM_SUB_STANDY_SHIFT)
+#define DSIM_SUB_VRESOL_MASK ((0x7ff) << DSIM_SUB_VRESOL_SHIFT)
+#define DSIM_SUB_HRESOL_MASK ((0x7ff) << DSIM_SUB_HRESOL_SHIFT)
+
+/* S5P_DSIM_INTSRC */
+#define INTSRC_FRAME_DONE (1 << 24)
+#define INTSRC_PLL_STABLE (1 << 31)
+
+/* S5P_DSIM_INTMSK */
+#define INTMSK_FIFO_EMPTY (1 << 29)
+#define INTMSK_BTA (1 << 25)
+#define INTMSK_FRAME_DONE (1 << 24)
+#define INTMSK_RX_TIMEOUT (1 << 21)
+#define INTMSK_BTA_TIMEOUT (1 << 20)
+#define INTMSK_RX_DONE (1 << 18)
+#define INTMSK_RX_TE (1 << 17)
+#define INTMSK_RX_ACK (1 << 16)
+#define INTMSK_RX_ECC_ERR (1 << 15)
+#define INTMSK_RX_CRC_ERR (1 << 14)
+
+/* S5P_DSIM_FIFOCTRL */
+#define SFR_HEADER_EMPTY (1 << 22)
+
+/* S5P_DSIM_PHYACCHR */
+#define DSIM_AFC_CTL(x) (((x) & 0x7) << 5)
+
+/* S5P_DSIM_PLLCTRL */
+#define DSIM_PLL_EN_SHIFT (23)
+#define DSIM_FREQ_BAND_SHIFT (24)
+
+#endif /* _REGS_DSIM_H */
diff --git a/include/linux/mipi_dsim.h b/include/linux/mipi_dsim.h
new file mode 100644
index 0000000..82807f2
--- /dev/null
+++ b/include/linux/mipi_dsim.h
@@ -0,0 +1,362 @@
+/* include/linux/mipi_dsim.h
+ *
+ * Platform data header for Samsung SoC MIPI-DSIM.
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd
+ *
+ * InKi Dae <inki.dae@samsung.com>
+ * Donghwa Lee <dh09.lee@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef _LINUX_MIPI_DSIM_H
+#define _LINUX_MIPI_DSIM_H
+
+#include <linux/device.h>
+#include <linux/fb.h>
+
+#define PANEL_NAME_SIZE (32)
+
+/*
+ * enumurate display interface type.
+ *
+ * DSIM_COMMAND means cpu interface and rgb interface for DSIM_VIDEO.
+ *
+ * P.S. MIPI DSI Master has two display controller intefaces, RGB Interface
+ * for main display and CPU Interface(same as I80 Interface) for main
+ * and sub display.
+ */
+enum mipi_dsim_interface_type {
+ DSIM_COMMAND,
+ DSIM_VIDEO
+};
+
+enum mipi_dsim_virtual_ch_no {
+ DSIM_VIRTUAL_CH_0,
+ DSIM_VIRTUAL_CH_1,
+ DSIM_VIRTUAL_CH_2,
+ DSIM_VIRTUAL_CH_3
+};
+
+enum mipi_dsim_burst_mode_type {
+ DSIM_NON_BURST_SYNC_EVENT,
+ DSIM_BURST_SYNC_EVENT,
+ DSIM_NON_BURST_SYNC_PULSE,
+ DSIM_BURST,
+ DSIM_NON_VIDEO_MODE
+};
+
+enum mipi_dsim_no_of_data_lane {
+ DSIM_DATA_LANE_1,
+ DSIM_DATA_LANE_2,
+ DSIM_DATA_LANE_3,
+ DSIM_DATA_LANE_4
+};
+
+enum mipi_dsim_byte_clk_src {
+ DSIM_PLL_OUT_DIV8,
+ DSIM_EXT_CLK_DIV8,
+ DSIM_EXT_CLK_BYPASS
+};
+
+enum mipi_dsim_pixel_format {
+ DSIM_CMD_3BPP,
+ DSIM_CMD_8BPP,
+ DSIM_CMD_12BPP,
+ DSIM_CMD_16BPP,
+ DSIM_VID_16BPP_565,
+ DSIM_VID_18BPP_666PACKED,
+ DSIM_18BPP_666LOOSELYPACKED,
+ DSIM_24BPP_888
+};
+
+/*
+ * struct mipi_dsim_config - interface for configuring mipi-dsi controller.
+ *
+ * @auto_flush: enable or disable Auto flush of MD FIFO using VSYNC pulse.
+ * @eot_disable: enable or disable EoT packet in HS mode.
+ * @auto_vertical_cnt: specifies auto vertical count mode.
+ * in Video mode, the vertical line transition uses line counter
+ * configured by VSA, VBP, and Vertical resolution.
+ * If this bit is set to '1', the line counter does not use VSA and VBP
+ * registers.(in command mode, this variable is ignored)
+ * @hse: set horizontal sync event mode.
+ * In VSYNC pulse and Vporch area, MIPI DSI master transfers only HSYNC
+ * start packet to MIPI DSI slave at MIPI DSI spec1.1r02.
+ * this bit transfers HSYNC end packet in VSYNC pulse and Vporch area
+ * (in mommand mode, this variable is ignored)
+ * @hfp: specifies HFP disable mode.
+ * if this variable is set, DSI master ignores HFP area in VIDEO mode.
+ * (in command mode, this variable is ignored)
+ * @hbp: specifies HBP disable mode.
+ * if this variable is set, DSI master ignores HBP area in VIDEO mode.
+ * (in command mode, this variable is ignored)
+ * @hsa: specifies HSA disable mode.
+ * if this variable is set, DSI master ignores HSA area in VIDEO mode.
+ * (in command mode, this variable is ignored)
+ * @cma_allow: specifies the number of horizontal lines, where command packet
+ * transmission is allowed after Stable VFP period.
+ * @e_interface: specifies interface to be used.(CPU or RGB interface)
+ * @e_virtual_ch: specifies virtual channel number that main or
+ * sub diaplsy uses.
+ * @e_pixel_format: specifies pixel stream format for main or sub display.
+ * @e_burst_mode: selects Burst mode in Video mode.
+ * in Non-burst mode, RGB data area is filled with RGB data and NULL
+ * packets, according to input bandwidth of RGB interface.
+ * In Burst mode, RGB data area is filled with RGB data only.
+ * @e_no_data_lane: specifies data lane count to be used by Master.
+ * @e_byte_clk: select byte clock source. (it must be DSIM_PLL_OUT_DIV8)
+ * DSIM_EXT_CLK_DIV8 and DSIM_EXT_CLK_BYPASSS are not supported.
+ * @pll_stable_time: specifies the PLL Timer for stability of the ganerated
+ * clock(System clock cycle base)
+ * if the timer value goes to 0x00000000, the clock stable bit of status
+ * and interrupt register is set.
+ * @esc_clk: specifies escape clock frequency for getting the escape clock
+ * prescaler value.
+ * @stop_holding_cnt: specifies the interval value between transmitting
+ * read packet(or write "set_tear_on" command) and BTA request.
+ * after transmitting read packet or write "set_tear_on" command,
+ * BTA requests to D-PHY automatically. this counter value specifies
+ * the interval between them.
+ * @bta_timeout: specifies the timer for BTA.
+ * this register specifies time out from BTA request to change
+ * the direction with respect to Tx escape clock.
+ * @rx_timeout: specifies the timer for LP Rx mode timeout.
+ * this register specifies time out on how long RxValid deasserts,
+ * after RxLpdt asserts with respect to Tx escape clock.
+ * - RxValid specifies Rx data valid indicator.
+ * - RxLpdt specifies an indicator that D-PHY is under RxLpdt mode.
+ * - RxValid and RxLpdt specifies signal from D-PHY.
+ */
+struct mipi_dsim_config {
+ unsigned char auto_flush;
+ unsigned char eot_disable;
+
+ unsigned char auto_vertical_cnt;
+ unsigned char hse;
+ unsigned char hfp;
+ unsigned char hbp;
+ unsigned char hsa;
+ unsigned char cmd_allow;
+
+ enum mipi_dsim_interface_type e_interface;
+ enum mipi_dsim_virtual_ch_no e_virtual_ch;
+ enum mipi_dsim_pixel_format e_pixel_format;
+ enum mipi_dsim_burst_mode_type e_burst_mode;
+ enum mipi_dsim_no_of_data_lane e_no_data_lane;
+ enum mipi_dsim_byte_clk_src e_byte_clk;
+
+ /*
+ * =====================+ * | P | M | S | MHz |
+ * -------------------------------------------
+ * | 3 | 100 | 3 | 100 |
+ * | 3 | 100 | 2 | 200 |
+ * | 3 | 63 | 1 | 252 |
+ * | 4 | 100 | 1 | 300 |
+ * | 4 | 110 | 1 | 330 |
+ * | 12 | 350 | 1 | 350 |
+ * | 3 | 100 | 1 | 400 |
+ * | 4 | 150 | 1 | 450 |
+ * | 6 | 118 | 1 | 472 |
+ * | 3 | 120 | 1 | 480 |
+ * | 12 | 250 | 0 | 500 |
+ * | 4 | 100 | 0 | 600 |
+ * | 3 | 81 | 0 | 648 |
+ * | 3 | 88 | 0 | 704 |
+ * | 3 | 90 | 0 | 720 |
+ * | 3 | 100 | 0 | 800 |
+ * | 12 | 425 | 0 | 850 |
+ * | 4 | 150 | 0 | 900 |
+ * | 12 | 475 | 0 | 950 |
+ * | 6 | 250 | 0 | 1000 |
+ * -------------------------------------------
+ */
+
+ /*
+ * pms could be calculated as the following.
+ * M * 24 / P * 2 ^ S = MHz
+ */
+ unsigned char p;
+ unsigned short m;
+ unsigned char s;
+
+ unsigned int pll_stable_time;
+ unsigned long esc_clk;
+
+ unsigned short stop_holding_cnt;
+ unsigned char bta_timeout;
+ unsigned short rx_timeout;
+};
+
+/*
+ * struct mipi_dsim_device - global interface for mipi-dsi driver.
+ *
+ * @dev: driver model representation of the device.
+ * @id: unique device id.
+ * @clock: pointer to MIPI-DSI clock of clock framework.
+ * @irq: interrupt number to MIPI-DSI controller.
+ * @reg_base: base address to memory mapped SRF of MIPI-DSI controller.
+ * (virtual address)
+ * @lock: the mutex protecting this data structure.
+ * @dsim_info: infomation for configuring mipi-dsi controller.
+ * @master_ops: callbacks to mipi-dsi operations.
+ * @dsim_lcd_dev: pointer to activated ddi device.
+ * (it would be registered by mipi-dsi driver.)
+ * @dsim_lcd_drv: pointer to activated_ddi driver.
+ * (it would be registered by mipi-dsi driver.)
+ * @lcd_info: pointer to mipi_lcd_info structure.
+ * @power_t: current power status.
+ * @state: specifies status of MIPI-DSI controller.
+ * the status could be RESET, INIT, STOP, HSCLKEN and ULPS.
+ * @data_lane: specifiec enabled data lane number.
+ * this variable would be set by driver according to e_no_data_lane
+ * automatically.
+ * @e_clk_src: select byte clock source.
+ * @pd: pointer to MIPI-DSI driver platform data.
+ */
+struct mipi_dsim_device {
+ struct device *dev;
+ int id;
+ struct resource *res;
+ struct clk *clock;
+ unsigned int irq;
+ void __iomem *reg_base;
+ struct mutex lock;
+
+ struct mipi_dsim_config *dsim_config;
+ struct mipi_dsim_master_ops *master_ops;
+ struct mipi_dsim_lcd_device *dsim_lcd_dev;
+ struct mipi_dsim_lcd_driver *dsim_lcd_drv;
+
+ atomic_t power_t;
+ unsigned int state;
+ unsigned int data_lane;
+ unsigned int e_clk_src;
+
+ struct mipi_dsim_platform_data *pd;
+};
+
+/*
+ * struct mipi_dsim_platform_data - interface to platform data
+ * for mipi-dsi driver.
+ *
+ * @lcd_panel_name: specifies lcd panel name registered to mipi-dsi driver.
+ * lcd panel driver searched would be actived.
+ * @dsim_config: pointer of structure for configuring mipi-dsi controller.
+ * @enabled: indicate whether mipi controller got enabled or not.
+ * @lcd_panel_info: pointer for lcd panel specific structure.
+ * this structure specifies width, height, timing and polarity and so on.
+ * @mipi_power: callback pointer for enabling or disabling mipi power.
+ * @phy_enable: pointer to a callback controlling D-PHY enable/reset
+ */
+struct mipi_dsim_platform_data {
+ char lcd_panel_name[PANEL_NAME_SIZE];
+
+ struct mipi_dsim_config *dsim_config;
+ unsigned int enabled;
+ void *lcd_panel_info;
+
+ int (*mipi_power)(struct platform_device *pdev, unsigned int enable);
+ int (*phy_enable)(struct platform_device *pdev, bool on);
+};
+
+/*
+ * struct mipi_dsim_master_ops - callbacks to mipi-dsi operations.
+ *
+ * @cmd_write: transfer command to lcd panel at LP mode.
+ * @cmd_read: read command from rx register.
+ * @get_dsim_frame_done: get the status that all screen data have been
+ * transferred to mipi-dsi.
+ * @clear_dsim_frame_done: clear frame done status.
+ * @get_fb_frame_done: get frame done status of display controller.
+ * @trigger: trigger display controller.
+ * - this one would be used only in case of CPU mode.
+ * @set_early_blank_mode: set framebuffer blank mode.
+ * - this callback should be called prior to fb_blank() by a client driver
+ * only if needing.
+ * @set_blank_mode: set framebuffer blank mode.
+ * - this callback should be called after fb_blank() by a client driver
+ * only if needing.
+ */
+
+struct mipi_dsim_master_ops {
+ int (*cmd_write)(struct mipi_dsim_device *dsim, unsigned int data_id,
+ unsigned int data0, unsigned int data1);
+ int (*cmd_read)(struct mipi_dsim_device *dsim, unsigned int data_id,
+ unsigned int data0, unsigned int req_size, u8 *rx_buf);
+ int (*get_dsim_frame_done)(struct mipi_dsim_device *dsim);
+ int (*clear_dsim_frame_done)(struct mipi_dsim_device *dsim);
+
+ int (*get_fb_frame_done)(struct fb_info *info);
+ void (*trigger)(struct fb_info *info);
+ int (*set_early_blank_mode)(struct mipi_dsim_device *dsim, int power);
+ int (*set_blank_mode)(struct mipi_dsim_device *dsim, int power);
+};
+
+/*
+ * device structure for mipi-dsi based lcd panel.
+ *
+ * @name: name of the device to use with this device, or an
+ * alias for that name.
+ * @dev: driver model representation of the device.
+ * @id: id of device to be registered.
+ * @bus_id: bus id for identifing connected bus
+ * and this bus id should be same as id of mipi_dsim_device.
+ * @irq: irq number for signaling when framebuffer transfer of
+ * lcd panel module is completed.
+ * this irq would be used only for MIPI-DSI based CPU mode lcd panel.
+ * @master: pointer to mipi-dsi master device object.
+ * @platform_data: lcd panel specific platform data.
+ */
+struct mipi_dsim_lcd_device {
+ char *name;
+ struct device dev;
+ int id;
+ int bus_id;
+ int irq;
+
+ struct mipi_dsim_device *master;
+ void *platform_data;
+};
+
+/*
+ * driver structure for mipi-dsi based lcd panel.
+ *
+ * this structure should be registered by lcd panel driver.
+ * mipi-dsi driver seeks lcd panel registered through name field
+ * and calls these callback functions in appropriate time.
+ *
+ * @name: name of the driver to use with this device, or an
+ * alias for that name.
+ * @id: id of driver to be registered.
+ * this id would be used for finding device object registered.
+ */
+struct mipi_dsim_lcd_driver {
+ char *name;
+ int id;
+
+ void (*power_on)(struct mipi_dsim_lcd_device *dsim_dev);
+ void (*set_sequence)(struct mipi_dsim_lcd_device *dsim_dev);
+ int (*probe)(struct mipi_dsim_lcd_device *dsim_dev);
+ int (*remove)(struct mipi_dsim_lcd_device *dsim_dev);
+ void (*shutdown)(struct mipi_dsim_lcd_device *dsim_dev);
+ int (*suspend)(struct mipi_dsim_lcd_device *dsim_dev);
+ int (*resume)(struct mipi_dsim_lcd_device *dsim_dev);
+};
+
+/*
+ * register mipi_dsim_lcd_device to mipi-dsi master.
+ */
+int s5p_mipi_dsi_register_lcd_device(struct mipi_dsim_lcd_device
+ *lcd_dev);
+/**
+ * register mipi_dsim_lcd_driver object defined by lcd panel driver
+ * to mipi-dsi driver.
+ */
+int s5p_mipi_dsi_register_lcd_driver(struct mipi_dsim_lcd_driver
+ *lcd_drv);
+#endif /* _LINUX_MIPI_DSIM_H */
--
1.7.4.1
^ permalink raw reply related
* [PATCH] video:da8xx-fb: Disable and reset sequence on version2 of LCDC
From: Manjunathappa, Prakash @ 2011-11-15 12:14 UTC (permalink / raw)
To: linux-fbdev
Patch follows the disable and software reset sequence specified
in version2 to LCDC functional specification.
Without this flicker is observed on re-enabling the LCDC.
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
---
drivers/video/da8xx-fb.c | 15 ++++++++++++++-
1 files changed, 14 insertions(+), 1 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index e111971..6b27751 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -118,6 +118,7 @@
/* Clock registers available only on Version 2 */
#define LCD_CLK_ENABLE_REG 0x6c
#define LCD_CLK_RESET_REG 0x70
+#define LCD_CLK_MAIN_RESET BIT(3)
#define LCD_NUM_BUFFERS 2
@@ -246,6 +247,10 @@ static inline void lcd_enable_raster(void)
{
u32 reg;
+ /* Bring LCDC out of reset */
+ if (lcd_revision = LCD_VERSION_2)
+ lcdc_write(0, LCD_CLK_RESET_REG);
+
reg = lcdc_read(LCD_RASTER_CTRL_REG);
if (!(reg & LCD_RASTER_ENABLE))
lcdc_write(reg | LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);
@@ -259,6 +264,10 @@ static inline void lcd_disable_raster(void)
reg = lcdc_read(LCD_RASTER_CTRL_REG);
if (reg & LCD_RASTER_ENABLE)
lcdc_write(reg & ~LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);
+
+ if (lcd_revision = LCD_VERSION_2)
+ /* Write 1 to reset LCDC */
+ lcdc_write(LCD_CLK_MAIN_RESET, LCD_CLK_RESET_REG);
}
static void lcd_blit(int load_mode, struct da8xx_fb_par *par)
@@ -618,8 +627,12 @@ static void lcd_reset(struct da8xx_fb_par *par)
lcdc_write(0, LCD_DMA_CTRL_REG);
lcdc_write(0, LCD_RASTER_CTRL_REG);
- if (lcd_revision = LCD_VERSION_2)
+ if (lcd_revision = LCD_VERSION_2) {
lcdc_write(0, LCD_INT_ENABLE_SET_REG);
+ /* Write 1 to reset */
+ lcdc_write(LCD_CLK_MAIN_RESET, LCD_CLK_RESET_REG);
+ lcdc_write(0, LCD_CLK_RESET_REG);
+ }
}
static void lcd_calc_clk_divider(struct da8xx_fb_par *par)
--
1.7.1
^ permalink raw reply related
* [PATCH] video:da8xx-fb: Add 24bpp LCD configuration support
From: Manjunathappa, Prakash @ 2011-11-15 12:13 UTC (permalink / raw)
To: linux-fbdev
LCD controller on am335x supports 24bpp raster configuration
in addition to ones on da850. LCDC also supports 24bpp in unpacked
format having ARGB:8888 32bpp format data in DDR, but it doesn't
interpret Alpha component of the data.
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
---
drivers/video/da8xx-fb.c | 57 +++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 56 insertions(+), 1 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 55f91d9..e111971 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -82,6 +82,8 @@
#define LCD_V2_LIDD_CLK_EN BIT(1)
#define LCD_V2_CORE_CLK_EN BIT(0)
#define LCD_V2_LPP_B10 26
+#define LCD_V2_TFT_24BPP_MODE BIT(25)
+#define LCD_V2_TFT_24BPP_UNPACK BIT(26)
/* LCD Raster Timing 2 Register */
#define LCD_AC_BIAS_TRANSITIONS_PER_INT(x) ((x) << 16)
@@ -151,7 +153,7 @@ struct da8xx_fb_par {
unsigned int dma_end;
struct clk *lcdc_clk;
int irq;
- unsigned short pseudo_palette[16];
+ unsigned short pseudo_palette[32];
unsigned int palette_sz;
unsigned int pxl_clk;
int blank;
@@ -458,6 +460,9 @@ static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height,
{
u32 reg;
+ if ((bpp > 16) && (lcd_revision = LCD_VERSION_1))
+ return -EINVAL;
+
/* Set the Panel Width */
/* Pixels per line = (PPL + 1)*16 */
if (lcd_revision = LCD_VERSION_1) {
@@ -501,6 +506,13 @@ static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height,
reg = lcdc_read(LCD_RASTER_CTRL_REG) & ~(1 << 8);
if (raster_order)
reg |= LCD_RASTER_ORDER;
+
+ if (bpp = 24)
+ reg |= (LCD_TFT_MODE | LCD_V2_TFT_24BPP_MODE);
+ else if (bpp = 32)
+ reg |= (LCD_TFT_MODE | LCD_V2_TFT_24BPP_MODE
+ | LCD_V2_TFT_24BPP_UNPACK);
+
lcdc_write(reg, LCD_RASTER_CTRL_REG);
switch (bpp) {
@@ -508,6 +520,8 @@ static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height,
case 2:
case 4:
case 16:
+ case 24:
+ case 32:
par->palette_sz = 16 * 2;
break;
@@ -537,6 +551,9 @@ static int fb_setcolreg(unsigned regno, unsigned red, unsigned green,
if (info->fix.visual = FB_VISUAL_DIRECTCOLOR)
return 1;
+ if ((info->var.bits_per_pixel > 16) && (lcd_revision = LCD_VERSION_1))
+ return 1;
+
if (info->var.bits_per_pixel = 8) {
red >>= 4;
green >>= 8;
@@ -566,6 +583,23 @@ static int fb_setcolreg(unsigned regno, unsigned red, unsigned green,
update_hw = 1;
palette[0] = 0x4000;
}
+ } else if (((info->var.bits_per_pixel = 32) && regno < 32) ||
+ ((info->var.bits_per_pixel = 24) && regno < 24)) {
+ red >>= (24 - info->var.red.length);
+ red <<= info->var.red.offset;
+
+ green >>= (24 - info->var.green.length);
+ green <<= info->var.green.offset;
+
+ blue >>= (24 - info->var.blue.length);
+ blue <<= info->var.blue.offset;
+
+ par->pseudo_palette[regno] = red | green | blue;
+
+ if (palette[0] != 0x4000) {
+ update_hw = 1;
+ palette[0] = 0x4000;
+ }
}
/* Update the palette in the h/w as needed. */
@@ -777,6 +811,9 @@ static int fb_check_var(struct fb_var_screeninfo *var,
{
int err = 0;
+ if ((var->bits_per_pixel > 16) && (lcd_revision = LCD_VERSION_1))
+ return -EINVAL;
+
switch (var->bits_per_pixel) {
case 1:
case 8:
@@ -809,6 +846,24 @@ static int fb_check_var(struct fb_var_screeninfo *var,
var->transp.offset = 0;
var->transp.length = 0;
break;
+ case 24:
+ var->red.offset = 16;
+ var->red.length = 8;
+ var->green.offset = 8;
+ var->green.length = 8;
+ var->blue.offset = 0;
+ var->blue.length = 8;
+ break;
+ case 32:
+ var->transp.offset = 24;
+ var->transp.length = 8;
+ var->red.offset = 16;
+ var->red.length = 8;
+ var->green.offset = 8;
+ var->green.length = 8;
+ var->blue.offset = 0;
+ var->blue.length = 8;
+ break;
default:
err = -EINVAL;
}
--
1.7.1
^ permalink raw reply related
* Re: Getting FB to work in Console
From: D.J.J. Ring, Jr. @ 2011-11-14 23:38 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <CADO5RbhunU1X7mWwGDbVRc1FSPKBaLudAVav0TMkBoQ_1zp0Mw@mail.gmail.com>
Hello everyone,
I know this is a bit off topic, but I just ran the command groups in
my username mode.
It just shows my username as the only group.
But I tried to adduser username to the group video and it tells me
that my username is already a member of video. Likewise if I adduser
username to the group tty it says that I am already a member of the
group tty. Same thing with superuser account root. The command
groups when running as superuser shows only that I belong to the group
root.
Is there a package that allows me to see the supplementary groups and
manage them?
I'm running Debian Stable.
David
^ permalink raw reply
* [PATCH] fb: split out framebuffer initialization from allocation
From: Timur Tabi @ 2011-11-14 22:01 UTC (permalink / raw)
To: linux-fbdev
Introduce functions framebuffer_init() and framebuffer_cleanup() to allow
the initialization of a user-allocated fb_info object.
framebuffer_alloc() allows for appending a private data structure when it
allocates the fb_info object. However, a driver that registers multiple
framebuffers for one device may also need another private data structure
for the device itself. framebuffer_init() allows such drivers to store
the fb_info objects in the device-specific private data structure,
thereby simplifying memory allocation.
Signed-off-by: Timur Tabi <timur@freescale.com>
---
drivers/video/fbsysfs.c | 45 +++++++++++++++++++++++++++++++++++++++------
include/linux/fb.h | 2 ++
2 files changed, 41 insertions(+), 6 deletions(-)
diff --git a/drivers/video/fbsysfs.c b/drivers/video/fbsysfs.c
index 67afa9c..77d1c83 100644
--- a/drivers/video/fbsysfs.c
+++ b/drivers/video/fbsysfs.c
@@ -24,6 +24,29 @@
#define FB_SYSFS_FLAG_ATTR 1
/**
+ * framebuffer_init - initialize a frame buffer info object
+ *
+ * @info: pointer to the fb_info object
+ * @dev: pointer to the device for this fb, this can be NULL
+ *
+ * Initializes a frame buffer info object. The object should be zeroed-out
+ * before calling this function, because only some fields are initialized.
+ *
+ * Use this function for fb_info objects that are not allocated via
+ * framebuffer_alloc(). The object must be cleaned up with
+ * framebuffer_cleanup() before its memory is deallocated.
+ */
+void framebuffer_init(struct fb_info *info, struct device *dev)
+{
+ info->device = dev;
+
+#ifdef CONFIG_FB_BACKLIGHT
+ mutex_init(&info->bl_curve_mutex);
+#endif
+}
+EXPORT_SYMBOL(framebuffer_init);
+
+/**
* framebuffer_alloc - creates a new frame buffer info structure
*
* @size: size of driver private data, can be zero
@@ -35,6 +58,7 @@
*
* Returns the new structure, or NULL if an error occurred.
*
+ * The object must be deallocated with framebuffer_release().
*/
struct fb_info *framebuffer_alloc(size_t size, struct device *dev)
{
@@ -57,11 +81,7 @@ struct fb_info *framebuffer_alloc(size_t size, struct device *dev)
if (size)
info->par = p + fb_info_size;
- info->device = dev;
-
-#ifdef CONFIG_FB_BACKLIGHT
- mutex_init(&info->bl_curve_mutex);
-#endif
+ framebuffer_init(info, dev);
return info;
#undef PADDING
@@ -70,6 +90,19 @@ struct fb_info *framebuffer_alloc(size_t size, struct device *dev)
EXPORT_SYMBOL(framebuffer_alloc);
/**
+ * framebuffer_cleanup - cleans up a frame buffer info object
+ *
+ * @info: frame buffer info object
+ *
+ * Cleans up an fb_info object that was initialized with framebuffer_init().
+ */
+void framebuffer_cleanup(struct fb_info *info)
+{
+ kfree(info->apertures);
+}
+EXPORT_SYMBOL(framebuffer_cleanup);
+
+/**
* framebuffer_release - marks the structure available for freeing
*
* @info: frame buffer info structure
@@ -80,7 +113,7 @@ EXPORT_SYMBOL(framebuffer_alloc);
*/
void framebuffer_release(struct fb_info *info)
{
- kfree(info->apertures);
+ framebuffer_cleanup(info);
kfree(info);
}
EXPORT_SYMBOL(framebuffer_release);
diff --git a/include/linux/fb.h b/include/linux/fb.h
index 1d6836c..c2347fb 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -1068,6 +1068,8 @@ static inline bool fb_be_math(struct fb_info *info)
/* drivers/video/fbsysfs.c */
extern struct fb_info *framebuffer_alloc(size_t size, struct device *dev);
extern void framebuffer_release(struct fb_info *info);
+extern void framebuffer_init(struct fb_info *info, struct device *dev);
+extern void framebuffer_cleanup(struct fb_info *info);
extern int fb_init_device(struct fb_info *fb_info);
extern void fb_cleanup_device(struct fb_info *head);
extern void fb_bl_default_curve(struct fb_info *fb_info, u8 off, u8 min, u8 max);
--
1.7.3.4
^ permalink raw reply related
* Re: Getting FB to work in Console
From: David J Ring Jr @ 2011-11-14 21:50 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <CADO5RbhunU1X7mWwGDbVRc1FSPKBaLudAVav0TMkBoQ_1zp0Mw@mail.gmail.com>
[-- Attachment #1: Type: TEXT/PLAIN, Size: 71306 bytes --]
Hello Bruno and Anatolij -- and everyone who is helping or reading!
Anatolij, I forgot to say I did run sudo update-grub, but still no
framebuffer.
Bruno, there is nothing in GRUB when I edit the commandline that has
anythhing to do with video or nomodeset.
Here is my kernel log for the last boot.
I am using a USB stick only - it is /dev/sda and it has / on /dev/sda1 and
/home on /dev/sda2
Nov 14 21:30:57 vinux kernel: imklog 4.6.4, log source = /proc/kmsg started.
Nov 14 21:30:57 vinux kernel: [ 0.000000] Initializing cgroup subsys cpuset
Nov 14 21:30:57 vinux kernel: [ 0.000000] Initializing cgroup subsys cpu
Nov 14 21:30:57 vinux kernel: [ 0.000000] Linux version 2.6.32-5-686 (Debian 2.6.32-38) (ben@decadent.org.uk) (gcc version 4.3.5 (Debian 4.3.5-4) ) #1 SMP Mon Oct 3 04:15:24 UTC 2011
Nov 14 21:30:57 vinux kernel: [ 0.000000] KERNEL supported cpus:
Nov 14 21:30:57 vinux kernel: [ 0.000000] Intel GenuineIntel
Nov 14 21:30:57 vinux kernel: [ 0.000000] AMD AuthenticAMD
Nov 14 21:30:57 vinux kernel: [ 0.000000] NSC Geode by NSC
Nov 14 21:30:57 vinux kernel: [ 0.000000] Cyrix CyrixInstead
Nov 14 21:30:57 vinux kernel: [ 0.000000] Centaur CentaurHauls
Nov 14 21:30:57 vinux kernel: [ 0.000000] Transmeta GenuineTMx86
Nov 14 21:30:57 vinux kernel: [ 0.000000] Transmeta TransmetaCPU
Nov 14 21:30:57 vinux kernel: [ 0.000000] UMC UMC UMC UMC
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-provided physical RAM map:
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 0000000000000000 - 000000000009f400 (usable)
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 000000000009f400 - 00000000000a0000 (reserved)
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 00000000000d2000 - 00000000000d4000 (reserved)
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 00000000000dc000 - 0000000000100000 (reserved)
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 0000000000100000 - 00000000bd6b3000 (usable)
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 00000000bd6b3000 - 00000000bd6b9000 (reserved)
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 00000000bd6b9000 - 00000000bd7b2000 (usable)
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 00000000bd7b2000 - 00000000bd80f000 (reserved)
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 00000000bd80f000 - 00000000bd907000 (usable)
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 00000000bd907000 - 00000000bdb0f000 (reserved)
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 00000000bdb0f000 - 00000000bdb18000 (usable)
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 00000000bdb18000 - 00000000bdb1f000 (reserved)
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 00000000bdb1f000 - 00000000bdb63000 (usable)
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 00000000bdb63000 - 00000000bdb9f000 (ACPI NVS)
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 00000000bdb9f000 - 00000000bdc00000 (ACPI data)
Nov 14 21:30:57 vinux kernel: [ 0.000000] BIOS-e820: 0000000100000000 - 0000000140000000 (usable)
Nov 14 21:30:57 vinux kernel: [ 0.000000] DMI present.
Nov 14 21:30:57 vinux kernel: [ 0.000000] last_pfn = 0xbdb63 max_arch_pfn = 0x100000
Nov 14 21:30:57 vinux kernel: [ 0.000000] MTRR default type: uncachable
Nov 14 21:30:57 vinux kernel: [ 0.000000] MTRR fixed ranges enabled:
Nov 14 21:30:57 vinux kernel: [ 0.000000] 00000-9FFFF write-back
Nov 14 21:30:57 vinux kernel: [ 0.000000] A0000-BFFFF uncachable
Nov 14 21:30:57 vinux kernel: [ 0.000000] C0000-FFFFF write-protect
Nov 14 21:30:57 vinux kernel: [ 0.000000] MTRR variable ranges enabled:
Nov 14 21:30:57 vinux kernel: [ 0.000000] 0 base 0C0000000 mask FC0000000 uncachable
Nov 14 21:30:57 vinux kernel: [ 0.000000] 1 base 000000000 mask F00000000 write-back
Nov 14 21:30:57 vinux kernel: [ 0.000000] 2 base 100000000 mask FC0000000 write-back
Nov 14 21:30:57 vinux kernel: [ 0.000000] 3 base 0BDC00000 mask FFFC00000 uncachable
Nov 14 21:30:57 vinux kernel: [ 0.000000] 4 disabled
Nov 14 21:30:57 vinux kernel: [ 0.000000] 5 disabled
Nov 14 21:30:57 vinux kernel: [ 0.000000] 6 disabled
Nov 14 21:30:57 vinux kernel: [ 0.000000] 7 disabled
Nov 14 21:30:57 vinux kernel: [ 0.000000] x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
Nov 14 21:30:57 vinux kernel: [ 0.000000] e820 update range: 00000000bdc00000 - 00000000be000000 (usable) ==> (reserved)
Nov 14 21:30:57 vinux kernel: [ 0.000000] e820 update range: 00000000c0000000 - 0000000100000000 (usable) ==> (reserved)
Nov 14 21:30:57 vinux kernel: [ 0.000000] initial memory mapped : 0 - 01800000
Nov 14 21:30:57 vinux kernel: [ 0.000000] init_memory_mapping: 0000000000000000-00000000373fe000
Nov 14 21:30:57 vinux kernel: [ 0.000000] 0000000000 - 0000400000 page 4k
Nov 14 21:30:57 vinux kernel: [ 0.000000] 0000400000 - 0037000000 page 2M
Nov 14 21:30:57 vinux kernel: [ 0.000000] 0037000000 - 00373fe000 page 4k
Nov 14 21:30:57 vinux kernel: [ 0.000000] kernel direct mapping tables up to 373fe000 @ 7000-d000
Nov 14 21:30:57 vinux kernel: [ 0.000000] RAMDISK: 3759a000 - 37fef5a8
Nov 14 21:30:57 vinux kernel: [ 0.000000] Allocated new RAMDISK: 00100000 - 00b555a8
Nov 14 21:30:57 vinux kernel: [ 0.000000] Move RAMDISK from 000000003759a000 - 0000000037fef5a7 to 00100000 - 00b555a7
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: RSDP 000f7190 00024 (v02 LENOVO)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: XSDT bdbf6067 0006C (v01 LENOVO TP-6G 00000000 LTP 00000000)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: FACP bdbe8000 000F4 (v03 LENOVO TP-6G 00000001 ALAN 00000001)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: DSDT bdbe9000 06B23 (v02 LENOVO TP-6G 00000001 INTL 20050624)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: FACS bdb9efc0 00040
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: HPET bdbfcd86 00038 (v01 LENOVO TP-6G 00000001 LOHR 0000005A)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: MCFG bdbfcdbe 0003C (v01 LENOVO TP-6G 00000001 LOHR 0000005A)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: SLIC bdbfcdfa 00176 (v01 LENOVO TP-6G 00000001 TBD 00000001)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: APIC bdbfcf70 00068 (v01 PTLTD ? APIC 00000000 LTP 00000000)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: BOOT bdbfcfd8 00028 (v01 PTLTD $SBFTBL$ 00000000 LTP 00000001)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: SSDT bdbe7000 00655 (v01 PmRef CpuPm 00003000 INTL 20050624)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: SSDT bdbe6000 00259 (v01 PmRef Cpu0Tst 00003000 INTL 20050624)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: SSDT bdbe5000 0020F (v01 PmRef ApTst 00003000 INTL 20050624)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: Local APIC address 0xfee00000
Nov 14 21:30:57 vinux kernel: [ 0.000000] 2151MB HIGHMEM available.
Nov 14 21:30:57 vinux kernel: [ 0.000000] 883MB LOWMEM available.
Nov 14 21:30:57 vinux kernel: [ 0.000000] mapped low ram: 0 - 373fe000
Nov 14 21:30:57 vinux kernel: [ 0.000000] low ram: 0 - 373fe000
Nov 14 21:30:57 vinux kernel: [ 0.000000] node 0 low ram: 00000000 - 373fe000
Nov 14 21:30:57 vinux kernel: [ 0.000000] node 0 bootmap 00009000 - 0000fe80
Nov 14 21:30:57 vinux kernel: [ 0.000000] (9 early reservations) ==> bootmem [0000000000 - 00373fe000]
Nov 14 21:30:57 vinux kernel: [ 0.000000] #0 [0000000000 - 0000001000] BIOS data page ==> [0000000000 - 0000001000]
Nov 14 21:30:57 vinux kernel: [ 0.000000] #1 [0000001000 - 0000002000] EX TRAMPOLINE ==> [0000001000 - 0000002000]
Nov 14 21:30:57 vinux kernel: [ 0.000000] #2 [0000006000 - 0000007000] TRAMPOLINE ==> [0000006000 - 0000007000]
Nov 14 21:30:57 vinux kernel: [ 0.000000] #3 [0001000000 - 00014cccf4] TEXT DATA BSS ==> [0001000000 - 00014cccf4]
Nov 14 21:30:57 vinux kernel: [ 0.000000] #4 [000009f400 - 0000100000] BIOS reserved ==> [000009f400 - 0000100000]
Nov 14 21:30:57 vinux kernel: [ 0.000000] #5 [00014cd000 - 00014d3184] BRK ==> [00014cd000 - 00014d3184]
Nov 14 21:30:57 vinux kernel: [ 0.000000] #6 [0000007000 - 0000009000] PGTABLE ==> [0000007000 - 0000009000]
Nov 14 21:30:57 vinux kernel: [ 0.000000] #7 [0000100000 - 0000b555a8] NEW RAMDISK ==> [0000100000 - 0000b555a8]
Nov 14 21:30:57 vinux kernel: [ 0.000000] #8 [0000009000 - 0000010000] BOOTMAP ==> [0000009000 - 0000010000]
Nov 14 21:30:57 vinux kernel: [ 0.000000] found SMP MP-table at [c00f7230] f7230
Nov 14 21:30:57 vinux kernel: [ 0.000000] Zone PFN ranges:
Nov 14 21:30:57 vinux kernel: [ 0.000000] DMA 0x00000000 -> 0x00001000
Nov 14 21:30:57 vinux kernel: [ 0.000000] Normal 0x00001000 -> 0x000373fe
Nov 14 21:30:57 vinux kernel: [ 0.000000] HighMem 0x000373fe -> 0x000bdb63
Nov 14 21:30:57 vinux kernel: [ 0.000000] Movable zone start PFN for each node
Nov 14 21:30:57 vinux kernel: [ 0.000000] early_node_map[6] active PFN ranges
Nov 14 21:30:57 vinux kernel: [ 0.000000] 0: 0x00000000 -> 0x0000009f
Nov 14 21:30:57 vinux kernel: [ 0.000000] 0: 0x00000100 -> 0x000bd6b3
Nov 14 21:30:57 vinux kernel: [ 0.000000] 0: 0x000bd6b9 -> 0x000bd7b2
Nov 14 21:30:57 vinux kernel: [ 0.000000] 0: 0x000bd80f -> 0x000bd907
Nov 14 21:30:57 vinux kernel: [ 0.000000] 0: 0x000bdb0f -> 0x000bdb18
Nov 14 21:30:57 vinux kernel: [ 0.000000] 0: 0x000bdb1f -> 0x000bdb63
Nov 14 21:30:57 vinux kernel: [ 0.000000] On node 0 totalpages: 776336
Nov 14 21:30:57 vinux kernel: [ 0.000000] free_area_init_node: node 0, pgdat c13b4860, node_mem_map c14d5000
Nov 14 21:30:57 vinux kernel: [ 0.000000] DMA zone: 32 pages used for memmap
Nov 14 21:30:57 vinux kernel: [ 0.000000] DMA zone: 0 pages reserved
Nov 14 21:30:57 vinux kernel: [ 0.000000] DMA zone: 3967 pages, LIFO batch:0
Nov 14 21:30:57 vinux kernel: [ 0.000000] Normal zone: 1736 pages used for memmap
Nov 14 21:30:57 vinux kernel: [ 0.000000] Normal zone: 220470 pages, LIFO batch:31
Nov 14 21:30:57 vinux kernel: [ 0.000000] HighMem zone: 4303 pages used for memmap
Nov 14 21:30:57 vinux kernel: [ 0.000000] HighMem zone: 545828 pages, LIFO batch:31
Nov 14 21:30:57 vinux kernel: [ 0.000000] Using APIC driver default
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: PM-Timer IO Port: 0x408
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: Local APIC address 0xfee00000
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1])
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1])
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0])
Nov 14 21:30:57 vinux kernel: [ 0.000000] IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-23
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 high edge)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: IRQ0 used by override.
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: IRQ2 used by override.
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: IRQ9 used by override.
Nov 14 21:30:57 vinux kernel: [ 0.000000] Using ACPI (MADT) for SMP configuration information
Nov 14 21:30:57 vinux kernel: [ 0.000000] ACPI: HPET id: 0x8086a201 base: 0xfed00000
Nov 14 21:30:57 vinux kernel: [ 0.000000] SMP: Allowing 2 CPUs, 0 hotplug CPUs
Nov 14 21:30:57 vinux kernel: [ 0.000000] nr_irqs_gsi: 24
Nov 14 21:30:57 vinux kernel: [ 0.000000] PM: Registered nosave memory: 000000000009f000 - 00000000000a0000
Nov 14 21:30:57 vinux kernel: [ 0.000000] PM: Registered nosave memory: 00000000000a0000 - 00000000000d2000
Nov 14 21:30:57 vinux kernel: [ 0.000000] PM: Registered nosave memory: 00000000000d2000 - 00000000000d4000
Nov 14 21:30:57 vinux kernel: [ 0.000000] PM: Registered nosave memory: 00000000000d4000 - 00000000000dc000
Nov 14 21:30:57 vinux kernel: [ 0.000000] PM: Registered nosave memory: 00000000000dc000 - 0000000000100000
Nov 14 21:30:57 vinux kernel: [ 0.000000] Allocating PCI resources starting at bdc00000 (gap: bdc00000:42400000)
Nov 14 21:30:57 vinux kernel: [ 0.000000] Booting paravirtualized kernel on bare hardware
Nov 14 21:30:57 vinux kernel: [ 0.000000] NR_CPUS:32 nr_cpumask_bits:32 nr_cpu_ids:2 nr_node_ids:1
Nov 14 21:30:57 vinux kernel: [ 0.000000] PERCPU: Embedded 14 pages/cpu @c3000000 s34328 r0 d23016 u2097152
Nov 14 21:30:57 vinux kernel: [ 0.000000] pcpu-alloc: s34328 r0 d23016 u2097152 alloc=1*4194304
Nov 14 21:30:57 vinux kernel: [ 0.000000] pcpu-alloc: [0] 0 1
Nov 14 21:30:57 vinux kernel: [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 770265
Nov 14 21:30:57 vinux kernel: [ 0.000000] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-2.6.32-5-686 root=UUID=cb1268f1-4e20-4409-87b1-3d882c14102c ro
Nov 14 21:30:57 vinux kernel: [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
Nov 14 21:30:57 vinux kernel: [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Nov 14 21:30:57 vinux kernel: [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Nov 14 21:30:57 vinux kernel: [ 0.000000] Enabling fast FPU save and restore... done.
Nov 14 21:30:57 vinux kernel: [ 0.000000] Enabling unmasked SIMD FPU exception support... done.
Nov 14 21:30:57 vinux kernel: [ 0.000000] Initializing CPU#0
Nov 14 21:30:57 vinux kernel: [ 0.000000] Initializing HighMem for node 0 (000373fe:000bdb63)
Nov 14 21:30:57 vinux kernel: [ 0.000000] Memory: 3063500k/3108236k available (2504k kernel code, 40824k reserved, 1328k data, 380k init, 2200524k highmem)
Nov 14 21:30:57 vinux kernel: [ 0.000000] virtual kernel memory layout:
Nov 14 21:30:57 vinux kernel: [ 0.000000] fixmap : 0xffd56000 - 0xfffff000 (2724 kB)
Nov 14 21:30:57 vinux kernel: [ 0.000000] pkmap : 0xff400000 - 0xff800000 (4096 kB)
Nov 14 21:30:57 vinux kernel: [ 0.000000] vmalloc : 0xf7bfe000 - 0xff3fe000 ( 120 MB)
Nov 14 21:30:57 vinux kernel: [ 0.000000] lowmem : 0xc0000000 - 0xf73fe000 ( 883 MB)
Nov 14 21:30:57 vinux kernel: [ 0.000000] .init : 0xc13bf000 - 0xc141e000 ( 380 kB)
Nov 14 21:30:57 vinux kernel: [ 0.000000] .data : 0xc12721f1 - 0xc13be480 (1328 kB)
Nov 14 21:30:57 vinux kernel: [ 0.000000] .text : 0xc1000000 - 0xc12721f1 (2504 kB)
Nov 14 21:30:57 vinux kernel: [ 0.000000] Checking if this processor honours the WP bit even in supervisor mode...Ok.
Nov 14 21:30:57 vinux kernel: [ 0.000000] SLUB: Genslabs=13, HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
Nov 14 21:30:57 vinux kernel: [ 0.000000] Hierarchical RCU implementation.
Nov 14 21:30:57 vinux kernel: [ 0.000000] NR_IRQS:1280
Nov 14 21:30:57 vinux kernel: [ 0.000000] Extended CMOS year: 2000
Nov 14 21:30:57 vinux kernel: [ 0.000000] Console: colour VGA+ 80x25
Nov 14 21:30:57 vinux kernel: [ 0.000000] console [tty0] enabled
Nov 14 21:30:57 vinux kernel: [ 0.000000] hpet clockevent registered
Nov 14 21:30:57 vinux kernel: [ 0.000000] Fast TSC calibration using PIT
Nov 14 21:30:57 vinux kernel: [ 0.000000] Detected 2161.220 MHz processor.
Nov 14 21:30:57 vinux kernel: [ 0.004004] Calibrating delay loop (skipped), value calculated using timer frequency.. 4322.44 BogoMIPS (lpj=8644880)
Nov 14 21:30:57 vinux kernel: [ 0.004139] Security Framework initialized
Nov 14 21:30:57 vinux kernel: [ 0.004202] SELinux: Disabled at boot.
Nov 14 21:30:57 vinux kernel: [ 0.004266] Mount-cache hash table entries: 512
Nov 14 21:30:57 vinux kernel: [ 0.004439] Initializing cgroup subsys ns
Nov 14 21:30:57 vinux kernel: [ 0.004501] Initializing cgroup subsys cpuacct
Nov 14 21:30:57 vinux kernel: [ 0.004563] Initializing cgroup subsys devices
Nov 14 21:30:57 vinux kernel: [ 0.004623] Initializing cgroup subsys freezer
Nov 14 21:30:57 vinux kernel: [ 0.004684] Initializing cgroup subsys net_cls
Nov 14 21:30:57 vinux kernel: [ 0.004765] CPU: L1 I cache: 32K, L1 D cache: 32K
Nov 14 21:30:57 vinux kernel: [ 0.004867] CPU: L2 cache: 1024K
Nov 14 21:30:57 vinux kernel: [ 0.004927] CPU: Physical Processor ID: 0
Nov 14 21:30:57 vinux kernel: [ 0.004986] CPU: Processor Core ID: 0
Nov 14 21:30:57 vinux kernel: [ 0.005048] mce: CPU supports 6 MCE banks
Nov 14 21:30:57 vinux kernel: [ 0.005114] CPU0: Thermal monitoring enabled (TM2)
Nov 14 21:30:57 vinux kernel: [ 0.005176] using mwait in idle threads.
Nov 14 21:30:57 vinux kernel: [ 0.005240] Performance Events: Core2 events, Intel PMU driver.
Nov 14 21:30:57 vinux kernel: [ 0.005389] ... version: 2
Nov 14 21:30:57 vinux kernel: [ 0.005448] ... bit width: 40
Nov 14 21:30:57 vinux kernel: [ 0.008005] ... generic registers: 2
Nov 14 21:30:57 vinux kernel: [ 0.008064] ... value mask: 000000ffffffffff
Nov 14 21:30:57 vinux kernel: [ 0.008126] ... max period: 000000007fffffff
Nov 14 21:30:57 vinux kernel: [ 0.008187] ... fixed-purpose events: 3
Nov 14 21:30:57 vinux kernel: [ 0.008247] ... event mask: 0000000700000003
Nov 14 21:30:57 vinux kernel: [ 0.008311] Checking 'hlt' instruction... OK.
Nov 14 21:30:57 vinux kernel: [ 0.025104] ACPI: Core revision 20090903
Nov 14 21:30:57 vinux kernel: [ 0.036059] Enabling APIC mode: Flat. Using 1 I/O APICs
Nov 14 21:30:57 vinux kernel: [ 0.036511] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
Nov 14 21:30:57 vinux kernel: [ 0.079757] CPU0: Intel(R) Pentium(R) Dual CPU T3400 @ 2.16GHz stepping 0d
Nov 14 21:30:57 vinux kernel: [ 0.080001] Booting processor 1 APIC 0x1 ip 0x6000
Nov 14 21:30:57 vinux kernel: [ 0.008000] Initializing CPU#1
Nov 14 21:30:57 vinux kernel: [ 0.008000] CPU: L1 I cache: 32K, L1 D cache: 32K
Nov 14 21:30:57 vinux kernel: [ 0.008000] CPU: L2 cache: 1024K
Nov 14 21:30:57 vinux kernel: [ 0.008000] CPU: Physical Processor ID: 0
Nov 14 21:30:57 vinux kernel: [ 0.008000] CPU: Processor Core ID: 1
Nov 14 21:30:57 vinux kernel: [ 0.008000] CPU1: Thermal monitoring enabled (TM2)
Nov 14 21:30:57 vinux kernel: [ 0.164086] CPU1: Intel(R) Pentium(R) Dual CPU T3400 @ 2.16GHz stepping 0d
Nov 14 21:30:57 vinux kernel: [ 0.164589] checking TSC synchronization [CPU#0 -> CPU#1]: passed.
Nov 14 21:30:57 vinux kernel: [ 0.168046] Brought up 2 CPUs
Nov 14 21:30:57 vinux kernel: [ 0.168106] Total of 2 processors activated (8644.94 BogoMIPS).
Nov 14 21:30:57 vinux kernel: [ 0.168738] CPU0 attaching sched-domain:
Nov 14 21:30:57 vinux kernel: [ 0.168742] domain 0: span 0-1 level MC
Nov 14 21:30:57 vinux kernel: [ 0.168744] groups: group c3003778 cpus 0 group c3203778 cpus 1
Nov 14 21:30:57 vinux kernel: [ 0.168750] CPU1 attaching sched-domain:
Nov 14 21:30:57 vinux kernel: [ 0.168752] domain 0: span 0-1 level MC
Nov 14 21:30:57 vinux kernel: [ 0.168754] groups: group c3203778 cpus 1 group c3003778 cpus 0
Nov 14 21:30:57 vinux kernel: [ 0.168804] devtmpfs: initialized
Nov 14 21:30:57 vinux kernel: [ 0.168804] regulator: core version 0.5
Nov 14 21:30:57 vinux kernel: [ 0.168804] NET: Registered protocol family 16
Nov 14 21:30:57 vinux kernel: [ 0.169011] ACPI: bus type pci registered
Nov 14 21:30:57 vinux kernel: [ 0.169133] PCI: MCFG configuration 0: base e0000000 segment 0 buses 0 - 255
Nov 14 21:30:57 vinux kernel: [ 0.169199] PCI: Not using MMCONFIG.
Nov 14 21:30:57 vinux kernel: [ 0.169699] PCI: PCI BIOS revision 3.00 entry at 0xfde11, last bus=8
Nov 14 21:30:57 vinux kernel: [ 0.169763] PCI: Using configuration type 1 for base access
Nov 14 21:30:57 vinux kernel: [ 0.172112] bio: create slab <bio-0> at 0
Nov 14 21:30:57 vinux kernel: [ 0.172806] ACPI: EC: Look up EC in DSDT
Nov 14 21:30:57 vinux kernel: [ 0.176261] ACPI: BIOS _OSI(Linux) query ignored
Nov 14 21:30:57 vinux kernel: [ 0.177657] ACPI: Interpreter enabled
Nov 14 21:30:57 vinux kernel: [ 0.177719] ACPI: (supports S0 S3 S4 S5)
Nov 14 21:30:57 vinux kernel: [ 0.177962] ACPI: Using IOAPIC for interrupt routing
Nov 14 21:30:57 vinux kernel: [ 0.178070] PCI: MCFG configuration 0: base e0000000 segment 0 buses 0 - 255
Nov 14 21:30:57 vinux kernel: [ 0.216431] PCI: MCFG area at e0000000 reserved in ACPI motherboard resources
Nov 14 21:30:57 vinux kernel: [ 0.216497] PCI: Using MMCONFIG for extended config space
Nov 14 21:30:57 vinux kernel: [ 0.258858] ACPI: EC: GPE = 0x1c, I/O: command/status = 0x66, data = 0x62
Nov 14 21:30:57 vinux kernel: [ 0.259221] ACPI: No dock devices found.
Nov 14 21:30:57 vinux kernel: [ 0.259753] ACPI: PCI Root Bridge [PCI0] (0000:00)
Nov 14 21:30:57 vinux kernel: [ 0.259867] DMAR: Forcing write-buffer flush capability
Nov 14 21:30:57 vinux kernel: [ 0.259929] DMAR: Disabling IOMMU for graphics on this chipset
Nov 14 21:30:57 vinux kernel: [ 0.260039] pci 0000:00:02.0: reg 10 64bit mmio: [0xf4000000-0xf43fffff]
Nov 14 21:30:57 vinux kernel: [ 0.260046] pci 0000:00:02.0: reg 18 64bit mmio pref: [0xd0000000-0xdfffffff]
Nov 14 21:30:57 vinux kernel: [ 0.260052] pci 0000:00:02.0: reg 20 io port: [0x1800-0x1807]
Nov 14 21:30:57 vinux kernel: [ 0.260093] pci 0000:00:02.1: reg 10 64bit mmio: [0xf4400000-0xf44fffff]
Nov 14 21:30:57 vinux kernel: [ 0.260222] pci 0000:00:1a.0: reg 20 io port: [0x1820-0x183f]
Nov 14 21:30:57 vinux kernel: [ 0.260320] pci 0000:00:1a.1: reg 20 io port: [0x1840-0x185f]
Nov 14 21:30:57 vinux kernel: [ 0.260417] pci 0000:00:1a.2: reg 20 io port: [0x1860-0x187f]
Nov 14 21:30:57 vinux kernel: [ 0.260515] pci 0000:00:1a.7: reg 10 32bit mmio: [0xf4a04800-0xf4a04bff]
Nov 14 21:30:57 vinux kernel: [ 0.260586] pci 0000:00:1a.7: PME# supported from D0 D3hot D3cold
Nov 14 21:30:57 vinux kernel: [ 0.260653] pci 0000:00:1a.7: PME# disabled
Nov 14 21:30:57 vinux kernel: [ 0.260770] pci 0000:00:1b.0: reg 10 64bit mmio: [0xf4a00000-0xf4a03fff]
Nov 14 21:30:57 vinux kernel: [ 0.260833] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
Nov 14 21:30:57 vinux kernel: [ 0.260899] pci 0000:00:1b.0: PME# disabled
Nov 14 21:30:57 vinux kernel: [ 0.261055] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
Nov 14 21:30:57 vinux kernel: [ 0.261121] pci 0000:00:1c.0: PME# disabled
Nov 14 21:30:57 vinux kernel: [ 0.261279] pci 0000:00:1c.1: PME# supported from D0 D3hot D3cold
Nov 14 21:30:57 vinux kernel: [ 0.261345] pci 0000:00:1c.1: PME# disabled
Nov 14 21:30:57 vinux kernel: [ 0.261503] pci 0000:00:1c.2: PME# supported from D0 D3hot D3cold
Nov 14 21:30:57 vinux kernel: [ 0.261569] pci 0000:00:1c.2: PME# disabled
Nov 14 21:30:57 vinux kernel: [ 0.261726] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold
Nov 14 21:30:57 vinux kernel: [ 0.261792] pci 0000:00:1c.3: PME# disabled
Nov 14 21:30:57 vinux kernel: [ 0.261951] pci 0000:00:1c.5: PME# supported from D0 D3hot D3cold
Nov 14 21:30:57 vinux kernel: [ 0.262018] pci 0000:00:1c.5: PME# disabled
Nov 14 21:30:57 vinux kernel: [ 0.262157] pci 0000:00:1d.0: reg 20 io port: [0x1880-0x189f]
Nov 14 21:30:57 vinux kernel: [ 0.262254] pci 0000:00:1d.1: reg 20 io port: [0x18a0-0x18bf]
Nov 14 21:30:57 vinux kernel: [ 0.262352] pci 0000:00:1d.2: reg 20 io port: [0x18c0-0x18df]
Nov 14 21:30:57 vinux kernel: [ 0.262450] pci 0000:00:1d.7: reg 10 32bit mmio: [0xf4a04c00-0xf4a04fff]
Nov 14 21:30:57 vinux kernel: [ 0.262521] pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold
Nov 14 21:30:57 vinux kernel: [ 0.262588] pci 0000:00:1d.7: PME# disabled
Nov 14 21:30:57 vinux kernel: [ 0.262916] pci 0000:00:1f.2: reg 10 io port: [0x1818-0x181f]
Nov 14 21:30:57 vinux kernel: [ 0.262924] pci 0000:00:1f.2: reg 14 io port: [0x180c-0x180f]
Nov 14 21:30:57 vinux kernel: [ 0.262932] pci 0000:00:1f.2: reg 18 io port: [0x1810-0x1817]
Nov 14 21:30:57 vinux kernel: [ 0.262940] pci 0000:00:1f.2: reg 1c io port: [0x1808-0x180b]
Nov 14 21:30:57 vinux kernel: [ 0.262948] pci 0000:00:1f.2: reg 20 io port: [0x18e0-0x18ff]
Nov 14 21:30:57 vinux kernel: [ 0.262956] pci 0000:00:1f.2: reg 24 32bit mmio: [0xf4a04000-0xf4a047ff]
Nov 14 21:30:57 vinux kernel: [ 0.263005] pci 0000:00:1f.2: PME# supported from D3hot
Nov 14 21:30:57 vinux kernel: [ 0.263070] pci 0000:00:1f.2: PME# disabled
Nov 14 21:30:57 vinux kernel: [ 0.263172] pci 0000:00:1f.3: reg 10 64bit mmio: [0x000000-0x0000ff]
Nov 14 21:30:57 vinux kernel: [ 0.263192] pci 0000:00:1f.3: reg 20 io port: [0x1c00-0x1c1f]
Nov 14 21:30:57 vinux kernel: [ 0.263298] pci 0000:02:00.0: reg 10 32bit mmio: [0xf4500000-0xf45000ff]
Nov 14 21:30:57 vinux kernel: [ 0.263378] pci 0000:02:00.0: reg 30 32bit mmio pref: [0x000000-0x00ffff]
Nov 14 21:30:57 vinux kernel: [ 0.263543] pci 0000:02:00.2: reg 10 32bit mmio: [0xf4500400-0xf45004ff]
Nov 14 21:30:57 vinux kernel: [ 0.263780] pci 0000:02:00.3: reg 10 32bit mmio: [0xf4500800-0xf45008ff]
Nov 14 21:30:57 vinux kernel: [ 0.272236] pci 0000:00:1c.0: bridge 32bit mmio: [0xf4500000-0xf45fffff]
Nov 14 21:30:57 vinux kernel: [ 0.272516] pci 0000:04:00.0: reg 10 64bit mmio: [0xf4700000-0xf4703fff]
Nov 14 21:30:57 vinux kernel: [ 0.272737] pci 0000:04:00.0: supports D1 D2
Nov 14 21:30:57 vinux kernel: [ 0.272739] pci 0000:04:00.0: PME# supported from D0 D3hot D3cold
Nov 14 21:30:57 vinux kernel: [ 0.272847] pci 0000:04:00.0: PME# disabled
Nov 14 21:30:57 vinux kernel: [ 0.273433] pci 0000:00:1c.2: bridge 32bit mmio: [0xf4700000-0xf47fffff]
Nov 14 21:30:57 vinux kernel: [ 0.273500] pci 0000:00:1c.3: bridge io port: [0x2000-0x2fff]
Nov 14 21:30:57 vinux kernel: [ 0.273505] pci 0000:00:1c.3: bridge 32bit mmio: [0xf0000000-0xf3ffffff]
Nov 14 21:30:57 vinux kernel: [ 0.273514] pci 0000:00:1c.3: bridge 64bit mmio pref: [0xf6000000-0xf7ffffff]
Nov 14 21:30:57 vinux kernel: [ 0.273738] pci 0000:07:00.0: reg 10 64bit mmio: [0xf4600000-0xf460ffff]
Nov 14 21:30:57 vinux kernel: [ 0.273978] pci 0000:07:00.0: PME# supported from D3hot D3cold
Nov 14 21:30:57 vinux kernel: [ 0.274084] pci 0000:07:00.0: PME# disabled
Nov 14 21:30:57 vinux kernel: [ 0.274686] pci 0000:00:1c.5: bridge 32bit mmio: [0xf4600000-0xf46fffff]
Nov 14 21:30:57 vinux kernel: [ 0.274760] pci 0000:00:1e.0: transparent bridge
Nov 14 21:30:57 vinux kernel: [ 0.274870] pci_bus 0000:00: on NUMA node 0
Nov 14 21:30:57 vinux kernel: [ 0.274875] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT]
Nov 14 21:30:57 vinux kernel: [ 0.275009] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P1._PRT]
Nov 14 21:30:57 vinux kernel: [ 0.275097] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.RP01._PRT]
Nov 14 21:30:57 vinux kernel: [ 0.275199] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.RP02._PRT]
Nov 14 21:30:57 vinux kernel: [ 0.275262] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.RP03._PRT]
Nov 14 21:30:57 vinux kernel: [ 0.275332] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.RP04._PRT]
Nov 14 21:30:57 vinux kernel: [ 0.275398] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.RP06._PRT]
Nov 14 21:30:57 vinux kernel: [ 0.287616] ACPI: PCI Interrupt Link [LNKA] (IRQs 1 3 4 *5 6 7 10 12 14 15)
Nov 14 21:30:57 vinux kernel: [ 0.288280] ACPI: PCI Interrupt Link [LNKB] (IRQs 1 3 4 5 6 7 *11 12 14 15)
Nov 14 21:30:57 vinux kernel: [ 0.288940] ACPI: PCI Interrupt Link [LNKC] (IRQs 1 *3 4 5 6 7 10 12 14 15)
Nov 14 21:30:57 vinux kernel: [ 0.289598] ACPI: PCI Interrupt Link [LNKD] (IRQs 1 3 4 5 6 7 11 12 14 15) *10
Nov 14 21:30:57 vinux kernel: [ 0.290310] ACPI: PCI Interrupt Link [LNKE] (IRQs 1 3 4 5 6 *7 10 12 14 15)
Nov 14 21:30:57 vinux kernel: [ 0.290968] ACPI: PCI Interrupt Link [LNKF] (IRQs 1 3 4 5 6 7 *11 12 14 15)
Nov 14 21:30:57 vinux kernel: [ 0.291628] ACPI: PCI Interrupt Link [LNKG] (IRQs 1 3 4 5 6 7 *10 12 14 15)
Nov 14 21:30:57 vinux kernel: [ 0.292276] ACPI: PCI Interrupt Link [LNKH] (IRQs 1 3 *4 5 6 7 11 12 14 15)
Nov 14 21:30:57 vinux kernel: [ 0.292926] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
Nov 14 21:30:57 vinux kernel: [ 0.293016] vgaarb: loaded
Nov 14 21:30:57 vinux kernel: [ 0.293086] PCI: Using ACPI for IRQ routing
Nov 14 21:30:57 vinux kernel: [ 0.293086] HPET: 4 timers in total, 0 timers will be used for per-cpu timer
Nov 14 21:30:57 vinux kernel: [ 0.293086] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0
Nov 14 21:30:57 vinux kernel: [ 0.293086] hpet0: 4 comparators, 64-bit 14.318180 MHz counter
Nov 14 21:30:57 vinux kernel: [ 0.300019] Switching to clocksource tsc
Nov 14 21:30:57 vinux kernel: [ 0.301240] pnp: PnP ACPI init
Nov 14 21:30:57 vinux kernel: [ 0.301309] ACPI: bus type pnp registered
Nov 14 21:30:57 vinux kernel: [ 0.319871] pnp: PnP ACPI: found 10 devices
Nov 14 21:30:57 vinux kernel: [ 0.319932] ACPI: ACPI bus type pnp unregistered
Nov 14 21:30:57 vinux kernel: [ 0.319994] PnPBIOS: Disabled by ACPI PNP
Nov 14 21:30:57 vinux kernel: [ 0.320063] system 00:03: iomem range 0xfed00000-0xfed003ff has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.320134] system 00:05: ioport range 0x680-0x69f has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.320199] system 00:05: ioport range 0xffff-0xffff has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.320264] system 00:05: ioport range 0xffff-0xffff has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.320329] system 00:05: ioport range 0xffff-0xffff has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.320394] system 00:05: ioport range 0x400-0x47f has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.320459] system 00:05: ioport range 0x480-0x48f has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.320524] system 00:05: ioport range 0x1180-0x11ff has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.320588] system 00:05: ioport range 0x164e-0x164f has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.320654] system 00:05: ioport range 0xfe00-0xfe00 has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.320719] system 00:05: ioport range 0xff00-0xff7f has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.320787] system 00:09: iomem range 0xfed1c000-0xfed1ffff has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.320853] system 00:09: iomem range 0xfed10000-0xfed13fff has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.320919] system 00:09: iomem range 0xfed18000-0xfed18fff has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.320985] system 00:09: iomem range 0xfed19000-0xfed19fff has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.321051] system 00:09: iomem range 0xe0000000-0xefffffff has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.321117] system 00:09: iomem range 0xfed20000-0xfed3ffff has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.321182] system 00:09: iomem range 0xfed40000-0xfed44fff has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.321248] system 00:09: iomem range 0xfed45000-0xfed8ffff has been reserved
Nov 14 21:30:57 vinux kernel: [ 0.356108] pci 0000:00:1c.0: PCI bridge, secondary bus 0000:02
Nov 14 21:30:57 vinux kernel: [ 0.356173] pci 0000:00:1c.0: IO window: 0x3000-0x3fff
Nov 14 21:30:57 vinux kernel: [ 0.356241] pci 0000:00:1c.0: MEM window: 0xf4500000-0xf45fffff
Nov 14 21:30:57 vinux kernel: [ 0.356308] pci 0000:00:1c.0: PREFETCH window: 0xc0000000-0xc01fffff
Nov 14 21:30:57 vinux kernel: [ 0.356378] pci 0000:00:1c.1: PCI bridge, secondary bus 0000:03
Nov 14 21:30:57 vinux kernel: [ 0.356443] pci 0000:00:1c.1: IO window: 0x4000-0x4fff
Nov 14 21:30:57 vinux kernel: [ 0.356510] pci 0000:00:1c.1: MEM window: 0xc0200000-0xc03fffff
Nov 14 21:30:57 vinux kernel: [ 0.356576] pci 0000:00:1c.1: PREFETCH window: 0x000000c0400000-0x000000c05fffff
Nov 14 21:30:57 vinux kernel: [ 0.356659] pci 0000:00:1c.2: PCI bridge, secondary bus 0000:04
Nov 14 21:30:57 vinux kernel: [ 0.356724] pci 0000:00:1c.2: IO window: 0x5000-0x5fff
Nov 14 21:30:57 vinux kernel: [ 0.356791] pci 0000:00:1c.2: MEM window: 0xf4700000-0xf47fffff
Nov 14 21:30:57 vinux kernel: [ 0.356858] pci 0000:00:1c.2: PREFETCH window: 0x000000c0600000-0x000000c07fffff
Nov 14 21:30:57 vinux kernel: [ 0.356941] pci 0000:00:1c.3: PCI bridge, secondary bus 0000:05
Nov 14 21:30:57 vinux kernel: [ 0.357006] pci 0000:00:1c.3: IO window: 0x2000-0x2fff
Nov 14 21:30:57 vinux kernel: [ 0.357073] pci 0000:00:1c.3: MEM window: 0xf0000000-0xf3ffffff
Nov 14 21:30:57 vinux kernel: [ 0.357139] pci 0000:00:1c.3: PREFETCH window: 0x000000f6000000-0x000000f7ffffff
Nov 14 21:30:57 vinux kernel: [ 0.357222] pci 0000:00:1c.5: PCI bridge, secondary bus 0000:07
Nov 14 21:30:57 vinux kernel: [ 0.357287] pci 0000:00:1c.5: IO window: 0x6000-0x6fff
Nov 14 21:30:57 vinux kernel: [ 0.357354] pci 0000:00:1c.5: MEM window: 0xf4600000-0xf46fffff
Nov 14 21:30:57 vinux kernel: [ 0.357420] pci 0000:00:1c.5: PREFETCH window: 0x000000c0800000-0x000000c09fffff
Nov 14 21:30:57 vinux kernel: [ 0.357503] pci 0000:00:1e.0: PCI bridge, secondary bus 0000:08
Nov 14 21:30:57 vinux kernel: [ 0.357566] pci 0000:00:1e.0: IO window: disabled
Nov 14 21:30:57 vinux kernel: [ 0.357631] pci 0000:00:1e.0: MEM window: disabled
Nov 14 21:30:57 vinux kernel: [ 0.357696] pci 0000:00:1e.0: PREFETCH window: disabled
Nov 14 21:30:57 vinux kernel: [ 0.357777] pci 0000:00:1c.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
Nov 14 21:30:57 vinux kernel: [ 0.357846] pci 0000:00:1c.0: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 0.357858] pci 0000:00:1c.1: PCI INT B -> GSI 16 (level, low) -> IRQ 16
Nov 14 21:30:57 vinux kernel: [ 0.357925] pci 0000:00:1c.1: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 0.357936] pci 0000:00:1c.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
Nov 14 21:30:57 vinux kernel: [ 0.358003] pci 0000:00:1c.2: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 0.358015] pci 0000:00:1c.3: PCI INT D -> GSI 19 (level, low) -> IRQ 19
Nov 14 21:30:57 vinux kernel: [ 0.358082] pci 0000:00:1c.3: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 0.358092] pci 0000:00:1c.5: PCI INT B -> GSI 16 (level, low) -> IRQ 16
Nov 14 21:30:57 vinux kernel: [ 0.358159] pci 0000:00:1c.5: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 0.358168] pci 0000:00:1e.0: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 0.358172] pci_bus 0000:00: resource 0 io: [0x00-0xffff]
Nov 14 21:30:57 vinux kernel: [ 0.358175] pci_bus 0000:00: resource 1 mem: [0x000000-0xffffffff]
Nov 14 21:30:57 vinux kernel: [ 0.358178] pci_bus 0000:02: resource 0 io: [0x3000-0x3fff]
Nov 14 21:30:57 vinux kernel: [ 0.358180] pci_bus 0000:02: resource 1 mem: [0xf4500000-0xf45fffff]
Nov 14 21:30:57 vinux kernel: [ 0.358182] pci_bus 0000:02: resource 2 pref mem [0xc0000000-0xc01fffff]
Nov 14 21:30:57 vinux kernel: [ 0.358185] pci_bus 0000:03: resource 0 io: [0x4000-0x4fff]
Nov 14 21:30:57 vinux kernel: [ 0.358187] pci_bus 0000:03: resource 1 mem: [0xc0200000-0xc03fffff]
Nov 14 21:30:57 vinux kernel: [ 0.358190] pci_bus 0000:03: resource 2 pref mem [0xc0400000-0xc05fffff]
Nov 14 21:30:57 vinux kernel: [ 0.358192] pci_bus 0000:04: resource 0 io: [0x5000-0x5fff]
Nov 14 21:30:57 vinux kernel: [ 0.358195] pci_bus 0000:04: resource 1 mem: [0xf4700000-0xf47fffff]
Nov 14 21:30:57 vinux kernel: [ 0.358197] pci_bus 0000:04: resource 2 pref mem [0xc0600000-0xc07fffff]
Nov 14 21:30:57 vinux kernel: [ 0.358200] pci_bus 0000:05: resource 0 io: [0x2000-0x2fff]
Nov 14 21:30:57 vinux kernel: [ 0.358202] pci_bus 0000:05: resource 1 mem: [0xf0000000-0xf3ffffff]
Nov 14 21:30:57 vinux kernel: [ 0.358204] pci_bus 0000:05: resource 2 pref mem [0xf6000000-0xf7ffffff]
Nov 14 21:30:57 vinux kernel: [ 0.358207] pci_bus 0000:07: resource 0 io: [0x6000-0x6fff]
Nov 14 21:30:57 vinux kernel: [ 0.358209] pci_bus 0000:07: resource 1 mem: [0xf4600000-0xf46fffff]
Nov 14 21:30:57 vinux kernel: [ 0.358212] pci_bus 0000:07: resource 2 pref mem [0xc0800000-0xc09fffff]
Nov 14 21:30:57 vinux kernel: [ 0.358214] pci_bus 0000:08: resource 3 io: [0x00-0xffff]
Nov 14 21:30:57 vinux kernel: [ 0.358217] pci_bus 0000:08: resource 4 mem: [0x000000-0xffffffff]
Nov 14 21:30:57 vinux kernel: [ 0.358245] NET: Registered protocol family 2
Nov 14 21:30:57 vinux kernel: [ 0.358378] IP route cache hash table entries: 32768 (order: 5, 131072 bytes)
Nov 14 21:30:57 vinux kernel: [ 0.358712] TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
Nov 14 21:30:57 vinux kernel: [ 0.359232] TCP bind hash table entries: 65536 (order: 7, 524288 bytes)
Nov 14 21:30:57 vinux kernel: [ 0.359589] TCP: Hash tables configured (established 131072 bind 65536)
Nov 14 21:30:57 vinux kernel: [ 0.359655] TCP reno registered
Nov 14 21:30:57 vinux kernel: [ 0.359818] NET: Registered protocol family 1
Nov 14 21:30:57 vinux kernel: [ 0.359899] pci 0000:00:02.0: Boot video device
Nov 14 21:30:57 vinux kernel: [ 0.360107] Unpacking initramfs...
Nov 14 21:30:57 vinux kernel: [ 0.637581] Freeing initrd memory: 10581k freed
Nov 14 21:30:57 vinux kernel: [ 0.644068] Simple Boot Flag at 0x36 set to 0x1
Nov 14 21:30:57 vinux kernel: [ 0.644417] audit: initializing netlink socket (disabled)
Nov 14 21:30:57 vinux kernel: [ 0.644491] type=2000 audit(1321306245.643:1): initialized
Nov 14 21:30:57 vinux kernel: [ 0.647782] highmem bounce pool size: 64 pages
Nov 14 21:30:57 vinux kernel: [ 0.647846] HugeTLB registered 4 MB page size, pre-allocated 0 pages
Nov 14 21:30:57 vinux kernel: [ 0.649170] VFS: Disk quotas dquot_6.5.2
Nov 14 21:30:57 vinux kernel: [ 0.649281] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
Nov 14 21:30:57 vinux kernel: [ 0.649412] msgmni has been set to 1708
Nov 14 21:30:57 vinux kernel: [ 0.649638] alg: No test for stdrng (krng)
Nov 14 21:30:57 vinux kernel: [ 0.649744] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253)
Nov 14 21:30:57 vinux kernel: [ 0.649822] io scheduler noop registered
Nov 14 21:30:57 vinux kernel: [ 0.649882] io scheduler anticipatory registered
Nov 14 21:30:57 vinux kernel: [ 0.649943] io scheduler deadline registered
Nov 14 21:30:57 vinux kernel: [ 0.650033] io scheduler cfq registered (default)
Nov 14 21:30:57 vinux kernel: [ 0.650245] pcieport 0000:00:1c.0: irq 24 for MSI/MSI-X
Nov 14 21:30:57 vinux kernel: [ 0.650257] pcieport 0000:00:1c.0: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 0.650416] pcieport 0000:00:1c.1: irq 25 for MSI/MSI-X
Nov 14 21:30:57 vinux kernel: [ 0.650426] pcieport 0000:00:1c.1: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 0.650584] pcieport 0000:00:1c.2: irq 26 for MSI/MSI-X
Nov 14 21:30:57 vinux kernel: [ 0.650595] pcieport 0000:00:1c.2: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 0.650750] pcieport 0000:00:1c.3: irq 27 for MSI/MSI-X
Nov 14 21:30:57 vinux kernel: [ 0.650761] pcieport 0000:00:1c.3: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 0.650916] pcieport 0000:00:1c.5: irq 28 for MSI/MSI-X
Nov 14 21:30:57 vinux kernel: [ 0.650926] pcieport 0000:00:1c.5: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 0.651089] isapnp: Scanning for PnP cards...
Nov 14 21:30:57 vinux kernel: [ 1.005143] isapnp: No Plug & Play device found
Nov 14 21:30:57 vinux kernel: [ 1.006452] Linux agpgart interface v0.103
Nov 14 21:30:57 vinux kernel: [ 1.006583] agpgart-intel 0000:00:00.0: Intel Mobile Intel® GM45 Express Chipset
Nov 14 21:30:57 vinux kernel: [ 1.007017] agpgart-intel 0000:00:00.0: detected 32764K stolen memory
Nov 14 21:30:57 vinux kernel: [ 1.038455] agpgart-intel 0000:00:00.0: AGP aperture is 256M @ 0xd0000000
Nov 14 21:30:57 vinux kernel: [ 1.038593] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
Nov 14 21:30:57 vinux kernel: [ 1.039021] PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:MSE0] at 0x60,0x64 irq 1,12
Nov 14 21:30:57 vinux kernel: [ 1.069998] serio: i8042 KBD port at 0x60,0x64 irq 1
Nov 14 21:30:57 vinux kernel: [ 1.070065] serio: i8042 AUX port at 0x60,0x64 irq 12
Nov 14 21:30:57 vinux kernel: [ 1.070174] mice: PS/2 mouse device common for all mice
Nov 14 21:30:57 vinux kernel: [ 1.070275] rtc_cmos 00:06: RTC can wake from S4
Nov 14 21:30:57 vinux kernel: [ 1.070370] rtc_cmos 00:06: rtc core: registered rtc_cmos as rtc0
Nov 14 21:30:57 vinux kernel: [ 1.070466] rtc0: alarms up to one month, y3k, 242 bytes nvram, hpet irqs
Nov 14 21:30:57 vinux kernel: [ 1.070542] cpuidle: using governor ladder
Nov 14 21:30:57 vinux kernel: [ 1.070605] cpuidle: using governor menu
Nov 14 21:30:57 vinux kernel: [ 1.070668] No iBFT detected.
Nov 14 21:30:57 vinux kernel: [ 1.071036] TCP cubic registered
Nov 14 21:30:57 vinux kernel: [ 1.071222] NET: Registered protocol family 10
Nov 14 21:30:57 vinux kernel: [ 1.071931] Mobile IPv6
Nov 14 21:30:57 vinux kernel: [ 1.071992] NET: Registered protocol family 17
Nov 14 21:30:57 vinux kernel: [ 1.072079] Using IPI No-Shortcut mode
Nov 14 21:30:57 vinux kernel: [ 1.072198] PM: Resume from disk failed.
Nov 14 21:30:57 vinux kernel: [ 1.072213] registered taskstats version 1
Nov 14 21:30:57 vinux kernel: [ 1.073330] rtc_cmos 00:06: setting system clock to 2011-11-14 21:30:47 UTC (1321306247)
Nov 14 21:30:57 vinux kernel: [ 1.073464] Initalizing network drop monitor service
Nov 14 21:30:57 vinux kernel: [ 1.073543] Freeing unused kernel memory: 380k freed
Nov 14 21:30:57 vinux kernel: [ 1.073773] Write protecting the kernel text: 2508k
Nov 14 21:30:57 vinux kernel: [ 1.073854] Write protecting the kernel read-only data: 920k
Nov 14 21:30:57 vinux kernel: [ 1.089978] udev[56]: starting version 164
Nov 14 21:30:57 vinux kernel: [ 1.100796] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input0
Nov 14 21:30:57 vinux kernel: [ 1.206841] usbcore: registered new interface driver usbfs
Nov 14 21:30:57 vinux kernel: [ 1.207059] usbcore: registered new interface driver hub
Nov 14 21:30:57 vinux kernel: [ 1.207279] usbcore: registered new device driver usb
Nov 14 21:30:57 vinux kernel: [ 1.215511] ACPI: Invalid active0 threshold
Nov 14 21:30:57 vinux kernel: [ 1.220431] thermal LNXTHERM:01: registered as thermal_zone0
Nov 14 21:30:57 vinux kernel: [ 1.221449] ACPI: Thermal Zone [TZ00] (64 C)
Nov 14 21:30:57 vinux kernel: [ 1.222779] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
Nov 14 21:30:57 vinux kernel: [ 1.222884] ehci_hcd 0000:00:1a.7: PCI INT C -> GSI 20 (level, low) -> IRQ 20
Nov 14 21:30:57 vinux kernel: [ 1.222972] ehci_hcd 0000:00:1a.7: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 1.222976] ehci_hcd 0000:00:1a.7: EHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.223062] ehci_hcd 0000:00:1a.7: new USB bus registered, assigned bus number 1
Nov 14 21:30:57 vinux kernel: [ 1.223187] ehci_hcd 0000:00:1a.7: debug port 1
Nov 14 21:30:57 vinux kernel: [ 1.227149] ehci_hcd 0000:00:1a.7: cache line size of 32 is not supported
Nov 14 21:30:57 vinux kernel: [ 1.227395] SCSI subsystem initialized
Nov 14 21:30:57 vinux kernel: [ 1.231991] ehci_hcd 0000:00:1a.7: irq 20, io mem 0xf4a04800
Nov 14 21:30:57 vinux kernel: [ 1.238254] sdhci: Secure Digital Host Controller Interface driver
Nov 14 21:30:57 vinux kernel: [ 1.238324] sdhci: Copyright(c) Pierre Ossman
Nov 14 21:30:57 vinux kernel: [ 1.239687] uhci_hcd: USB Universal Host Controller Interface driver
Nov 14 21:30:57 vinux kernel: [ 1.245045] sdhci-pci 0000:02:00.0: SDHCI controller found [197b:2382] (rev 0)
Nov 14 21:30:57 vinux kernel: [ 1.245151] sdhci-pci 0000:02:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
Nov 14 21:30:57 vinux kernel: [ 1.245275] sdhci-pci 0000:02:00.0: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 1.245383] Registered led device: mmc0::
Nov 14 21:30:57 vinux kernel: [ 1.245506] mmc0: SDHCI controller on PCI [0000:02:00.0] using ADMA
Nov 14 21:30:57 vinux kernel: [ 1.245587] sdhci-pci 0000:02:00.2: SDHCI controller found [197b:2381] (rev 0)
Nov 14 21:30:57 vinux kernel: [ 1.245684] sdhci-pci 0000:02:00.2: PCI INT A -> GSI 16 (level, low) -> IRQ 16
Nov 14 21:30:57 vinux kernel: [ 1.245765] sdhci-pci 0000:02:00.2: Refusing to bind to secondary interface.
Nov 14 21:30:57 vinux kernel: [ 1.245836] sdhci-pci 0000:02:00.2: PCI INT A disabled
Nov 14 21:30:57 vinux kernel: [ 1.256489] ehci_hcd 0000:00:1a.7: USB 2.0 started, EHCI 1.00
Nov 14 21:30:57 vinux kernel: [ 1.256589] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
Nov 14 21:30:57 vinux kernel: [ 1.256654] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
Nov 14 21:30:57 vinux kernel: [ 1.256731] usb usb1: Product: EHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.256793] usb usb1: Manufacturer: Linux 2.6.32-5-686 ehci_hcd
Nov 14 21:30:57 vinux kernel: [ 1.256856] usb usb1: SerialNumber: 0000:00:1a.7
Nov 14 21:30:57 vinux kernel: [ 1.256996] usb usb1: configuration #1 chosen from 1 choice
Nov 14 21:30:57 vinux kernel: [ 1.257092] hub 1-0:1.0: USB hub found
Nov 14 21:30:57 vinux kernel: [ 1.257161] hub 1-0:1.0: 6 ports detected
Nov 14 21:30:57 vinux kernel: [ 1.257299] uhci_hcd 0000:00:1a.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
Nov 14 21:30:57 vinux kernel: [ 1.257379] uhci_hcd 0000:00:1a.0: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 1.257383] uhci_hcd 0000:00:1a.0: UHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.257458] uhci_hcd 0000:00:1a.0: new USB bus registered, assigned bus number 2
Nov 14 21:30:57 vinux kernel: [ 1.257570] uhci_hcd 0000:00:1a.0: irq 16, io base 0x00001820
Nov 14 21:30:57 vinux kernel: [ 1.257674] usb usb2: New USB device found, idVendor=1d6b, idProduct=0001
Nov 14 21:30:57 vinux kernel: [ 1.257739] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
Nov 14 21:30:57 vinux kernel: [ 1.257816] usb usb2: Product: UHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.257878] usb usb2: Manufacturer: Linux 2.6.32-5-686 uhci_hcd
Nov 14 21:30:57 vinux kernel: [ 1.257941] usb usb2: SerialNumber: 0000:00:1a.0
Nov 14 21:30:57 vinux kernel: [ 1.258080] usb usb2: configuration #1 chosen from 1 choice
Nov 14 21:30:57 vinux kernel: [ 1.258171] hub 2-0:1.0: USB hub found
Nov 14 21:30:57 vinux kernel: [ 1.258237] hub 2-0:1.0: 2 ports detected
Nov 14 21:30:57 vinux kernel: [ 1.258364] ehci_hcd 0000:00:1d.7: PCI INT A -> GSI 23 (level, low) -> IRQ 23
Nov 14 21:30:57 vinux kernel: [ 1.258448] ehci_hcd 0000:00:1d.7: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 1.258451] ehci_hcd 0000:00:1d.7: EHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.258519] ehci_hcd 0000:00:1d.7: new USB bus registered, assigned bus number 3
Nov 14 21:30:57 vinux kernel: [ 1.258632] ehci_hcd 0000:00:1d.7: debug port 1
Nov 14 21:30:57 vinux kernel: [ 1.260842] tg3.c:v3.116 (December 3, 2010)
Nov 14 21:30:57 vinux kernel: [ 1.260990] tg3 0000:07:00.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
Nov 14 21:30:57 vinux kernel: [ 1.262452] tg3 0000:07:00.0: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 1.262598] ehci_hcd 0000:00:1d.7: cache line size of 32 is not supported
Nov 14 21:30:57 vinux kernel: [ 1.262717] ehci_hcd 0000:00:1d.7: irq 23, io mem 0xf4a04c00
Nov 14 21:30:57 vinux kernel: [ 1.263025] libata version 3.00 loaded.
Nov 14 21:30:57 vinux kernel: [ 1.276007] ehci_hcd 0000:00:1d.7: USB 2.0 started, EHCI 1.00
Nov 14 21:30:57 vinux kernel: [ 1.276091] usb usb3: New USB device found, idVendor=1d6b, idProduct=0002
Nov 14 21:30:57 vinux kernel: [ 1.276156] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
Nov 14 21:30:57 vinux kernel: [ 1.276233] usb usb3: Product: EHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.276295] usb usb3: Manufacturer: Linux 2.6.32-5-686 ehci_hcd
Nov 14 21:30:57 vinux kernel: [ 1.276359] usb usb3: SerialNumber: 0000:00:1d.7
Nov 14 21:30:57 vinux kernel: [ 1.276497] usb usb3: configuration #1 chosen from 1 choice
Nov 14 21:30:57 vinux kernel: [ 1.276591] hub 3-0:1.0: USB hub found
Nov 14 21:30:57 vinux kernel: [ 1.276657] hub 3-0:1.0: 6 ports detected
Nov 14 21:30:57 vinux kernel: [ 1.276787] uhci_hcd 0000:00:1a.1: PCI INT B -> GSI 21 (level, low) -> IRQ 21
Nov 14 21:30:57 vinux kernel: [ 1.276862] uhci_hcd 0000:00:1a.1: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 1.276866] uhci_hcd 0000:00:1a.1: UHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.276937] uhci_hcd 0000:00:1a.1: new USB bus registered, assigned bus number 4
Nov 14 21:30:57 vinux kernel: [ 1.277064] uhci_hcd 0000:00:1a.1: irq 21, io base 0x00001840
Nov 14 21:30:57 vinux kernel: [ 1.277160] usb usb4: New USB device found, idVendor=1d6b, idProduct=0001
Nov 14 21:30:57 vinux kernel: [ 1.277225] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
Nov 14 21:30:57 vinux kernel: [ 1.277301] usb usb4: Product: UHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.277363] usb usb4: Manufacturer: Linux 2.6.32-5-686 uhci_hcd
Nov 14 21:30:57 vinux kernel: [ 1.277426] usb usb4: SerialNumber: 0000:00:1a.1
Nov 14 21:30:57 vinux kernel: [ 1.277550] usb usb4: configuration #1 chosen from 1 choice
Nov 14 21:30:57 vinux kernel: [ 1.277637] hub 4-0:1.0: USB hub found
Nov 14 21:30:57 vinux kernel: [ 1.277701] hub 4-0:1.0: 2 ports detected
Nov 14 21:30:57 vinux kernel: [ 1.278007] ahci 0000:00:1f.2: version 3.0
Nov 14 21:30:57 vinux kernel: [ 1.278022] ahci 0000:00:1f.2: PCI INT B -> GSI 19 (level, low) -> IRQ 19
Nov 14 21:30:57 vinux kernel: [ 1.278184] ahci 0000:00:1f.2: irq 29 for MSI/MSI-X
Nov 14 21:30:57 vinux kernel: [ 1.278265] ahci: SSS flag set, parallel bus scan disabled
Nov 14 21:30:57 vinux kernel: [ 1.278391] ahci 0000:00:1f.2: AHCI 0001.0200 32 slots 4 ports 3 Gbps 0x3 impl SATA mode
Nov 14 21:30:57 vinux kernel: [ 1.278500] ahci 0000:00:1f.2: flags: 64bit ncq sntf stag pm led clo pio slum part ccc ems sxs
Nov 14 21:30:57 vinux kernel: [ 1.278622] ahci 0000:00:1f.2: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 1.285066] scsi0 : ahci
Nov 14 21:30:57 vinux kernel: [ 1.285314] scsi1 : ahci
Nov 14 21:30:57 vinux kernel: [ 1.285492] scsi2 : ahci
Nov 14 21:30:57 vinux kernel: [ 1.285672] scsi3 : ahci
Nov 14 21:30:57 vinux kernel: [ 1.285794] ata1: SATA max UDMA/133 abar m2048@0xf4a04000 port 0xf4a04100 irq 29
Nov 14 21:30:57 vinux kernel: [ 1.285915] ata2: SATA max UDMA/133 abar m2048@0xf4a04000 port 0xf4a04180 irq 29
Nov 14 21:30:57 vinux kernel: [ 1.286018] ata3: DUMMY
Nov 14 21:30:57 vinux kernel: [ 1.286098] ata4: DUMMY
Nov 14 21:30:57 vinux kernel: [ 1.286318] uhci_hcd 0000:00:1a.2: PCI INT C -> GSI 20 (level, low) -> IRQ 20
Nov 14 21:30:57 vinux kernel: [ 1.286417] uhci_hcd 0000:00:1a.2: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 1.286420] uhci_hcd 0000:00:1a.2: UHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.286513] uhci_hcd 0000:00:1a.2: new USB bus registered, assigned bus number 5
Nov 14 21:30:57 vinux kernel: [ 1.286661] uhci_hcd 0000:00:1a.2: irq 20, io base 0x00001860
Nov 14 21:30:57 vinux kernel: [ 1.286786] usb usb5: New USB device found, idVendor=1d6b, idProduct=0001
Nov 14 21:30:57 vinux kernel: [ 1.286874] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1
Nov 14 21:30:57 vinux kernel: [ 1.286979] usb usb5: Product: UHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.287074] usb usb5: Manufacturer: Linux 2.6.32-5-686 uhci_hcd
Nov 14 21:30:57 vinux kernel: [ 1.287162] usb usb5: SerialNumber: 0000:00:1a.2
Nov 14 21:30:57 vinux kernel: [ 1.287448] usb usb5: configuration #1 chosen from 1 choice
Nov 14 21:30:57 vinux kernel: [ 1.287595] hub 5-0:1.0: USB hub found
Nov 14 21:30:57 vinux kernel: [ 1.287680] hub 5-0:1.0: 2 ports detected
Nov 14 21:30:57 vinux kernel: [ 1.287823] uhci_hcd 0000:00:1d.0: PCI INT A -> GSI 23 (level, low) -> IRQ 23
Nov 14 21:30:57 vinux kernel: [ 1.287924] uhci_hcd 0000:00:1d.0: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 1.287931] uhci_hcd 0000:00:1d.0: UHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.288020] uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 6
Nov 14 21:30:57 vinux kernel: [ 1.288162] uhci_hcd 0000:00:1d.0: irq 23, io base 0x00001880
Nov 14 21:30:57 vinux kernel: [ 1.288287] usb usb6: New USB device found, idVendor=1d6b, idProduct=0001
Nov 14 21:30:57 vinux kernel: [ 1.288371] usb usb6: New USB device strings: Mfr=3, Product=2, SerialNumber=1
Nov 14 21:30:57 vinux kernel: [ 1.288476] usb usb6: Product: UHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.288558] usb usb6: Manufacturer: Linux 2.6.32-5-686 uhci_hcd
Nov 14 21:30:57 vinux kernel: [ 1.288655] usb usb6: SerialNumber: 0000:00:1d.0
Nov 14 21:30:57 vinux kernel: [ 1.288844] usb usb6: configuration #1 chosen from 1 choice
Nov 14 21:30:57 vinux kernel: [ 1.288985] hub 6-0:1.0: USB hub found
Nov 14 21:30:57 vinux kernel: [ 1.289096] hub 6-0:1.0: 2 ports detected
Nov 14 21:30:57 vinux kernel: [ 1.289232] uhci_hcd 0000:00:1d.1: PCI INT B -> GSI 19 (level, low) -> IRQ 19
Nov 14 21:30:57 vinux kernel: [ 1.289328] uhci_hcd 0000:00:1d.1: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 1.289336] uhci_hcd 0000:00:1d.1: UHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.289424] uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 7
Nov 14 21:30:57 vinux kernel: [ 1.289580] uhci_hcd 0000:00:1d.1: irq 19, io base 0x000018a0
Nov 14 21:30:57 vinux kernel: [ 1.289698] usb usb7: New USB device found, idVendor=1d6b, idProduct=0001
Nov 14 21:30:57 vinux kernel: [ 1.289782] usb usb7: New USB device strings: Mfr=3, Product=2, SerialNumber=1
Nov 14 21:30:57 vinux kernel: [ 1.289898] usb usb7: Product: UHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.289984] usb usb7: Manufacturer: Linux 2.6.32-5-686 uhci_hcd
Nov 14 21:30:57 vinux kernel: [ 1.290068] usb usb7: SerialNumber: 0000:00:1d.1
Nov 14 21:30:57 vinux kernel: [ 1.290252] usb usb7: configuration #1 chosen from 1 choice
Nov 14 21:30:57 vinux kernel: [ 1.290392] hub 7-0:1.0: USB hub found
Nov 14 21:30:57 vinux kernel: [ 1.290477] hub 7-0:1.0: 2 ports detected
Nov 14 21:30:57 vinux kernel: [ 1.290608] uhci_hcd 0000:00:1d.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
Nov 14 21:30:57 vinux kernel: [ 1.290713] uhci_hcd 0000:00:1d.2: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 1.290720] uhci_hcd 0000:00:1d.2: UHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.290807] uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 8
Nov 14 21:30:57 vinux kernel: [ 1.290959] uhci_hcd 0000:00:1d.2: irq 18, io base 0x000018c0
Nov 14 21:30:57 vinux kernel: [ 1.291079] usb usb8: New USB device found, idVendor=1d6b, idProduct=0001
Nov 14 21:30:57 vinux kernel: [ 1.291165] usb usb8: New USB device strings: Mfr=3, Product=2, SerialNumber=1
Nov 14 21:30:57 vinux kernel: [ 1.291272] usb usb8: Product: UHCI Host Controller
Nov 14 21:30:57 vinux kernel: [ 1.291355] usb usb8: Manufacturer: Linux 2.6.32-5-686 uhci_hcd
Nov 14 21:30:57 vinux kernel: [ 1.291443] usb usb8: SerialNumber: 0000:00:1d.2
Nov 14 21:30:57 vinux kernel: [ 1.291795] usb usb8: configuration #1 chosen from 1 choice
Nov 14 21:30:57 vinux kernel: [ 1.291950] hub 8-0:1.0: USB hub found
Nov 14 21:30:57 vinux kernel: [ 1.292050] hub 8-0:1.0: 2 ports detected
Nov 14 21:30:57 vinux kernel: [ 1.310906] tg3 0000:07:00.0: eth0: Tigon3 [partno(BCM95906) rev c002] (PCI Express) MAC address 00:23:5a:17:01:6e
Nov 14 21:30:57 vinux kernel: [ 1.310993] tg3 0000:07:00.0: eth0: attached PHY is 5906 (10/100Base-TX Ethernet) (WireSpeed[0])
Nov 14 21:30:57 vinux kernel: [ 1.311072] tg3 0000:07:00.0: eth0: RXcsums[1] LinkChgREG[0] MIirq[0] ASF[0] TSOcap[1]
Nov 14 21:30:57 vinux kernel: [ 1.311151] tg3 0000:07:00.0: eth0: dma_rwctrl[76180000] dma_mask[64-bit]
Nov 14 21:30:57 vinux kernel: [ 1.569009] usb 1-6: new high speed USB device using ehci_hcd and address 2
Nov 14 21:30:57 vinux kernel: [ 1.613018] ata1: SATA link down (SStatus 0 SControl 300)
Nov 14 21:30:57 vinux kernel: [ 1.701857] usb 1-6: New USB device found, idVendor=0781, idProduct=5567
Nov 14 21:30:57 vinux kernel: [ 1.701922] usb 1-6: New USB device strings: Mfr=1, Product=2, SerialNumber=3
Nov 14 21:30:57 vinux kernel: [ 1.701987] usb 1-6: Product: Cruzer Blade
Nov 14 21:30:57 vinux kernel: [ 1.702047] usb 1-6: Manufacturer: SanDisk
Nov 14 21:30:57 vinux kernel: [ 1.702108] usb 1-6: SerialNumber: 20043513421424F00A4F
Nov 14 21:30:57 vinux kernel: [ 1.702252] usb 1-6: configuration #1 chosen from 1 choice
Nov 14 21:30:57 vinux kernel: [ 1.708889] Initializing USB Mass Storage driver...
Nov 14 21:30:57 vinux kernel: [ 1.709085] scsi4 : SCSI emulation for USB Mass Storage devices
Nov 14 21:30:57 vinux kernel: [ 1.709224] usbcore: registered new interface driver usb-storage
Nov 14 21:30:57 vinux kernel: [ 1.709291] USB Mass Storage support registered.
Nov 14 21:30:57 vinux kernel: [ 1.709357] usb-storage: device found at 2
Nov 14 21:30:57 vinux kernel: [ 1.709358] usb-storage: waiting for device to settle before scanning
Nov 14 21:30:57 vinux kernel: [ 1.813010] usb 3-3: new high speed USB device using ehci_hcd and address 2
Nov 14 21:30:57 vinux kernel: [ 1.949023] ata2: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
Nov 14 21:30:57 vinux kernel: [ 1.952813] ata2.00: ATAPI: HL-DT-ST DVDRAM GSA-T50N, RV06, max UDMA/133
Nov 14 21:30:57 vinux kernel: [ 1.957769] ata2.00: configured for UDMA/133
Nov 14 21:30:57 vinux kernel: [ 2.086991] scsi 1:0:0:0: CD-ROM HL-DT-ST DVDRAM GSA-T50N RV06 PQ: 0 ANSI: 5
Nov 14 21:30:57 vinux kernel: [ 2.099970] usb 3-3: New USB device found, idVendor=04f2, idProduct=b090
Nov 14 21:30:57 vinux kernel: [ 2.100067] usb 3-3: New USB device strings: Mfr=1, Product=2, SerialNumber=0
Nov 14 21:30:57 vinux kernel: [ 2.100136] usb 3-3: Product: Lenovo EasyCamera
Nov 14 21:30:57 vinux kernel: [ 2.100949] usb 3-3: Manufacturer: Vimicro Corp.
Nov 14 21:30:57 vinux kernel: [ 2.101106] usb 3-3: configuration #1 chosen from 1 choice
Nov 14 21:30:57 vinux kernel: [ 2.422941] sr0: scsi3-mmc drive: 24x/24x writer dvd-ram cd/rw xa/form2 cdda tray
Nov 14 21:30:57 vinux kernel: [ 2.423022] Uniform CD-ROM driver Revision: 3.20
Nov 14 21:30:57 vinux kernel: [ 2.423180] sr 1:0:0:0: Attached scsi CD-ROM sr0
Nov 14 21:30:57 vinux kernel: [ 2.427234] sr 1:0:0:0: Attached scsi generic sg0 type 5
Nov 14 21:30:57 vinux kernel: [ 6.709201] usb-storage: device scan complete
Nov 14 21:30:57 vinux kernel: [ 6.709822] scsi 4:0:0:0: Direct-Access SanDisk Cruzer Blade 1.14 PQ: 0 ANSI: 2
Nov 14 21:30:57 vinux kernel: [ 6.710236] scsi 4:0:0:0: Attached scsi generic sg1 type 0
Nov 14 21:30:57 vinux kernel: [ 6.716312] sd 4:0:0:0: [sda] 7821312 512-byte logical blocks: (4.00 GB/3.72 GiB)
Nov 14 21:30:57 vinux kernel: [ 6.717805] sd 4:0:0:0: [sda] Write Protect is off
Nov 14 21:30:57 vinux kernel: [ 6.717867] sd 4:0:0:0: [sda] Mode Sense: 03 00 00 00
Nov 14 21:30:57 vinux kernel: [ 6.717870] sd 4:0:0:0: [sda] Assuming drive cache: write through
Nov 14 21:30:57 vinux kernel: [ 6.720430] sd 4:0:0:0: [sda] Assuming drive cache: write through
Nov 14 21:30:57 vinux kernel: [ 6.720494] sda: sda1 sda2 sda3
Nov 14 21:30:57 vinux kernel: [ 6.724555] sd 4:0:0:0: [sda] Assuming drive cache: write through
Nov 14 21:30:57 vinux kernel: [ 6.724621] sd 4:0:0:0: [sda] Attached SCSI removable disk
Nov 14 21:30:57 vinux kernel: [ 7.028659] EXT4-fs (sda1): mounted filesystem with ordered data mode
Nov 14 21:30:57 vinux kernel: [ 7.675596] udev[423]: starting version 164
Nov 14 21:30:57 vinux kernel: [ 7.807298] ACPI: SSDT bdb1ac20 00265 (v01 PmRef Cpu0Ist 00003000 INTL 20050624)
Nov 14 21:30:57 vinux kernel: [ 7.827883] ACPI: SSDT bdb18620 00549 (v01 PmRef Cpu0Cst 00003001 INTL 20050624)
Nov 14 21:30:57 vinux kernel: [ 7.858295] Monitor-Mwait will be used to enter C-1 state
Nov 14 21:30:57 vinux kernel: [ 7.888137] Monitor-Mwait will be used to enter C-2 state
Nov 14 21:30:57 vinux kernel: [ 7.888144] Marking TSC unstable due to TSC halts in idle
Nov 14 21:30:57 vinux kernel: [ 7.888303] processor LNXCPU:00: registered as cooling_device0
Nov 14 21:30:57 vinux kernel: [ 7.888891] ACPI: SSDT bdb19ca0 001CF (v01 PmRef ApIst 00003000 INTL 20050624)
Nov 14 21:30:57 vinux kernel: [ 7.889483] ACPI: SSDT bdb19f20 0008D (v01 PmRef ApCst 00003000 INTL 20050624)
Nov 14 21:30:57 vinux kernel: [ 7.892044] Switching to clocksource hpet
Nov 14 21:30:57 vinux kernel: [ 7.892310] processor LNXCPU:01: registered as cooling_device1
Nov 14 21:30:57 vinux kernel: [ 7.906109] lib80211: common routines for IEEE802.11 drivers
Nov 14 21:30:57 vinux kernel: [ 7.906181] lib80211_crypt: registered algorithm 'NULL'
Nov 14 21:30:57 vinux kernel: [ 8.558438] wl: module license 'MIXED/Proprietary' taints kernel.
Nov 14 21:30:57 vinux kernel: [ 8.558508] Disabling lock debugging due to kernel taint
Nov 14 21:30:57 vinux kernel: [ 8.564650] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input1
Nov 14 21:30:57 vinux kernel: [ 8.564816] ACPI: Lid Switch [LID0]
Nov 14 21:30:57 vinux kernel: [ 8.564940] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input2
Nov 14 21:30:57 vinux kernel: [ 8.565027] ACPI: Power Button [PWRB]
Nov 14 21:30:57 vinux kernel: [ 8.565162] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input3
Nov 14 21:30:57 vinux kernel: [ 8.565245] ACPI: Power Button [PWRF]
Nov 14 21:30:57 vinux kernel: [ 8.568882] wl 0000:04:00.0: PCI INT A -> GSI 18 (level, low) -> IRQ 18
Nov 14 21:30:57 vinux kernel: [ 8.568997] wl 0000:04:00.0: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 8.569334] input: PC Speaker as /devices/platform/pcspkr/input/input4
Nov 14 21:30:57 vinux kernel: [ 8.583369] i801_smbus 0000:00:1f.3: PCI INT C -> GSI 19 (level, low) -> IRQ 19
Nov 14 21:30:57 vinux kernel: [ 8.583452] ACPI: I/O resource 0000:00:1f.3 [0x1c00-0x1c1f] conflicts with ACPI region SMBI [0x1c00-0x1c0f]
Nov 14 21:30:57 vinux kernel: [ 8.583582] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
Nov 14 21:30:57 vinux kernel: [ 8.588300] jmb38x_ms 0000:02:00.3: PCI INT A -> GSI 16 (level, low) -> IRQ 16
Nov 14 21:30:57 vinux kernel: [ 8.588387] jmb38x_ms 0000:02:00.3: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 8.594085] ACPI: AC Adapter [ACAD] (on-line)
Nov 14 21:30:57 vinux kernel: [ 8.615386] lib80211_crypt: registered algorithm 'TKIP'
Nov 14 21:30:57 vinux kernel: [ 8.757606] ACPI: Battery Slot [BAT1] (battery present)
Nov 14 21:30:57 vinux kernel: [ 8.758213] eth1: Broadcom BCM4315 802.11 Hybrid Wireless Controller 5.60.48.36
Nov 14 21:30:57 vinux kernel: [ 8.769316] Linux video capture interface: v2.00
Nov 14 21:30:57 vinux kernel: [ 8.784857] uvcvideo: Found UVC 1.00 device Lenovo EasyCamera (04f2:b090)
Nov 14 21:30:57 vinux kernel: [ 8.788177] input: Lenovo EasyCamera as /devices/pci0000:00/0000:00:1d.7/usb3/3-3/3-3:1.0/input/input5
Nov 14 21:30:57 vinux kernel: [ 8.788320] usbcore: registered new interface driver uvcvideo
Nov 14 21:30:57 vinux kernel: [ 8.788386] USB Video Class driver (v0.1.0)
Nov 14 21:30:57 vinux kernel: [ 8.808253] [drm] Initialized drm 1.1.0 20060810
Nov 14 21:30:57 vinux kernel: [ 8.854048] pci 0000:00:02.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
Nov 14 21:30:57 vinux kernel: [ 8.854122] pci 0000:00:02.0: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 8.860192] mtrr: type mismatch for d0000000,10000000 old: write-back new: write-combining
Nov 14 21:30:57 vinux kernel: [ 8.860274] [drm] MTRR allocation failed. Graphics performance may suffer.
Nov 14 21:30:57 vinux kernel: [ 8.860429] pci 0000:00:02.0: irq 30 for MSI/MSI-X
Nov 14 21:30:57 vinux kernel: [ 8.887967] acpi device:05: registered as cooling_device2
Nov 14 21:30:57 vinux kernel: [ 8.916479] acpi device:06: registered as cooling_device3
Nov 14 21:30:57 vinux kernel: [ 8.937741] acpi device:07: registered as cooling_device4
Nov 14 21:30:57 vinux kernel: [ 8.948176] HDA Intel 0000:00:1b.0: power state changed by ACPI to D0
Nov 14 21:30:57 vinux kernel: [ 8.948288] HDA Intel 0000:00:1b.0: power state changed by ACPI to D0
Nov 14 21:30:57 vinux kernel: [ 8.948363] HDA Intel 0000:00:1b.0: PCI INT A -> GSI 22 (level, low) -> IRQ 22
Nov 14 21:30:57 vinux kernel: [ 8.948508] HDA Intel 0000:00:1b.0: irq 31 for MSI/MSI-X
Nov 14 21:30:57 vinux kernel: [ 8.948537] HDA Intel 0000:00:1b.0: setting latency timer to 64
Nov 14 21:30:57 vinux kernel: [ 8.964050] acpi device:08: registered as cooling_device5
Nov 14 21:30:57 vinux kernel: [ 8.992601] acpi device:09: registered as cooling_device6
Nov 14 21:30:57 vinux kernel: [ 8.992803] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:01/input/input6
Nov 14 21:30:57 vinux kernel: [ 8.992932] ACPI: Video Device [GFX0] (multi-head: yes rom: no post: no)
Nov 14 21:30:57 vinux kernel: [ 8.993026] [drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on minor 0
Nov 14 21:30:57 vinux kernel: [ 9.010779] input: HDA Intel Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input7
Nov 14 21:30:57 vinux kernel: [ 9.010942] input: HDA Intel Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input8
Nov 14 21:30:57 vinux kernel: [ 9.011081] input: HDA Intel Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input9
Nov 14 21:30:57 vinux kernel: [ 9.309423] input: PS/2 Mouse as /devices/platform/i8042/serio1/input/input10
Nov 14 21:30:57 vinux kernel: [ 9.347979] input: AlpsPS/2 ALPS GlidePoint as /devices/platform/i8042/serio1/input/input11
Nov 14 21:30:57 vinux kernel: [ 9.564661] Adding 208836k swap on /dev/sda3. Priority:-1 extents:1 across:208836k
Nov 14 21:30:57 vinux kernel: [ 9.709959] loop: module loaded
Nov 14 21:30:57 vinux kernel: [ 9.730217] input: Speakup as /devices/virtual/input/input12
Nov 14 21:30:57 vinux kernel: [ 9.730424] speakup 3.1.5: initialized
Nov 14 21:30:57 vinux kernel: [ 9.730495] synth name on entry is: <NULL>
Nov 14 21:30:57 vinux kernel: [ 9.730930] initialized device: /dev/synth, node (MAJOR 10, MINOR 25)
Nov 14 21:30:57 vinux kernel: [ 9.733621] synth probe
Nov 14 21:30:57 vinux kernel: [ 9.734065] initialized device: /dev/softsynth, node (MAJOR 10, MINOR 26)
Nov 14 21:30:57 vinux kernel: [ 9.877615] EXT4-fs (sda2): mounted filesystem with ordered data mode
Nov 14 21:30:57 vinux kernel: [ 10.381844] fuse init (API version 7.13)
Nov 14 21:30:57 vinux kernel: [ 10.819860] apm: BIOS not found.
Nov 14 21:30:59 vinux kernel: [ 12.665417] input: ACPI Virtual Keyboard Device as /devices/virtual/input/input13
Nov 14 21:30:59 vinux kernel: [ 12.890636] Bluetooth: Core ver 2.15
Nov 14 21:30:59 vinux kernel: [ 12.890811] NET: Registered protocol family 31
Nov 14 21:30:59 vinux kernel: [ 12.890897] Bluetooth: HCI device and connection manager initialized
Nov 14 21:30:59 vinux kernel: [ 12.890992] Bluetooth: HCI socket layer initialized
Nov 14 21:30:59 vinux kernel: [ 12.903506] Bluetooth: L2CAP ver 2.14
Nov 14 21:30:59 vinux kernel: [ 12.903597] Bluetooth: L2CAP socket layer initialized
Nov 14 21:30:59 vinux kernel: [ 12.922900] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
Nov 14 21:30:59 vinux kernel: [ 12.923012] Bluetooth: BNEP filters: protocol multicast
Nov 14 21:30:59 vinux kernel: [ 12.945253] Bridge firewalling registered
Nov 14 21:30:59 vinux kernel: [ 12.960072] Bluetooth: SCO (Voice Link) ver 0.6
Nov 14 21:30:59 vinux kernel: [ 12.960162] Bluetooth: SCO socket layer initialized
Nov 14 21:30:59 vinux kernel: [ 12.979459] lp: driver loaded but no devices found
Nov 14 21:30:59 vinux kernel: [ 12.986681] ppdev: user-space parallel port driver
Nov 14 21:31:00 vinux kernel: [ 13.661172] tg3 0000:07:00.0: irq 32 for MSI/MSI-X
Nov 14 21:31:00 vinux kernel: [ 13.693978] ADDRCONF(NETDEV_UP): eth0: link is not ready
Nov 14 21:31:08 vinux kernel: [ 22.036017] eth1: no IPv6 routers present
I don't see a helpful error!
David
On Mon, 14 Nov 2011, Bruno Prémont wrote:
> On Mon, 14 November 2011 "D.J.J. Ring, Jr." <n1ea@arrl.net> wrote:
>> I am sorry Anatolij,
>>
>> I should have said that I DID run sudo update-grub and then I rebooted.
>>
>> When it rebooted, I still have the "no /dev/fb0" error.
>>
>> I apologize for not being thourough in my words.
>
> Please make sure "nomodeset" is no more present on kernel cmdline and
> if it's gone post your corresponding kernel log (at least the relevant
> parts of it like the few first line including cmdline and anything
> that is related to drm, i915, *fb*, vesa or vga)!
>
> Note, with grub you should also be able to edit the kernel cmdline from
> grubs interface before you tell it to boot the kernel.
> You could even attempt to reboot with kexec (where you can choose kernel
> and cmdline as well) if you can't convince grub.
>
> Bruno
>
^ permalink raw reply
* Re: Getting FB to work in Console
From: Bruno Prémont @ 2011-11-14 20:25 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <CADO5RbhunU1X7mWwGDbVRc1FSPKBaLudAVav0TMkBoQ_1zp0Mw@mail.gmail.com>
On Mon, 14 November 2011 "D.J.J. Ring, Jr." <n1ea@arrl.net> wrote:
> I am sorry Anatolij,
>
> I should have said that I DID run sudo update-grub and then I rebooted.
>
> When it rebooted, I still have the "no /dev/fb0" error.
>
> I apologize for not being thourough in my words.
Please make sure "nomodeset" is no more present on kernel cmdline and
if it's gone post your corresponding kernel log (at least the relevant
parts of it like the few first line including cmdline and anything
that is related to drm, i915, *fb*, vesa or vga)!
Note, with grub you should also be able to edit the kernel cmdline from
grubs interface before you tell it to boot the kernel.
You could even attempt to reboot with kexec (where you can choose kernel
and cmdline as well) if you can't convince grub.
Bruno
^ permalink raw reply
* Re: Getting FB to work in Console
From: D.J.J. Ring, Jr. @ 2011-11-14 20:09 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <CADO5RbhunU1X7mWwGDbVRc1FSPKBaLudAVav0TMkBoQ_1zp0Mw@mail.gmail.com>
I am sorry Anatolij,
I should have said that I DID run sudo update-grub and then I rebooted.
When it rebooted, I still have the "no /dev/fb0" error.
I apologize for not being thourough in my words.
David
David J. Ring, Jr., N1EA
SOWP, VWOA, OOTC, FISTS, CW-Ops, CFO, A1-OP, ex-FOC 1271 ARRL-LM
Chat Skype: djringjr MSN: djringjr@msn.com AIM: N1EA icq: 27380609
Radio-Officers Google Group -- Marine Morse Historic Recordings Page
On Mon, Nov 14, 2011 at 1:58 PM, Anatolij Gustschin <agust@denx.de> wrote:
> Hello David,
>
> On Mon, 14 Nov 2011 01:09:53 -0500 (EST)
> David J Ring Jr <n1ea@arrl.net> wrote:
>
>> I found a line in /etc/default/grub which has nomodeset in it and I
>> disabled it.
>>
>> Here is what I have in that file now.
>>
>> I have a feeling that something in grub is not right.
>
> Did you run 'sudo update-grub' command after changing the /etc/default/grub
> file ? If not, then the actual grub configuration file was not
> updated and you probably still have nomodeset on the kernel command
> line.
>
>> # If you change this file, run 'update-grub' afterwards to update
>> # /boot/grub/grub.cfg.
>>
>> GRUB_DEFAULT=0
>> GRUB_TIMEOUT=5
>> GRUB_DISTRIBUTOR=`lsb_release -i -s 2> /dev/null || echo Debian`
>> #GRUB_CMDLINE_LINUX_DEFAULT="nomodeset"
>> GRUB_CMDLINE_LINUX=""
> ...
>> What do you think? Is this where nomodeset is and does it look like this
>> should work? I still cannot get /dev/fb0
>
> It should work. If you additionally run 'sudo update-grub', the grub
> configuration file /boot/grub/grub.cfg will be updated. Then nomodeset
> shouldn't be passed on the kernel command line any more.
>
> Anatolij
>
^ permalink raw reply
* Re: Getting FB to work in Console
From: Anatolij Gustschin @ 2011-11-14 18:58 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <CADO5RbhunU1X7mWwGDbVRc1FSPKBaLudAVav0TMkBoQ_1zp0Mw@mail.gmail.com>
Hello David,
On Mon, 14 Nov 2011 01:09:53 -0500 (EST)
David J Ring Jr <n1ea@arrl.net> wrote:
> I found a line in /etc/default/grub which has nomodeset in it and I
> disabled it.
>
> Here is what I have in that file now.
>
> I have a feeling that something in grub is not right.
Did you run 'sudo update-grub' command after changing the /etc/default/grub
file ? If not, then the actual grub configuration file was not
updated and you probably still have nomodeset on the kernel command
line.
> # If you change this file, run 'update-grub' afterwards to update
> # /boot/grub/grub.cfg.
>
> GRUB_DEFAULT=0
> GRUB_TIMEOUT=5
> GRUB_DISTRIBUTOR=`lsb_release -i -s 2> /dev/null || echo Debian`
> #GRUB_CMDLINE_LINUX_DEFAULT="nomodeset"
> GRUB_CMDLINE_LINUX=""
...
> What do you think? Is this where nomodeset is and does it look like this
> should work? I still cannot get /dev/fb0
It should work. If you additionally run 'sudo update-grub', the grub
configuration file /boot/grub/grub.cfg will be updated. Then nomodeset
shouldn't be passed on the kernel command line any more.
Anatolij
^ permalink raw reply
* [PATCH 3/3] OMAPDSS: DISPC: skip scaling calculations when not scaling
From: Tomi Valkeinen @ 2011-11-14 15:01 UTC (permalink / raw)
To: linux-fbdev, linux-omap; +Cc: archit, Tomi Valkeinen
In-Reply-To: <1321282905-12939-1-git-send-email-tomi.valkeinen@ti.com>
Current code calculates scaling factors for video overlays even when the
overlays are not scaled. Change the code to skip calculations when not
scaling.
This optimizes the code a bit, but also fixes a problem when configuring
an overlay for a disabled display: if the display is disabled we don't
necessarily know the pixel clock used when the display is enabled, and
in some cases (like HDMI) the pixel clock is set to zero until a proper
video mode is set later. A wrong pixel clock will mess up the
scaling calculations, causing an error like:
omapdss DISPC error: failed to set up scaling, required fclk rate = 0
Hz, current fclk rate = 170666666 Hz
A proper fix would be to check later whether the clocks are enough for the
scaling, at the point when the overlay or display is actually enabled,
but this patch removes the problem for now.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---
drivers/video/omap2/dss/dispc.c | 11 +++++------
1 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 3532782..5c81533 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -1720,12 +1720,11 @@ static int dispc_ovl_calc_scaling(enum omap_plane plane,
const int maxdownscale = dss_feat_get_param_max(FEAT_PARAM_DOWNSCALE);
unsigned long fclk = 0;
- if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) = 0) {
- if (width != out_width || height != out_height)
- return -EINVAL;
- else
- return 0;
- }
+ if (width = out_width && height = out_height)
+ return 0;
+
+ if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) = 0)
+ return -EINVAL;
if (out_width < width / maxdownscale ||
out_width > width * 8)
--
1.7.4.1
^ permalink raw reply related
* [PATCH 2/3] OMAPFB: fix compilation warnings due to missing include
From: Tomi Valkeinen @ 2011-11-14 15:01 UTC (permalink / raw)
To: linux-fbdev, linux-omap; +Cc: archit, Tomi Valkeinen
In-Reply-To: <1321282905-12939-1-git-send-email-tomi.valkeinen@ti.com>
Fix warnings similar to this by including module.h:
drivers/video/omap/dispc.c:276:1: warning: data definition has no type
or storage class
drivers/video/omap/dispc.c:276:1: warning: type defaults to 'int' in
declaration of 'EXPORT_SYMBOL'
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---
drivers/video/omap/dispc.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
index 0ccd7ad..10f8bbe 100644
--- a/drivers/video/omap/dispc.c
+++ b/drivers/video/omap/dispc.c
@@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-#include <linux/kernel.h>
+#include <linux/module.h>
#include <linux/dma-mapping.h>
#include <linux/mm.h>
#include <linux/vmalloc.h>
--
1.7.4.1
^ permalink raw reply related
* [PATCH 1/3] OMAPDSS: HDMI: fix returned HDMI pixel clock
From: Tomi Valkeinen @ 2011-11-14 15:01 UTC (permalink / raw)
To: linux-fbdev, linux-omap; +Cc: archit, Tomi Valkeinen
In-Reply-To: <1321282905-12939-1-git-send-email-tomi.valkeinen@ti.com>
hdmi_get_pixel_clock() returns the pixel clock in Hz, but the pck is
stored as kHz. This means the return value has to be multiplied by 1000,
not by 10000 as the code did.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---
drivers/video/omap2/dss/hdmi.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 3262f0f..c56378c 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -269,7 +269,7 @@ static void update_hdmi_timings(struct hdmi_config *cfg,
unsigned long hdmi_get_pixel_clock(void)
{
/* HDMI Pixel Clock in Mhz */
- return hdmi.ip_data.cfg.timings.timings.pixel_clock * 10000;
+ return hdmi.ip_data.cfg.timings.timings.pixel_clock * 1000;
}
static void hdmi_compute_pll(struct omap_dss_device *dssdev, int phy,
--
1.7.4.1
^ permalink raw reply related
* [PATCH 0/3] OMAPDSS: fixes for rc
From: Tomi Valkeinen @ 2011-11-14 15:01 UTC (permalink / raw)
To: linux-fbdev, linux-omap; +Cc: archit, Tomi Valkeinen
A few fixes for the next -rc.
One for the old omapfb, and two for the omapdss fixing issues related to HDMI.
Tomi
Tomi Valkeinen (3):
OMAPDSS: HDMI: fix returned HDMI pixel clock
OMAPFB: fix compilation warnings due to missing include
OMAPDSS: DISPC: skip scaling calculations when not scaling
drivers/video/omap/dispc.c | 2 +-
drivers/video/omap2/dss/dispc.c | 11 +++++------
drivers/video/omap2/dss/hdmi.c | 2 +-
3 files changed, 7 insertions(+), 8 deletions(-)
--
1.7.4.1
^ permalink raw reply
* Re: Getting FB to work in Console
From: David J Ring Jr @ 2011-11-14 1:10 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <CADO5RbhunU1X7mWwGDbVRc1FSPKBaLudAVav0TMkBoQ_1zp0Mw@mail.gmail.com>
I found a line in /etc/default/grub which has nomodeset in it and I
disabled it.
Here is what I have in that file now.
I have a feeling that something in grub is not right.
# If you change this file, run 'update-grub' afterwards to update
# /boot/grub/grub.cfg.
GRUB_DEFAULT=0
GRUB_TIMEOUT=5
GRUB_DISTRIBUTOR=`lsb_release -i -s 2> /dev/null || echo Debian`
#GRUB_CMDLINE_LINUX_DEFAULT="nomodeset"
GRUB_CMDLINE_LINUX=""
# Uncomment to enable BadRAM filtering, modify to suit your needs
# This works with Linux (no patch required) and with any kernel that obtains
# the memory map information from GRUB (GNU Mach, kernel of FreeBSD ...)
#GRUB_BADRAM="0x01234567,0xfefefefe,0x89abcdef,0xefefefef"
# Uncomment to disable graphical terminal (grub-pc only)
# GRUB_TERMINAL=console
# The resolution used on graphical terminal
# note that you can use only modes which your graphic card supports via VBE
# you can see them in real GRUB with the command `vbeinfo'
#GRUB_GFXMODEd0x480
# Uncomment if you don't want GRUB to pass "root=UUID=xxx" parameter to Linux
#GRUB_DISABLE_LINUX_UUID=true
# Uncomment to disable generation of recovery mode menu entries
#GRUB_DISABLE_LINUX_RECOVERY="true"
# Uncomment to get a beep at grub start
#GRUB_INIT_TUNE="480 440 1"
What do you think? Is this where nomodeset is and does it look like this
should work? I still cannot get /dev/fb0
David
^ permalink raw reply
* Re: Getting FB to work in Console
From: Anatolij Gustschin @ 2011-11-14 0:32 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <CADO5RbhunU1X7mWwGDbVRc1FSPKBaLudAVav0TMkBoQ_1zp0Mw@mail.gmail.com>
On Sun, 13 Nov 2011 22:48:02 -0500 (EST)
David J Ring Jr <n1ea@arrl.net> wrote:
> I get these drivers:
...
Thanks for the info. As Bruno already guessed you have a mainstream
Intel GPU, the driver for it in under drivers/gpu/. From the log I
can see that it is probed. Try to disable passing "nomodeset" option
on the kernel command line.
> Is there a universal driver?
You already got the right one, see below.
> [ 0.000000] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-2.6.32-5-686 root=UUIDË1268f1-4e20-4409-87b1-3d882c14102c ro nomodeset
...
> [ 1.002504] Linux agpgart interface v0.103
> [ 1.002638] agpgart-intel 0000:00:00.0: Intel Mobile Intel® GM45 Express Chipset
> [ 1.003092] agpgart-intel 0000:00:00.0: detected 32764K stolen memory
> [ 1.034511] agpgart-intel 0000:00:00.0: AGP aperture is 256M @ 0xd0000000
...
> [ 8.825096] [drm] Initialized drm 1.1.0 20060810
> [ 8.827153] uvcvideo: Found UVC 1.00 device Lenovo EasyCamera (04f2:b090)
> [ 8.830393] input: Lenovo EasyCamera as /devices/pci0000:00/0000:00:1d.7/usb3/3-3/3-3:1.0/input/input5
> [ 8.830589] usbcore: registered new interface driver uvcvideo
> [ 8.830712] USB Video Class driver (v0.1.0)
> [ 8.872716] pci 0000:00:02.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
> [ 8.872790] pci 0000:00:02.0: setting latency timer to 64
> [ 8.878968] mtrr: type mismatch for d0000000,10000000 old: write-back new: write-combining
> [ 8.879055] [drm] MTRR allocation failed. Graphics performance may suffer.
...
> [ 8.990393] ACPI: Video Device [GFX0] (multi-head: yes rom: no post: no)
> [ 8.990485] [drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on minor 0
The driver is already in the kernel, you have to disable passing
"nomodeset", as Bruno suggested.
Anatolij
^ permalink raw reply
* Re: Getting FB to work in Console
From: Anatolij Gustschin @ 2011-11-14 0:15 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <CADO5RbhunU1X7mWwGDbVRc1FSPKBaLudAVav0TMkBoQ_1zp0Mw@mail.gmail.com>
Hello David,
On Sun, 13 Nov 2011 22:50:05 -0500 (EST)
David J Ring Jr <n1ea@arrl.net> wrote:
...
> Here is lspci:
>
> 00:00.0 Host bridge: Intel Corporation Mobile 4 Series Chipset Memory Controller Hub (rev 07)
> 00:02.0 VGA compatible controller: Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller (rev 07)
> 00:02.1 Display controller: Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller (rev 07)
So, you have an Intel GMA 4500MHD. It should be supported
by the i915 driver, I think.
Anatolij
^ permalink raw reply
* Re: Getting FB to work in Console
From: David J Ring Jr @ 2011-11-13 22:50 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <CADO5RbhunU1X7mWwGDbVRc1FSPKBaLudAVav0TMkBoQ_1zp0Mw@mail.gmail.com>
[-- Attachment #1: Type: TEXT/PLAIN, Size: 4026 bytes --]
Bruno,
Here is lspci:
00:00.0 Host bridge: Intel Corporation Mobile 4 Series Chipset Memory Controller Hub (rev 07)
00:02.0 VGA compatible controller: Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller (rev 07)
00:02.1 Display controller: Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller (rev 07)
00:1a.0 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #4 (rev 03)
00:1a.1 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #5 (rev 03)
00:1a.2 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #6 (rev 03)
00:1a.7 USB Controller: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #2 (rev 03)
00:1b.0 Audio device: Intel Corporation 82801I (ICH9 Family) HD Audio Controller (rev 03)
00:1c.0 PCI bridge: Intel Corporation 82801I (ICH9 Family) PCI Express Port 1 (rev 03)
00:1c.1 PCI bridge: Intel Corporation 82801I (ICH9 Family) PCI Express Port 2 (rev 03)
00:1c.2 PCI bridge: Intel Corporation 82801I (ICH9 Family) PCI Express Port 3 (rev 03)
00:1c.3 PCI bridge: Intel Corporation 82801I (ICH9 Family) PCI Express Port 4 (rev 03)
00:1c.5 PCI bridge: Intel Corporation 82801I (ICH9 Family) PCI Express Port 6 (rev 03)
00:1d.0 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #1 (rev 03)
00:1d.1 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #2 (rev 03)
00:1d.2 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #3 (rev 03)
00:1d.7 USB Controller: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #1 (rev 03)
00:1e.0 PCI bridge: Intel Corporation 82801 Mobile PCI Bridge (rev 93)
00:1f.0 ISA bridge: Intel Corporation ICH9M LPC Interface Controller (rev 03)
00:1f.2 SATA controller: Intel Corporation ICH9M/M-E SATA AHCI Controller (rev 03)
00:1f.3 SMBus: Intel Corporation 82801I (ICH9 Family) SMBus Controller (rev 03)
02:00.0 System peripheral: JMicron Technology Corp. SD/MMC Host Controller
02:00.2 SD Host controller: JMicron Technology Corp. Standard SD Host Controller
02:00.3 System peripheral: JMicron Technology Corp. MS Host Controller
04:00.0 Network controller: Broadcom Corporation BCM4312 802.11b/g LP-PHY (rev 01)
07:00.0 Ethernet controller: Broadcom Corporation NetLink BCM5906M Fast Ethernet PCI Express (rev 02)
Thank you again,
I don't see anything with video in it.
David
On Sun, 13 Nov 2011, Bruno Prémont wrote:
> On Sun, 13 November 2011 Anatolij Gustschin <agust@denx.de> wrote:
>> On Sun, 13 Nov 2011 21:16:52 -0500 (EST)
>> David J Ring Jr <n1ea@arrl.net> wrote:
>>
>>> OK so how do I get a frame buffer driver loaded?
>>
>> Check if some frame buffer drivers are installed
>> in your system, so e.g. run
>>
>> ls /lib/modules/`uname -r`/kernel/drivers/video
>>
>> to see if there are any frame buffer driver modules
>> installed.
>>
>> Then you have to select the suitable driver for your
>> graphic card and load it by running
>>
>> modprobe drivername
>>
>>> I don't have any backlisted framebuffer drivers, what is stopping me from
>>> loading a frame buffer driver?
>>>
>>> Does anyone know what I have to do?
>>
>>
>> Usually the driver should be loaded automatically if
>> it is installed. Maybe some error happened while loading
>> the driver. Dump the kernel log messages by running dmesg
>> and check if there was an attempt to load the driver for
>> your graphic card.
>
> The other case might be a mainsteam GPU (radeon, nouveau, intel) and
> KMS support built in (or available as module) but disabled by "nomodeset"
> cmdline option that did show up in a previous post.
>
> Just booting with "vga=0x31a" (or another value more appropriate for
> attached screen -- see Documentation/fb/vesafb.txt for list) might
> provide a basic framebuffer device.
>
> lspci for the affected system will certainly help at least indicating
> which driver would be the right one.
>
> Bruno
>
^ permalink raw reply
* Re: Getting FB to work in Console
From: David J Ring Jr @ 2011-11-13 22:48 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <CADO5RbhunU1X7mWwGDbVRc1FSPKBaLudAVav0TMkBoQ_1zp0Mw@mail.gmail.com>
[-- Attachment #1: Type: TEXT/PLAIN, Size: 50805 bytes --]
I get these drivers:
arcfb.ko
arkfb.ko
aty
backlight
cirrusfb.ko
console
cyber2000fb.ko
display
fb_ddc.ko
fb_sys_fops.ko
geode
hecubafb.ko
hgafb.ko
i810
kyro
macmodes.ko
matrox
mb862xx
metronomefb.ko
n411.ko
neofb.ko
nvidia
output.ko
pm2fb.ko
pm3fb.ko
s1d13xxxfb.ko
s3fb.ko
savage
sis
sm501fb.ko
sstfb.ko
svgalib.ko
syscopyarea.ko
sysfillrect.ko
sysimgblt.ko
tdfxfb.ko
tridentfb.ko
uvesafb.ko
vermilion
vfb.ko
vga16fb.ko
vgastate.ko
via
vt8623fb.ko
Is there a universal driver?
Here is the output of dmesg:
[ 0.000000] Initializing cgroup subsys cpuset
[ 0.000000] Initializing cgroup subsys cpu
[ 0.000000] Linux version 2.6.32-5-686 (Debian 2.6.32-38) (ben@decadent.org.uk) (gcc version 4.3.5 (Debian 4.3.5-4) ) #1 SMP Mon Oct 3 04:15:24 UTC 2011
[ 0.000000] KERNEL supported cpus:
[ 0.000000] Intel GenuineIntel
[ 0.000000] AMD AuthenticAMD
[ 0.000000] NSC Geode by NSC
[ 0.000000] Cyrix CyrixInstead
[ 0.000000] Centaur CentaurHauls
[ 0.000000] Transmeta GenuineTMx86
[ 0.000000] Transmeta TransmetaCPU
[ 0.000000] UMC UMC UMC UMC
[ 0.000000] BIOS-provided physical RAM map:
[ 0.000000] BIOS-e820: 0000000000000000 - 000000000009f400 (usable)
[ 0.000000] BIOS-e820: 000000000009f400 - 00000000000a0000 (reserved)
[ 0.000000] BIOS-e820: 00000000000d2000 - 00000000000d4000 (reserved)
[ 0.000000] BIOS-e820: 00000000000dc000 - 0000000000100000 (reserved)
[ 0.000000] BIOS-e820: 0000000000100000 - 00000000bd6b3000 (usable)
[ 0.000000] BIOS-e820: 00000000bd6b3000 - 00000000bd6b9000 (reserved)
[ 0.000000] BIOS-e820: 00000000bd6b9000 - 00000000bd7b2000 (usable)
[ 0.000000] BIOS-e820: 00000000bd7b2000 - 00000000bd80f000 (reserved)
[ 0.000000] BIOS-e820: 00000000bd80f000 - 00000000bd907000 (usable)
[ 0.000000] BIOS-e820: 00000000bd907000 - 00000000bdb0f000 (reserved)
[ 0.000000] BIOS-e820: 00000000bdb0f000 - 00000000bdb18000 (usable)
[ 0.000000] BIOS-e820: 00000000bdb18000 - 00000000bdb1f000 (reserved)
[ 0.000000] BIOS-e820: 00000000bdb1f000 - 00000000bdb63000 (usable)
[ 0.000000] BIOS-e820: 00000000bdb63000 - 00000000bdb9f000 (ACPI NVS)
[ 0.000000] BIOS-e820: 00000000bdb9f000 - 00000000bdc00000 (ACPI data)
[ 0.000000] BIOS-e820: 0000000100000000 - 0000000140000000 (usable)
[ 0.000000] DMI present.
[ 0.000000] last_pfn = 0xbdb63 max_arch_pfn = 0x100000
[ 0.000000] MTRR default type: uncachable
[ 0.000000] MTRR fixed ranges enabled:
[ 0.000000] 00000-9FFFF write-back
[ 0.000000] A0000-BFFFF uncachable
[ 0.000000] C0000-FFFFF write-protect
[ 0.000000] MTRR variable ranges enabled:
[ 0.000000] 0 base 0C0000000 mask FC0000000 uncachable
[ 0.000000] 1 base 000000000 mask F00000000 write-back
[ 0.000000] 2 base 100000000 mask FC0000000 write-back
[ 0.000000] 3 base 0BDC00000 mask FFFC00000 uncachable
[ 0.000000] 4 disabled
[ 0.000000] 5 disabled
[ 0.000000] 6 disabled
[ 0.000000] 7 disabled
[ 0.000000] x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
[ 0.000000] e820 update range: 00000000bdc00000 - 00000000be000000 (usable) ==> (reserved)
[ 0.000000] e820 update range: 00000000c0000000 - 0000000100000000 (usable) ==> (reserved)
[ 0.000000] initial memory mapped : 0 - 01800000
[ 0.000000] init_memory_mapping: 0000000000000000-00000000373fe000
[ 0.000000] 0000000000 - 0000400000 page 4k
[ 0.000000] 0000400000 - 0037000000 page 2M
[ 0.000000] 0037000000 - 00373fe000 page 4k
[ 0.000000] kernel direct mapping tables up to 373fe000 @ 7000-d000
[ 0.000000] RAMDISK: 3759a000 - 37fef5a8
[ 0.000000] Allocated new RAMDISK: 00100000 - 00b555a8
[ 0.000000] Move RAMDISK from 000000003759a000 - 0000000037fef5a7 to 00100000 - 00b555a7
[ 0.000000] ACPI: RSDP 000f7190 00024 (v02 LENOVO)
[ 0.000000] ACPI: XSDT bdbf6067 0006C (v01 LENOVO TP-6G 00000000 LTP 00000000)
[ 0.000000] ACPI: FACP bdbe8000 000F4 (v03 LENOVO TP-6G 00000001 ALAN 00000001)
[ 0.000000] ACPI: DSDT bdbe9000 06B23 (v02 LENOVO TP-6G 00000001 INTL 20050624)
[ 0.000000] ACPI: FACS bdb9efc0 00040
[ 0.000000] ACPI: HPET bdbfcd86 00038 (v01 LENOVO TP-6G 00000001 LOHR 0000005A)
[ 0.000000] ACPI: MCFG bdbfcdbe 0003C (v01 LENOVO TP-6G 00000001 LOHR 0000005A)
[ 0.000000] ACPI: SLIC bdbfcdfa 00176 (v01 LENOVO TP-6G 00000001 TBD 00000001)
[ 0.000000] ACPI: APIC bdbfcf70 00068 (v01 PTLTD ? APIC 00000000 LTP 00000000)
[ 0.000000] ACPI: BOOT bdbfcfd8 00028 (v01 PTLTD $SBFTBL$ 00000000 LTP 00000001)
[ 0.000000] ACPI: SSDT bdbe7000 00655 (v01 PmRef CpuPm 00003000 INTL 20050624)
[ 0.000000] ACPI: SSDT bdbe6000 00259 (v01 PmRef Cpu0Tst 00003000 INTL 20050624)
[ 0.000000] ACPI: SSDT bdbe5000 0020F (v01 PmRef ApTst 00003000 INTL 20050624)
[ 0.000000] ACPI: Local APIC address 0xfee00000
[ 0.000000] 2151MB HIGHMEM available.
[ 0.000000] 883MB LOWMEM available.
[ 0.000000] mapped low ram: 0 - 373fe000
[ 0.000000] low ram: 0 - 373fe000
[ 0.000000] node 0 low ram: 00000000 - 373fe000
[ 0.000000] node 0 bootmap 00009000 - 0000fe80
[ 0.000000] (9 early reservations) ==> bootmem [0000000000 - 00373fe000]
[ 0.000000] #0 [0000000000 - 0000001000] BIOS data page ==> [0000000000 - 0000001000]
[ 0.000000] #1 [0000001000 - 0000002000] EX TRAMPOLINE ==> [0000001000 - 0000002000]
[ 0.000000] #2 [0000006000 - 0000007000] TRAMPOLINE ==> [0000006000 - 0000007000]
[ 0.000000] #3 [0001000000 - 00014cccf4] TEXT DATA BSS ==> [0001000000 - 00014cccf4]
[ 0.000000] #4 [000009f400 - 0000100000] BIOS reserved ==> [000009f400 - 0000100000]
[ 0.000000] #5 [00014cd000 - 00014d3184] BRK ==> [00014cd000 - 00014d3184]
[ 0.000000] #6 [0000007000 - 0000009000] PGTABLE ==> [0000007000 - 0000009000]
[ 0.000000] #7 [0000100000 - 0000b555a8] NEW RAMDISK ==> [0000100000 - 0000b555a8]
[ 0.000000] #8 [0000009000 - 0000010000] BOOTMAP ==> [0000009000 - 0000010000]
[ 0.000000] found SMP MP-table at [c00f7230] f7230
[ 0.000000] Zone PFN ranges:
[ 0.000000] DMA 0x00000000 -> 0x00001000
[ 0.000000] Normal 0x00001000 -> 0x000373fe
[ 0.000000] HighMem 0x000373fe -> 0x000bdb63
[ 0.000000] Movable zone start PFN for each node
[ 0.000000] early_node_map[6] active PFN ranges
[ 0.000000] 0: 0x00000000 -> 0x0000009f
[ 0.000000] 0: 0x00000100 -> 0x000bd6b3
[ 0.000000] 0: 0x000bd6b9 -> 0x000bd7b2
[ 0.000000] 0: 0x000bd80f -> 0x000bd907
[ 0.000000] 0: 0x000bdb0f -> 0x000bdb18
[ 0.000000] 0: 0x000bdb1f -> 0x000bdb63
[ 0.000000] On node 0 totalpages: 776336
[ 0.000000] free_area_init_node: node 0, pgdat c13b4860, node_mem_map c14d5000
[ 0.000000] DMA zone: 32 pages used for memmap
[ 0.000000] DMA zone: 0 pages reserved
[ 0.000000] DMA zone: 3967 pages, LIFO batch:0
[ 0.000000] Normal zone: 1736 pages used for memmap
[ 0.000000] Normal zone: 220470 pages, LIFO batch:31
[ 0.000000] HighMem zone: 4303 pages used for memmap
[ 0.000000] HighMem zone: 545828 pages, LIFO batch:31
[ 0.000000] Using APIC driver default
[ 0.000000] ACPI: PM-Timer IO Port: 0x408
[ 0.000000] ACPI: Local APIC address 0xfee00000
[ 0.000000] ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled)
[ 0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled)
[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1])
[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1])
[ 0.000000] ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0])
[ 0.000000] IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-23
[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 high edge)
[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
[ 0.000000] ACPI: IRQ0 used by override.
[ 0.000000] ACPI: IRQ2 used by override.
[ 0.000000] ACPI: IRQ9 used by override.
[ 0.000000] Using ACPI (MADT) for SMP configuration information
[ 0.000000] ACPI: HPET id: 0x8086a201 base: 0xfed00000
[ 0.000000] SMP: Allowing 2 CPUs, 0 hotplug CPUs
[ 0.000000] nr_irqs_gsi: 24
[ 0.000000] PM: Registered nosave memory: 000000000009f000 - 00000000000a0000
[ 0.000000] PM: Registered nosave memory: 00000000000a0000 - 00000000000d2000
[ 0.000000] PM: Registered nosave memory: 00000000000d2000 - 00000000000d4000
[ 0.000000] PM: Registered nosave memory: 00000000000d4000 - 00000000000dc000
[ 0.000000] PM: Registered nosave memory: 00000000000dc000 - 0000000000100000
[ 0.000000] Allocating PCI resources starting at bdc00000 (gap: bdc00000:42400000)
[ 0.000000] Booting paravirtualized kernel on bare hardware
[ 0.000000] NR_CPUS:32 nr_cpumask_bits:32 nr_cpu_ids:2 nr_node_ids:1
[ 0.000000] PERCPU: Embedded 14 pages/cpu @c3000000 s34328 r0 d23016 u2097152
[ 0.000000] pcpu-alloc: s34328 r0 d23016 u2097152 alloc=1*4194304
[ 0.000000] pcpu-alloc: [0] 0 1
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 770265
[ 0.000000] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-2.6.32-5-686 root=UUID=cb1268f1-4e20-4409-87b1-3d882c14102c ro nomodeset
[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Enabling fast FPU save and restore... done.
[ 0.000000] Enabling unmasked SIMD FPU exception support... done.
[ 0.000000] Initializing CPU#0
[ 0.000000] Initializing HighMem for node 0 (000373fe:000bdb63)
[ 0.000000] Memory: 3063500k/3108236k available (2504k kernel code, 40824k reserved, 1328k data, 380k init, 2200524k highmem)
[ 0.000000] virtual kernel memory layout:
[ 0.000000] fixmap : 0xffd56000 - 0xfffff000 (2724 kB)
[ 0.000000] pkmap : 0xff400000 - 0xff800000 (4096 kB)
[ 0.000000] vmalloc : 0xf7bfe000 - 0xff3fe000 ( 120 MB)
[ 0.000000] lowmem : 0xc0000000 - 0xf73fe000 ( 883 MB)
[ 0.000000] .init : 0xc13bf000 - 0xc141e000 ( 380 kB)
[ 0.000000] .data : 0xc12721f1 - 0xc13be480 (1328 kB)
[ 0.000000] .text : 0xc1000000 - 0xc12721f1 (2504 kB)
[ 0.000000] Checking if this processor honours the WP bit even in supervisor mode...Ok.
[ 0.000000] SLUB: Genslabs=13, HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] NR_IRQS:1280
[ 0.000000] Extended CMOS year: 2000
[ 0.000000] Console: colour VGA+ 80x25
[ 0.000000] console [tty0] enabled
[ 0.000000] hpet clockevent registered
[ 0.000000] Fast TSC calibration using PIT
[ 0.000000] Detected 2161.581 MHz processor.
[ 0.004003] Calibrating delay loop (skipped), value calculated using timer frequency.. 4323.16 BogoMIPS (lpj=8646324)
[ 0.004139] Security Framework initialized
[ 0.004201] SELinux: Disabled at boot.
[ 0.004265] Mount-cache hash table entries: 512
[ 0.004438] Initializing cgroup subsys ns
[ 0.004500] Initializing cgroup subsys cpuacct
[ 0.004563] Initializing cgroup subsys devices
[ 0.004624] Initializing cgroup subsys freezer
[ 0.004684] Initializing cgroup subsys net_cls
[ 0.004765] CPU: L1 I cache: 32K, L1 D cache: 32K
[ 0.004868] CPU: L2 cache: 1024K
[ 0.004928] CPU: Physical Processor ID: 0
[ 0.004987] CPU: Processor Core ID: 0
[ 0.005049] mce: CPU supports 6 MCE banks
[ 0.005114] CPU0: Thermal monitoring enabled (TM2)
[ 0.005177] using mwait in idle threads.
[ 0.005241] Performance Events: Core2 events, Intel PMU driver.
[ 0.005391] ... version: 2
[ 0.005450] ... bit width: 40
[ 0.005510] ... generic registers: 2
[ 0.005569] ... value mask: 000000ffffffffff
[ 0.005631] ... max period: 000000007fffffff
[ 0.005693] ... fixed-purpose events: 3
[ 0.005753] ... event mask: 0000000700000003
[ 0.005816] Checking 'hlt' instruction... OK.
[ 0.021105] ACPI: Core revision 20090903
[ 0.032058] Enabling APIC mode: Flat. Using 1 I/O APICs
[ 0.032510] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
[ 0.074335] CPU0: Intel(R) Pentium(R) Dual CPU T3400 @ 2.16GHz stepping 0d
[ 0.076001] Booting processor 1 APIC 0x1 ip 0x6000
[ 0.008000] Initializing CPU#1
[ 0.008000] CPU: L1 I cache: 32K, L1 D cache: 32K
[ 0.008000] CPU: L2 cache: 1024K
[ 0.008000] CPU: Physical Processor ID: 0
[ 0.008000] CPU: Processor Core ID: 1
[ 0.008000] CPU1: Thermal monitoring enabled (TM2)
[ 0.160096] CPU1: Intel(R) Pentium(R) Dual CPU T3400 @ 2.16GHz stepping 0d
[ 0.160599] checking TSC synchronization [CPU#0 -> CPU#1]: passed.
[ 0.164047] Brought up 2 CPUs
[ 0.164107] Total of 2 processors activated (8645.66 BogoMIPS).
[ 0.164739] CPU0 attaching sched-domain:
[ 0.164743] domain 0: span 0-1 level MC
[ 0.164745] groups: group c3003778 cpus 0 group c3203778 cpus 1
[ 0.164751] CPU1 attaching sched-domain:
[ 0.164753] domain 0: span 0-1 level MC
[ 0.164755] groups: group c3203778 cpus 1 group c3003778 cpus 0
[ 0.164807] devtmpfs: initialized
[ 0.164966] regulator: core version 0.5
[ 0.164966] NET: Registered protocol family 16
[ 0.164966] ACPI: bus type pci registered
[ 0.164966] PCI: MCFG configuration 0: base e0000000 segment 0 buses 0 - 255
[ 0.164966] PCI: Not using MMCONFIG.
[ 0.164966] PCI: PCI BIOS revision 3.00 entry at 0xfde11, last bus=8
[ 0.165017] PCI: Using configuration type 1 for base access
[ 0.168023] bio: create slab <bio-0> at 0
[ 0.168830] ACPI: EC: Look up EC in DSDT
[ 0.172270] ACPI: BIOS _OSI(Linux) query ignored
[ 0.173667] ACPI: Interpreter enabled
[ 0.173728] ACPI: (supports S0 S3 S4 S5)
[ 0.173973] ACPI: Using IOAPIC for interrupt routing
[ 0.174080] PCI: MCFG configuration 0: base e0000000 segment 0 buses 0 - 255
[ 0.212432] PCI: MCFG area at e0000000 reserved in ACPI motherboard resources
[ 0.212497] PCI: Using MMCONFIG for extended config space
[ 0.254855] ACPI: EC: GPE = 0x1c, I/O: command/status = 0x66, data = 0x62
[ 0.255220] ACPI: No dock devices found.
[ 0.255750] ACPI: PCI Root Bridge [PCI0] (0000:00)
[ 0.255864] DMAR: Forcing write-buffer flush capability
[ 0.255926] DMAR: Disabling IOMMU for graphics on this chipset
[ 0.256035] pci 0000:00:02.0: reg 10 64bit mmio: [0xf4000000-0xf43fffff]
[ 0.256042] pci 0000:00:02.0: reg 18 64bit mmio pref: [0xd0000000-0xdfffffff]
[ 0.256047] pci 0000:00:02.0: reg 20 io port: [0x1800-0x1807]
[ 0.256089] pci 0000:00:02.1: reg 10 64bit mmio: [0xf4400000-0xf44fffff]
[ 0.256217] pci 0000:00:1a.0: reg 20 io port: [0x1820-0x183f]
[ 0.256315] pci 0000:00:1a.1: reg 20 io port: [0x1840-0x185f]
[ 0.256412] pci 0000:00:1a.2: reg 20 io port: [0x1860-0x187f]
[ 0.256510] pci 0000:00:1a.7: reg 10 32bit mmio: [0xf4a04800-0xf4a04bff]
[ 0.256581] pci 0000:00:1a.7: PME# supported from D0 D3hot D3cold
[ 0.256648] pci 0000:00:1a.7: PME# disabled
[ 0.256765] pci 0000:00:1b.0: reg 10 64bit mmio: [0xf4a00000-0xf4a03fff]
[ 0.256828] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
[ 0.256895] pci 0000:00:1b.0: PME# disabled
[ 0.257051] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
[ 0.257117] pci 0000:00:1c.0: PME# disabled
[ 0.257275] pci 0000:00:1c.1: PME# supported from D0 D3hot D3cold
[ 0.257342] pci 0000:00:1c.1: PME# disabled
[ 0.257499] pci 0000:00:1c.2: PME# supported from D0 D3hot D3cold
[ 0.257566] pci 0000:00:1c.2: PME# disabled
[ 0.257724] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold
[ 0.257791] pci 0000:00:1c.3: PME# disabled
[ 0.257951] pci 0000:00:1c.5: PME# supported from D0 D3hot D3cold
[ 0.258017] pci 0000:00:1c.5: PME# disabled
[ 0.258155] pci 0000:00:1d.0: reg 20 io port: [0x1880-0x189f]
[ 0.258254] pci 0000:00:1d.1: reg 20 io port: [0x18a0-0x18bf]
[ 0.258352] pci 0000:00:1d.2: reg 20 io port: [0x18c0-0x18df]
[ 0.258449] pci 0000:00:1d.7: reg 10 32bit mmio: [0xf4a04c00-0xf4a04fff]
[ 0.258520] pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold
[ 0.258587] pci 0000:00:1d.7: PME# disabled
[ 0.258914] pci 0000:00:1f.2: reg 10 io port: [0x1818-0x181f]
[ 0.258922] pci 0000:00:1f.2: reg 14 io port: [0x180c-0x180f]
[ 0.258930] pci 0000:00:1f.2: reg 18 io port: [0x1810-0x1817]
[ 0.258939] pci 0000:00:1f.2: reg 1c io port: [0x1808-0x180b]
[ 0.258947] pci 0000:00:1f.2: reg 20 io port: [0x18e0-0x18ff]
[ 0.258955] pci 0000:00:1f.2: reg 24 32bit mmio: [0xf4a04000-0xf4a047ff]
[ 0.259004] pci 0000:00:1f.2: PME# supported from D3hot
[ 0.259069] pci 0000:00:1f.2: PME# disabled
[ 0.259171] pci 0000:00:1f.3: reg 10 64bit mmio: [0x000000-0x0000ff]
[ 0.259191] pci 0000:00:1f.3: reg 20 io port: [0x1c00-0x1c1f]
[ 0.259297] pci 0000:02:00.0: reg 10 32bit mmio: [0xf4500000-0xf45000ff]
[ 0.259375] pci 0000:02:00.0: reg 30 32bit mmio pref: [0x000000-0x00ffff]
[ 0.259542] pci 0000:02:00.2: reg 10 32bit mmio: [0xf4500400-0xf45004ff]
[ 0.259778] pci 0000:02:00.3: reg 10 32bit mmio: [0xf4500800-0xf45008ff]
[ 0.268236] pci 0000:00:1c.0: bridge 32bit mmio: [0xf4500000-0xf45fffff]
[ 0.268516] pci 0000:04:00.0: reg 10 64bit mmio: [0xf4700000-0xf4703fff]
[ 0.268737] pci 0000:04:00.0: supports D1 D2
[ 0.268739] pci 0000:04:00.0: PME# supported from D0 D3hot D3cold
[ 0.268847] pci 0000:04:00.0: PME# disabled
[ 0.269437] pci 0000:00:1c.2: bridge 32bit mmio: [0xf4700000-0xf47fffff]
[ 0.269504] pci 0000:00:1c.3: bridge io port: [0x2000-0x2fff]
[ 0.269509] pci 0000:00:1c.3: bridge 32bit mmio: [0xf0000000-0xf3ffffff]
[ 0.269518] pci 0000:00:1c.3: bridge 64bit mmio pref: [0xf6000000-0xf7ffffff]
[ 0.269741] pci 0000:07:00.0: reg 10 64bit mmio: [0xf4600000-0xf460ffff]
[ 0.269982] pci 0000:07:00.0: PME# supported from D3hot D3cold
[ 0.270088] pci 0000:07:00.0: PME# disabled
[ 0.270691] pci 0000:00:1c.5: bridge 32bit mmio: [0xf4600000-0xf46fffff]
[ 0.270765] pci 0000:00:1e.0: transparent bridge
[ 0.270875] pci_bus 0000:00: on NUMA node 0
[ 0.270880] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT]
[ 0.271015] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P1._PRT]
[ 0.271102] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.RP01._PRT]
[ 0.271205] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.RP02._PRT]
[ 0.271268] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.RP03._PRT]
[ 0.271339] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.RP04._PRT]
[ 0.271405] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.RP06._PRT]
[ 0.283764] ACPI: PCI Interrupt Link [LNKA] (IRQs 1 3 4 *5 6 7 10 12 14 15)
[ 0.284408] ACPI: PCI Interrupt Link [LNKB] (IRQs 1 3 4 5 6 7 *11 12 14 15)
[ 0.285068] ACPI: PCI Interrupt Link [LNKC] (IRQs 1 *3 4 5 6 7 10 12 14 15)
[ 0.285725] ACPI: PCI Interrupt Link [LNKD] (IRQs 1 3 4 5 6 7 11 12 14 15) *10
[ 0.286436] ACPI: PCI Interrupt Link [LNKE] (IRQs 1 3 4 5 6 *7 10 12 14 15)
[ 0.287094] ACPI: PCI Interrupt Link [LNKF] (IRQs 1 3 4 5 6 7 *11 12 14 15)
[ 0.287752] ACPI: PCI Interrupt Link [LNKG] (IRQs 1 3 4 5 6 7 *10 12 14 15)
[ 0.288445] ACPI: PCI Interrupt Link [LNKH] (IRQs 1 3 *4 5 6 7 11 12 14 15)
[ 0.289101] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
[ 0.289192] vgaarb: loaded
[ 0.289263] PCI: Using ACPI for IRQ routing
[ 0.289263] HPET: 4 timers in total, 0 timers will be used for per-cpu timer
[ 0.289263] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0
[ 0.289263] hpet0: 4 comparators, 64-bit 14.318180 MHz counter
[ 0.296019] Switching to clocksource tsc
[ 0.297233] pnp: PnP ACPI init
[ 0.297302] ACPI: bus type pnp registered
[ 0.315852] pnp: PnP ACPI: found 10 devices
[ 0.315915] ACPI: ACPI bus type pnp unregistered
[ 0.315977] PnPBIOS: Disabled by ACPI PNP
[ 0.316046] system 00:03: iomem range 0xfed00000-0xfed003ff has been reserved
[ 0.316117] system 00:05: ioport range 0x680-0x69f has been reserved
[ 0.316182] system 00:05: ioport range 0xffff-0xffff has been reserved
[ 0.316247] system 00:05: ioport range 0xffff-0xffff has been reserved
[ 0.316312] system 00:05: ioport range 0xffff-0xffff has been reserved
[ 0.316377] system 00:05: ioport range 0x400-0x47f has been reserved
[ 0.316442] system 00:05: ioport range 0x480-0x48f has been reserved
[ 0.316507] system 00:05: ioport range 0x1180-0x11ff has been reserved
[ 0.316571] system 00:05: ioport range 0x164e-0x164f has been reserved
[ 0.316636] system 00:05: ioport range 0xfe00-0xfe00 has been reserved
[ 0.316701] system 00:05: ioport range 0xff00-0xff7f has been reserved
[ 0.316770] system 00:09: iomem range 0xfed1c000-0xfed1ffff has been reserved
[ 0.316836] system 00:09: iomem range 0xfed10000-0xfed13fff has been reserved
[ 0.316902] system 00:09: iomem range 0xfed18000-0xfed18fff has been reserved
[ 0.316968] system 00:09: iomem range 0xfed19000-0xfed19fff has been reserved
[ 0.317034] system 00:09: iomem range 0xe0000000-0xefffffff has been reserved
[ 0.317100] system 00:09: iomem range 0xfed20000-0xfed3ffff has been reserved
[ 0.317166] system 00:09: iomem range 0xfed40000-0xfed44fff has been reserved
[ 0.317232] system 00:09: iomem range 0xfed45000-0xfed8ffff has been reserved
[ 0.352087] pci 0000:00:1c.0: PCI bridge, secondary bus 0000:02
[ 0.352152] pci 0000:00:1c.0: IO window: 0x3000-0x3fff
[ 0.352220] pci 0000:00:1c.0: MEM window: 0xf4500000-0xf45fffff
[ 0.352287] pci 0000:00:1c.0: PREFETCH window: 0xc0000000-0xc01fffff
[ 0.352357] pci 0000:00:1c.1: PCI bridge, secondary bus 0000:03
[ 0.352423] pci 0000:00:1c.1: IO window: 0x4000-0x4fff
[ 0.352489] pci 0000:00:1c.1: MEM window: 0xc0200000-0xc03fffff
[ 0.352556] pci 0000:00:1c.1: PREFETCH window: 0x000000c0400000-0x000000c05fffff
[ 0.352640] pci 0000:00:1c.2: PCI bridge, secondary bus 0000:04
[ 0.352704] pci 0000:00:1c.2: IO window: 0x5000-0x5fff
[ 0.352771] pci 0000:00:1c.2: MEM window: 0xf4700000-0xf47fffff
[ 0.352838] pci 0000:00:1c.2: PREFETCH window: 0x000000c0600000-0x000000c07fffff
[ 0.352921] pci 0000:00:1c.3: PCI bridge, secondary bus 0000:05
[ 0.352986] pci 0000:00:1c.3: IO window: 0x2000-0x2fff
[ 0.353053] pci 0000:00:1c.3: MEM window: 0xf0000000-0xf3ffffff
[ 0.353119] pci 0000:00:1c.3: PREFETCH window: 0x000000f6000000-0x000000f7ffffff
[ 0.353202] pci 0000:00:1c.5: PCI bridge, secondary bus 0000:07
[ 0.353267] pci 0000:00:1c.5: IO window: 0x6000-0x6fff
[ 0.353334] pci 0000:00:1c.5: MEM window: 0xf4600000-0xf46fffff
[ 0.353401] pci 0000:00:1c.5: PREFETCH window: 0x000000c0800000-0x000000c09fffff
[ 0.353484] pci 0000:00:1e.0: PCI bridge, secondary bus 0000:08
[ 0.353547] pci 0000:00:1e.0: IO window: disabled
[ 0.353613] pci 0000:00:1e.0: MEM window: disabled
[ 0.353677] pci 0000:00:1e.0: PREFETCH window: disabled
[ 0.353758] pci 0000:00:1c.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
[ 0.353827] pci 0000:00:1c.0: setting latency timer to 64
[ 0.353838] pci 0000:00:1c.1: PCI INT B -> GSI 16 (level, low) -> IRQ 16
[ 0.353906] pci 0000:00:1c.1: setting latency timer to 64
[ 0.353917] pci 0000:00:1c.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
[ 0.353984] pci 0000:00:1c.2: setting latency timer to 64
[ 0.353995] pci 0000:00:1c.3: PCI INT D -> GSI 19 (level, low) -> IRQ 19
[ 0.354063] pci 0000:00:1c.3: setting latency timer to 64
[ 0.354073] pci 0000:00:1c.5: PCI INT B -> GSI 16 (level, low) -> IRQ 16
[ 0.354140] pci 0000:00:1c.5: setting latency timer to 64
[ 0.354149] pci 0000:00:1e.0: setting latency timer to 64
[ 0.354154] pci_bus 0000:00: resource 0 io: [0x00-0xffff]
[ 0.354156] pci_bus 0000:00: resource 1 mem: [0x000000-0xffffffff]
[ 0.354159] pci_bus 0000:02: resource 0 io: [0x3000-0x3fff]
[ 0.354161] pci_bus 0000:02: resource 1 mem: [0xf4500000-0xf45fffff]
[ 0.354164] pci_bus 0000:02: resource 2 pref mem [0xc0000000-0xc01fffff]
[ 0.354166] pci_bus 0000:03: resource 0 io: [0x4000-0x4fff]
[ 0.354169] pci_bus 0000:03: resource 1 mem: [0xc0200000-0xc03fffff]
[ 0.354171] pci_bus 0000:03: resource 2 pref mem [0xc0400000-0xc05fffff]
[ 0.354174] pci_bus 0000:04: resource 0 io: [0x5000-0x5fff]
[ 0.354176] pci_bus 0000:04: resource 1 mem: [0xf4700000-0xf47fffff]
[ 0.354179] pci_bus 0000:04: resource 2 pref mem [0xc0600000-0xc07fffff]
[ 0.354181] pci_bus 0000:05: resource 0 io: [0x2000-0x2fff]
[ 0.354183] pci_bus 0000:05: resource 1 mem: [0xf0000000-0xf3ffffff]
[ 0.354186] pci_bus 0000:05: resource 2 pref mem [0xf6000000-0xf7ffffff]
[ 0.354188] pci_bus 0000:07: resource 0 io: [0x6000-0x6fff]
[ 0.354191] pci_bus 0000:07: resource 1 mem: [0xf4600000-0xf46fffff]
[ 0.354193] pci_bus 0000:07: resource 2 pref mem [0xc0800000-0xc09fffff]
[ 0.354196] pci_bus 0000:08: resource 3 io: [0x00-0xffff]
[ 0.354198] pci_bus 0000:08: resource 4 mem: [0x000000-0xffffffff]
[ 0.354227] NET: Registered protocol family 2
[ 0.354366] IP route cache hash table entries: 32768 (order: 5, 131072 bytes)
[ 0.354696] TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
[ 0.355221] TCP bind hash table entries: 65536 (order: 7, 524288 bytes)
[ 0.355572] TCP: Hash tables configured (established 131072 bind 65536)
[ 0.355637] TCP reno registered
[ 0.355793] NET: Registered protocol family 1
[ 0.355875] pci 0000:00:02.0: Boot video device
[ 0.356078] Unpacking initramfs...
[ 0.633594] Freeing initrd memory: 10581k freed
[ 0.640081] Simple Boot Flag at 0x36 set to 0x1
[ 0.640429] audit: initializing netlink socket (disabled)
[ 0.640505] type=2000 audit(1321223886.639:1): initialized
[ 0.643795] highmem bounce pool size: 64 pages
[ 0.643859] HugeTLB registered 4 MB page size, pre-allocated 0 pages
[ 0.645179] VFS: Disk quotas dquot_6.5.2
[ 0.645289] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
[ 0.645419] msgmni has been set to 1708
[ 0.645640] alg: No test for stdrng (krng)
[ 0.645750] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253)
[ 0.645828] io scheduler noop registered
[ 0.645888] io scheduler anticipatory registered
[ 0.645949] io scheduler deadline registered
[ 0.646038] io scheduler cfq registered (default)
[ 0.646249] pcieport 0000:00:1c.0: irq 24 for MSI/MSI-X
[ 0.646260] pcieport 0000:00:1c.0: setting latency timer to 64
[ 0.646420] pcieport 0000:00:1c.1: irq 25 for MSI/MSI-X
[ 0.646431] pcieport 0000:00:1c.1: setting latency timer to 64
[ 0.646587] pcieport 0000:00:1c.2: irq 26 for MSI/MSI-X
[ 0.646598] pcieport 0000:00:1c.2: setting latency timer to 64
[ 0.646754] pcieport 0000:00:1c.3: irq 27 for MSI/MSI-X
[ 0.646764] pcieport 0000:00:1c.3: setting latency timer to 64
[ 0.646920] pcieport 0000:00:1c.5: irq 28 for MSI/MSI-X
[ 0.646931] pcieport 0000:00:1c.5: setting latency timer to 64
[ 0.647104] isapnp: Scanning for PnP cards...
[ 1.001204] isapnp: No Plug & Play device found
[ 1.002504] Linux agpgart interface v0.103
[ 1.002638] agpgart-intel 0000:00:00.0: Intel Mobile Intel® GM45 Express Chipset
[ 1.003092] agpgart-intel 0000:00:00.0: detected 32764K stolen memory
[ 1.034511] agpgart-intel 0000:00:00.0: AGP aperture is 256M @ 0xd0000000
[ 1.034648] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[ 1.035077] PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:MSE0] at 0x60,0x64 irq 1,12
[ 1.065945] serio: i8042 KBD port at 0x60,0x64 irq 1
[ 1.066012] serio: i8042 AUX port at 0x60,0x64 irq 12
[ 1.066123] mice: PS/2 mouse device common for all mice
[ 1.066224] rtc_cmos 00:06: RTC can wake from S4
[ 1.066317] rtc_cmos 00:06: rtc core: registered rtc_cmos as rtc0
[ 1.066413] rtc0: alarms up to one month, y3k, 242 bytes nvram, hpet irqs
[ 1.066490] cpuidle: using governor ladder
[ 1.066552] cpuidle: using governor menu
[ 1.066617] No iBFT detected.
[ 1.066986] TCP cubic registered
[ 1.067173] NET: Registered protocol family 10
[ 1.067880] Mobile IPv6
[ 1.067941] NET: Registered protocol family 17
[ 1.068027] Using IPI No-Shortcut mode
[ 1.068149] PM: Resume from disk failed.
[ 1.068160] registered taskstats version 1
[ 1.069481] rtc_cmos 00:06: setting system clock to 2011-11-13 22:38:07 UTC (1321223887)
[ 1.069616] Initalizing network drop monitor service
[ 1.069696] Freeing unused kernel memory: 380k freed
[ 1.069929] Write protecting the kernel text: 2508k
[ 1.070009] Write protecting the kernel read-only data: 920k
[ 1.086038] udev[56]: starting version 164
[ 1.095307] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input0
[ 1.211016] SCSI subsystem initialized
[ 1.214423] usbcore: registered new interface driver usbfs
[ 1.214510] usbcore: registered new interface driver hub
[ 1.215396] usbcore: registered new device driver usb
[ 1.226492] ACPI: Invalid active0 threshold
[ 1.230595] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 1.230703] ehci_hcd 0000:00:1a.7: PCI INT C -> GSI 20 (level, low) -> IRQ 20
[ 1.230792] ehci_hcd 0000:00:1a.7: setting latency timer to 64
[ 1.230796] ehci_hcd 0000:00:1a.7: EHCI Host Controller
[ 1.230885] ehci_hcd 0000:00:1a.7: new USB bus registered, assigned bus number 1
[ 1.231005] ehci_hcd 0000:00:1a.7: debug port 1
[ 1.232655] uhci_hcd: USB Universal Host Controller Interface driver
[ 1.232844] thermal LNXTHERM:01: registered as thermal_zone0
[ 1.232940] ACPI: Thermal Zone [TZ00] (67 C)
[ 1.234942] ehci_hcd 0000:00:1a.7: cache line size of 32 is not supported
[ 1.235040] ehci_hcd 0000:00:1a.7: irq 20, io mem 0xf4a04800
[ 1.239005] sdhci: Secure Digital Host Controller Interface driver
[ 1.239070] sdhci: Copyright(c) Pierre Ossman
[ 1.248009] ehci_hcd 0000:00:1a.7: USB 2.0 started, EHCI 1.00
[ 1.248107] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
[ 1.248172] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 1.248249] usb usb1: Product: EHCI Host Controller
[ 1.248311] usb usb1: Manufacturer: Linux 2.6.32-5-686 ehci_hcd
[ 1.248374] usb usb1: SerialNumber: 0000:00:1a.7
[ 1.248529] usb usb1: configuration #1 chosen from 1 choice
[ 1.248621] hub 1-0:1.0: USB hub found
[ 1.248688] hub 1-0:1.0: 6 ports detected
[ 1.248819] uhci_hcd 0000:00:1a.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
[ 1.248892] uhci_hcd 0000:00:1a.0: setting latency timer to 64
[ 1.248896] uhci_hcd 0000:00:1a.0: UHCI Host Controller
[ 1.248964] uhci_hcd 0000:00:1a.0: new USB bus registered, assigned bus number 2
[ 1.249078] uhci_hcd 0000:00:1a.0: irq 16, io base 0x00001820
[ 1.249172] usb usb2: New USB device found, idVendor=1d6b, idProduct=0001
[ 1.249237] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 1.249314] usb usb2: Product: UHCI Host Controller
[ 1.249375] usb usb2: Manufacturer: Linux 2.6.32-5-686 uhci_hcd
[ 1.249439] usb usb2: SerialNumber: 0000:00:1a.0
[ 1.249557] usb usb2: configuration #1 chosen from 1 choice
[ 1.249644] hub 2-0:1.0: USB hub found
[ 1.249709] hub 2-0:1.0: 2 ports detected
[ 1.249829] ehci_hcd 0000:00:1d.7: PCI INT A -> GSI 23 (level, low) -> IRQ 23
[ 1.249913] ehci_hcd 0000:00:1d.7: setting latency timer to 64
[ 1.249917] ehci_hcd 0000:00:1d.7: EHCI Host Controller
[ 1.249984] ehci_hcd 0000:00:1d.7: new USB bus registered, assigned bus number 3
[ 1.250096] ehci_hcd 0000:00:1d.7: debug port 1
[ 1.252226] libata version 3.00 loaded.
[ 1.254042] ehci_hcd 0000:00:1d.7: cache line size of 32 is not supported
[ 1.254063] ehci_hcd 0000:00:1d.7: irq 23, io mem 0xf4a04c00
[ 1.260036] tg3.c:v3.116 (December 3, 2010)
[ 1.260164] tg3 0000:07:00.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
[ 1.260276] tg3 0000:07:00.0: setting latency timer to 64
[ 1.260292] sdhci-pci 0000:02:00.0: SDHCI controller found [197b:2382] (rev 0)
[ 1.260395] sdhci-pci 0000:02:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
[ 1.260633] sdhci-pci 0000:02:00.0: setting latency timer to 64
[ 1.260677] Registered led device: mmc0::
[ 1.260793] mmc0: SDHCI controller on PCI [0000:02:00.0] using ADMA
[ 1.260868] sdhci-pci 0000:02:00.2: SDHCI controller found [197b:2381] (rev 0)
[ 1.260963] sdhci-pci 0000:02:00.2: PCI INT A -> GSI 16 (level, low) -> IRQ 16
[ 1.261058] sdhci-pci 0000:02:00.2: Refusing to bind to secondary interface.
[ 1.261129] sdhci-pci 0000:02:00.2: PCI INT A disabled
[ 1.268443] ehci_hcd 0000:00:1d.7: USB 2.0 started, EHCI 1.00
[ 1.268531] usb usb3: New USB device found, idVendor=1d6b, idProduct=0002
[ 1.268597] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 1.268674] usb usb3: Product: EHCI Host Controller
[ 1.268735] usb usb3: Manufacturer: Linux 2.6.32-5-686 ehci_hcd
[ 1.268799] usb usb3: SerialNumber: 0000:00:1d.7
[ 1.268939] usb usb3: configuration #1 chosen from 1 choice
[ 1.269034] hub 3-0:1.0: USB hub found
[ 1.269100] hub 3-0:1.0: 6 ports detected
[ 1.269230] uhci_hcd 0000:00:1a.1: PCI INT B -> GSI 21 (level, low) -> IRQ 21
[ 1.269306] uhci_hcd 0000:00:1a.1: setting latency timer to 64
[ 1.269310] uhci_hcd 0000:00:1a.1: UHCI Host Controller
[ 1.269383] uhci_hcd 0000:00:1a.1: new USB bus registered, assigned bus number 4
[ 1.269500] uhci_hcd 0000:00:1a.1: irq 21, io base 0x00001840
[ 1.269597] usb usb4: New USB device found, idVendor=1d6b, idProduct=0001
[ 1.269662] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 1.269739] usb usb4: Product: UHCI Host Controller
[ 1.269801] usb usb4: Manufacturer: Linux 2.6.32-5-686 uhci_hcd
[ 1.269864] usb usb4: SerialNumber: 0000:00:1a.1
[ 1.269990] usb usb4: configuration #1 chosen from 1 choice
[ 1.270077] hub 4-0:1.0: USB hub found
[ 1.270142] hub 4-0:1.0: 2 ports detected
[ 1.270256] ahci 0000:00:1f.2: version 3.0
[ 1.270271] ahci 0000:00:1f.2: PCI INT B -> GSI 19 (level, low) -> IRQ 19
[ 1.270389] ahci 0000:00:1f.2: irq 29 for MSI/MSI-X
[ 1.270435] ahci: SSS flag set, parallel bus scan disabled
[ 1.270536] ahci 0000:00:1f.2: AHCI 0001.0200 32 slots 4 ports 3 Gbps 0x3 impl SATA mode
[ 1.270620] ahci 0000:00:1f.2: flags: 64bit ncq sntf stag pm led clo pio slum part ccc ems sxs
[ 1.270705] ahci 0000:00:1f.2: setting latency timer to 64
[ 1.278073] scsi0 : ahci
[ 1.278313] scsi1 : ahci
[ 1.278491] scsi2 : ahci
[ 1.278676] scsi3 : ahci
[ 1.278801] ata1: SATA max UDMA/133 abar m2048@0xf4a04000 port 0xf4a04100 irq 29
[ 1.278916] ata2: SATA max UDMA/133 abar m2048@0xf4a04000 port 0xf4a04180 irq 29
[ 1.279025] ata3: DUMMY
[ 1.279127] ata4: DUMMY
[ 1.279352] uhci_hcd 0000:00:1a.2: PCI INT C -> GSI 20 (level, low) -> IRQ 20
[ 1.279462] uhci_hcd 0000:00:1a.2: setting latency timer to 64
[ 1.279466] uhci_hcd 0000:00:1a.2: UHCI Host Controller
[ 1.279588] uhci_hcd 0000:00:1a.2: new USB bus registered, assigned bus number 5
[ 1.279737] uhci_hcd 0000:00:1a.2: irq 20, io base 0x00001860
[ 1.279868] usb usb5: New USB device found, idVendor=1d6b, idProduct=0001
[ 1.279987] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 1.280100] usb usb5: Product: UHCI Host Controller
[ 1.280193] usb usb5: Manufacturer: Linux 2.6.32-5-686 uhci_hcd
[ 1.280287] usb usb5: SerialNumber: 0000:00:1a.2
[ 1.280516] usb usb5: configuration #1 chosen from 1 choice
[ 1.280670] hub 5-0:1.0: USB hub found
[ 1.280766] hub 5-0:1.0: 2 ports detected
[ 1.280912] uhci_hcd 0000:00:1d.0: PCI INT A -> GSI 23 (level, low) -> IRQ 23
[ 1.281047] uhci_hcd 0000:00:1d.0: setting latency timer to 64
[ 1.281051] uhci_hcd 0000:00:1d.0: UHCI Host Controller
[ 1.281153] uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 6
[ 1.281298] uhci_hcd 0000:00:1d.0: irq 23, io base 0x00001880
[ 1.281431] usb usb6: New USB device found, idVendor=1d6b, idProduct=0001
[ 1.281499] usb usb6: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 1.281649] usb usb6: Product: UHCI Host Controller
[ 1.281732] usb usb6: Manufacturer: Linux 2.6.32-5-686 uhci_hcd
[ 1.281820] usb usb6: SerialNumber: 0000:00:1d.0
[ 1.282024] usb usb6: configuration #1 chosen from 1 choice
[ 1.282168] hub 6-0:1.0: USB hub found
[ 1.282251] hub 6-0:1.0: 2 ports detected
[ 1.282397] uhci_hcd 0000:00:1d.1: PCI INT B -> GSI 19 (level, low) -> IRQ 19
[ 1.282490] uhci_hcd 0000:00:1d.1: setting latency timer to 64
[ 1.282496] uhci_hcd 0000:00:1d.1: UHCI Host Controller
[ 1.282585] uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 7
[ 1.282887] uhci_hcd 0000:00:1d.1: irq 19, io base 0x000018a0
[ 1.283008] usb usb7: New USB device found, idVendor=1d6b, idProduct=0001
[ 1.283093] usb usb7: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 1.283211] usb usb7: Product: UHCI Host Controller
[ 1.283294] usb usb7: Manufacturer: Linux 2.6.32-5-686 uhci_hcd
[ 1.283379] usb usb7: SerialNumber: 0000:00:1d.1
[ 1.283567] usb usb7: configuration #1 chosen from 1 choice
[ 1.283722] hub 7-0:1.0: USB hub found
[ 1.283809] hub 7-0:1.0: 2 ports detected
[ 1.283939] uhci_hcd 0000:00:1d.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
[ 1.284041] uhci_hcd 0000:00:1d.2: setting latency timer to 64
[ 1.284047] uhci_hcd 0000:00:1d.2: UHCI Host Controller
[ 1.284136] uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 8
[ 1.284283] uhci_hcd 0000:00:1d.2: irq 18, io base 0x000018c0
[ 1.284407] usb usb8: New USB device found, idVendor=1d6b, idProduct=0001
[ 1.284497] usb usb8: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 1.284597] usb usb8: Product: UHCI Host Controller
[ 1.284683] usb usb8: Manufacturer: Linux 2.6.32-5-686 uhci_hcd
[ 1.284767] usb usb8: SerialNumber: 0000:00:1d.2
[ 1.284957] usb usb8: configuration #1 chosen from 1 choice
[ 1.285124] hub 8-0:1.0: USB hub found
[ 1.285219] hub 8-0:1.0: 2 ports detected
[ 1.309039] tg3 0000:07:00.0: eth0: Tigon3 [partno(BCM95906) rev c002] (PCI Express) MAC address 00:23:5a:17:01:6e
[ 1.309124] tg3 0000:07:00.0: eth0: attached PHY is 5906 (10/100Base-TX Ethernet) (WireSpeed[0])
[ 1.309204] tg3 0000:07:00.0: eth0: RXcsums[1] LinkChgREG[0] MIirq[0] ASF[0] TSOcap[1]
[ 1.309283] tg3 0000:07:00.0: eth0: dma_rwctrl[76180000] dma_mask[64-bit]
[ 1.560011] usb 1-6: new high speed USB device using ehci_hcd and address 2
[ 1.604023] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 1.634280] ata1.00: ATA-8: WDC WD1600BEVT-88ZCT0, 11.01A11, max UDMA/133
[ 1.634346] ata1.00: 312581808 sectors, multi 16: LBA48 NCQ (depth 31/32), AA
[ 1.635794] ata1.00: configured for UDMA/133
[ 1.648108] scsi 0:0:0:0: Direct-Access ATA WDC WD1600BEVT-8 11.0 PQ: 0 ANSI: 5
[ 1.692841] usb 1-6: New USB device found, idVendor=0781, idProduct=5567
[ 1.692908] usb 1-6: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[ 1.692973] usb 1-6: Product: Cruzer Blade
[ 1.693034] usb 1-6: Manufacturer: SanDisk
[ 1.693094] usb 1-6: SerialNumber: 20043513421424F00A4F
[ 1.693220] usb 1-6: configuration #1 chosen from 1 choice
[ 1.699899] Initializing USB Mass Storage driver...
[ 1.700126] scsi4 : SCSI emulation for USB Mass Storage devices
[ 1.700269] usbcore: registered new interface driver usb-storage
[ 1.700336] USB Mass Storage support registered.
[ 1.700401] usb-storage: device found at 2
[ 1.700403] usb-storage: waiting for device to settle before scanning
[ 1.808012] usb 3-3: new high speed USB device using ehci_hcd and address 2
[ 2.096917] usb 3-3: New USB device found, idVendor=04f2, idProduct=b090
[ 2.097732] usb 3-3: New USB device strings: Mfr=1, Product=2, SerialNumber=0
[ 2.097798] usb 3-3: Product: Lenovo EasyCamera
[ 2.097858] usb 3-3: Manufacturer: Vimicro Corp.
[ 2.097990] usb 3-3: configuration #1 chosen from 1 choice
[ 2.372024] ata2: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
[ 2.375654] ata2.00: ATAPI: HL-DT-ST DVDRAM GSA-T50N, RV06, max UDMA/133
[ 2.380404] ata2.00: configured for UDMA/133
[ 2.508133] scsi 1:0:0:0: CD-ROM HL-DT-ST DVDRAM GSA-T50N RV06 PQ: 0 ANSI: 5
[ 2.519189] sd 0:0:0:0: [sda] 312581808 512-byte logical blocks: (160 GB/149 GiB)
[ 2.519319] sd 0:0:0:0: [sda] Write Protect is off
[ 2.519383] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
[ 2.519414] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
[ 2.519633] sda: sda1 sda2 < sda5 > sda3
[ 2.555050] sd 0:0:0:0: [sda] Attached SCSI disk
[ 2.844888] sr0: scsi3-mmc drive: 24x/24x writer dvd-ram cd/rw xa/form2 cdda tray
[ 2.844968] Uniform CD-ROM driver Revision: 3.20
[ 2.845118] sr 1:0:0:0: Attached scsi CD-ROM sr0
[ 2.850772] sd 0:0:0:0: Attached scsi generic sg0 type 0
[ 2.850997] sr 1:0:0:0: Attached scsi generic sg1 type 5
[ 6.696097] usb-storage: device scan complete
[ 6.696722] scsi 4:0:0:0: Direct-Access SanDisk Cruzer Blade 1.14 PQ: 0 ANSI: 2
[ 6.697289] sd 4:0:0:0: Attached scsi generic sg2 type 0
[ 6.699344] sd 4:0:0:0: [sdb] 7821312 512-byte logical blocks: (4.00 GB/3.72 GiB)
[ 6.700455] sd 4:0:0:0: [sdb] Write Protect is off
[ 6.700517] sd 4:0:0:0: [sdb] Mode Sense: 03 00 00 00
[ 6.700519] sd 4:0:0:0: [sdb] Assuming drive cache: write through
[ 6.703078] sd 4:0:0:0: [sdb] Assuming drive cache: write through
[ 6.703144] sdb: sdb1 sdb2 sdb3
[ 6.708590] sd 4:0:0:0: [sdb] Assuming drive cache: write through
[ 6.708660] sd 4:0:0:0: [sdb] Attached SCSI removable disk
[ 6.995000] EXT4-fs (sdb1): mounted filesystem with ordered data mode
[ 7.639960] udev[427]: starting version 164
[ 7.763694] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input1
[ 7.763865] ACPI: Lid Switch [LID0]
[ 7.763986] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input2
[ 7.764070] ACPI: Power Button [PWRB]
[ 7.764203] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input3
[ 7.764285] ACPI: Power Button [PWRF]
[ 7.781180] ACPI: SSDT bdb1ac20 00265 (v01 PmRef Cpu0Ist 00003000 INTL 20050624)
[ 7.781853] ACPI: SSDT bdb18620 00549 (v01 PmRef Cpu0Cst 00003001 INTL 20050624)
[ 7.852398] Monitor-Mwait will be used to enter C-1 state
[ 7.854611] Monitor-Mwait will be used to enter C-2 state
[ 7.854624] Marking TSC unstable due to TSC halts in idle
[ 7.854791] processor LNXCPU:00: registered as cooling_device0
[ 7.855374] ACPI: SSDT bdb19ca0 001CF (v01 PmRef ApIst 00003000 INTL 20050624)
[ 7.855987] ACPI: SSDT bdb19f20 0008D (v01 PmRef ApCst 00003000 INTL 20050624)
[ 7.857122] Switching to clocksource hpet
[ 7.857306] processor LNXCPU:01: registered as cooling_device1
[ 7.858634] lib80211: common routines for IEEE802.11 drivers
[ 7.858701] lib80211_crypt: registered algorithm 'NULL'
[ 8.562616] wl: module license 'MIXED/Proprietary' taints kernel.
[ 8.562685] Disabling lock debugging due to kernel taint
[ 8.569048] wl 0000:04:00.0: PCI INT A -> GSI 18 (level, low) -> IRQ 18
[ 8.569163] wl 0000:04:00.0: setting latency timer to 64
[ 8.576218] input: PC Speaker as /devices/platform/pcspkr/input/input4
[ 8.593068] i801_smbus 0000:00:1f.3: PCI INT C -> GSI 19 (level, low) -> IRQ 19
[ 8.593155] ACPI: I/O resource 0000:00:1f.3 [0x1c00-0x1c1f] conflicts with ACPI region SMBI [0x1c00-0x1c0f]
[ 8.593237] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
[ 8.595752] ACPI: AC Adapter [ACAD] (on-line)
[ 8.635487] lib80211_crypt: registered algorithm 'TKIP'
[ 8.770035] ACPI: Battery Slot [BAT1] (battery present)
[ 8.770506] eth1: Broadcom BCM4315 802.11 Hybrid Wireless Controller 5.60.48.36
[ 8.779162] Linux video capture interface: v2.00
[ 8.781343] jmb38x_ms 0000:02:00.3: PCI INT A -> GSI 16 (level, low) -> IRQ 16
[ 8.781432] jmb38x_ms 0000:02:00.3: setting latency timer to 64
[ 8.825096] [drm] Initialized drm 1.1.0 20060810
[ 8.827153] uvcvideo: Found UVC 1.00 device Lenovo EasyCamera (04f2:b090)
[ 8.830393] input: Lenovo EasyCamera as /devices/pci0000:00/0000:00:1d.7/usb3/3-3/3-3:1.0/input/input5
[ 8.830589] usbcore: registered new interface driver uvcvideo
[ 8.830712] USB Video Class driver (v0.1.0)
[ 8.872716] pci 0000:00:02.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
[ 8.872790] pci 0000:00:02.0: setting latency timer to 64
[ 8.878968] mtrr: type mismatch for d0000000,10000000 old: write-back new: write-combining
[ 8.879055] [drm] MTRR allocation failed. Graphics performance may suffer.
[ 8.879181] pci 0000:00:02.0: irq 30 for MSI/MSI-X
[ 8.901986] acpi device:05: registered as cooling_device2
[ 8.920841] acpi device:06: registered as cooling_device3
[ 8.944990] acpi device:07: registered as cooling_device4
[ 8.970986] HDA Intel 0000:00:1b.0: power state changed by ACPI to D0
[ 8.971036] acpi device:08: registered as cooling_device5
[ 8.971225] HDA Intel 0000:00:1b.0: power state changed by ACPI to D0
[ 8.971305] HDA Intel 0000:00:1b.0: PCI INT A -> GSI 22 (level, low) -> IRQ 22
[ 8.971587] HDA Intel 0000:00:1b.0: irq 31 for MSI/MSI-X
[ 8.971617] HDA Intel 0000:00:1b.0: setting latency timer to 64
[ 8.990081] acpi device:09: registered as cooling_device6
[ 8.990263] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:01/input/input6
[ 8.990393] ACPI: Video Device [GFX0] (multi-head: yes rom: no post: no)
[ 8.990485] [drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on minor 0
[ 9.034380] input: HDA Intel Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input7
[ 9.034545] input: HDA Intel Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input8
[ 9.034689] input: HDA Intel Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input9
[ 9.284357] input: PS/2 Mouse as /devices/platform/i8042/serio1/input/input10
[ 9.322269] input: AlpsPS/2 ALPS GlidePoint as /devices/platform/i8042/serio1/input/input11
[ 9.585493] Adding 208836k swap on /dev/sdb3. Priority:-1 extents:1 across:208836k
[ 9.729444] loop: module loaded
[ 9.750931] input: Speakup as /devices/virtual/input/input12
[ 9.752709] speakup 3.1.5: initialized
[ 9.752785] synth name on entry is: <NULL>
[ 9.754372] initialized device: /dev/synth, node (MAJOR 10, MINOR 25)
[ 9.756787] synth probe
[ 9.756925] initialized device: /dev/softsynth, node (MAJOR 10, MINOR 26)
[ 9.898822] EXT4-fs (sdb2): mounted filesystem with ordered data mode
[ 10.289660] fuse init (API version 7.13)
[ 10.912969] apm: BIOS not found.
[ 11.715232] Bluetooth: Core ver 2.15
[ 11.715299] NET: Registered protocol family 31
[ 11.715301] Bluetooth: HCI device and connection manager initialized
[ 11.715304] Bluetooth: HCI socket layer initialized
[ 11.735663] input: ACPI Virtual Keyboard Device as /devices/virtual/input/input13
[ 11.737433] lp: driver loaded but no devices found
[ 11.797130] ppdev: user-space parallel port driver
[ 11.863763] Bluetooth: L2CAP ver 2.14
[ 11.863766] Bluetooth: L2CAP socket layer initialized
[ 11.941234] Bluetooth: RFCOMM TTY layer initialized
[ 11.941239] Bluetooth: RFCOMM socket layer initialized
[ 11.941241] Bluetooth: RFCOMM ver 1.11
[ 11.999825] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
[ 11.999924] Bluetooth: BNEP filters: protocol multicast
[ 12.057185] Bridge firewalling registered
[ 12.268960] Bluetooth: SCO (Voice Link) ver 0.6
[ 12.269126] Bluetooth: SCO socket layer initialized
[ 12.308601] tg3 0000:07:00.0: irq 32 for MSI/MSI-X
[ 12.345810] ADDRCONF(NETDEV_UP): eth0: link is not ready
[ 21.928035] eth1: no IPv6 routers present
Do you find anything, Bruno?
Thank you!
David
On Sun, 13 Nov 2011, Bruno Prémont wrote:
> On Sun, 13 November 2011 Anatolij Gustschin <agust@denx.de> wrote:
>> On Sun, 13 Nov 2011 21:16:52 -0500 (EST)
>> David J Ring Jr <n1ea@arrl.net> wrote:
>>
>>> OK so how do I get a frame buffer driver loaded?
>>
>> Check if some frame buffer drivers are installed
>> in your system, so e.g. run
>>
>> ls /lib/modules/`uname -r`/kernel/drivers/video
>>
>> to see if there are any frame buffer driver modules
>> installed.
>>
>> Then you have to select the suitable driver for your
>> graphic card and load it by running
>>
>> modprobe drivername
>>
>>> I don't have any backlisted framebuffer drivers, what is stopping me from
>>> loading a frame buffer driver?
>>>
>>> Does anyone know what I have to do?
>>
>>
>> Usually the driver should be loaded automatically if
>> it is installed. Maybe some error happened while loading
>> the driver. Dump the kernel log messages by running dmesg
>> and check if there was an attempt to load the driver for
>> your graphic card.
>
> The other case might be a mainsteam GPU (radeon, nouveau, intel) and
> KMS support built in (or available as module) but disabled by "nomodeset"
> cmdline option that did show up in a previous post.
>
> Just booting with "vga=0x31a" (or another value more appropriate for
> attached screen -- see Documentation/fb/vesafb.txt for list) might
> provide a basic framebuffer device.
>
> lspci for the affected system will certainly help at least indicating
> which driver would be the right one.
>
> Bruno
>
^ permalink raw reply
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