* Re: [PATCH] video:uvesafb: Fix oops that uvesafb try to execute NX-protected page
From: Wang YanQing @ 2012-04-10 6:49 UTC (permalink / raw)
To: Alan Cox, FlorianSchandinat, linux-fbdev, linux-kernel, spock
In-Reply-To: <20120401010530.GA4431@udknight>
On Sun, Apr 01, 2012 at 09:05:30AM +0800, Wang YanQing wrote:
> On Wed, Mar 28, 2012 at 08:52:38AM +0800, Wang YanQing wrote:
> > On Tue, Mar 27, 2012 at 02:32:43PM +0100, Alan Cox wrote:
> > > On Tue, 27 Mar 2012 18:01:36 +0800
> > > Wang YanQing <udknight@gmail.com> wrote:
> > >
> > > >
> > > > Ok! I try to check pcibios_enabled first, but get some opposition by Alan Cox,
> > > > but I want to make thing work and fix the oops, so I choice the simple way to
> > > > check the (__supported_pte_mask & _PAGE_NX) instead of to check this variable plus
> > > > pci kernel boot parameter, pci mmconfig works or not, and more, and more. It is not
> > > > the best method, but it works and maybe all will feel happy.
> > >
> > > Okay let me ask the obvious question - why is it not the best method ?
> > >
> > > Apart from adding a helper in the includes for the arch code of
> > >
> > > static inline is_nx_enabled(void)
> > > {
> > > return !!(__supported_pte_mask & _PAGE_NX);
> > > }
> > >
> > > is there anything else it lacks ?
> > >
> > > Yes ideally we'd set the relevant ROM areas executable, but for a simple
> > > fix is there anything else that's a problem with it ?
> > Ok! Maybe you had missed my previous reply
> > http://permalink.gmane.org/gmane.linux.kernel/1272433
> > It is not the best method, because the check is not enough.
> > I means when NX is actively, the pci bios is NX or not also depend on
> > the code path in pci_arch_init which will be influenced by the acpi on or off, pci kernel boot
> > parameter, even kernel config like pci access method PCI_GOANY, PCI_GOMMCONFIG, or PCI_GODIRECT,
> > but if I check the pcibios_enabled, all the above can be ignored.
> >
> > if uvesafb use the PMI when PCI BIOS is X, it can get the better work efficience then use the redraw
> > method as a fallback when do the panning.
> Alan
>
> I am just curious, I want to know what I describe above is right a little,
> or wrong about all the aspect.
> thanks.
>
Hi Alan, are you decided to not reply this any?
But maybe we are still here to wait for your proposal to
decide the final proper solution to fix the bug in kernel.
Thanks
^ permalink raw reply
* Re: mx3fb overlay support
From: Guennadi Liakhovetski @ 2012-04-10 12:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAJP5LRNwPXx_sQ=uX4AZDz9HvLdF_nRcoVXBkAWmidVpbdby9g@mail.gmail.com>
Hi Alex
On Tue, 10 Apr 2012, alex gershgorin wrote:
> Hi Guennadi,
>
> In mx3fb current version overlay does not supporting,
> I came across a patch 3/4 v4 i.MX31: framebuffer driver that you submitted
> in 2008,
> there was support Overlay, but for some reason in the next versions overlay
> support has been removed.
>
> As you understand this is necessary if we want to use the foreground and
> background Planes.
> in my case, one has to display live video, and other graphics.
>
> I would like to hear your opinion, if may reuse a part of this patch,
> and add overlay support to mx3fb current version.
Maybe this note in the original commit message explains the reason:
"Overlay support is included but has never been tested." ;-)
> if necessary, I am ready to provide any assistance :-)
Sure, please, re-add it, test, fix, any improvements are welcome.
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
^ permalink raw reply
* Re: [PATCH] video:uvesafb: Fix oops that uvesafb try to execute NX-protected page
From: Alan Cox @ 2012-04-10 14:28 UTC (permalink / raw)
To: Wang YanQing; +Cc: FlorianSchandinat, linux-fbdev, linux-kernel, spock
In-Reply-To: <20120410064918.GA7611@udknight>
> Hi Alan, are you decided to not reply this any?
I'm not aware of anythign that needs adding to this. Any logic about
whether PCI BIOS methods can be called belongs in the PCI layer, as does
the necessary logic for marking ROMs executable if asked by a driver.
uvesafb isn't the only user of PCI methods that may be affected and the
PCI layer is the place that should export the method to decide this.
That will also then work sanely cross platform - since in general on non
x86 boxes the method can simply return "no"
Alan
^ permalink raw reply
* Re: [PATCH] kyrofb: fix on x86_64
From: Florian Tobias Schandinat @ 2012-04-12 2:18 UTC (permalink / raw)
To: Ondrej Zary; +Cc: Paul Mundt, linux-fbdev, Kernel development list
In-Reply-To: <201203212336.55396.linux@rainbow-software.org>
On 03/21/2012 10:36 PM, Ondrej Zary wrote:
> kyrofb is completely broken on x86_64 because the registers are defined as
> unsigned long. Change them to u32 to make the driver work.
> Tested with Hercules 3D Prophet 4000XT.
>
> Signed-off-by: Ondrej Zary <linux@rainbow-software.org>
Applied.
Thanks,
Florian Tobias Schandinat
>
> diff --git a/drivers/video/kyro/STG4000Reg.h b/drivers/video/kyro/STG4000Reg.h
> index 5d62698..50f4670 100644
> --- a/drivers/video/kyro/STG4000Reg.h
> +++ b/drivers/video/kyro/STG4000Reg.h
> @@ -73,210 +73,210 @@ typedef enum _OVRL_PIX_FORMAT {
> /* Register Table */
> typedef struct {
> /* 0h */
> - volatile unsigned long Thread0Enable; /* 0x0000 */
> - volatile unsigned long Thread1Enable; /* 0x0004 */
> - volatile unsigned long Thread0Recover; /* 0x0008 */
> - volatile unsigned long Thread1Recover; /* 0x000C */
> - volatile unsigned long Thread0Step; /* 0x0010 */
> - volatile unsigned long Thread1Step; /* 0x0014 */
> - volatile unsigned long VideoInStatus; /* 0x0018 */
> - volatile unsigned long Core2InSignStart; /* 0x001C */
> - volatile unsigned long Core1ResetVector; /* 0x0020 */
> - volatile unsigned long Core1ROMOffset; /* 0x0024 */
> - volatile unsigned long Core1ArbiterPriority; /* 0x0028 */
> - volatile unsigned long VideoInControl; /* 0x002C */
> - volatile unsigned long VideoInReg0CtrlA; /* 0x0030 */
> - volatile unsigned long VideoInReg0CtrlB; /* 0x0034 */
> - volatile unsigned long VideoInReg1CtrlA; /* 0x0038 */
> - volatile unsigned long VideoInReg1CtrlB; /* 0x003C */
> - volatile unsigned long Thread0Kicker; /* 0x0040 */
> - volatile unsigned long Core2InputSign; /* 0x0044 */
> - volatile unsigned long Thread0ProgCtr; /* 0x0048 */
> - volatile unsigned long Thread1ProgCtr; /* 0x004C */
> - volatile unsigned long Thread1Kicker; /* 0x0050 */
> - volatile unsigned long GPRegister1; /* 0x0054 */
> - volatile unsigned long GPRegister2; /* 0x0058 */
> - volatile unsigned long GPRegister3; /* 0x005C */
> - volatile unsigned long GPRegister4; /* 0x0060 */
> - volatile unsigned long SerialIntA; /* 0x0064 */
> -
> - volatile unsigned long Fill0[6]; /* GAP 0x0068 - 0x007C */
> -
> - volatile unsigned long SoftwareReset; /* 0x0080 */
> - volatile unsigned long SerialIntB; /* 0x0084 */
> -
> - volatile unsigned long Fill1[37]; /* GAP 0x0088 - 0x011C */
> -
> - volatile unsigned long ROMELQV; /* 0x011C */
> - volatile unsigned long WLWH; /* 0x0120 */
> - volatile unsigned long ROMELWL; /* 0x0124 */
> -
> - volatile unsigned long dwFill_1; /* GAP 0x0128 */
> -
> - volatile unsigned long IntStatus; /* 0x012C */
> - volatile unsigned long IntMask; /* 0x0130 */
> - volatile unsigned long IntClear; /* 0x0134 */
> -
> - volatile unsigned long Fill2[6]; /* GAP 0x0138 - 0x014C */
> -
> - volatile unsigned long ROMGPIOA; /* 0x0150 */
> - volatile unsigned long ROMGPIOB; /* 0x0154 */
> - volatile unsigned long ROMGPIOC; /* 0x0158 */
> - volatile unsigned long ROMGPIOD; /* 0x015C */
> -
> - volatile unsigned long Fill3[2]; /* GAP 0x0160 - 0x0168 */
> -
> - volatile unsigned long AGPIntID; /* 0x0168 */
> - volatile unsigned long AGPIntClassCode; /* 0x016C */
> - volatile unsigned long AGPIntBIST; /* 0x0170 */
> - volatile unsigned long AGPIntSSID; /* 0x0174 */
> - volatile unsigned long AGPIntPMCSR; /* 0x0178 */
> - volatile unsigned long VGAFrameBufBase; /* 0x017C */
> - volatile unsigned long VGANotify; /* 0x0180 */
> - volatile unsigned long DACPLLMode; /* 0x0184 */
> - volatile unsigned long Core1VideoClockDiv; /* 0x0188 */
> - volatile unsigned long AGPIntStat; /* 0x018C */
> + volatile u32 Thread0Enable; /* 0x0000 */
> + volatile u32 Thread1Enable; /* 0x0004 */
> + volatile u32 Thread0Recover; /* 0x0008 */
> + volatile u32 Thread1Recover; /* 0x000C */
> + volatile u32 Thread0Step; /* 0x0010 */
> + volatile u32 Thread1Step; /* 0x0014 */
> + volatile u32 VideoInStatus; /* 0x0018 */
> + volatile u32 Core2InSignStart; /* 0x001C */
> + volatile u32 Core1ResetVector; /* 0x0020 */
> + volatile u32 Core1ROMOffset; /* 0x0024 */
> + volatile u32 Core1ArbiterPriority; /* 0x0028 */
> + volatile u32 VideoInControl; /* 0x002C */
> + volatile u32 VideoInReg0CtrlA; /* 0x0030 */
> + volatile u32 VideoInReg0CtrlB; /* 0x0034 */
> + volatile u32 VideoInReg1CtrlA; /* 0x0038 */
> + volatile u32 VideoInReg1CtrlB; /* 0x003C */
> + volatile u32 Thread0Kicker; /* 0x0040 */
> + volatile u32 Core2InputSign; /* 0x0044 */
> + volatile u32 Thread0ProgCtr; /* 0x0048 */
> + volatile u32 Thread1ProgCtr; /* 0x004C */
> + volatile u32 Thread1Kicker; /* 0x0050 */
> + volatile u32 GPRegister1; /* 0x0054 */
> + volatile u32 GPRegister2; /* 0x0058 */
> + volatile u32 GPRegister3; /* 0x005C */
> + volatile u32 GPRegister4; /* 0x0060 */
> + volatile u32 SerialIntA; /* 0x0064 */
> +
> + volatile u32 Fill0[6]; /* GAP 0x0068 - 0x007C */
> +
> + volatile u32 SoftwareReset; /* 0x0080 */
> + volatile u32 SerialIntB; /* 0x0084 */
> +
> + volatile u32 Fill1[37]; /* GAP 0x0088 - 0x011C */
> +
> + volatile u32 ROMELQV; /* 0x011C */
> + volatile u32 WLWH; /* 0x0120 */
> + volatile u32 ROMELWL; /* 0x0124 */
> +
> + volatile u32 dwFill_1; /* GAP 0x0128 */
> +
> + volatile u32 IntStatus; /* 0x012C */
> + volatile u32 IntMask; /* 0x0130 */
> + volatile u32 IntClear; /* 0x0134 */
> +
> + volatile u32 Fill2[6]; /* GAP 0x0138 - 0x014C */
> +
> + volatile u32 ROMGPIOA; /* 0x0150 */
> + volatile u32 ROMGPIOB; /* 0x0154 */
> + volatile u32 ROMGPIOC; /* 0x0158 */
> + volatile u32 ROMGPIOD; /* 0x015C */
> +
> + volatile u32 Fill3[2]; /* GAP 0x0160 - 0x0168 */
> +
> + volatile u32 AGPIntID; /* 0x0168 */
> + volatile u32 AGPIntClassCode; /* 0x016C */
> + volatile u32 AGPIntBIST; /* 0x0170 */
> + volatile u32 AGPIntSSID; /* 0x0174 */
> + volatile u32 AGPIntPMCSR; /* 0x0178 */
> + volatile u32 VGAFrameBufBase; /* 0x017C */
> + volatile u32 VGANotify; /* 0x0180 */
> + volatile u32 DACPLLMode; /* 0x0184 */
> + volatile u32 Core1VideoClockDiv; /* 0x0188 */
> + volatile u32 AGPIntStat; /* 0x018C */
>
> /*
> - volatile unsigned long Fill4[0x0400/4 - 0x0190/4]; //GAP 0x0190 - 0x0400
> - volatile unsigned long Fill5[0x05FC/4 - 0x0400/4]; //GAP 0x0400 - 0x05FC Fog Table
> - volatile unsigned long Fill6[0x0604/4 - 0x0600/4]; //GAP 0x0600 - 0x0604
> - volatile unsigned long Fill7[0x0680/4 - 0x0608/4]; //GAP 0x0608 - 0x0680
> - volatile unsigned long Fill8[0x07FC/4 - 0x0684/4]; //GAP 0x0684 - 0x07FC
> + volatile u32 Fill4[0x0400/4 - 0x0190/4]; //GAP 0x0190 - 0x0400
> + volatile u32 Fill5[0x05FC/4 - 0x0400/4]; //GAP 0x0400 - 0x05FC Fog Table
> + volatile u32 Fill6[0x0604/4 - 0x0600/4]; //GAP 0x0600 - 0x0604
> + volatile u32 Fill7[0x0680/4 - 0x0608/4]; //GAP 0x0608 - 0x0680
> + volatile u32 Fill8[0x07FC/4 - 0x0684/4]; //GAP 0x0684 - 0x07FC
> */
> - volatile unsigned long Fill4[412]; /* 0x0190 - 0x07FC */
> -
> - volatile unsigned long TACtrlStreamBase; /* 0x0800 */
> - volatile unsigned long TAObjDataBase; /* 0x0804 */
> - volatile unsigned long TAPtrDataBase; /* 0x0808 */
> - volatile unsigned long TARegionDataBase; /* 0x080C */
> - volatile unsigned long TATailPtrBase; /* 0x0810 */
> - volatile unsigned long TAPtrRegionSize; /* 0x0814 */
> - volatile unsigned long TAConfiguration; /* 0x0818 */
> - volatile unsigned long TAObjDataStartAddr; /* 0x081C */
> - volatile unsigned long TAObjDataEndAddr; /* 0x0820 */
> - volatile unsigned long TAXScreenClip; /* 0x0824 */
> - volatile unsigned long TAYScreenClip; /* 0x0828 */
> - volatile unsigned long TARHWClamp; /* 0x082C */
> - volatile unsigned long TARHWCompare; /* 0x0830 */
> - volatile unsigned long TAStart; /* 0x0834 */
> - volatile unsigned long TAObjReStart; /* 0x0838 */
> - volatile unsigned long TAPtrReStart; /* 0x083C */
> - volatile unsigned long TAStatus1; /* 0x0840 */
> - volatile unsigned long TAStatus2; /* 0x0844 */
> - volatile unsigned long TAIntStatus; /* 0x0848 */
> - volatile unsigned long TAIntMask; /* 0x084C */
> -
> - volatile unsigned long Fill5[235]; /* GAP 0x0850 - 0x0BF8 */
> -
> - volatile unsigned long TextureAddrThresh; /* 0x0BFC */
> - volatile unsigned long Core1Translation; /* 0x0C00 */
> - volatile unsigned long TextureAddrReMap; /* 0x0C04 */
> - volatile unsigned long RenderOutAGPRemap; /* 0x0C08 */
> - volatile unsigned long _3DRegionReadTrans; /* 0x0C0C */
> - volatile unsigned long _3DPtrReadTrans; /* 0x0C10 */
> - volatile unsigned long _3DParamReadTrans; /* 0x0C14 */
> - volatile unsigned long _3DRegionReadThresh; /* 0x0C18 */
> - volatile unsigned long _3DPtrReadThresh; /* 0x0C1C */
> - volatile unsigned long _3DParamReadThresh; /* 0x0C20 */
> - volatile unsigned long _3DRegionReadAGPRemap; /* 0x0C24 */
> - volatile unsigned long _3DPtrReadAGPRemap; /* 0x0C28 */
> - volatile unsigned long _3DParamReadAGPRemap; /* 0x0C2C */
> - volatile unsigned long ZBufferAGPRemap; /* 0x0C30 */
> - volatile unsigned long TAIndexAGPRemap; /* 0x0C34 */
> - volatile unsigned long TAVertexAGPRemap; /* 0x0C38 */
> - volatile unsigned long TAUVAddrTrans; /* 0x0C3C */
> - volatile unsigned long TATailPtrCacheTrans; /* 0x0C40 */
> - volatile unsigned long TAParamWriteTrans; /* 0x0C44 */
> - volatile unsigned long TAPtrWriteTrans; /* 0x0C48 */
> - volatile unsigned long TAParamWriteThresh; /* 0x0C4C */
> - volatile unsigned long TAPtrWriteThresh; /* 0x0C50 */
> - volatile unsigned long TATailPtrCacheAGPRe; /* 0x0C54 */
> - volatile unsigned long TAParamWriteAGPRe; /* 0x0C58 */
> - volatile unsigned long TAPtrWriteAGPRe; /* 0x0C5C */
> - volatile unsigned long SDRAMArbiterConf; /* 0x0C60 */
> - volatile unsigned long SDRAMConf0; /* 0x0C64 */
> - volatile unsigned long SDRAMConf1; /* 0x0C68 */
> - volatile unsigned long SDRAMConf2; /* 0x0C6C */
> - volatile unsigned long SDRAMRefresh; /* 0x0C70 */
> - volatile unsigned long SDRAMPowerStat; /* 0x0C74 */
> -
> - volatile unsigned long Fill6[2]; /* GAP 0x0C78 - 0x0C7C */
> -
> - volatile unsigned long RAMBistData; /* 0x0C80 */
> - volatile unsigned long RAMBistCtrl; /* 0x0C84 */
> - volatile unsigned long FIFOBistKey; /* 0x0C88 */
> - volatile unsigned long RAMBistResult; /* 0x0C8C */
> - volatile unsigned long FIFOBistResult; /* 0x0C90 */
> + volatile u32 Fill4[412]; /* 0x0190 - 0x07FC */
> +
> + volatile u32 TACtrlStreamBase; /* 0x0800 */
> + volatile u32 TAObjDataBase; /* 0x0804 */
> + volatile u32 TAPtrDataBase; /* 0x0808 */
> + volatile u32 TARegionDataBase; /* 0x080C */
> + volatile u32 TATailPtrBase; /* 0x0810 */
> + volatile u32 TAPtrRegionSize; /* 0x0814 */
> + volatile u32 TAConfiguration; /* 0x0818 */
> + volatile u32 TAObjDataStartAddr; /* 0x081C */
> + volatile u32 TAObjDataEndAddr; /* 0x0820 */
> + volatile u32 TAXScreenClip; /* 0x0824 */
> + volatile u32 TAYScreenClip; /* 0x0828 */
> + volatile u32 TARHWClamp; /* 0x082C */
> + volatile u32 TARHWCompare; /* 0x0830 */
> + volatile u32 TAStart; /* 0x0834 */
> + volatile u32 TAObjReStart; /* 0x0838 */
> + volatile u32 TAPtrReStart; /* 0x083C */
> + volatile u32 TAStatus1; /* 0x0840 */
> + volatile u32 TAStatus2; /* 0x0844 */
> + volatile u32 TAIntStatus; /* 0x0848 */
> + volatile u32 TAIntMask; /* 0x084C */
> +
> + volatile u32 Fill5[235]; /* GAP 0x0850 - 0x0BF8 */
> +
> + volatile u32 TextureAddrThresh; /* 0x0BFC */
> + volatile u32 Core1Translation; /* 0x0C00 */
> + volatile u32 TextureAddrReMap; /* 0x0C04 */
> + volatile u32 RenderOutAGPRemap; /* 0x0C08 */
> + volatile u32 _3DRegionReadTrans; /* 0x0C0C */
> + volatile u32 _3DPtrReadTrans; /* 0x0C10 */
> + volatile u32 _3DParamReadTrans; /* 0x0C14 */
> + volatile u32 _3DRegionReadThresh; /* 0x0C18 */
> + volatile u32 _3DPtrReadThresh; /* 0x0C1C */
> + volatile u32 _3DParamReadThresh; /* 0x0C20 */
> + volatile u32 _3DRegionReadAGPRemap; /* 0x0C24 */
> + volatile u32 _3DPtrReadAGPRemap; /* 0x0C28 */
> + volatile u32 _3DParamReadAGPRemap; /* 0x0C2C */
> + volatile u32 ZBufferAGPRemap; /* 0x0C30 */
> + volatile u32 TAIndexAGPRemap; /* 0x0C34 */
> + volatile u32 TAVertexAGPRemap; /* 0x0C38 */
> + volatile u32 TAUVAddrTrans; /* 0x0C3C */
> + volatile u32 TATailPtrCacheTrans; /* 0x0C40 */
> + volatile u32 TAParamWriteTrans; /* 0x0C44 */
> + volatile u32 TAPtrWriteTrans; /* 0x0C48 */
> + volatile u32 TAParamWriteThresh; /* 0x0C4C */
> + volatile u32 TAPtrWriteThresh; /* 0x0C50 */
> + volatile u32 TATailPtrCacheAGPRe; /* 0x0C54 */
> + volatile u32 TAParamWriteAGPRe; /* 0x0C58 */
> + volatile u32 TAPtrWriteAGPRe; /* 0x0C5C */
> + volatile u32 SDRAMArbiterConf; /* 0x0C60 */
> + volatile u32 SDRAMConf0; /* 0x0C64 */
> + volatile u32 SDRAMConf1; /* 0x0C68 */
> + volatile u32 SDRAMConf2; /* 0x0C6C */
> + volatile u32 SDRAMRefresh; /* 0x0C70 */
> + volatile u32 SDRAMPowerStat; /* 0x0C74 */
> +
> + volatile u32 Fill6[2]; /* GAP 0x0C78 - 0x0C7C */
> +
> + volatile u32 RAMBistData; /* 0x0C80 */
> + volatile u32 RAMBistCtrl; /* 0x0C84 */
> + volatile u32 FIFOBistKey; /* 0x0C88 */
> + volatile u32 RAMBistResult; /* 0x0C8C */
> + volatile u32 FIFOBistResult; /* 0x0C90 */
>
> /*
> - volatile unsigned long Fill11[0x0CBC/4 - 0x0C94/4]; //GAP 0x0C94 - 0x0CBC
> - volatile unsigned long Fill12[0x0CD0/4 - 0x0CC0/4]; //GAP 0x0CC0 - 0x0CD0 3DRegisters
> + volatile u32 Fill11[0x0CBC/4 - 0x0C94/4]; //GAP 0x0C94 - 0x0CBC
> + volatile u32 Fill12[0x0CD0/4 - 0x0CC0/4]; //GAP 0x0CC0 - 0x0CD0 3DRegisters
> */
>
> - volatile unsigned long Fill7[16]; /* 0x0c94 - 0x0cd0 */
> + volatile u32 Fill7[16]; /* 0x0c94 - 0x0cd0 */
>
> - volatile unsigned long SDRAMAddrSign; /* 0x0CD4 */
> - volatile unsigned long SDRAMDataSign; /* 0x0CD8 */
> - volatile unsigned long SDRAMSignConf; /* 0x0CDC */
> + volatile u32 SDRAMAddrSign; /* 0x0CD4 */
> + volatile u32 SDRAMDataSign; /* 0x0CD8 */
> + volatile u32 SDRAMSignConf; /* 0x0CDC */
>
> /* DWFILL; //GAP 0x0CE0 */
> - volatile unsigned long dwFill_2;
> -
> - volatile unsigned long ISPSignature; /* 0x0CE4 */
> -
> - volatile unsigned long Fill8[454]; /*GAP 0x0CE8 - 0x13FC */
> -
> - volatile unsigned long DACPrimAddress; /* 0x1400 */
> - volatile unsigned long DACPrimSize; /* 0x1404 */
> - volatile unsigned long DACCursorAddr; /* 0x1408 */
> - volatile unsigned long DACCursorCtrl; /* 0x140C */
> - volatile unsigned long DACOverlayAddr; /* 0x1410 */
> - volatile unsigned long DACOverlayUAddr; /* 0x1414 */
> - volatile unsigned long DACOverlayVAddr; /* 0x1418 */
> - volatile unsigned long DACOverlaySize; /* 0x141C */
> - volatile unsigned long DACOverlayVtDec; /* 0x1420 */
> -
> - volatile unsigned long Fill9[9]; /* GAP 0x1424 - 0x1444 */
> -
> - volatile unsigned long DACVerticalScal; /* 0x1448 */
> - volatile unsigned long DACPixelFormat; /* 0x144C */
> - volatile unsigned long DACHorizontalScal; /* 0x1450 */
> - volatile unsigned long DACVidWinStart; /* 0x1454 */
> - volatile unsigned long DACVidWinEnd; /* 0x1458 */
> - volatile unsigned long DACBlendCtrl; /* 0x145C */
> - volatile unsigned long DACHorTim1; /* 0x1460 */
> - volatile unsigned long DACHorTim2; /* 0x1464 */
> - volatile unsigned long DACHorTim3; /* 0x1468 */
> - volatile unsigned long DACVerTim1; /* 0x146C */
> - volatile unsigned long DACVerTim2; /* 0x1470 */
> - volatile unsigned long DACVerTim3; /* 0x1474 */
> - volatile unsigned long DACBorderColor; /* 0x1478 */
> - volatile unsigned long DACSyncCtrl; /* 0x147C */
> - volatile unsigned long DACStreamCtrl; /* 0x1480 */
> - volatile unsigned long DACLUTAddress; /* 0x1484 */
> - volatile unsigned long DACLUTData; /* 0x1488 */
> - volatile unsigned long DACBurstCtrl; /* 0x148C */
> - volatile unsigned long DACCrcTrigger; /* 0x1490 */
> - volatile unsigned long DACCrcDone; /* 0x1494 */
> - volatile unsigned long DACCrcResult1; /* 0x1498 */
> - volatile unsigned long DACCrcResult2; /* 0x149C */
> - volatile unsigned long DACLinecount; /* 0x14A0 */
> -
> - volatile unsigned long Fill10[151]; /*GAP 0x14A4 - 0x16FC */
> -
> - volatile unsigned long DigVidPortCtrl; /* 0x1700 */
> - volatile unsigned long DigVidPortStat; /* 0x1704 */
> + volatile u32 dwFill_2;
> +
> + volatile u32 ISPSignature; /* 0x0CE4 */
> +
> + volatile u32 Fill8[454]; /*GAP 0x0CE8 - 0x13FC */
> +
> + volatile u32 DACPrimAddress; /* 0x1400 */
> + volatile u32 DACPrimSize; /* 0x1404 */
> + volatile u32 DACCursorAddr; /* 0x1408 */
> + volatile u32 DACCursorCtrl; /* 0x140C */
> + volatile u32 DACOverlayAddr; /* 0x1410 */
> + volatile u32 DACOverlayUAddr; /* 0x1414 */
> + volatile u32 DACOverlayVAddr; /* 0x1418 */
> + volatile u32 DACOverlaySize; /* 0x141C */
> + volatile u32 DACOverlayVtDec; /* 0x1420 */
> +
> + volatile u32 Fill9[9]; /* GAP 0x1424 - 0x1444 */
> +
> + volatile u32 DACVerticalScal; /* 0x1448 */
> + volatile u32 DACPixelFormat; /* 0x144C */
> + volatile u32 DACHorizontalScal; /* 0x1450 */
> + volatile u32 DACVidWinStart; /* 0x1454 */
> + volatile u32 DACVidWinEnd; /* 0x1458 */
> + volatile u32 DACBlendCtrl; /* 0x145C */
> + volatile u32 DACHorTim1; /* 0x1460 */
> + volatile u32 DACHorTim2; /* 0x1464 */
> + volatile u32 DACHorTim3; /* 0x1468 */
> + volatile u32 DACVerTim1; /* 0x146C */
> + volatile u32 DACVerTim2; /* 0x1470 */
> + volatile u32 DACVerTim3; /* 0x1474 */
> + volatile u32 DACBorderColor; /* 0x1478 */
> + volatile u32 DACSyncCtrl; /* 0x147C */
> + volatile u32 DACStreamCtrl; /* 0x1480 */
> + volatile u32 DACLUTAddress; /* 0x1484 */
> + volatile u32 DACLUTData; /* 0x1488 */
> + volatile u32 DACBurstCtrl; /* 0x148C */
> + volatile u32 DACCrcTrigger; /* 0x1490 */
> + volatile u32 DACCrcDone; /* 0x1494 */
> + volatile u32 DACCrcResult1; /* 0x1498 */
> + volatile u32 DACCrcResult2; /* 0x149C */
> + volatile u32 DACLinecount; /* 0x14A0 */
> +
> + volatile u32 Fill10[151]; /*GAP 0x14A4 - 0x16FC */
> +
> + volatile u32 DigVidPortCtrl; /* 0x1700 */
> + volatile u32 DigVidPortStat; /* 0x1704 */
>
> /*
> - volatile unsigned long Fill11[0x1FFC/4 - 0x1708/4]; //GAP 0x1708 - 0x1FFC
> - volatile unsigned long Fill17[0x3000/4 - 0x2FFC/4]; //GAP 0x2000 - 0x2FFC ALUT
> + volatile u32 Fill11[0x1FFC/4 - 0x1708/4]; //GAP 0x1708 - 0x1FFC
> + volatile u32 Fill17[0x3000/4 - 0x2FFC/4]; //GAP 0x2000 - 0x2FFC ALUT
> */
>
> - volatile unsigned long Fill11[1598];
> + volatile u32 Fill11[1598];
>
> /* DWFILL; //GAP 0x3000 ALUT 256MB offset */
> - volatile unsigned long Fill_3;
> + volatile u32 Fill_3;
>
> } STG4000REG;
>
>
>
^ permalink raw reply
* Re: [PATCH] fbdev: fix au1*fb builds
From: Florian Tobias Schandinat @ 2012-04-12 2:18 UTC (permalink / raw)
To: linux-fbdev
On 03/24/2012 10:38 AM, Manuel Lauss wrote:
> Commit 1c16697bf9d5b206cb0d2b905a54de5e077296be
> ("drivers/video/au*fb.c: use devm_ functions) introduced 2 build failures
> in the au1100fb and au1200fb drivers, fix them.
>
> Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Applied.
Thanks,
Florian Tobias Schandinat
> ---
> drivers/video/au1100fb.c | 5 +++--
> drivers/video/au1200fb.c | 2 +-
> 2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/video/au1100fb.c b/drivers/video/au1100fb.c
> index befcbd8..ffbce45 100644
> --- a/drivers/video/au1100fb.c
> +++ b/drivers/video/au1100fb.c
> @@ -499,7 +499,8 @@ static int __devinit au1100fb_drv_probe(struct platform_device *dev)
> au1100fb_fix.mmio_start = regs_res->start;
> au1100fb_fix.mmio_len = resource_size(regs_res);
>
> - if (!devm_request_mem_region(au1100fb_fix.mmio_start,
> + if (!devm_request_mem_region(&dev->dev,
> + au1100fb_fix.mmio_start,
> au1100fb_fix.mmio_len,
> DRIVER_NAME)) {
> print_err("fail to lock memory region at 0x%08lx",
> @@ -516,7 +517,7 @@ static int __devinit au1100fb_drv_probe(struct platform_device *dev)
> fbdev->fb_len = fbdev->panel->xres * fbdev->panel->yres *
> (fbdev->panel->bpp >> 3) * AU1100FB_NBR_VIDEO_BUFFERS;
>
> - fbdev->fb_mem = dmam_alloc_coherent(&dev->dev, &dev->dev,
> + fbdev->fb_mem = dmam_alloc_coherent(&dev->dev,
> PAGE_ALIGN(fbdev->fb_len),
> &fbdev->fb_phys, GFP_KERNEL);
> if (!fbdev->fb_mem) {
> diff --git a/drivers/video/au1200fb.c b/drivers/video/au1200fb.c
> index 3e9a773..7ca79f0 100644
> --- a/drivers/video/au1200fb.c
> +++ b/drivers/video/au1200fb.c
> @@ -1724,7 +1724,7 @@ static int __devinit au1200fb_drv_probe(struct platform_device *dev)
> /* Allocate the framebuffer to the maximum screen size */
> fbdev->fb_len = (win->w[plane].xres * win->w[plane].yres * bpp) / 8;
>
> - fbdev->fb_mem = dmam_alloc_noncoherent(&dev->dev, &dev->dev,
> + fbdev->fb_mem = dmam_alloc_noncoherent(&dev->dev,
> PAGE_ALIGN(fbdev->fb_len),
> &fbdev->fb_phys, GFP_KERNEL);
> if (!fbdev->fb_mem) {
^ permalink raw reply
* Re: [PATCH v3 0/4] video: s3c-fb: Rearrange the elements in platform data
From: Florian Tobias Schandinat @ 2012-04-12 2:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1332606528-32338-1-git-send-email-thomas.abraham@linaro.org>
On 03/24/2012 04:28 PM, Thomas Abraham wrote:
> Changes since v2:
> - Patch 3/4 is a new patch in this series. The real6410 and mini6410 boards
> use the display controllers window configuration data to represent video
> timing of two different lcd panels. Since the window configuration data
> should be not be used to specify timing of two different panels, this has
> been reworked in such a way that two instance of display controller's
> platform data is setup for the two supported lcd panels. Depending on the
> lcd panel specified using boot parameters, the corresponding platform data
> is registered. This maintains backward compatibility with existing
> functionality of supporting multiple lcd panels at runtime.
>
> Changes since v1:
> - Includes all changes suggested by Jingoo Han.
> - Reworked s3c-fb platform data in all Samsung SoC based board files.
>
> This patchset rearranges the elements in the platform data of the s3c-fb
> driver with the intent of adding device tree support to the driver in
> subsequent patches.
>
> The first patch moves the video timing information from the individual window
> setup data into the platform specific configuration section in the platform
> data. The video timing is independent of the window setup. The resolution of
> the window could be smaller than that of the lcd panel attached. So the video
> timing data is removed from window configuration data.
>
> The second patch removes the need for the 'default_win' element in the
> platform data. This element was used to decide whether the video data
> output from the controller should be enabled or disabled when the window
> specified by 'default_win' is enabled or disabled. With the first patch
> removing the need for atleast one window to be of the same resolution as
> that of the lcd panel, it is now possible to decide when to enable/disable
> the video data output based on the state of each window. If any of the
> window is active, the lcd data output is enabled. Otherwise, the lcd data
> output is disabled. Hence, the 'default_win' parameter from the platform
> data can be removed, which anyways cannot be specified when using
> device tree.
>
> The third patch reworks the display controller's platform data that was
> used to supply video timing information for two different panels on the
> mini6410 and real6410 boards. That was not the correct usage of the window
> data and hence reworks the runtime handling of two different lcd panels.
>
> For all the Samsung SoC based boards, the forth patch reworks the platform
> data of the display controller based on the changes introduced in the first
> two patches.
>
> This patch series is based on
> http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git [for-next]
>
> with all patches merged from
> https://github.com/schandinat/linux-2.6.git [fbdev-next]
>
> and tested one Exynos4210 based Origen board (only compile tested for
> other boards)
>
> Thomas Abraham (4):
> video: s3c-fb: move video interface timing out of window setup data
> video: s3c-fb: remove 'default_win' element from platform data
> ARM: s3c64xx: Decouple lcd type from display controller window data
> ARM: Samsung: Rework platform data of s3c-fb driver
Applied this series.
Thanks,
Florian Tobias Schandinat
>
> arch/arm/mach-exynos/mach-nuri.c | 26 +++---
> arch/arm/mach-exynos/mach-origen.c | 24 +++--
> arch/arm/mach-exynos/mach-smdkv310.c | 28 ++++---
> arch/arm/mach-exynos/mach-universal_c210.c | 26 +++---
> arch/arm/mach-s3c24xx/mach-smdk2416.c | 27 +++---
> arch/arm/mach-s3c64xx/mach-anw6410.c | 25 +++---
> arch/arm/mach-s3c64xx/mach-crag6410.c | 25 +++---
> arch/arm/mach-s3c64xx/mach-hmt.c | 24 +++--
> arch/arm/mach-s3c64xx/mach-mini6410.c | 92 +++++++++++--------
> arch/arm/mach-s3c64xx/mach-real6410.c | 90 +++++++++++--------
> arch/arm/mach-s3c64xx/mach-smartq5.c | 26 +++---
> arch/arm/mach-s3c64xx/mach-smartq7.c | 26 +++---
> arch/arm/mach-s3c64xx/mach-smdk6410.c | 25 +++---
> arch/arm/mach-s5p64x0/mach-smdk6440.c | 24 +++--
> arch/arm/mach-s5p64x0/mach-smdk6450.c | 24 +++--
> arch/arm/mach-s5pc100/mach-smdkc100.c | 27 +++---
> arch/arm/mach-s5pv210/mach-aquila.c | 36 ++++----
> arch/arm/mach-s5pv210/mach-goni.c | 26 +++---
> arch/arm/mach-s5pv210/mach-smdkv210.c | 24 +++--
> arch/arm/plat-samsung/include/plat/fb.h | 11 ++-
> drivers/video/s3c-fb.c | 135 +++++++++++++--------------
> 21 files changed, 426 insertions(+), 345 deletions(-)
>
>
^ permalink raw reply
* Re: [PATCH] video: pxa3xx-gcu: Simplify the logic to exit while loop in pxa3xx_gcu_wait_idle
From: Florian Tobias Schandinat @ 2012-04-12 2:22 UTC (permalink / raw)
To: Axel Lin
Cc: linux-kernel, Daniel Mack, Sven Neumann, Janine Kropp,
Denis Oliver Kropp, linux-fbdev
In-Reply-To: <1332818156.21855.4.camel@phoenix>
On 03/27/2012 03:15 AM, Axel Lin wrote:
> If wait_event_interruptible_timeout returns a positive value, it means
> the condition evaluated is true. Which means priv->shared->hw_running is false.
> And then we will exit the loop.
>
> This patch simplifies the logic to exit the while loop.
>
> Signed-off-by: Axel Lin <axel.lin@gmail.com>
Applied.
Thanks,
Florian Tobias Schandinat
> ---
> drivers/video/pxa3xx-gcu.c | 5 +----
> 1 files changed, 1 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/video/pxa3xx-gcu.c b/drivers/video/pxa3xx-gcu.c
> index 1d71c08..0b4ae0c 100644
> --- a/drivers/video/pxa3xx-gcu.c
> +++ b/drivers/video/pxa3xx-gcu.c
> @@ -316,12 +316,9 @@ pxa3xx_gcu_wait_idle(struct pxa3xx_gcu_priv *priv)
> ret = wait_event_interruptible_timeout(priv->wait_idle,
> !priv->shared->hw_running, HZ*4);
>
> - if (ret < 0)
> + if (ret != 0)
> break;
>
> - if (ret > 0)
> - continue;
> -
> if (gc_readl(priv, REG_GCRBEXHR) = rbexhr &&
> priv->shared->num_interrupts = num) {
> QERROR("TIMEOUT");
^ permalink raw reply
* Re: [PATCH] video:uvesafb: Fix oops that uvesafb try to execute NX-protected page
From: Florian Tobias Schandinat @ 2012-04-12 2:22 UTC (permalink / raw)
To: Wang YanQing, linux-fbdev, linux-kernel, spock, alan
In-Reply-To: <20120401005402.GA4375@udknight>
On 04/01/2012 12:54 AM, Wang YanQing wrote:
> This patch fix the oops below that catched in my machine
>
> [ 81.560602] uvesafb: NVIDIA Corporation, GT216 Board - 0696a290, Chip Rev , OEM: NVIDIA, VBE v3.0
> [ 81.609384] uvesafb: protected mode interface info at c000:d350
> [ 81.609388] uvesafb: pmi: set display start = c00cd3b3, set palette = c00cd40e
> [ 81.609390] uvesafb: pmi: ports = 3b4 3b5 3ba 3c0 3c1 3c4 3c5 3c6 3c7 3c8 3c9 3cc 3ce 3cf 3d0 3d1 3d2 3d3 3d4 3d5 3da
> [ 81.614558] uvesafb: VBIOS/hardware doesn't support DDC transfers
> [ 81.614562] uvesafb: no monitor limits have been set, default refresh rate will be used
> [ 81.614994] uvesafb: scrolling: ypan using protected mode interface, yres_virtualI15
> [ 81.744147] kernel tried to execute NX-protected page - exploit attempt? (uid: 0)
> [ 81.744153] BUG: unable to handle kernel paging request at c00cd3b3
> [ 81.744159] IP: [<c00cd3b3>] 0xc00cd3b2
> [ 81.744167] *pdpt = 00000000016d6001 *pde = 0000000001c7b067 *pte = 80000000000cd163
> [ 81.744171] Oops: 0011 [#1] SMP
> [ 81.744174] Modules linked in: uvesafb(+) cfbcopyarea cfbimgblt cfbfillrect
> [ 81.744178]
> [ 81.744181] Pid: 3497, comm: modprobe Not tainted 3.3.0-rc4NX+ #71 Acer Aspire 4741 /Aspire 4741
> [ 81.744185] EIP: 0060:[<c00cd3b3>] EFLAGS: 00010246 CPU: 0
> [ 81.744187] EIP is at 0xc00cd3b3
> [ 81.744189] EAX: 00004f07 EBX: 00000000 ECX: 00000000 EDX: 00000000
> [ 81.744191] ESI: f763f000 EDI: f763f6e8 EBP: f57f3a0c ESP: f57f3a00
> [ 81.744192] DS: 007b ES: 007b FS: 00d8 GS: 0033 SS: 0068
> [ 81.744195] Process modprobe (pid: 3497, tiõ7f2000 task÷48c600 task.tiõ7f2000)
> [ 81.744196] Stack:
> [ 81.744197] f82512c5 f759341c 00000000 f57f3a30 c124a9bc 00000001 00000001 000001e0
> [ 81.744202] f8251280 f763f000 f7593400 00000000 f57f3a40 c12598dd f5c0c000 00000000
> [ 81.744206] f57f3b10 c1255efe c125a21a 00000006 f763f09c 00000000 c1c6cb60 f7593400
> [ 81.744210] Call Trace:
> [ 81.744215] [<f82512c5>] ? uvesafb_pan_display+0x45/0x60 [uvesafb]
> [ 81.744222] [<c124a9bc>] fb_pan_display+0x10c/0x160
> [ 81.744226] [<f8251280>] ? uvesafb_vbe_find_mode+0x180/0x180 [uvesafb]
> [ 81.744230] [<c12598dd>] bit_update_start+0x1d/0x50
> [ 81.744232] [<c1255efe>] fbcon_switch+0x39e/0x550
> [ 81.744235] [<c125a21a>] ? bit_cursor+0x4ea/0x560
> [ 81.744240] [<c129b6cb>] redraw_screen+0x12b/0x220
> [ 81.744245] [<c128843b>] ? tty_do_resize+0x3b/0xc0
> [ 81.744247] [<c129ef42>] vc_do_resize+0x3d2/0x3e0
> [ 81.744250] [<c129efb4>] vc_resize+0x14/0x20
> [ 81.744253] [<c12586bd>] fbcon_init+0x29d/0x500
> [ 81.744255] [<c12984c4>] ? set_inverse_trans_unicode+0xe4/0x110
> [ 81.744258] [<c129b378>] visual_init+0xb8/0x150
> [ 81.744261] [<c129c16c>] bind_con_driver+0x16c/0x360
> [ 81.744264] [<c129b47e>] ? register_con_driver+0x6e/0x190
> [ 81.744267] [<c129c3a1>] take_over_console+0x41/0x50
> [ 81.744269] [<c1257b7a>] fbcon_takeover+0x6a/0xd0
> [ 81.744272] [<c12594b8>] fbcon_event_notify+0x758/0x790
> [ 81.744277] [<c10929e2>] notifier_call_chain+0x42/0xb0
> [ 81.744280] [<c1092d30>] __blocking_notifier_call_chain+0x60/0x90
> [ 81.744283] [<c1092d7a>] blocking_notifier_call_chain+0x1a/0x20
> [ 81.744285] [<c124a5a1>] fb_notifier_call_chain+0x11/0x20
> [ 81.744288] [<c124b759>] register_framebuffer+0x1d9/0x2b0
> [ 81.744293] [<c1061c73>] ? ioremap_wc+0x33/0x40
> [ 81.744298] [<f82537c6>] uvesafb_probe+0xaba/0xc40 [uvesafb]
> [ 81.744302] [<c12bb81f>] platform_drv_probe+0xf/0x20
> [ 81.744306] [<c12ba558>] driver_probe_device+0x68/0x170
> [ 81.744309] [<c12ba731>] __device_attach+0x41/0x50
> [ 81.744313] [<c12b9088>] bus_for_each_drv+0x48/0x70
> [ 81.744316] [<c12ba7f3>] device_attach+0x83/0xa0
> [ 81.744319] [<c12ba6f0>] ? __driver_attach+0x90/0x90
> [ 81.744321] [<c12b991f>] bus_probe_device+0x6f/0x90
> [ 81.744324] [<c12b8a45>] device_add+0x5e5/0x680
> [ 81.744329] [<c122a1a3>] ? kvasprintf+0x43/0x60
> [ 81.744332] [<c121e6e4>] ? kobject_set_name_vargs+0x64/0x70
> [ 81.744335] [<c121e6e4>] ? kobject_set_name_vargs+0x64/0x70
> [ 81.744339] [<c12bbe9f>] platform_device_add+0xff/0x1b0
> [ 81.744343] [<f8252906>] uvesafb_init+0x50/0x9b [uvesafb]
> [ 81.744346] [<c100111f>] do_one_initcall+0x2f/0x170
> [ 81.744350] [<f82528b6>] ? uvesafb_is_valid_mode+0x66/0x66 [uvesafb]
> [ 81.744355] [<c10c6994>] sys_init_module+0xf4/0x1410
> [ 81.744359] [<c1157fc0>] ? vfsmount_lock_local_unlock_cpu+0x30/0x30
> [ 81.744363] [<c144cb10>] sysenter_do_call+0x12/0x36
> [ 81.744365] Code: f5 00 00 00 32 f6 66 8b da 66 d1 e3 66 ba d4 03 8a e3 b0 1c 66 ef b0 1e 66 ef 8a e7 b0 1d 66 ef b0 1f 66 ef e8 fa 00 00 00 61 c3 <60> e8 c8 00 00 00 66 8b f3 66 8b da 66 ba d4 03 b0 0c 8a e5 66
> [ 81.744388] EIP: [<c00cd3b3>] 0xc00cd3b3 SS:ESP 0068:f57f3a00
> [ 81.744391] CR2: 00000000c00cd3b3
> [ 81.744393] ---[ end trace 18b2c87c925b54d6 ]---
>
> Signed-off-by: Wang YanQing <udknight@gmail.com>
Applied.
Thanks,
Florian Tobias Schandinat
> ---
> drivers/video/uvesafb.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/video/uvesafb.c b/drivers/video/uvesafb.c
> index 260cca7..26e83d7 100644
> --- a/drivers/video/uvesafb.c
> +++ b/drivers/video/uvesafb.c
> @@ -815,8 +815,15 @@ static int __devinit uvesafb_vbe_init(struct fb_info *info)
> par->pmi_setpal = pmi_setpal;
> par->ypan = ypan;
>
> - if (par->pmi_setpal || par->ypan)
> - uvesafb_vbe_getpmi(task, par);
> + if (par->pmi_setpal || par->ypan) {
> + if (__supported_pte_mask & _PAGE_NX) {
> + par->pmi_setpal = par->ypan = 0;
> + printk(KERN_WARNING "uvesafb: NX protection is actively."
> + "We have better not to use the PMI.\n");
> + } else {
> + uvesafb_vbe_getpmi(task, par);
> + }
> + }
> #else
> /* The protected mode interface is not available on non-x86. */
> par->pmi_setpal = par->ypan = 0;
^ permalink raw reply
* [PATCH 1/2] video: msm: Fix section mismatches in mddi.c
From: David Brown @ 2012-04-12 18:45 UTC (permalink / raw)
To: linux-arm-kernel
The change
commit 461cbe77d0a4f887c33a3a95ea68a7daf23b4302
Author: Gregory Bean <gbean@codeaurora.org>
Date: Wed Jul 28 10:22:13 2010 -0700
video: msm: Fix section mismatch in mddi.c.
fixes a section mismatch between the board file and the driver's probe
function, however, it misses the additional mismatches between the
probe function and some routines it calls. Fix these up as well.
Signed-off-by: David Brown <davidb@codeaurora.org>
---
drivers/video/msm/mddi.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/video/msm/mddi.c b/drivers/video/msm/mddi.c
index 4527cbf..b061d70 100644
--- a/drivers/video/msm/mddi.c
+++ b/drivers/video/msm/mddi.c
@@ -420,7 +420,7 @@ static void mddi_resume(struct msm_mddi_client_data *cdata)
mddi_set_auto_hibernate(&mddi->client_data, 1);
}
-static int __init mddi_get_client_caps(struct mddi_info *mddi)
+static int __devinit mddi_get_client_caps(struct mddi_info *mddi)
{
int i, j;
@@ -622,9 +622,9 @@ uint32_t mddi_remote_read(struct msm_mddi_client_data *cdata, uint32_t reg)
static struct mddi_info mddi_info[2];
-static int __init mddi_clk_setup(struct platform_device *pdev,
- struct mddi_info *mddi,
- unsigned long clk_rate)
+static int __devinit mddi_clk_setup(struct platform_device *pdev,
+ struct mddi_info *mddi,
+ unsigned long clk_rate)
{
int ret;
--
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
^ permalink raw reply related
* [GIT PULL] fbdev fixes for 3.4
From: Florian Tobias Schandinat @ 2012-04-13 17:02 UTC (permalink / raw)
To: Linus Torvalds; +Cc: LKML, linux-fbdev@vger.kernel.org
Hi Linus,
please pull the fixes below. The fix for kyrofb is a bit large but it's just
replacing "unsigned long" by "u32" for 64 bit compatibility.
Thanks,
Florian Tobias Schandinat
The following changes since commit 0034102808e0dbbf3a2394b82b1bb40b5778de9e:
Linux 3.4-rc2 (2012-04-07 18:30:41 -0700)
are available in the git repository at:
git://github.com/schandinat/linux-2.6.git fbdev-fixes-for-3.4-1
for you to fetch changes up to b78f29ca0516266431688c5eb42d39ce42ec039a:
video:uvesafb: Fix oops that uvesafb try to execute NX-protected page
(2012-04-09 16:05:57 +0000)
----------------------------------------------------------------
fbdev fixes for 3.4
It includes:
- a compile fix for au1*fb
- a fix to make kyrofb usable on x86_64
- a fix for uvesafb to prevent an oops due to NX-protection
----------------------------------------------------------------
Manuel Lauss (1):
fbdev: fix au1*fb builds
Ondrej Zary (1):
kyrofb: fix on x86_64
Wang YanQing (1):
video:uvesafb: Fix oops that uvesafb try to execute NX-protected page
drivers/video/au1100fb.c | 5 +-
drivers/video/au1200fb.c | 2 +-
drivers/video/kyro/STG4000Reg.h | 376 +++++++++++++++++++-------------------
drivers/video/uvesafb.c | 11 +-
4 files changed, 201 insertions(+), 193 deletions(-)
^ permalink raw reply
* [PATCH] video/via: Convert to kstrtou8_from_user
From: Peter Huewe @ 2012-04-14 23:24 UTC (permalink / raw)
To: Florian Tobias Schandinat
Cc: linux-fbdev, linux-kernel, kernel-janitors, Peter Huewe
This patch replaces the code for getting an number from a
userspace buffer by a simple call to kstrou8_from_user.
This makes it easier to read and less error prone.
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
---
drivers/video/via/viafbdev.c | 26 ++++++++++----------------
1 files changed, 10 insertions(+), 16 deletions(-)
diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c
index 0c88375..5b0d524 100644
--- a/drivers/video/via/viafbdev.c
+++ b/drivers/video/via/viafbdev.c
@@ -1276,17 +1276,14 @@ static int viafb_dfph_proc_open(struct inode *inode, struct file *file)
static ssize_t viafb_dfph_proc_write(struct file *file,
const char __user *buffer, size_t count, loff_t *pos)
{
- char buf[20];
+ int err;
u8 reg_val = 0;
- unsigned long length;
if (count < 1)
return -EINVAL;
- length = count > 20 ? 20 : count;
- if (copy_from_user(&buf[0], buffer, length))
- return -EFAULT;
- buf[length - 1] = '\0'; /*Ensure end string */
- if (kstrtou8(buf, 0, ®_val) < 0)
- return -EINVAL;
+ err = kstrtou8_from_user(buffer, count, 0, ®_val);
+ if (err)
+ return err;
+
viafb_write_reg_mask(CR97, VIACR, reg_val, 0x0f);
return count;
}
@@ -1316,17 +1313,14 @@ static int viafb_dfpl_proc_open(struct inode *inode, struct file *file)
static ssize_t viafb_dfpl_proc_write(struct file *file,
const char __user *buffer, size_t count, loff_t *pos)
{
- char buf[20];
+ int err;
u8 reg_val = 0;
- unsigned long length;
if (count < 1)
return -EINVAL;
- length = count > 20 ? 20 : count;
- if (copy_from_user(&buf[0], buffer, length))
- return -EFAULT;
- buf[length - 1] = '\0'; /*Ensure end string */
- if (kstrtou8(buf, 0, ®_val) < 0)
- return -EINVAL;
+ err = kstrtou8_from_user(buffer, count, 0, ®_val);
+ if (err)
+ return err;
+
viafb_write_reg_mask(CR99, VIACR, reg_val, 0x0f);
return count;
}
--
1.7.3.4
^ permalink raw reply related
* [PATCH] video: s3c-fb: s3c_fb_missing_pixclock() can't be __devinit
From: Mark Brown @ 2012-04-15 10:39 UTC (permalink / raw)
To: linux-fbdev
Since s3c_fb_missing_pixclock() is called from s3c_fb_set_rgb_timing()
which is used in the suspend/resume paths it can't be marked __devinit
as this could result in it being discarded after boot.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
---
drivers/video/s3c-fb.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
index 18c84b8..d8f0018 100644
--- a/drivers/video/s3c-fb.c
+++ b/drivers/video/s3c-fb.c
@@ -1056,7 +1056,7 @@ static struct fb_ops s3c_fb_ops = {
*
* Calculate the pixel clock when none has been given through platform data.
*/
-static void __devinit s3c_fb_missing_pixclock(struct fb_videomode *mode)
+static void s3c_fb_missing_pixclock(struct fb_videomode *mode)
{
u64 pixclk = 1000000000000ULL;
u32 div;
--
1.7.9.1
^ permalink raw reply related
* [PATCH 1/2] video/sis: Use SiS_DRAMType from init.h and annotate it __devinitconst
From: Peter Huewe @ 2012-04-15 21:10 UTC (permalink / raw)
To: Thomas Winischhofer
Cc: Florian Tobias Schandinat, linux-fbdev, linux-kernel, Peter Huewe
This patch removes the duplicated SiS_DRAMType from sis_main.c since it
is already defined exactly the same in init.h.
Since SiS_DRAMType is const and only used by sisfb_post_300_rwtest which is
marked __devinit we can also annotate SiS_DRAMType with __devinitconst.
And since hardcoded values are bad we use ARRAY_SIZE for determining the
size of SiS_DRAMType ;)
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
---
drivers/video/sis/init.h | 2 +-
drivers/video/sis/sis_main.c | 21 +--------------------
2 files changed, 2 insertions(+), 21 deletions(-)
diff --git a/drivers/video/sis/init.h b/drivers/video/sis/init.h
index aff7384..26ffb3e 100644
--- a/drivers/video/sis/init.h
+++ b/drivers/video/sis/init.h
@@ -105,7 +105,7 @@ static const unsigned short ModeIndex_1920x1440[] = {0x68, 0x69, 0x00, 0x6b};
static const unsigned short ModeIndex_300_2048x1536[]= {0x6c, 0x6d, 0x00, 0x00};
static const unsigned short ModeIndex_310_2048x1536[]= {0x6c, 0x6d, 0x00, 0x6e};
-static const unsigned short SiS_DRAMType[17][5]={
+static const unsigned short __devinitconst SiS_DRAMType[17][5] = {
{0x0C,0x0A,0x02,0x40,0x39},
{0x0D,0x0A,0x01,0x40,0x48},
{0x0C,0x09,0x02,0x20,0x35},
diff --git a/drivers/video/sis/sis_main.c b/drivers/video/sis/sis_main.c
index 078ca21..8abd42b 100644
--- a/drivers/video/sis/sis_main.c
+++ b/drivers/video/sis/sis_main.c
@@ -4231,27 +4231,8 @@ sisfb_post_300_rwtest(struct sis_video_info *ivideo, int iteration, int buswidth
unsigned short sr14;
unsigned int k, RankCapacity, PageCapacity, BankNumHigh, BankNumMid;
unsigned int PhysicalAdrOtherPage, PhysicalAdrHigh, PhysicalAdrHalfPage;
- static const unsigned short SiS_DRAMType[17][5] = {
- {0x0C,0x0A,0x02,0x40,0x39},
- {0x0D,0x0A,0x01,0x40,0x48},
- {0x0C,0x09,0x02,0x20,0x35},
- {0x0D,0x09,0x01,0x20,0x44},
- {0x0C,0x08,0x02,0x10,0x31},
- {0x0D,0x08,0x01,0x10,0x40},
- {0x0C,0x0A,0x01,0x20,0x34},
- {0x0C,0x09,0x01,0x08,0x32},
- {0x0B,0x08,0x02,0x08,0x21},
- {0x0C,0x08,0x01,0x08,0x30},
- {0x0A,0x08,0x02,0x04,0x11},
- {0x0B,0x0A,0x01,0x10,0x28},
- {0x09,0x08,0x02,0x02,0x01},
- {0x0B,0x09,0x01,0x08,0x24},
- {0x0B,0x08,0x01,0x04,0x20},
- {0x0A,0x08,0x01,0x02,0x10},
- {0x09,0x08,0x01,0x01,0x00}
- };
- for(k = 0; k <= 16; k++) {
+ for (k = 0; k < ARRAY_SIZE(SiS_DRAMType); k++) {
RankCapacity = buswidth * SiS_DRAMType[k][3];
--
1.7.3.4
^ permalink raw reply related
* [PATCH 2/2] video/sis: Remove unused structs SiS_SDRDRAM_TYPE/SiS_DDRDRAM_TYPE
From: Peter Huewe @ 2012-04-15 21:10 UTC (permalink / raw)
To: Thomas Winischhofer
Cc: Florian Tobias Schandinat, linux-fbdev, linux-kernel, Peter Huewe
In-Reply-To: <1334524209-20518-1-git-send-email-peterhuewe@gmx.de>
This patch removes the unused structs SiS_SDRDRAM_TYPE and SiS_DDRDRAM_TYPE
from init.h
These are not used anywhere so we can delete them.
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
---
drivers/video/sis/init.h | 25 -------------------------
1 files changed, 0 insertions(+), 25 deletions(-)
diff --git a/drivers/video/sis/init.h b/drivers/video/sis/init.h
index 26ffb3e..5c5a96b 100644
--- a/drivers/video/sis/init.h
+++ b/drivers/video/sis/init.h
@@ -125,31 +125,6 @@ static const unsigned short __devinitconst SiS_DRAMType[17][5] = {
{0x09,0x08,0x01,0x01,0x00}
};
-static const unsigned short SiS_SDRDRAM_TYPE[13][5] -{
- { 2,12, 9,64,0x35},
- { 1,13, 9,64,0x44},
- { 2,12, 8,32,0x31},
- { 2,11, 9,32,0x25},
- { 1,12, 9,32,0x34},
- { 1,13, 8,32,0x40},
- { 2,11, 8,16,0x21},
- { 1,12, 8,16,0x30},
- { 1,11, 9,16,0x24},
- { 1,11, 8, 8,0x20},
- { 2, 9, 8, 4,0x01},
- { 1,10, 8, 4,0x10},
- { 1, 9, 8, 2,0x00}
-};
-
-static const unsigned short SiS_DDRDRAM_TYPE[4][5] -{
- { 2,12, 9,64,0x35},
- { 2,12, 8,32,0x31},
- { 2,11, 8,16,0x21},
- { 2, 9, 8, 4,0x01}
-};
-
static const unsigned char SiS_MDA_DAC[] {
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
--
1.7.3.4
^ permalink raw reply related
* Re: [PATCH] video: exynos_dp: add analog and pll control setting
From: Florian Tobias Schandinat @ 2012-04-15 21:40 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <001301cd1230$5c9a7910$15cf6b30$%han@samsung.com>
Hi Jingoo,
On 04/04/2012 06:58 AM, Jingoo Han wrote:
> This patch adds analog and pll control setting. This control setting
> is used for DP TX PHY block.
>
> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
> ---
> drivers/video/exynos/exynos_dp_core.h | 1 +
> drivers/video/exynos/exynos_dp_reg.c | 14 ++++++++++++++
> drivers/video/exynos/exynos_dp_reg.h | 6 ++++++
> 3 files changed, 21 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/video/exynos/exynos_dp_core.h b/drivers/video/exynos/exynos_dp_core.h
> index 90ceaca..519c3a6 100644
> --- a/drivers/video/exynos/exynos_dp_core.h
> +++ b/drivers/video/exynos/exynos_dp_core.h
> @@ -39,6 +39,7 @@ struct exynos_dp_device {
> void exynos_dp_enable_video_mute(struct exynos_dp_device *dp, bool enable);
> void exynos_dp_stop_video(struct exynos_dp_device *dp);
> void exynos_dp_lane_swap(struct exynos_dp_device *dp, bool enable);
> +void exynos_dp_init_analog_param(struct exynos_dp_device *dp);
> void exynos_dp_init_interrupt(struct exynos_dp_device *dp);
> void exynos_dp_reset(struct exynos_dp_device *dp);
> void exynos_dp_config_interrupt(struct exynos_dp_device *dp);
> diff --git a/drivers/video/exynos/exynos_dp_reg.c b/drivers/video/exynos/exynos_dp_reg.c
> index 6548afa..d9c66fd 100644
> --- a/drivers/video/exynos/exynos_dp_reg.c
> +++ b/drivers/video/exynos/exynos_dp_reg.c
> @@ -65,6 +65,19 @@ void exynos_dp_lane_swap(struct exynos_dp_device *dp, bool enable)
> writel(reg, dp->reg_base + EXYNOS_DP_LANE_MAP);
> }
>
> +void exynos_dp_init_analog_param(struct exynos_dp_device *dp)
> +{
> + writel(0x10, dp->reg_base + EXYNOS_DP_ANALOG_CTL_1);
> +
> + writel(0x0c, dp->reg_base + EXYNOS_DP_ANALOG_CTL_2);
> +
> + writel(0x85, dp->reg_base + EXYNOS_DP_ANALOG_CTL_3);
> +
> + writel(0x66, dp->reg_base + EXYNOS_DP_PLL_FILTER_CTL_1);
> +
> + writel(0x0, dp->reg_base + EXYNOS_DP_TX_AMP_TUNING_CTL);
can you please add some comments to the above what these hex magic
actually means/why you write exactly those values to the registers?
> +}
> +
> void exynos_dp_init_interrupt(struct exynos_dp_device *dp)
> {
> /* Set interrupt pin assertion polarity as high */
> @@ -131,6 +144,7 @@ void exynos_dp_reset(struct exynos_dp_device *dp)
>
> writel(0x00000101, dp->reg_base + EXYNOS_DP_SOC_GENERAL_CTL);
>
> + exynos_dp_init_analog_param(dp);
> exynos_dp_init_interrupt(dp);
> }
>
> diff --git a/drivers/video/exynos/exynos_dp_reg.h b/drivers/video/exynos/exynos_dp_reg.h
> index 42f608e..291e852 100644
> --- a/drivers/video/exynos/exynos_dp_reg.h
> +++ b/drivers/video/exynos/exynos_dp_reg.h
> @@ -24,6 +24,12 @@
>
> #define EXYNOS_DP_LANE_MAP 0x35C
>
> +#define EXYNOS_DP_ANALOG_CTL_1 0x370
> +#define EXYNOS_DP_ANALOG_CTL_2 0x374
> +#define EXYNOS_DP_ANALOG_CTL_3 0x378
> +#define EXYNOS_DP_PLL_FILTER_CTL_1 0x37C
> +#define EXYNOS_DP_TX_AMP_TUNING_CTL 0x380
> +
> #define EXYNOS_DP_AUX_HW_RETRY_CTL 0x390
>
> #define EXYNOS_DP_COMMON_INT_STA_1 0x3C4
Thanks,
Florian Tobias Schandinat
^ permalink raw reply
* Re: [PATCH] skeletonfb: fixed module exit function typo.
From: Florian Tobias Schandinat @ 2012-04-15 21:49 UTC (permalink / raw)
To: linux-fbdev
[Cc'ing linux-fbdev@vger.kernel.org]
You should always send patches also to the relevant mailing list.
On 04/12/2012 07:26 PM, Alexander Guy wrote:
> From 915c83ad50fe381661d8eebd6280a275d8dd6ac9 Mon Sep 17 00:00:00 2001
> From: Alexander Guy <alexander.guy@guy-engineering.com>
> Date: Thu, 12 Apr 2012 11:59:36 -0700
> Subject: [PATCH] skeletonfb: fixed module exit function typo.
>
>
> Signed-off-by: Alexander Guy <alexander.guy@guy-engineering.com>
> ---
> drivers/video/skeletonfb.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/video/skeletonfb.c b/drivers/video/skeletonfb.c
> index 30f7a81..5b6abc6 100644
> --- a/drivers/video/skeletonfb.c
> +++ b/drivers/video/skeletonfb.c
> @@ -1036,6 +1036,6 @@ static void __exit xxxfb_exit(void)
> */
>
> module_init(xxxfb_init);
> -module_exit(xxxfb_remove);
> +module_exit(xxxfb_exit);
>
> MODULE_LICENSE("GPL");
> --
> 1.7.9.5
Looks correct to me, applied.
Thanks,
Florian Tobias Schandinat
^ permalink raw reply
* RE: [PATCH] video: exynos_dp: add analog and pll control setting
From: Jingoo Han @ 2012-04-16 0:31 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <001301cd1230$5c9a7910$15cf6b30$%han@samsung.com>
> -----Original Message-----
> From: Florian Tobias Schandinat [mailto:FlorianSchandinat@gmx.de]
> Sent: Monday, April 16, 2012 6:40 AM
> To: Jingoo Han
> Cc: linux-fbdev@vger.kernel.org
> Subject: Re: [PATCH] video: exynos_dp: add analog and pll control setting
>
> Hi Jingoo,
>
> On 04/04/2012 06:58 AM, Jingoo Han wrote:
> > This patch adds analog and pll control setting. This control setting
> > is used for DP TX PHY block.
> >
> > Signed-off-by: Jingoo Han <jg1.han@samsung.com>
> > ---
> > drivers/video/exynos/exynos_dp_core.h | 1 +
> > drivers/video/exynos/exynos_dp_reg.c | 14 ++++++++++++++
> > drivers/video/exynos/exynos_dp_reg.h | 6 ++++++
> > 3 files changed, 21 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/video/exynos/exynos_dp_core.h b/drivers/video/exynos/exynos_dp_core.h
> > index 90ceaca..519c3a6 100644
> > --- a/drivers/video/exynos/exynos_dp_core.h
> > +++ b/drivers/video/exynos/exynos_dp_core.h
> > @@ -39,6 +39,7 @@ struct exynos_dp_device {
> > void exynos_dp_enable_video_mute(struct exynos_dp_device *dp, bool enable);
> > void exynos_dp_stop_video(struct exynos_dp_device *dp);
> > void exynos_dp_lane_swap(struct exynos_dp_device *dp, bool enable);
> > +void exynos_dp_init_analog_param(struct exynos_dp_device *dp);
> > void exynos_dp_init_interrupt(struct exynos_dp_device *dp);
> > void exynos_dp_reset(struct exynos_dp_device *dp);
> > void exynos_dp_config_interrupt(struct exynos_dp_device *dp);
> > diff --git a/drivers/video/exynos/exynos_dp_reg.c b/drivers/video/exynos/exynos_dp_reg.c
> > index 6548afa..d9c66fd 100644
> > --- a/drivers/video/exynos/exynos_dp_reg.c
> > +++ b/drivers/video/exynos/exynos_dp_reg.c
> > @@ -65,6 +65,19 @@ void exynos_dp_lane_swap(struct exynos_dp_device *dp, bool enable)
> > writel(reg, dp->reg_base + EXYNOS_DP_LANE_MAP);
> > }
> >
> > +void exynos_dp_init_analog_param(struct exynos_dp_device *dp)
> > +{
> > + writel(0x10, dp->reg_base + EXYNOS_DP_ANALOG_CTL_1);
> > +
> > + writel(0x0c, dp->reg_base + EXYNOS_DP_ANALOG_CTL_2);
> > +
> > + writel(0x85, dp->reg_base + EXYNOS_DP_ANALOG_CTL_3);
> > +
> > + writel(0x66, dp->reg_base + EXYNOS_DP_PLL_FILTER_CTL_1);
> > +
> > + writel(0x0, dp->reg_base + EXYNOS_DP_TX_AMP_TUNING_CTL);
>
> can you please add some comments to the above what these hex magic
> actually means/why you write exactly those values to the registers?
OK, I will send the patch v2.
It will include what is the meaning and why it is needed.
Thank you.
>
> > +}
> > +
> > void exynos_dp_init_interrupt(struct exynos_dp_device *dp)
> > {
> > /* Set interrupt pin assertion polarity as high */
> > @@ -131,6 +144,7 @@ void exynos_dp_reset(struct exynos_dp_device *dp)
> >
> > writel(0x00000101, dp->reg_base + EXYNOS_DP_SOC_GENERAL_CTL);
> >
> > + exynos_dp_init_analog_param(dp);
> > exynos_dp_init_interrupt(dp);
> > }
> >
> > diff --git a/drivers/video/exynos/exynos_dp_reg.h b/drivers/video/exynos/exynos_dp_reg.h
> > index 42f608e..291e852 100644
> > --- a/drivers/video/exynos/exynos_dp_reg.h
> > +++ b/drivers/video/exynos/exynos_dp_reg.h
> > @@ -24,6 +24,12 @@
> >
> > #define EXYNOS_DP_LANE_MAP 0x35C
> >
> > +#define EXYNOS_DP_ANALOG_CTL_1 0x370
> > +#define EXYNOS_DP_ANALOG_CTL_2 0x374
> > +#define EXYNOS_DP_ANALOG_CTL_3 0x378
> > +#define EXYNOS_DP_PLL_FILTER_CTL_1 0x37C
> > +#define EXYNOS_DP_TX_AMP_TUNING_CTL 0x380
> > +
> > #define EXYNOS_DP_AUX_HW_RETRY_CTL 0x390
> >
> > #define EXYNOS_DP_COMMON_INT_STA_1 0x3C4
>
> Thanks,
>
> Florian Tobias Schandinat
^ permalink raw reply
* [PATCH v2] video: exynos_dp: add analog and pll control setting
From: Jingoo Han @ 2012-04-16 0:33 UTC (permalink / raw)
To: linux-fbdev
This patch adds analog and pll control setting. This control setting
is used for DP TX PHY block to set the values as below. It is beneficial
to improve analog characteristics.
- TX terminal registor is 50 Ohm.
- Reference clock of PHY is 24 MHz.
- Power source for TX digital logic is 1.0625 V.
- Power source for internal clock driver is 1.0625 V.
- PLL VCO range setting is 600 uA.
- Power down ring osc is turned off.
- AUX terminal resistor is 50 Ohm.
- AUX channel current is 8 mA and multiplied by 2.
- TX channel output amplitude is 400 mV.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
---
drivers/video/exynos/exynos_dp_core.h | 1 +
drivers/video/exynos/exynos_dp_reg.c | 23 +++++++++++++++++++++++
drivers/video/exynos/exynos_dp_reg.h | 29 +++++++++++++++++++++++++++++
3 files changed, 53 insertions(+), 0 deletions(-)
diff --git a/drivers/video/exynos/exynos_dp_core.h b/drivers/video/exynos/exynos_dp_core.h
index 90ceaca..519c3a6 100644
--- a/drivers/video/exynos/exynos_dp_core.h
+++ b/drivers/video/exynos/exynos_dp_core.h
@@ -39,6 +39,7 @@ struct exynos_dp_device {
void exynos_dp_enable_video_mute(struct exynos_dp_device *dp, bool enable);
void exynos_dp_stop_video(struct exynos_dp_device *dp);
void exynos_dp_lane_swap(struct exynos_dp_device *dp, bool enable);
+void exynos_dp_init_analog_param(struct exynos_dp_device *dp);
void exynos_dp_init_interrupt(struct exynos_dp_device *dp);
void exynos_dp_reset(struct exynos_dp_device *dp);
void exynos_dp_config_interrupt(struct exynos_dp_device *dp);
diff --git a/drivers/video/exynos/exynos_dp_reg.c b/drivers/video/exynos/exynos_dp_reg.c
index 6548afa..38177d0 100644
--- a/drivers/video/exynos/exynos_dp_reg.c
+++ b/drivers/video/exynos/exynos_dp_reg.c
@@ -65,6 +65,28 @@ void exynos_dp_lane_swap(struct exynos_dp_device *dp, bool enable)
writel(reg, dp->reg_base + EXYNOS_DP_LANE_MAP);
}
+void exynos_dp_init_analog_param(struct exynos_dp_device *dp)
+{
+ u32 reg;
+
+ reg = TX_TERMINAL_CTRL_50_OHM;
+ writel(reg, dp->reg_base + EXYNOS_DP_ANALOG_CTL_1);
+
+ reg = SEL_24M | TX_DVDD_BIT_1_0625V;
+ writel(reg, dp->reg_base + EXYNOS_DP_ANALOG_CTL_2);
+
+ reg = DRIVE_DVDD_BIT_1_0625V | VCO_BIT_600_MICRO;
+ writel(reg, dp->reg_base + EXYNOS_DP_ANALOG_CTL_3);
+
+ reg = PD_RING_OSC | AUX_TERMINAL_CTRL_50_OHM |
+ TX_CUR1_2X | TX_CUR_8_MA;
+ writel(reg, dp->reg_base + EXYNOS_DP_PLL_FILTER_CTL_1);
+
+ reg = CH3_AMP_400_MV | CH2_AMP_400_MV |
+ CH1_AMP_400_MV | CH0_AMP_400_MV;
+ writel(reg, dp->reg_base + EXYNOS_DP_TX_AMP_TUNING_CTL);
+}
+
void exynos_dp_init_interrupt(struct exynos_dp_device *dp)
{
/* Set interrupt pin assertion polarity as high */
@@ -131,6 +153,7 @@ void exynos_dp_reset(struct exynos_dp_device *dp)
writel(0x00000101, dp->reg_base + EXYNOS_DP_SOC_GENERAL_CTL);
+ exynos_dp_init_analog_param(dp);
exynos_dp_init_interrupt(dp);
}
diff --git a/drivers/video/exynos/exynos_dp_reg.h b/drivers/video/exynos/exynos_dp_reg.h
index 42f608e..125b27c 100644
--- a/drivers/video/exynos/exynos_dp_reg.h
+++ b/drivers/video/exynos/exynos_dp_reg.h
@@ -24,6 +24,12 @@
#define EXYNOS_DP_LANE_MAP 0x35C
+#define EXYNOS_DP_ANALOG_CTL_1 0x370
+#define EXYNOS_DP_ANALOG_CTL_2 0x374
+#define EXYNOS_DP_ANALOG_CTL_3 0x378
+#define EXYNOS_DP_PLL_FILTER_CTL_1 0x37C
+#define EXYNOS_DP_TX_AMP_TUNING_CTL 0x380
+
#define EXYNOS_DP_AUX_HW_RETRY_CTL 0x390
#define EXYNOS_DP_COMMON_INT_STA_1 0x3C4
@@ -166,6 +172,29 @@
#define LANE0_MAP_LOGIC_LANE_2 (0x2 << 0)
#define LANE0_MAP_LOGIC_LANE_3 (0x3 << 0)
+/* EXYNOS_DP_ANALOG_CTL_1 */
+#define TX_TERMINAL_CTRL_50_OHM (0x1 << 4)
+
+/* EXYNOS_DP_ANALOG_CTL_2 */
+#define SEL_24M (0x1 << 3)
+#define TX_DVDD_BIT_1_0625V (0x4 << 0)
+
+/* EXYNOS_DP_ANALOG_CTL_3 */
+#define DRIVE_DVDD_BIT_1_0625V (0x4 << 5)
+#define VCO_BIT_600_MICRO (0x5 << 0)
+
+/* EXYNOS_DP_PLL_FILTER_CTL_1 */
+#define PD_RING_OSC (0x1 << 6)
+#define AUX_TERMINAL_CTRL_50_OHM (0x2 << 4)
+#define TX_CUR1_2X (0x1 << 2)
+#define TX_CUR_8_MA (0x2 << 0)
+
+/* EXYNOS_DP_TX_AMP_TUNING_CTL */
+#define CH3_AMP_400_MV (0x0 << 24)
+#define CH2_AMP_400_MV (0x0 << 16)
+#define CH1_AMP_400_MV (0x0 << 8)
+#define CH0_AMP_400_MV (0x0 << 0)
+
/* EXYNOS_DP_AUX_HW_RETRY_CTL */
#define AUX_BIT_PERIOD_EXPECTED_DELAY(x) (((x) & 0x7) << 8)
#define AUX_HW_RETRY_INTERVAL_MASK (0x3 << 3)
--
1.7.1
^ permalink raw reply related
* RE: [PATCH] video: s3c-fb: s3c_fb_missing_pixclock() can't be __devinit
From: Jingoo Han @ 2012-04-16 0:51 UTC (permalink / raw)
To: linux-fbdev
In-Reply-To: <1334486344-24073-1-git-send-email-broonie@opensource.wolfsonmicro.com>
> -----Original Message-----
> From: Mark Brown [mailto:broonie@opensource.wolfsonmicro.com]
> Sent: Sunday, April 15, 2012 7:39 PM
> To: Jingoo Han; Florian Tobias Schandinat
> Cc: linux-fbdev@vger.kernel.org; Mark Brown
> Subject: [PATCH] video: s3c-fb: s3c_fb_missing_pixclock() can't be __devinit
>
> Since s3c_fb_missing_pixclock() is called from s3c_fb_set_rgb_timing()
> which is used in the suspend/resume paths it can't be marked __devinit
> as this could result in it being discarded after boot.
>
> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
It looks good. Thank you.
Acked-by: Jingoo Han <jg1.han@samsung.com>
> ---
> drivers/video/s3c-fb.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
> index 18c84b8..d8f0018 100644
> --- a/drivers/video/s3c-fb.c
> +++ b/drivers/video/s3c-fb.c
> @@ -1056,7 +1056,7 @@ static struct fb_ops s3c_fb_ops = {
> *
> * Calculate the pixel clock when none has been given through platform data.
> */
> -static void __devinit s3c_fb_missing_pixclock(struct fb_videomode *mode)
> +static void s3c_fb_missing_pixclock(struct fb_videomode *mode)
> {
> u64 pixclk = 1000000000000ULL;
> u32 div;
> --
> 1.7.9.1
^ permalink raw reply
* [PATCH] backlight: Add LMS501KF03 LCD panel driver
From: Sachin Kamat @ 2012-04-16 6:52 UTC (permalink / raw)
To: linux-fbdev
LMS501KF03 is a 480x800 LCD module with brightness control.
The driver uses 3-wired SPI inteface.
Signed-off-by: Ilho Lee <Ilho215.lee@samsung.com>
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
---
drivers/video/backlight/Kconfig | 8 +
drivers/video/backlight/Makefile | 1 +
drivers/video/backlight/lms501kf03.c | 548 ++++++++++++++++++++++++++++++++++
3 files changed, 557 insertions(+), 0 deletions(-)
create mode 100644 drivers/video/backlight/lms501kf03.c
diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
index af16884..e216f77 100644
--- a/drivers/video/backlight/Kconfig
+++ b/drivers/video/backlight/Kconfig
@@ -125,6 +125,14 @@ config LCD_AMS369FG06
If you have an AMS369FG06 AMOLED Panel, say Y to enable its
LCD control driver.
+config LCD_LMS501KF03
+ tristate "LMS501KF03 AMOLED LCD Driver"
+ depends on SPI_GPIO && BACKLIGHT_CLASS_DEVICE
+ default n
+ help
+ If you have an 5.01" LMS501KF03 AMOLED Panel, say Y to enable its
+ LCD control driver.
+
endif # LCD_CLASS_DEVICE
#
diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
index 36855ae..1b1e62a 100644
--- a/drivers/video/backlight/Makefile
+++ b/drivers/video/backlight/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_LCD_TOSA) += tosa_lcd.o
obj-$(CONFIG_LCD_S6E63M0) += s6e63m0.o
obj-$(CONFIG_LCD_LD9040) += ld9040.o
obj-$(CONFIG_LCD_AMS369FG06) += ams369fg06.o
+obj-$(CONFIG_LCD_LMS501KF03) += lms501kf03.o
obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
obj-$(CONFIG_BACKLIGHT_ATMEL_PWM) += atmel-pwm-bl.o
diff --git a/drivers/video/backlight/lms501kf03.c b/drivers/video/backlight/lms501kf03.c
new file mode 100644
index 0000000..3dc85d4
--- /dev/null
+++ b/drivers/video/backlight/lms501kf03.c
@@ -0,0 +1,548 @@
+/*
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * LMS501KF03 5.01" LCD module driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/backlight.h>
+#include <linux/delay.h>
+#include <linux/fb.h>
+#include <linux/gpio.h>
+#include <linux/lcd.h>
+#include <linux/module.h>
+#include <linux/spi/spi.h>
+#include <linux/wait.h>
+
+#define ENDDEF 0xFF00
+#define COMMAND_ONLY 0x00
+#define DATA_ONLY 0x01
+
+#define MIN_BRIGHTNESS 0
+#define MAX_BRIGHTNESS 255
+#define DEFAULT_BRIGHTNESS 150
+
+#define POWER_IS_ON(power) ((power) <= FB_BLANK_NORMAL)
+
+struct lms501kf03 {
+ struct device *dev;
+ struct spi_device *spi;
+ unsigned int power;
+ struct lcd_device *ld;
+ struct backlight_device *bd;
+ struct lcd_platform_data *lcd_pd;
+};
+
+const unsigned short SEQ_PASSWORD[] = {
+ 0xb9, 0xff, 0x83, 0x69,
+ ENDDEF
+};
+
+const unsigned short SEQ_POWER[] = {
+ 0xb1, 0x01, 0x00, 0x34, 0x06, 0x00, 0x14, 0x14, 0x20, 0x28,
+ 0x12, 0x12, 0x17, 0x0a, 0x01, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6,
+ ENDDEF
+};
+
+const unsigned short SEQ_DISPLAY[] = {
+ 0xb2, 0x00, 0x2b, 0x03, 0x03, 0x70, 0x00, 0xff, 0x00, 0x00,
+ 0x00, 0x00, 0x03, 0x03, 0x00, 0x01,
+ ENDDEF
+};
+
+const unsigned short SEQ_RGB_IF[] = {
+ 0xb3, 0x09,
+ ENDDEF
+};
+
+const unsigned short SEQ_DISPLAY_INV[] = {
+ 0xb4, 0x01, 0x08, 0x77, 0x0e, 0x06,
+ ENDDEF
+};
+
+const unsigned short SEQ_VCOM[] = {
+ 0xb6, 0x4c, 0x2e,
+ ENDDEF
+};
+
+const unsigned short SEQ_GATE[] = {
+ 0xd5, 0x00, 0x05, 0x03, 0x29, 0x01, 0x07, 0x17, 0x68, 0x13,
+ 0x37, 0x20, 0x31, 0x8a, 0x46, 0x9b, 0x57, 0x13, 0x02, 0x75,
+ 0xb9, 0x64, 0xa8, 0x07, 0x0f, 0x04, 0x07,
+ ENDDEF
+};
+
+const unsigned short SEQ_PANEL[] = {
+ 0xcc, 0x02,
+ ENDDEF
+};
+
+const unsigned short SEQ_COL_MOD[] = {
+ 0x3a, 0x77,
+ ENDDEF
+};
+
+const unsigned short SEQ_W_GAMMA[] = {
+ 0xe0, 0x00, 0x04, 0x09, 0x0f, 0x1f, 0x3f, 0x1f, 0x2f, 0x0a,
+ 0x0f, 0x10, 0x16, 0x18, 0x16, 0x17, 0x0d, 0x15, 0x00, 0x04,
+ 0x09, 0x0f, 0x38, 0x3f, 0x20, 0x39, 0x0a, 0x0f, 0x10, 0x16,
+ 0x18, 0x16, 0x17, 0x0d, 0x15,
+ ENDDEF
+};
+
+const unsigned short SEQ_RGB_GAMMA[] = {
+ 0xc1, 0x01, 0x03, 0x07, 0x0f, 0x1a, 0x22, 0x2c, 0x33, 0x3c,
+ 0x46, 0x4f, 0x58, 0x60, 0x69, 0x71, 0x79, 0x82, 0x89, 0x92,
+ 0x9a, 0xa1, 0xa9, 0xb1, 0xb9, 0xc1, 0xc9, 0xcf, 0xd6, 0xde,
+ 0xe5, 0xec, 0xf3, 0xf9, 0xff, 0xdd, 0x39, 0x07, 0x1c, 0xcb,
+ 0xab, 0x5f, 0x49, 0x80, 0x03, 0x07, 0x0f, 0x19, 0x20, 0x2a,
+ 0x31, 0x39, 0x42, 0x4b, 0x53, 0x5b, 0x63, 0x6b, 0x73, 0x7b,
+ 0x83, 0x8a, 0x92, 0x9b, 0xa2, 0xaa, 0xb2, 0xba, 0xc2, 0xca,
+ 0xd0, 0xd8, 0xe1, 0xe8, 0xf0, 0xf8, 0xff, 0xf7, 0xd8, 0xbe,
+ 0xa7, 0x39, 0x40, 0x85, 0x8c, 0xc0, 0x04, 0x07, 0x0c, 0x17,
+ 0x1c, 0x23, 0x2b, 0x34, 0x3b, 0x43, 0x4c, 0x54, 0x5b, 0x63,
+ 0x6a, 0x73, 0x7a, 0x82, 0x8a, 0x91, 0x98, 0xa1, 0xa8, 0xb0,
+ 0xb7, 0xc1, 0xc9, 0xcf, 0xd9, 0xe3, 0xea, 0xf4, 0xff, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ ENDDEF
+};
+
+const unsigned short SEQ_UP_DN[] = {
+ 0x36, 0x10,
+ ENDDEF
+};
+
+const unsigned short SEQ_SLEEP_IN[] = {
+ 0x10,
+ ENDDEF
+};
+
+const unsigned short SEQ_SLEEP_OUT[] = {
+ 0x11,
+ ENDDEF
+};
+
+const unsigned short SEQ_DISPLAY_ON[] = {
+ 0x29,
+ ENDDEF
+};
+
+const unsigned short SEQ_DISPLAY_OFF[] = {
+ 0x10,
+ ENDDEF
+};
+
+static int lms501kf03_spi_write_byte(struct lms501kf03 *lcd, int addr, int data)
+{
+ u16 buf[1];
+ struct spi_message msg;
+
+ struct spi_transfer xfer = {
+ .len = 2,
+ .tx_buf = buf,
+ };
+
+ buf[0] = (addr << 8) | data;
+
+ spi_message_init(&msg);
+ spi_message_add_tail(&xfer, &msg);
+
+ return spi_sync(lcd->spi, &msg);
+}
+
+static int lms501kf03_spi_write(struct lms501kf03 *lcd, unsigned char address,
+ unsigned char command)
+{
+ int ret = 0;
+
+ ret = lms501kf03_spi_write_byte(lcd, address, command);
+
+ return ret;
+}
+
+static int lms501kf03_panel_send_sequence(struct lms501kf03 *lcd,
+ const unsigned short *wbuf)
+{
+ int ret = 0, i = 0;
+
+ while (wbuf[i] != ENDDEF) {
+ if (i = 0)
+ ret = lms501kf03_spi_write(lcd, COMMAND_ONLY, wbuf[i]);
+ else
+ ret = lms501kf03_spi_write(lcd, DATA_ONLY, wbuf[i]);
+ if (ret)
+ break;
+
+ udelay(100);
+ i += 1;
+ }
+ return ret;
+}
+
+static int lms501kf03_ldi_init(struct lms501kf03 *lcd)
+{
+ int ret, i;
+ const unsigned short *init_seq[] = {
+ SEQ_PASSWORD,
+ SEQ_POWER,
+ SEQ_DISPLAY,
+ SEQ_RGB_IF,
+ SEQ_DISPLAY_INV,
+ SEQ_VCOM,
+ SEQ_GATE,
+ SEQ_PANEL,
+ SEQ_COL_MOD,
+ SEQ_W_GAMMA,
+ SEQ_RGB_GAMMA,
+ SEQ_SLEEP_OUT,
+ };
+
+ for (i = 0; i < ARRAY_SIZE(init_seq); i++) {
+ ret = lms501kf03_panel_send_sequence(lcd, init_seq[i]);
+ if (ret)
+ break;
+ }
+ mdelay(120);
+
+ return ret;
+}
+
+static int lms501kf03_ldi_enable(struct lms501kf03 *lcd)
+{
+ int ret, i;
+ const unsigned short *init_seq[] = {
+ SEQ_DISPLAY_ON,
+ };
+
+ for (i = 0; i < ARRAY_SIZE(init_seq); i++) {
+ ret = lms501kf03_panel_send_sequence(lcd, init_seq[i]);
+ if (ret)
+ break;
+ }
+
+ return ret;
+}
+
+static int lms501kf03_ldi_disable(struct lms501kf03 *lcd)
+{
+ int ret, i;
+
+ const unsigned short *init_seq[] = {
+ SEQ_DISPLAY_OFF,
+ };
+
+ for (i = 0; i < ARRAY_SIZE(init_seq); i++) {
+ ret = lms501kf03_panel_send_sequence(lcd, init_seq[i]);
+ if (ret)
+ break;
+ }
+
+ return ret;
+}
+
+static int lms501kf03_power_on(struct lms501kf03 *lcd)
+{
+ int ret = 0;
+ struct lcd_platform_data *pd = NULL;
+ struct backlight_device *bd = NULL;
+
+ pd = lcd->lcd_pd;
+ if (!pd) {
+ dev_err(lcd->dev, "platform data is NULL.\n");
+ return -EFAULT;
+ }
+
+ bd = lcd->bd;
+ if (!bd) {
+ dev_err(lcd->dev, "backlight device is NULL.\n");
+ return -EFAULT;
+ }
+
+ if (!pd->power_on) {
+ dev_err(lcd->dev, "power_on is NULL.\n");
+ return -EFAULT;
+ } else {
+ pd->power_on(lcd->ld, 1);
+ mdelay(pd->power_on_delay);
+ }
+
+ if (!pd->reset) {
+ dev_err(lcd->dev, "reset is NULL.\n");
+ return -EFAULT;
+ } else {
+ pd->reset(lcd->ld);
+ mdelay(pd->reset_delay);
+ }
+
+ ret = lms501kf03_ldi_init(lcd);
+ if (ret) {
+ dev_err(lcd->dev, "failed to initialize ldi.\n");
+ return ret;
+ }
+
+ ret = lms501kf03_ldi_enable(lcd);
+ if (ret) {
+ dev_err(lcd->dev, "failed to enable ldi.\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int lms501kf03_power_off(struct lms501kf03 *lcd)
+{
+ int ret = 0;
+ struct lcd_platform_data *pd = NULL;
+
+ pd = lcd->lcd_pd;
+ if (!pd) {
+ dev_err(lcd->dev, "platform data is NULL\n");
+ return -EFAULT;
+ }
+
+ ret = lms501kf03_ldi_disable(lcd);
+ if (ret) {
+ dev_err(lcd->dev, "lcd setting failed.\n");
+ return -EIO;
+ }
+
+ mdelay(pd->power_off_delay);
+
+ if (!pd->power_on) {
+ dev_err(lcd->dev, "power_on is NULL.\n");
+ return -EFAULT;
+ } else
+ pd->power_on(lcd->ld, 0);
+
+ return 0;
+}
+
+static int lms501kf03_power(struct lms501kf03 *lcd, int power)
+{
+ int ret = 0;
+
+ if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
+ ret = lms501kf03_power_on(lcd);
+ else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
+ ret = lms501kf03_power_off(lcd);
+
+ if (!ret)
+ lcd->power = power;
+
+ return ret;
+}
+
+static int lms501kf03_get_power(struct lcd_device *ld)
+{
+ struct lms501kf03 *lcd = lcd_get_data(ld);
+
+ return lcd->power;
+}
+
+static int lms501kf03_set_power(struct lcd_device *ld, int power)
+{
+ struct lms501kf03 *lcd = lcd_get_data(ld);
+
+ if (power != FB_BLANK_UNBLANK && power != FB_BLANK_POWERDOWN &&
+ power != FB_BLANK_NORMAL) {
+ dev_err(lcd->dev, "power value should be 0, 1 or 4.\n");
+ return -EINVAL;
+ }
+
+ return lms501kf03_power(lcd, power);
+}
+
+static int lms501kf03_get_brightness(struct backlight_device *bd)
+{
+ return bd->props.brightness;
+}
+
+static int lms501kf03_set_brightness(struct backlight_device *bd)
+{
+ int ret = 0;
+ int brightness = bd->props.brightness;
+
+ if (brightness < MIN_BRIGHTNESS ||
+ brightness > bd->props.max_brightness) {
+ dev_err(&bd->dev, "lcd brightness should be %d to %d.\n",
+ MIN_BRIGHTNESS, MAX_BRIGHTNESS);
+ return -EINVAL;
+ }
+
+ return ret;
+}
+
+static struct lcd_ops lms501kf03_lcd_ops = {
+ .get_power = lms501kf03_get_power,
+ .set_power = lms501kf03_set_power,
+};
+
+static const struct backlight_ops lms501kf03_backlight_ops = {
+ .get_brightness = lms501kf03_get_brightness,
+ .update_status = lms501kf03_set_brightness,
+};
+
+static int __devinit lms501kf03_probe(struct spi_device *spi)
+{
+ struct lms501kf03 *lcd = NULL;
+ struct lcd_device *ld = NULL;
+ struct backlight_device *bd = NULL;
+ struct backlight_properties props;
+ int ret = 0;
+
+ lcd = kzalloc(sizeof(struct lms501kf03), GFP_KERNEL);
+ if (!lcd)
+ return -ENOMEM;
+
+ /* lms501kf03 lcd panel uses 3-wire 9-bit SPI Mode. */
+ spi->bits_per_word = 9;
+
+ ret = spi_setup(spi);
+ if (ret < 0) {
+ dev_err(&spi->dev, "spi setup failed.\n");
+ goto out_free_lcd;
+ }
+
+ lcd->spi = spi;
+ lcd->dev = &spi->dev;
+
+ lcd->lcd_pd = (struct lcd_platform_data *)spi->dev.platform_data;
+ if (!lcd->lcd_pd) {
+ dev_err(&spi->dev, "platform data is NULL\n");
+ goto out_free_lcd;
+ }
+
+ ld = lcd_device_register("lms501kf03", &spi->dev, lcd,
+ &lms501kf03_lcd_ops);
+ if (IS_ERR(ld)) {
+ ret = PTR_ERR(ld);
+ goto out_free_lcd;
+ }
+
+ lcd->ld = ld;
+
+ memset(&props, 0, sizeof(struct backlight_properties));
+ props.type = BACKLIGHT_RAW;
+ props.max_brightness = MAX_BRIGHTNESS;
+
+ bd = backlight_device_register("lms501kf03-bl", &spi->dev, lcd,
+ &lms501kf03_backlight_ops, &props);
+ if (IS_ERR(bd)) {
+ ret = PTR_ERR(bd);
+ goto out_lcd_unregister;
+ }
+
+ bd->props.brightness = DEFAULT_BRIGHTNESS;
+ lcd->bd = bd;
+
+ if (!lcd->lcd_pd->lcd_enabled) {
+ /*
+ * if lcd panel was off from bootloader then
+ * current lcd status is powerdown and then
+ * it enables lcd panel.
+ */
+ lcd->power = FB_BLANK_POWERDOWN;
+
+ lms501kf03_power(lcd, FB_BLANK_UNBLANK);
+ } else
+ lcd->power = FB_BLANK_UNBLANK;
+
+ dev_set_drvdata(&spi->dev, lcd);
+
+ dev_info(&spi->dev, "lms501kf03 panel driver has been probed.\n");
+
+ return 0;
+
+out_lcd_unregister:
+ lcd_device_unregister(ld);
+out_free_lcd:
+ kfree(lcd);
+ return ret;
+}
+
+static int __devexit lms501kf03_remove(struct spi_device *spi)
+{
+ struct lms501kf03 *lcd = dev_get_drvdata(&spi->dev);
+
+ lms501kf03_power(lcd, FB_BLANK_POWERDOWN);
+ lcd_device_unregister(lcd->ld);
+ kfree(lcd);
+
+ return 0;
+}
+
+#if defined(CONFIG_PM)
+unsigned int before_power;
+
+static int lms501kf03_suspend(struct spi_device *spi, pm_message_t mesg)
+{
+ int ret = 0;
+ struct lms501kf03 *lcd = dev_get_drvdata(&spi->dev);
+
+ dev_dbg(&spi->dev, "lcd->power = %d\n", lcd->power);
+
+ before_power = lcd->power;
+
+ /*
+ * when lcd panel is suspend, lcd panel becomes off
+ * regardless of status.
+ */
+ ret = lms501kf03_power(lcd, FB_BLANK_POWERDOWN);
+
+ return ret;
+}
+
+static int lms501kf03_resume(struct spi_device *spi)
+{
+ int ret = 0;
+ struct lms501kf03 *lcd = dev_get_drvdata(&spi->dev);
+
+ /*
+ * after suspended, if lcd panel status is FB_BLANK_UNBLANK
+ * (at that time, before_power is FB_BLANK_UNBLANK) then
+ * it changes that status to FB_BLANK_POWERDOWN to get lcd on.
+ */
+ if (before_power = FB_BLANK_UNBLANK)
+ lcd->power = FB_BLANK_POWERDOWN;
+
+ dev_dbg(&spi->dev, "before_power = %d\n", before_power);
+
+ ret = lms501kf03_power(lcd, before_power);
+
+ return ret;
+}
+#else
+#define lms501kf03_suspend NULL
+#define lms501kf03_resume NULL
+#endif
+
+void lms501kf03_shutdown(struct spi_device *spi)
+{
+ struct lms501kf03 *lcd = dev_get_drvdata(&spi->dev);
+
+ lms501kf03_power(lcd, FB_BLANK_POWERDOWN);
+}
+
+static struct spi_driver lms501kf03_driver = {
+ .driver = {
+ .name = "lms501kf03",
+ .bus = &spi_bus_type,
+ .owner = THIS_MODULE,
+ },
+ .probe = lms501kf03_probe,
+ .remove = __devexit_p(lms501kf03_remove),
+ .shutdown = lms501kf03_shutdown,
+ .suspend = lms501kf03_suspend,
+ .resume = lms501kf03_resume,
+};
+
+module_spi_driver(lms501kf03_driver);
+
+MODULE_AUTHOR("Ilho Lee <Ilho215.lee@samsung.com>");
+MODULE_AUTHOR("Sachin Kamat <sachin.kamat@samsung.com>");
+MODULE_DESCRIPTION("LMS501KF03 LCD Driver");
+MODULE_LICENSE("GPL");
--
1.7.4.1
^ permalink raw reply related
* [PATCH 0/6] OMAPDSS: APPLY: Treat overlay manager timings as shadow registers
From: Archit Taneja @ 2012-04-16 7:35 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, linux-fbdev, Archit Taneja
An overlay manager's timings (the manager size, and blanking parameters if an
LCD manager) are DISPC shadow registers, and they should hence follow the
correct programming model.
This set makes the timings a manager_info parameter. The interface drivers now
set the timings in manager_info instead of directly writing to registers.
This change also prevents the need to use display resolution for overlay
checks, hence making some of the APPLY functions less dependent on the display.
These patches apply over:
git://gitorious.org/linux-omap-dss2/linux.git dev
Archit Taneja (6):
OMAPDSS: DISPC/RFBI: Use dispc_mgr_set_lcd_timings() for setting lcd
size
OMAPDSS: DISPC: Use a common function to set manager timings
OMAPDSS: DISPC: Clean up manager timing/size functions
OMAPDSS: MANAGER: Make DISPC timings a manager_info parameter
OMAPDSS: MANAGER: Check validity of manager timings
OMAPDSS: APPLY: Remove display dependency from overlay and manager
checks
drivers/video/omap2/dss/apply.c | 46 +++++++++++++-----
drivers/video/omap2/dss/dispc.c | 78 +++++++++++++++++++-------------
drivers/video/omap2/dss/dpi.c | 6 ++-
drivers/video/omap2/dss/dsi.c | 11 ++++-
drivers/video/omap2/dss/dss.h | 16 +++---
drivers/video/omap2/dss/dss_features.c | 6 +++
drivers/video/omap2/dss/dss_features.h | 2 +
drivers/video/omap2/dss/hdmi.c | 6 ++-
drivers/video/omap2/dss/manager.c | 39 +++++++++++++++-
drivers/video/omap2/dss/overlay.c | 20 ++++-----
drivers/video/omap2/dss/rfbi.c | 27 ++++++++++-
drivers/video/omap2/dss/sdi.c | 5 ++-
drivers/video/omap2/dss/venc.c | 17 +++++---
include/video/omapdss.h | 2 +
14 files changed, 200 insertions(+), 81 deletions(-)
--
1.7.5.4
^ permalink raw reply
* [PATCH 1/6] OMAPDSS: DISPC/RFBI: Use dispc_mgr_set_lcd_timings() for setting lcd size
From: Archit Taneja @ 2012-04-16 7:35 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, linux-fbdev, Archit Taneja
In-Reply-To: <1334561027-28569-1-git-send-email-archit@ti.com>
The RFBI driver uses dispc_mgr_set_lcd_size() to set the width and height of
the LCD manager. Replace this to use dispc_mgr_set_lcd_timings(), pass dummy
blanking parameters like done in the DSI driver.
This prevents the need to export dispc_mgr_set_lcd_size(), and use a common
function to set lcd timings.
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/dispc.c | 3 ++-
drivers/video/omap2/dss/dss.h | 1 -
drivers/video/omap2/dss/rfbi.c | 24 ++++++++++++++++++++++--
3 files changed, 24 insertions(+), 4 deletions(-)
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index bddd64b..c6ac161 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -983,7 +983,8 @@ static void dispc_ovl_enable_replication(enum omap_plane plane, bool enable)
REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable, shift, shift);
}
-void dispc_mgr_set_lcd_size(enum omap_channel channel, u16 width, u16 height)
+static void dispc_mgr_set_lcd_size(enum omap_channel channel, u16 width,
+ u16 height)
{
u32 val;
BUG_ON((width > (1 << 11)) || (height > (1 << 11)));
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index 7080f5f..e8dea74 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -430,7 +430,6 @@ void dispc_ovl_set_channel_out(enum omap_plane plane,
enum omap_channel channel);
void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable);
-void dispc_mgr_set_lcd_size(enum omap_channel channel, u16 width, u16 height);
u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
bool dispc_mgr_go_busy(enum omap_channel channel);
diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c
index 788a0ef..97b6c4a 100644
--- a/drivers/video/omap2/dss/rfbi.c
+++ b/drivers/video/omap2/dss/rfbi.c
@@ -304,13 +304,23 @@ static void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width,
u16 height, void (*callback)(void *data), void *data)
{
u32 l;
+ struct omap_video_timings timings = {
+ .hsw = 1,
+ .hfp = 1,
+ .hbp = 1,
+ .vsw = 1,
+ .vfp = 0,
+ .vbp = 0,
+ .x_res = width,
+ .y_res = height,
+ };
/*BUG_ON(callback = 0);*/
BUG_ON(rfbi.framedone_callback != NULL);
DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
- dispc_mgr_set_lcd_size(dssdev->manager->id, width, height);
+ dispc_mgr_set_lcd_timings(dssdev->manager->id, &timings);
dispc_mgr_enable(dssdev->manager->id, true);
@@ -766,6 +776,16 @@ int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
u16 *x, u16 *y, u16 *w, u16 *h)
{
u16 dw, dh;
+ struct omap_video_timings timings = {
+ .hsw = 1,
+ .hfp = 1,
+ .hbp = 1,
+ .vsw = 1,
+ .vfp = 0,
+ .vbp = 0,
+ .x_res = *w,
+ .y_res = *h,
+ };
dssdev->driver->get_resolution(dssdev, &dw, &dh);
@@ -784,7 +804,7 @@ int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
if (*w = 0 || *h = 0)
return -EINVAL;
- dispc_mgr_set_lcd_size(dssdev->manager->id, *w, *h);
+ dispc_mgr_set_lcd_timings(dssdev->manager->id, &timings);
return 0;
}
--
1.7.5.4
^ permalink raw reply related
* [PATCH 2/6] OMAPDSS: DISPC: Use a common function to set manager timings
From: Archit Taneja @ 2012-04-16 7:35 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, linux-fbdev, Archit Taneja
In-Reply-To: <1334561027-28569-1-git-send-email-archit@ti.com>
Currently, a LCD manager's timings is set by dispc_mgr_set_lcd_timings() and TV
manager's timings is set by dispc_set_digit_size(). Use a common function called
dispc_mgr_set_timings() which sets timings for both type of managers.
We finally want the interface drivers to use an overlay manager function to
configure it's timings, having a common DISPC function would make things
cleaner.
For LCD managers, dispc_mgr_set_timings() sets LCD size and blanking values, for
TV manager, it sets only the TV size since blanking values don't exist for TV.
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/dispc.c | 43 +++++++++++++++++++++-----------------
drivers/video/omap2/dss/dpi.c | 2 +-
drivers/video/omap2/dss/dsi.c | 4 +-
drivers/video/omap2/dss/dss.h | 3 +-
drivers/video/omap2/dss/hdmi.c | 3 +-
drivers/video/omap2/dss/rfbi.c | 4 +-
drivers/video/omap2/dss/sdi.c | 2 +-
drivers/video/omap2/dss/venc.c | 7 ++++-
8 files changed, 37 insertions(+), 31 deletions(-)
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index c6ac161..f1e5337 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -992,7 +992,7 @@ static void dispc_mgr_set_lcd_size(enum omap_channel channel, u16 width,
dispc_write_reg(DISPC_SIZE_MGR(channel), val);
}
-void dispc_set_digit_size(u16 width, u16 height)
+static void dispc_mgr_set_digit_size(u16 width, u16 height)
{
u32 val;
BUG_ON((width > (1 << 11)) || (height > (1 << 11)));
@@ -2341,37 +2341,42 @@ static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, int hsw,
}
/* change name to mode? */
-void dispc_mgr_set_lcd_timings(enum omap_channel channel,
+void dispc_mgr_set_timings(enum omap_channel channel,
struct omap_video_timings *timings)
{
unsigned xtot, ytot;
unsigned long ht, vt;
- if (!_dispc_lcd_timings_ok(timings->hsw, timings->hfp,
- timings->hbp, timings->vsw,
- timings->vfp, timings->vbp))
- BUG();
+ DSSDBG("channel %d xres %u yres %u\n", channel, timings->x_res,
+ timings->y_res);
+
+ if (dispc_mgr_is_lcd(channel)) {
+ if (!dispc_lcd_timings_ok(timings))
+ BUG();
- _dispc_mgr_set_lcd_timings(channel, timings->hsw, timings->hfp,
- timings->hbp, timings->vsw, timings->vfp,
- timings->vbp);
+ _dispc_mgr_set_lcd_timings(channel, timings->hsw, timings->hfp,
+ timings->hbp, timings->vsw, timings->vfp,
+ timings->vbp);
- dispc_mgr_set_lcd_size(channel, timings->x_res, timings->y_res);
+ dispc_mgr_set_lcd_size(channel, timings->x_res, timings->y_res);
- xtot = timings->x_res + timings->hfp + timings->hsw + timings->hbp;
- ytot = timings->y_res + timings->vfp + timings->vsw + timings->vbp;
+ xtot = timings->x_res + timings->hfp + timings->hsw +
+ timings->hbp;
+ ytot = timings->y_res + timings->vfp + timings->vsw +
+ timings->vbp;
- ht = (timings->pixel_clock * 1000) / xtot;
- vt = (timings->pixel_clock * 1000) / xtot / ytot;
+ ht = (timings->pixel_clock * 1000) / xtot;
+ vt = (timings->pixel_clock * 1000) / xtot / ytot;
- DSSDBG("channel %d xres %u yres %u\n", channel, timings->x_res,
- timings->y_res);
- DSSDBG("pck %u\n", timings->pixel_clock);
- DSSDBG("hsw %d hfp %d hbp %d vsw %d vfp %d vbp %d\n",
+ DSSDBG("pck %u\n", timings->pixel_clock);
+ DSSDBG("hsw %d hfp %d hbp %d vsw %d vfp %d vbp %d\n",
timings->hsw, timings->hfp, timings->hbp,
timings->vsw, timings->vfp, timings->vbp);
- DSSDBG("hsync %luHz, vsync %luHz\n", ht, vt);
+ DSSDBG("hsync %luHz, vsync %luHz\n", ht, vt);
+ } else {
+ dispc_mgr_set_digit_size(timings->x_res, timings->y_res);
+ }
}
static void dispc_mgr_set_lcd_divisor(enum omap_channel channel, u16 lck_div,
diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c
index faaf305..7dd7f9d 100644
--- a/drivers/video/omap2/dss/dpi.c
+++ b/drivers/video/omap2/dss/dpi.c
@@ -156,7 +156,7 @@ static int dpi_set_mode(struct omap_dss_device *dssdev)
t->pixel_clock = pck;
}
- dispc_mgr_set_lcd_timings(dssdev->manager->id, t);
+ dispc_mgr_set_timings(dssdev->manager->id, t);
return 0;
}
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index 0d2c53f..b6cf03c 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -4219,12 +4219,12 @@ static int dsi_display_init_dispc(struct omap_dss_device *dssdev)
dispc_mgr_enable_stallmode(dssdev->manager->id, true);
dispc_mgr_enable_fifohandcheck(dssdev->manager->id, 1);
- dispc_mgr_set_lcd_timings(dssdev->manager->id, &timings);
+ dispc_mgr_set_timings(dssdev->manager->id, &timings);
} else {
dispc_mgr_enable_stallmode(dssdev->manager->id, false);
dispc_mgr_enable_fifohandcheck(dssdev->manager->id, 0);
- dispc_mgr_set_lcd_timings(dssdev->manager->id,
+ dispc_mgr_set_timings(dssdev->manager->id,
&dssdev->panel.timings);
}
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index e8dea74..da91822 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -407,7 +407,6 @@ void dispc_disable_sidle(void);
void dispc_lcd_enable_signal_polarity(bool act_high);
void dispc_lcd_enable_signal(bool enable);
void dispc_pck_free_enable(bool enable);
-void dispc_set_digit_size(u16 width, u16 height);
void dispc_enable_fifomerge(bool enable);
void dispc_enable_gamma_table(bool enable);
void dispc_set_loadmode(enum omap_dss_load_mode mode);
@@ -442,7 +441,7 @@ void dispc_mgr_enable_stallmode(enum omap_channel channel, bool enable);
void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines);
void dispc_mgr_set_lcd_display_type(enum omap_channel channel,
enum omap_lcd_display_type type);
-void dispc_mgr_set_lcd_timings(enum omap_channel channel,
+void dispc_mgr_set_timings(enum omap_channel channel,
struct omap_video_timings *timings);
void dispc_mgr_set_pol_freq(enum omap_channel channel,
enum omap_panel_config config, u8 acbi, u8 acb);
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index c4b4f69..56f6e9c 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -376,8 +376,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
dispc_enable_gamma_table(0);
/* tv size */
- dispc_set_digit_size(dssdev->panel.timings.x_res,
- dssdev->panel.timings.y_res);
+ dispc_mgr_set_timings(dssdev->manager->id, &dssdev->panel.timings);
hdmi.ip_data.ops->video_enable(&hdmi.ip_data, 1);
diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c
index 97b6c4a..a81ffcb 100644
--- a/drivers/video/omap2/dss/rfbi.c
+++ b/drivers/video/omap2/dss/rfbi.c
@@ -320,7 +320,7 @@ static void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width,
DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
- dispc_mgr_set_lcd_timings(dssdev->manager->id, &timings);
+ dispc_mgr_set_timings(dssdev->manager->id, &timings);
dispc_mgr_enable(dssdev->manager->id, true);
@@ -804,7 +804,7 @@ int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
if (*w = 0 || *h = 0)
return -EINVAL;
- dispc_mgr_set_lcd_timings(dssdev->manager->id, &timings);
+ dispc_mgr_set_timings(dssdev->manager->id, &timings);
return 0;
}
diff --git a/drivers/video/omap2/dss/sdi.c b/drivers/video/omap2/dss/sdi.c
index 8266ca0..741b834 100644
--- a/drivers/video/omap2/dss/sdi.c
+++ b/drivers/video/omap2/dss/sdi.c
@@ -107,7 +107,7 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
}
- dispc_mgr_set_lcd_timings(dssdev->manager->id, t);
+ dispc_mgr_set_timings(dssdev->manager->id, t);
r = dss_set_clock_div(&dss_cinfo);
if (r)
diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c
index 13a20da..30bbb63 100644
--- a/drivers/video/omap2/dss/venc.c
+++ b/drivers/video/omap2/dss/venc.c
@@ -421,6 +421,7 @@ static int venc_power_on(struct omap_dss_device *dssdev)
{
u32 l;
int r;
+ struct omap_video_timings timings;
venc_reset();
venc_write_config(venc_timings_to_config(&dssdev->panel.timings));
@@ -440,8 +441,10 @@ static int venc_power_on(struct omap_dss_device *dssdev)
venc_write_reg(VENC_OUTPUT_CONTROL, l);
- dispc_set_digit_size(dssdev->panel.timings.x_res,
- dssdev->panel.timings.y_res/2);
+ timings = dssdev->panel.timings;
+ timings.y_res /= 2;
+
+ dispc_mgr_set_timings(dssdev->manager->id, &timings);
r = regulator_enable(venc.vdda_dac_reg);
if (r)
--
1.7.5.4
^ permalink raw reply related
* [PATCH 3/6] OMAPDSS: DISPC: Clean up manager timing/size functions
From: Archit Taneja @ 2012-04-16 7:35 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, linux-fbdev, Archit Taneja
In-Reply-To: <1334561027-28569-1-git-send-email-archit@ti.com>
Clean up the DISPC manager timings related function by:
- Create a common function to set size for LCD and TV.
- Create a common function to check timings for LCD and TV.
- Add dss params to get the range of manager size.
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/dispc.c | 47 +++++++++++++++++--------------
drivers/video/omap2/dss/dpi.c | 2 +-
drivers/video/omap2/dss/dss.h | 3 +-
drivers/video/omap2/dss/dss_features.c | 6 ++++
drivers/video/omap2/dss/dss_features.h | 2 +
5 files changed, 37 insertions(+), 23 deletions(-)
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index f1e5337..46bcb55 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -983,21 +983,13 @@ static void dispc_ovl_enable_replication(enum omap_plane plane, bool enable)
REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable, shift, shift);
}
-static void dispc_mgr_set_lcd_size(enum omap_channel channel, u16 width,
+static void dispc_mgr_set_size(enum omap_channel channel, u16 width,
u16 height)
{
u32 val;
- BUG_ON((width > (1 << 11)) || (height > (1 << 11)));
- val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0);
- dispc_write_reg(DISPC_SIZE_MGR(channel), val);
-}
-static void dispc_mgr_set_digit_size(u16 width, u16 height)
-{
- u32 val;
- BUG_ON((width > (1 << 11)) || (height > (1 << 11)));
val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0);
- dispc_write_reg(DISPC_SIZE_MGR(OMAP_DSS_CHANNEL_DIGIT), val);
+ dispc_write_reg(DISPC_SIZE_MGR(channel), val);
}
static void dispc_read_plane_fifo_sizes(void)
@@ -2286,6 +2278,12 @@ void dispc_mgr_enable_stallmode(enum omap_channel channel, bool enable)
REG_FLD_MOD(DISPC_CONTROL, enable, 11, 11);
}
+static bool _dispc_mgr_size_ok(u16 width, u16 height)
+{
+ return width <= dss_feat_get_param_max(FEAT_PARAM_MGR_WIDTH) &&
+ height <= dss_feat_get_param_max(FEAT_PARAM_MGR_HEIGHT);
+}
+
static bool _dispc_lcd_timings_ok(int hsw, int hfp, int hbp,
int vsw, int vfp, int vbp)
{
@@ -2310,11 +2308,20 @@ static bool _dispc_lcd_timings_ok(int hsw, int hfp, int hbp,
return true;
}
-bool dispc_lcd_timings_ok(struct omap_video_timings *timings)
+bool dispc_mgr_timings_ok(enum omap_channel channel,
+ struct omap_video_timings *timings)
{
- return _dispc_lcd_timings_ok(timings->hsw, timings->hfp,
- timings->hbp, timings->vsw,
- timings->vfp, timings->vbp);
+ bool timings_ok;
+
+ timings_ok = _dispc_mgr_size_ok(timings->x_res, timings->y_res);
+
+ if (dispc_mgr_is_lcd(channel))
+ timings_ok = timings_ok && _dispc_lcd_timings_ok(timings->hsw,
+ timings->hfp, timings->hbp,
+ timings->vsw, timings->vfp,
+ timings->vbp);
+
+ return timings_ok;
}
static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, int hsw,
@@ -2350,16 +2357,14 @@ void dispc_mgr_set_timings(enum omap_channel channel,
DSSDBG("channel %d xres %u yres %u\n", channel, timings->x_res,
timings->y_res);
- if (dispc_mgr_is_lcd(channel)) {
- if (!dispc_lcd_timings_ok(timings))
- BUG();
+ if (!dispc_mgr_timings_ok(channel, timings))
+ BUG();
+ if (dispc_mgr_is_lcd(channel)) {
_dispc_mgr_set_lcd_timings(channel, timings->hsw, timings->hfp,
timings->hbp, timings->vsw, timings->vfp,
timings->vbp);
- dispc_mgr_set_lcd_size(channel, timings->x_res, timings->y_res);
-
xtot = timings->x_res + timings->hfp + timings->hsw +
timings->hbp;
ytot = timings->y_res + timings->vfp + timings->vsw +
@@ -2374,9 +2379,9 @@ void dispc_mgr_set_timings(enum omap_channel channel,
timings->vsw, timings->vfp, timings->vbp);
DSSDBG("hsync %luHz, vsync %luHz\n", ht, vt);
- } else {
- dispc_mgr_set_digit_size(timings->x_res, timings->y_res);
}
+
+ dispc_mgr_set_size(channel, timings->x_res, timings->y_res);
}
static void dispc_mgr_set_lcd_divisor(enum omap_channel channel, u16 lck_div,
diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c
index 7dd7f9d..cec1166 100644
--- a/drivers/video/omap2/dss/dpi.c
+++ b/drivers/video/omap2/dss/dpi.c
@@ -312,7 +312,7 @@ int dpi_check_timings(struct omap_dss_device *dssdev,
unsigned long pck;
struct dispc_clock_info dispc_cinfo;
- if (!dispc_lcd_timings_ok(timings))
+ if (!dispc_mgr_timings_ok(dssdev->manager->id, timings))
return -EINVAL;
if (timings->pixel_clock = 0)
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index da91822..1dc336b 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -411,7 +411,8 @@ void dispc_enable_fifomerge(bool enable);
void dispc_enable_gamma_table(bool enable);
void dispc_set_loadmode(enum omap_dss_load_mode mode);
-bool dispc_lcd_timings_ok(struct omap_video_timings *timings);
+bool dispc_mgr_timings_ok(enum omap_channel channel,
+ struct omap_video_timings *timings);
unsigned long dispc_fclk_rate(void);
void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck,
struct dispc_clock_info *cinfo);
diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c
index ce14aa6..1d10a01 100644
--- a/drivers/video/omap2/dss/dss_features.c
+++ b/drivers/video/omap2/dss/dss_features.c
@@ -311,6 +311,8 @@ static const struct dss_param_range omap2_dss_param_range[] = {
* scaler cannot scale a image with width more than 768.
*/
[FEAT_PARAM_LINEWIDTH] = { 1, 768 },
+ [FEAT_PARAM_MGR_WIDTH] = { 1, 2048 },
+ [FEAT_PARAM_MGR_HEIGHT] = { 1, 2048 },
};
static const struct dss_param_range omap3_dss_param_range[] = {
@@ -324,6 +326,8 @@ static const struct dss_param_range omap3_dss_param_range[] = {
[FEAT_PARAM_DSIPLL_LPDIV] = { 1, (1 << 13) - 1},
[FEAT_PARAM_DOWNSCALE] = { 1, 4 },
[FEAT_PARAM_LINEWIDTH] = { 1, 1024 },
+ [FEAT_PARAM_MGR_WIDTH] = { 1, 2048 },
+ [FEAT_PARAM_MGR_HEIGHT] = { 1, 2048 },
};
static const struct dss_param_range omap4_dss_param_range[] = {
@@ -337,6 +341,8 @@ static const struct dss_param_range omap4_dss_param_range[] = {
[FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
[FEAT_PARAM_DOWNSCALE] = { 1, 4 },
[FEAT_PARAM_LINEWIDTH] = { 1, 2048 },
+ [FEAT_PARAM_MGR_WIDTH] = { 1, 2048 },
+ [FEAT_PARAM_MGR_HEIGHT] = { 1, 2048 },
};
static const enum dss_feat_id omap2_dss_feat_list[] = {
diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h
index c332e7d..3736367 100644
--- a/drivers/video/omap2/dss/dss_features.h
+++ b/drivers/video/omap2/dss/dss_features.h
@@ -91,6 +91,8 @@ enum dss_range_param {
FEAT_PARAM_DSIPLL_LPDIV,
FEAT_PARAM_DOWNSCALE,
FEAT_PARAM_LINEWIDTH,
+ FEAT_PARAM_MGR_WIDTH,
+ FEAT_PARAM_MGR_HEIGHT,
};
/* DSS Feature Functions */
--
1.7.5.4
^ permalink raw reply related
* [PATCH 4/6] OMAPDSS: MANAGER: Make DISPC timings a manager_info parameter
From: Archit Taneja @ 2012-04-16 7:35 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, linux-fbdev, Archit Taneja
In-Reply-To: <1334561027-28569-1-git-send-email-archit@ti.com>
DISPC manager size and DISPC manager blanking parameters(for LCD managers)
follow the shadow register programming model. Currently, they are programmed
directly by the interface drivers.
Make timings(omap_video_timing struct) an overlay_manager_info member, they are
now programmed via the apply mechanism used for programming shadow registers.
The interface driver now call the function dss_mgr_set_timings() which applies
the new timing parameters, rather than directly writing to DISPC registers.
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/dispc.c | 5 ++++-
drivers/video/omap2/dss/dpi.c | 4 +++-
drivers/video/omap2/dss/dsi.c | 11 +++++++++--
drivers/video/omap2/dss/dss.h | 4 ++--
drivers/video/omap2/dss/hdmi.c | 5 ++++-
drivers/video/omap2/dss/manager.c | 21 +++++++++++++++++++++
drivers/video/omap2/dss/rfbi.c | 7 +++++--
drivers/video/omap2/dss/sdi.c | 5 ++++-
drivers/video/omap2/dss/venc.c | 12 +++++++-----
include/video/omapdss.h | 2 ++
10 files changed, 61 insertions(+), 15 deletions(-)
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 46bcb55..63de49d 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -120,6 +120,8 @@ enum omap_color_component {
};
static void _omap_dispc_set_irqs(void);
+static void dispc_mgr_set_timings(enum omap_channel channel,
+ struct omap_video_timings *timings);
static inline void dispc_write_reg(const u16 idx, u32 val)
{
@@ -2211,6 +2213,7 @@ void dispc_mgr_setup(enum omap_channel channel,
dispc_mgr_enable_cpr(channel, info->cpr_enable);
dispc_mgr_set_cpr_coef(channel, &info->cpr_coefs);
}
+ dispc_mgr_set_timings(channel, &info->timings);
}
void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines)
@@ -2348,7 +2351,7 @@ static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, int hsw,
}
/* change name to mode? */
-void dispc_mgr_set_timings(enum omap_channel channel,
+static void dispc_mgr_set_timings(enum omap_channel channel,
struct omap_video_timings *timings)
{
unsigned xtot, ytot;
diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c
index cec1166..76e2cae 100644
--- a/drivers/video/omap2/dss/dpi.c
+++ b/drivers/video/omap2/dss/dpi.c
@@ -156,7 +156,9 @@ static int dpi_set_mode(struct omap_dss_device *dssdev)
t->pixel_clock = pck;
}
- dispc_mgr_set_timings(dssdev->manager->id, t);
+ r = dss_mgr_set_timings(dssdev->manager, t);
+ if (r)
+ return r;
return 0;
}
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index b6cf03c..fbca76c 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -4219,13 +4219,20 @@ static int dsi_display_init_dispc(struct omap_dss_device *dssdev)
dispc_mgr_enable_stallmode(dssdev->manager->id, true);
dispc_mgr_enable_fifohandcheck(dssdev->manager->id, 1);
- dispc_mgr_set_timings(dssdev->manager->id, &timings);
+ r = dss_mgr_set_timings(dssdev->manager, &timings);
+ if (r) {
+ omap_dispc_unregister_isr(dsi_framedone_irq_callback,
+ (void *) dssdev, irq);
+ return r;
+ }
} else {
dispc_mgr_enable_stallmode(dssdev->manager->id, false);
dispc_mgr_enable_fifohandcheck(dssdev->manager->id, 0);
- dispc_mgr_set_timings(dssdev->manager->id,
+ r = dss_mgr_set_timings(dssdev->manager,
&dssdev->panel.timings);
+ if (r)
+ return r;
}
dispc_mgr_set_lcd_display_type(dssdev->manager->id,
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index 1dc336b..0bff325 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -210,6 +210,8 @@ int dss_mgr_check(struct omap_overlay_manager *mgr,
struct omap_dss_device *dssdev,
struct omap_overlay_manager_info *info,
struct omap_overlay_info **overlay_infos);
+int dss_mgr_set_timings(struct omap_overlay_manager *mgr,
+ struct omap_video_timings *timings);
/* overlay */
void dss_init_overlays(struct platform_device *pdev);
@@ -442,8 +444,6 @@ void dispc_mgr_enable_stallmode(enum omap_channel channel, bool enable);
void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines);
void dispc_mgr_set_lcd_display_type(enum omap_channel channel,
enum omap_lcd_display_type type);
-void dispc_mgr_set_timings(enum omap_channel channel,
- struct omap_video_timings *timings);
void dispc_mgr_set_pol_freq(enum omap_channel channel,
enum omap_panel_config config, u8 acbi, u8 acb);
unsigned long dispc_mgr_lclk_rate(enum omap_channel channel);
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 56f6e9c..4563781 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -376,7 +376,9 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
dispc_enable_gamma_table(0);
/* tv size */
- dispc_mgr_set_timings(dssdev->manager->id, &dssdev->panel.timings);
+ r = dss_mgr_set_timings(dssdev->manager, &dssdev->panel.timings);
+ if (r)
+ goto err_mgr_set_timings;
hdmi.ip_data.ops->video_enable(&hdmi.ip_data, 1);
@@ -387,6 +389,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
return 0;
err_mgr_enable:
+err_mgr_set_timings:
hdmi.ip_data.ops->video_enable(&hdmi.ip_data, 0);
hdmi.ip_data.ops->phy_disable(&hdmi.ip_data);
hdmi.ip_data.ops->pll_disable(&hdmi.ip_data);
diff --git a/drivers/video/omap2/dss/manager.c b/drivers/video/omap2/dss/manager.c
index e736460..2c85988 100644
--- a/drivers/video/omap2/dss/manager.c
+++ b/drivers/video/omap2/dss/manager.c
@@ -684,3 +684,24 @@ int dss_mgr_check(struct omap_overlay_manager *mgr,
return 0;
}
+
+int dss_mgr_set_timings(struct omap_overlay_manager *mgr,
+ struct omap_video_timings *timings)
+{
+ int r;
+ struct omap_overlay_manager_info info;
+
+ mgr->get_manager_info(mgr, &info);
+
+ info.timings = *timings;
+
+ r = mgr->set_manager_info(mgr, &info);
+ if (r)
+ return r;
+
+ r = mgr->apply(mgr);
+ if (r)
+ return r;
+
+ return 0;
+}
diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c
index a81ffcb..588160a 100644
--- a/drivers/video/omap2/dss/rfbi.c
+++ b/drivers/video/omap2/dss/rfbi.c
@@ -320,7 +320,7 @@ static void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width,
DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
- dispc_mgr_set_timings(dssdev->manager->id, &timings);
+ dss_mgr_set_timings(dssdev->manager, &timings);
dispc_mgr_enable(dssdev->manager->id, true);
@@ -776,6 +776,7 @@ int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
u16 *x, u16 *y, u16 *w, u16 *h)
{
u16 dw, dh;
+ int r;
struct omap_video_timings timings = {
.hsw = 1,
.hfp = 1,
@@ -804,7 +805,9 @@ int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
if (*w = 0 || *h = 0)
return -EINVAL;
- dispc_mgr_set_timings(dssdev->manager->id, &timings);
+ r = dss_mgr_set_timings(dssdev->manager, &timings);
+ if (r)
+ return r;
return 0;
}
diff --git a/drivers/video/omap2/dss/sdi.c b/drivers/video/omap2/dss/sdi.c
index 741b834..2e70f46 100644
--- a/drivers/video/omap2/dss/sdi.c
+++ b/drivers/video/omap2/dss/sdi.c
@@ -107,7 +107,9 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
}
- dispc_mgr_set_timings(dssdev->manager->id, t);
+ r = dss_mgr_set_timings(dssdev->manager, t);
+ if (r)
+ goto err_set_mgr_timings;
r = dss_set_clock_div(&dss_cinfo);
if (r)
@@ -134,6 +136,7 @@ err_mgr_enable:
err_sdi_enable:
err_set_dispc_clock_div:
err_set_dss_clock_div:
+err_set_mgr_timings:
err_calc_clock_div:
dispc_runtime_put();
err_get_dispc:
diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c
index 30bbb63..073b223 100644
--- a/drivers/video/omap2/dss/venc.c
+++ b/drivers/video/omap2/dss/venc.c
@@ -444,22 +444,24 @@ static int venc_power_on(struct omap_dss_device *dssdev)
timings = dssdev->panel.timings;
timings.y_res /= 2;
- dispc_mgr_set_timings(dssdev->manager->id, &timings);
+ r = dss_mgr_set_timings(dssdev->manager, &timings);
+ if (r)
+ goto err0;
r = regulator_enable(venc.vdda_dac_reg);
if (r)
- goto err;
+ goto err1;
if (dssdev->platform_enable)
dssdev->platform_enable(dssdev);
r = dss_mgr_enable(dssdev->manager);
if (r)
- goto err;
+ goto err1;
return 0;
-err:
+err1:
venc_write_reg(VENC_OUTPUT_CONTROL, 0);
dss_set_dac_pwrdn_bgz(0);
@@ -467,7 +469,7 @@ err:
dssdev->platform_disable(dssdev);
regulator_disable(venc.vdda_dac_reg);
-
+err0:
return r;
}
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 5f36ddd..dbc62e8 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -429,6 +429,8 @@ struct omap_overlay_manager_info {
bool cpr_enable;
struct omap_dss_cpr_coefs cpr_coefs;
+
+ struct omap_video_timings timings;
};
struct omap_overlay_manager {
--
1.7.5.4
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