* Re: [RFC][PATCH V2 3/3] tegra: add pwm backlight device tree nodes
From: Thierry Reding @ 2012-07-12 10:04 UTC (permalink / raw)
To: Simon Glass
Cc: Alexandre Courbot, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
In-Reply-To: <CAPnjgZ1QbjE+-tr0c01K2feUdEE2wMBfR=bKpTxnyDOJbY8+1Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
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On Thu, Jul 12, 2012 at 11:37:33AM +0200, Simon Glass wrote:
> Hi Alex,
>
> On Mon, Jul 9, 2012 at 8:08 AM, Alexandre Courbot <acourbot@nvidia.com> wrote:
> > Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
> > ---
> > arch/arm/boot/dts/tegra20-ventana.dts | 31 +++++++++++++++++++++++++++++++
> > arch/arm/boot/dts/tegra20.dtsi | 2 +-
> > 2 files changed, 32 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
> > index be90544..c67d9e1 100644
> > --- a/arch/arm/boot/dts/tegra20-ventana.dts
> > +++ b/arch/arm/boot/dts/tegra20-ventana.dts
> > @@ -317,6 +317,37 @@
> > bus-width = <8>;
> > };
> >
>
> I would like to do something similar in U-Boot for Tegra, although
> perhaps not right away. For now I will go with something considerably
> simpler! But if this is merged into the kernel we will move to it in
> U-Boot. Anyway here are my comments:
>
> > + backlight {
> > + compatible = "pwm-backlight";
> > + brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
>
> We seem to have a lot of these - should we move to a range and step size?
These actually seem to be a little bogus. The reason for introducing the
levels was to allow calibration of these values because they in fact
usually do not scale linearly. Instead, a linear brightness increase
usually maps to something like a logarithmic (at best) increase of the
duty cycle.
> > + default-brightness-level = <12>;
> > +
> > + pwms = <&pwm 2 5000000>;
> > + pwm-names = "backlight";
> > + power-supply = <&backlight_reg>;
> > + enable-gpios = <&gpio 28 0>;
> > +
> > + power-on-sequence = "REGULATOR", "power", <1>,
> > + "DELAY", <10>,
> > + "PWM", "backlight", <1>,
> > + "GPIO", "enable", <1>;
>
> So the names REGULATOR, DELAY, etc. here are looked up through some
> existing mechanism? In general I am not a big fan of mixing strings
> and numbers in a property. Maybe something like:
>
> power_on_sequence {
> step@0 {
> phandle = <&backlight_reg>;
> enable = <1>;
> post-delay = <10>;
> }
> step@1 {
> phandle = <&pwm 2 5000000>;
> }
> step@2 {
> phandle = <&gpio 28 0>;
> enable = <1>;
> }
I actually like that a lot. What's missing from your example is a way to
specify the type of the phandle because it cannot be safely inferred.
Perhaps this could be done by just the property name:
power_on_sequence {
step@0 {
power-supply = <&backlight_reg>;
enable = <1>;
post-delay = <10>;
};
step@1 {
pwm = <&pwm 2 5000000>;
};
step@2 {
enable-gpios = <&gpio 28 0>;
enable = <1>;
};
};
However I think one of the reasons for Alex to choose his particular
representation is that people want this to be representable in the
platform data as well, which unfortunately can't deal very well with
this kind of situation.
Usually in the kernel you have one API to obtain a resource (pwm_get(),
regulator_get(), ...) which takes as an argument a device handle and a
name. For device tree, that API will lookup the resource by phandle,
while the non-DT code path typically uses a static lookup table.
It's a shame that we have to keep this kind of backwards compatibility
because it prevents these things from being represented in a logic way
in the DT sense.
Thierry
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^ permalink raw reply
* Re: [RFC][PATCH V2 3/3] tegra: add pwm backlight device tree nodes
From: Simon Glass @ 2012-07-12 9:37 UTC (permalink / raw)
To: Alexandre Courbot
Cc: Thierry Reding, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
In-Reply-To: <1341814105-20690-4-git-send-email-acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Hi Alex,
On Mon, Jul 9, 2012 at 8:08 AM, Alexandre Courbot <acourbot@nvidia.com> wrote:
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
> ---
> arch/arm/boot/dts/tegra20-ventana.dts | 31 +++++++++++++++++++++++++++++++
> arch/arm/boot/dts/tegra20.dtsi | 2 +-
> 2 files changed, 32 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
> index be90544..c67d9e1 100644
> --- a/arch/arm/boot/dts/tegra20-ventana.dts
> +++ b/arch/arm/boot/dts/tegra20-ventana.dts
> @@ -317,6 +317,37 @@
> bus-width = <8>;
> };
>
I would like to do something similar in U-Boot for Tegra, although
perhaps not right away. For now I will go with something considerably
simpler! But if this is merged into the kernel we will move to it in
U-Boot. Anyway here are my comments:
> + backlight {
> + compatible = "pwm-backlight";
> + brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
We seem to have a lot of these - should we move to a range and step size?
> + default-brightness-level = <12>;
> +
> + pwms = <&pwm 2 5000000>;
> + pwm-names = "backlight";
> + power-supply = <&backlight_reg>;
> + enable-gpios = <&gpio 28 0>;
> +
> + power-on-sequence = "REGULATOR", "power", <1>,
> + "DELAY", <10>,
> + "PWM", "backlight", <1>,
> + "GPIO", "enable", <1>;
So the names REGULATOR, DELAY, etc. here are looked up through some
existing mechanism? In general I am not a big fan of mixing strings
and numbers in a property. Maybe something like:
power_on_sequence {
step@0 {
phandle = <&backlight_reg>;
enable = <1>;
post-delay = <10>;
}
step@1 {
phandle = <&pwm 2 5000000>;
}
step@2 {
phandle = <&gpio 28 0>;
enable = <1>;
}
> + power-off-sequence = "GPIO", "enable", <0>,
> + "PWM", "backlight", <0>,
> + "DELAY", <10>,
> + "REGULATOR", "power", <0>;
> + };
> +
> + backlight_reg: fixedregulator@176 {
> + compatible = "regulator-fixed";
> + regulator-name = "backlight_regulator";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + gpio = <&gpio 176 0>;
> + startup-delay-us = <0>;
> + enable-active-high;
> + regulator-boot-off;
> + };
> +
> sound {
> compatible = "nvidia,tegra-audio-wm8903-ventana",
> "nvidia,tegra-audio-wm8903";
> diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
> index 405d167..67a6cd9 100644
> --- a/arch/arm/boot/dts/tegra20.dtsi
> +++ b/arch/arm/boot/dts/tegra20.dtsi
> @@ -123,7 +123,7 @@
> status = "disabled";
> };
>
> - pwm {
> + pwm: pwm {
> compatible = "nvidia,tegra20-pwm";
> reg = <0x7000a000 0x100>;
> #pwm-cells = <2>;
> --
> 1.7.11.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-tegra" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
Regards,
Simon
^ permalink raw reply
* Re: Device tree binding for DVFS table
From: Peter De Schrijver @ 2012-07-12 8:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20120711144449.GA23654@sirena.org.uk>
On Wed, Jul 11, 2012 at 04:44:50PM +0200, Mark Brown wrote:
> On Wed, Jul 11, 2012 at 09:03:41AM -0500, Rob Herring wrote:
>
> > I'd expect a single property with freq/volt pairs or 2 properties for
> > freq and voltage where there is a 1:1 relationship (freq N uses voltage N).
>
> I strongly agree - the current proposal is very hard to read due to the
> separation between the voltage and frequency values. Some devices do
> also need to scale multiple rails together, especially when this gets
> used for I/O devices.
>
I don't think dependencies between rails should be modelled in the same DT
nodes. We have those too in Tegra30, but as this is SoC internal, I am not
sure if it needs to be modelled in DT at all, or if we can leave it in SoC
specific code. While our current dependency is of the form 'voltage difference
between rail x and rail y must be smaller then z mV', I have been told these
dependencies might become more complicated in the future. Hence they might
need to be expressed in code anyway.
Anyway, I think voltage dependencies between rails is a related but seperate
topic from DVFS.
Cheers,
Peter.
^ permalink raw reply
* [PATCH] video: exynos_dp: fix wrong DPCD address during Link Training
From: Jingoo Han @ 2012-07-12 6:10 UTC (permalink / raw)
To: linux-fbdev
Wrong DPCD addresses were used for clock recovery during Link Training.
The training pattern should be set by TRAINING_PATTERN_SET (0x102), while
voltage swing and pre-emphasis should be set by TRAINING_LANE0_SET (0x103).
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
---
drivers/video/exynos/exynos_dp_core.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/exynos/exynos_dp_core.c b/drivers/video/exynos/exynos_dp_core.c
index 9db7b9f..bf55e51 100644
--- a/drivers/video/exynos/exynos_dp_core.c
+++ b/drivers/video/exynos/exynos_dp_core.c
@@ -304,7 +304,7 @@ static void exynos_dp_link_start(struct exynos_dp_device *dp)
buf[lane] = DPCD_PRE_EMPHASIS_PATTERN2_LEVEL0 |
DPCD_VOLTAGE_SWING_PATTERN1_LEVEL0;
exynos_dp_write_bytes_to_dpcd(dp,
- DPCD_ADDR_TRAINING_PATTERN_SET,
+ DPCD_ADDR_TRAINING_LANE0_SET,
lane_count, buf);
}
@@ -504,7 +504,7 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
buf[0] = DPCD_SCRAMBLING_DISABLED |
DPCD_TRAINING_PATTERN_2;
exynos_dp_write_byte_to_dpcd(dp,
- DPCD_ADDR_TRAINING_LANE0_SET,
+ DPCD_ADDR_TRAINING_PATTERN_SET,
buf[0]);
for (lane = 0; lane < lane_count; lane++) {
--
1.7.1
^ permalink raw reply related
* Re: Device tree binding for DVFS table
From: Prashant Gaikwad @ 2012-07-12 4:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20120711134956.GB9437@tbergstrom-lnx.Nvidia.com>
On Wednesday 11 July 2012 07:19 PM, Peter De Schrijver wrote:
> On Wed, Jul 11, 2012 at 03:08:14PM +0200, 함명주 wrote:
>>> Hi,
>>>
>>> I am working on DT binding for Tegra DVFS.
>>>
>>> For Tegra, DVFS node mainly consists of frequency and voltage pairs.
>>> Frequency in the pair may change for different process. E.g. for process
>>> 1 CPU clock frequency could be 900MHz at 1V while for process 2 it could
>>> be 1GHz at 1V.
>>> Tegra uses vendor specific ids to identify the correct frequency table.
>> Hello,
>>
>> It seems that in the example, the values in "voltage-array" and
>> "frequencies" are switched.
>>
>> Anyway, what about SoCs that reads information from IEM (or any other module)
>> to measure gate delays or some other value to set the appriorate voltage values
>> for every possible frequency? I remember some of Exynos SoCs have been doing
>> it; dynamically measure the characteristics at boot-up time and apply voltages
>> accordingly; they couldn't identify it based on the chip-id or simply by reading
>> a single register.
>>
>
> But in that case you would have a nominal voltage for each OPP which gets
> adjusted at boottime or runtime depending on the exact silicon characteristics?
> I would say the DT binding should then specify 1 table with the nominal values
> and leave the dynamics to the driver.
It makes sense or is it different than this?
> Cheers,
>
> Peter.
>
^ permalink raw reply
* Re: Device tree binding for DVFS table
From: Prashant Gaikwad @ 2012-07-12 4:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20120711144449.GA23654@sirena.org.uk>
On Wednesday 11 July 2012 08:14 PM, Mark Brown wrote:
> On Wed, Jul 11, 2012 at 09:03:41AM -0500, Rob Herring wrote:
>
>> I'd expect a single property with freq/volt pairs or 2 properties for
>> freq and voltage where there is a 1:1 relationship (freq N uses voltage N).
> I strongly agree - the current proposal is very hard to read due to the
> separation between the voltage and frequency values. Some devices do
> also need to scale multiple rails together, especially when this gets
> used for I/O devices.
Multiple rails for single clock or would it be multiple clocks?
> I'd also expect to see a range of voltages for each frequency rather
> than a specific voltage; usually things are at least characterised with
> a specified tolerance.
But then how will you determine the operating voltage for a frequency?
^ permalink raw reply
* Re: Device tree binding for DVFS table
From: Prashant Gaikwad @ 2012-07-12 4:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20120711200402.GC2772@gmail.com>
On Thursday 12 July 2012 01:34 AM, Mike Turquette wrote:
> On 20120711-15:44, Mark Brown wrote:
>> On Wed, Jul 11, 2012 at 09:03:41AM -0500, Rob Herring wrote:
>>
>>> I'd expect a single property with freq/volt pairs or 2 properties for
>>> freq and voltage where there is a 1:1 relationship (freq N uses voltage N).
>> I strongly agree - the current proposal is very hard to read due to the
>> separation between the voltage and frequency values. Some devices do
>> also need to scale multiple rails together, especially when this gets
>> used for I/O devices.
>>
>> I'd also expect to see a range of voltages for each frequency rather
>> than a specific voltage; usually things are at least characterised with
>> a specified tolerance.
> Not only should we support multiple voltage rails but also multiple
> clocks. For some devices a DVFS transition is composed of scaling
> multiple clock rates together. So some sort of clock identifier
> (phandle?) is needed as well. (forgive my ignorance on the phandle
> part, as I am a DT noob)
How about adding phandle of clock consumer node to frequency table?
> Regards,
> Mike
^ permalink raw reply
* Re: Device tree binding for DVFS table
From: Prashant Gaikwad @ 2012-07-12 4:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4FFD87BD.2030206@gmail.com>
On Wednesday 11 July 2012 07:33 PM, Rob Herring wrote:
> On 07/11/2012 07:56 AM, Prashant Gaikwad wrote:
>> Hi,
>>
>> I am working on DT binding for Tegra DVFS.
>>
>> For Tegra, DVFS node mainly consists of frequency and voltage pairs.
>> Frequency in the pair may change for different process. E.g. for process
>> 1 CPU clock frequency could be 900MHz at 1V while for process 2 it could
>> be 1GHz at 1V.
>> Tegra uses vendor specific ids to identify the correct frequency table.
>>
>> Following is the proposed binding for voltage and frequency tables used
>> in DVFS. Looking for comments/suggestions to make it generic.
>>
>> ====DVFS table node=========>> This node defines the voltage configuration for the DVFS which includes
>> the regulator and voltage array.
>>
>> Required properties:
>>
>> reg_id :<regulator phandle>;
>> voltage-table :<voltage array, values in mV>;
>>
>> #address-cells and #size-cells : To identify correct frequency table
>> using process id (or some other vendor specific way).
>>
>> ====Frequency table node=======>>
>> This node defines frequency configuration for the device DVFS.
>>
>> Required properties:
>>
>> In device node need a reference to the DVFS table node.
>>
>> dvfs : the phandle for the DVFS table node
>>
>> frequency-table@n
>> reg =<n>; dependent on address-cells and size-cells in DVFS
>> table node.
>> frequencies =<frequency array, values in MHz>;
> You are storing u32 values, why limit the resolution to MHz.
>
> Put the unit in the property names.
>
Unit can be changed, will do it.
>> }
>>
>> Example:
>> -------------------------------------------------------------------------
>>
>> cpu-dvfs-table : dvfs-table {
> This should be located with the node that the frequencies correspond to.
>
With CAR node?
>> compatible = "nvidia,tegra30-dvfs-table";
>> reg_id =<&sm0>;
>> #address-cells =<1>;
>> #size-cells =<0>;
>> voltage-array =<750 775 800 825 850 875 900 925 950 975
>> 1000 1025 1050 1100 1125>;
> The SOC is really characterized at all these voltages?
Not really, but different processes of single SoC are characterized for
different voltages and this array covers all those voltages.
>> };
>>
>> device {
>> dvfs =<&cpu-dvfs-table>;
>> frequency-table@102 {
>> reg =<0x102>;
>> frequencies =<314 314 314 456 456 456 608 608 608
>> 760 817 817 912 1000>;
> I don't see the point of repeating frequencies.
>> };
>> frequency-table@002 {
>> reg =<0x002>;
>> frequencies =<598 598 750 750 893 893 1000>;
>> };
> How do you determine the voltage for a frequency on table 2?
>
> I'd expect a single property with freq/volt pairs or 2 properties for
> freq and voltage where there is a 1:1 relationship (freq N uses voltage N).
How this will work:
voltage-array =<750 775 800 825 850 875 900 925 950 975 1000 1025 1050 1100 1125>
frequencies-1 =<314 314 314 456 456 456 608 608 608 760 817 817 912 1000>;
frequencies-2 =<598 598 750 750 893 893 1000>;
Freq and voltage has 1:1 relationship but as single voltage table is
used for different processes we have more entries in voltage table than
freq table.
Frequency table 1 is mapped till 1100mV while frequency table 2 is
mapped till 900mV only, it maintains 1:1 relationship.
About repeating frequencies, operating voltage for a frequency would be
the highest one mapped in the table.
For example, in frequency table 2 operating voltage for 750MHz would be
825mV while for 893MHz it would be 875mV. Unmapped entries could be
replaced with 0 to make reading better.
Advantage it provides is single voltage table used for multiple
frequency tables, as can be observed from above tables, operating
voltage for 314MHz in freq table 1 is 800mV while there is no frequency
in table 2 at that voltage.
I know this makes reading difficult but it provides flexibility,
I hope it explains the implementation.
> Rob
>
>> };
>>
>> Thanks& Regards,
>> Prashant G
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
^ permalink raw reply
* [GIT PULL] fbdev fixes for 3.5#2
From: Florian Tobias Schandinat @ 2012-07-11 22:41 UTC (permalink / raw)
To: Linus Torvalds; +Cc: LKML, linux-fbdev@vger.kernel.org
Hi Linus,
please pull the fixes below.
Thanks,
Florian Tobias Schandinat
The following changes since commit b67989515defba7412acff01162e5bb1f0f5923a:
video: s3c-fb: fix possible division by zero in s3c_fb_calc_pixclk (2012-06-13 17:34:16 +0000)
are available in the git repository at:
git://github.com/schandinat/linux-2.6.git fbdev-fixes-for-3.5-2
for you to fetch changes up to 373b43652150c9342168c846a1efbd81438ea241:
OMAPDSS: fix warnings if CONFIG_PM_RUNTIME=n (2012-07-08 14:00:27 +0000)
----------------------------------------------------------------
fbdev fixes for 3.5
- two fixes for OMAPDSS by Tomi Valkeinen
one to avoid warnings when runtime PM is not enabled
one workaround to dependancy issues during suspend/resume
----------------------------------------------------------------
Tomi Valkeinen (2):
OMAPDSS: Use PM notifiers for system suspend
OMAPDSS: fix warnings if CONFIG_PM_RUNTIME=n
drivers/video/omap2/dss/core.c | 43 ++++++++++++++++++++++++--------------
drivers/video/omap2/dss/dispc.c | 2 +-
drivers/video/omap2/dss/dsi.c | 2 +-
drivers/video/omap2/dss/dss.c | 2 +-
drivers/video/omap2/dss/hdmi.c | 2 +-
drivers/video/omap2/dss/rfbi.c | 2 +-
drivers/video/omap2/dss/venc.c | 2 +-
7 files changed, 33 insertions(+), 22 deletions(-)
^ permalink raw reply
* Re: [PATCH v2] of: Add videomode helper
From: Guennadi Liakhovetski @ 2012-07-11 20:40 UTC (permalink / raw)
To: Sascha Hauer
Cc: linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Laurent Pinchart,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
In-Reply-To: <20120711190414.GQ30009-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
On Wed, 11 Jul 2012, Sascha Hauer wrote:
> Hi Guennadi,
>
> On Wed, Jul 11, 2012 at 10:34:54AM +0200, Guennadi Liakhovetski wrote:
> > Hi Sascha
> >
> > > +
> > > +Optional properties:
> > > + - width-mm, height-mm: Display dimensions in mm
> > > + - hsync-active-high (bool): Hsync pulse is active high
> > > + - vsync-active-high (bool): Vsync pulse is active high
> >
> > How about
> >
> > + - hsync-active: Hsync pulse polarity: 1 for high, 0 for low
>
> I am unsure if it's good to mix this with the other bool flags like:
>
> >
> > > + - interlaced (bool): This is an interlaced mode
> > > + - doublescan (bool): This is a doublescan mode
>
> Which behave differently. 'interlaced' will be evaluated as true if
> the property is present, no matter which value it has. This might
> lead to confusion.
I don't feel strongly either way either. I don't think it'd be confusing -
you have integer properties there too, and the logic in this case is not
"active high - yes or now," but rather "active level - logical 1 (high) or
0 (low)." But as I said - that was just an idea, unless someone has strong
arguments either way - you're the original author, it's your call:-)
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
^ permalink raw reply
* Re: Device tree binding for DVFS table
From: Mike Turquette @ 2012-07-11 20:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20120711144449.GA23654@sirena.org.uk>
On 20120711-15:44, Mark Brown wrote:
> On Wed, Jul 11, 2012 at 09:03:41AM -0500, Rob Herring wrote:
>
> > I'd expect a single property with freq/volt pairs or 2 properties for
> > freq and voltage where there is a 1:1 relationship (freq N uses voltage N).
>
> I strongly agree - the current proposal is very hard to read due to the
> separation between the voltage and frequency values. Some devices do
> also need to scale multiple rails together, especially when this gets
> used for I/O devices.
>
> I'd also expect to see a range of voltages for each frequency rather
> than a specific voltage; usually things are at least characterised with
> a specified tolerance.
Not only should we support multiple voltage rails but also multiple
clocks. For some devices a DVFS transition is composed of scaling
multiple clock rates together. So some sort of clock identifier
(phandle?) is needed as well. (forgive my ignorance on the phandle
part, as I am a DT noob)
Regards,
Mike
^ permalink raw reply
* Re: [PATCH v2] of: Add videomode helper
From: Sascha Hauer @ 2012-07-11 19:04 UTC (permalink / raw)
To: Guennadi Liakhovetski
Cc: linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Laurent Pinchart,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
In-Reply-To: <Pine.LNX.4.64.1207111031200.18999-0199iw4Nj15frtckUFj5Ag@public.gmane.org>
Hi Guennadi,
On Wed, Jul 11, 2012 at 10:34:54AM +0200, Guennadi Liakhovetski wrote:
> Hi Sascha
>
> > +
> > +Optional properties:
> > + - width-mm, height-mm: Display dimensions in mm
> > + - hsync-active-high (bool): Hsync pulse is active high
> > + - vsync-active-high (bool): Vsync pulse is active high
>
> How about
>
> + - hsync-active: Hsync pulse polarity: 1 for high, 0 for low
I am unsure if it's good to mix this with the other bool flags like:
>
> > + - interlaced (bool): This is an interlaced mode
> > + - doublescan (bool): This is a doublescan mode
Which behave differently. 'interlaced' will be evaluated as true if
the property is present, no matter which value it has. This might
lead to confusion.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply
* Re: Device tree binding for DVFS table
From: Mark Brown @ 2012-07-11 14:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4FFD87BD.2030206@gmail.com>
On Wed, Jul 11, 2012 at 09:03:41AM -0500, Rob Herring wrote:
> I'd expect a single property with freq/volt pairs or 2 properties for
> freq and voltage where there is a 1:1 relationship (freq N uses voltage N).
I strongly agree - the current proposal is very hard to read due to the
separation between the voltage and frequency values. Some devices do
also need to scale multiple rails together, especially when this gets
used for I/O devices.
I'd also expect to see a range of voltages for each frequency rather
than a specific voltage; usually things are at least characterised with
a specified tolerance.
^ permalink raw reply
* Re: Device tree binding for DVFS table
From: Rob Herring @ 2012-07-11 14:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4FFD77FE.8050206@nvidia.com>
On 07/11/2012 07:56 AM, Prashant Gaikwad wrote:
> Hi,
>
> I am working on DT binding for Tegra DVFS.
>
> For Tegra, DVFS node mainly consists of frequency and voltage pairs.
> Frequency in the pair may change for different process. E.g. for process
> 1 CPU clock frequency could be 900MHz at 1V while for process 2 it could
> be 1GHz at 1V.
> Tegra uses vendor specific ids to identify the correct frequency table.
>
> Following is the proposed binding for voltage and frequency tables used
> in DVFS. Looking for comments/suggestions to make it generic.
>
> ====DVFS table node=========> This node defines the voltage configuration for the DVFS which includes
> the regulator and voltage array.
>
> Required properties:
>
> reg_id : <regulator phandle>;
> voltage-table : <voltage array, values in mV>;
>
> #address-cells and #size-cells : To identify correct frequency table
> using process id (or some other vendor specific way).
>
> ====Frequency table node=======>
> This node defines frequency configuration for the device DVFS.
>
> Required properties:
>
> In device node need a reference to the DVFS table node.
>
> dvfs : the phandle for the DVFS table node
>
> frequency-table@n
> reg = <n>; dependent on address-cells and size-cells in DVFS
> table node.
> frequencies = <frequency array, values in MHz>;
You are storing u32 values, why limit the resolution to MHz.
Put the unit in the property names.
> }
>
> Example:
> -------------------------------------------------------------------------
>
> cpu-dvfs-table : dvfs-table {
This should be located with the node that the frequencies correspond to.
> compatible = "nvidia,tegra30-dvfs-table";
> reg_id = <&sm0>;
> #address-cells = <1>;
> #size-cells = <0>;
> voltage-array = <750 775 800 825 850 875 900 925 950 975
> 1000 1025 1050 1100 1125>;
The SOC is really characterized at all these voltages?
> };
>
> device {
> dvfs = <&cpu-dvfs-table>;
> frequency-table@102 {
> reg = <0x102>;
> frequencies = <314 314 314 456 456 456 608 608 608
> 760 817 817 912 1000>;
I don't see the point of repeating frequencies.
> };
> frequency-table@002 {
> reg = <0x002>;
> frequencies = <598 598 750 750 893 893 1000>;
> };
How do you determine the voltage for a frequency on table 2?
I'd expect a single property with freq/volt pairs or 2 properties for
freq and voltage where there is a 1:1 relationship (freq N uses voltage N).
Rob
> };
>
> Thanks & Regards,
> Prashant G
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: Device tree binding for DVFS table
From: Peter De Schrijver @ 2012-07-11 13:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20748722.319671342012092123.JavaMail.weblogic@epml17>
On Wed, Jul 11, 2012 at 03:08:14PM +0200, 함명주 wrote:
> > Hi,
> >
> > I am working on DT binding for Tegra DVFS.
> >
> > For Tegra, DVFS node mainly consists of frequency and voltage pairs.
> > Frequency in the pair may change for different process. E.g. for process
> > 1 CPU clock frequency could be 900MHz at 1V while for process 2 it could
> > be 1GHz at 1V.
> > Tegra uses vendor specific ids to identify the correct frequency table.
>
> Hello,
>
> It seems that in the example, the values in "voltage-array" and
> "frequencies" are switched.
>
> Anyway, what about SoCs that reads information from IEM (or any other module)
> to measure gate delays or some other value to set the appriorate voltage values
> for every possible frequency? I remember some of Exynos SoCs have been doing
> it; dynamically measure the characteristics at boot-up time and apply voltages
> accordingly; they couldn't identify it based on the chip-id or simply by reading
> a single register.
>
But in that case you would have a nominal voltage for each OPP which gets
adjusted at boottime or runtime depending on the exact silicon characteristics?
I would say the DT binding should then specify 1 table with the nominal values
and leave the dynamics to the driver.
Cheers,
Peter.
^ permalink raw reply
* Re: Device tree binding for DVFS table
From: Peter De Schrijver @ 2012-07-11 13:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20748722.319671342012092123.JavaMail.weblogic@epml17>
On Wed, Jul 11, 2012 at 03:08:14PM +0200, 함명주 wrote:
> > Hi,
> >
> > I am working on DT binding for Tegra DVFS.
> >
> > For Tegra, DVFS node mainly consists of frequency and voltage pairs.
> > Frequency in the pair may change for different process. E.g. for process
> > 1 CPU clock frequency could be 900MHz at 1V while for process 2 it could
> > be 1GHz at 1V.
> > Tegra uses vendor specific ids to identify the correct frequency table.
>
> Hello,
>
> It seems that in the example, the values in "voltage-array" and
> "frequencies" are switched.
>
> Anyway, what about SoCs that reads information from IEM (or any other module)
> to measure gate delays or some other value to set the appriorate voltage values
> for every possible frequency? I remember some of Exynos SoCs have been doing
> it; dynamically measure the characteristics at boot-up time and apply voltages
> accordingly; they couldn't identify it based on the chip-id or simply by reading
> a single register.
But in that case you would have a nominal voltage for each OPP which gets
adjusted at boottime or runtime depending on the exact silicon characteristics?
I would say the DT binding should then specify 1 table with the nominal values
and leave the dynamics to the driver.
Cheers,
Peter.
^ permalink raw reply
* Device tree binding for DVFS table
From: Prashant Gaikwad @ 2012-07-11 13:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20748722.319671342012092123.JavaMail.weblogic@epml17>
Hi,
I am working on DT binding for Tegra DVFS.
For Tegra, DVFS node mainly consists of frequency and voltage pairs.
Frequency in the pair may change for different process. E.g. for process
1 CPU clock frequency could be 900MHz at 1V while for process 2 it could
be 1GHz at 1V.
Tegra uses vendor specific ids to identify the correct frequency table.
Following is the proposed binding for voltage and frequency tables used
in DVFS. Looking for comments/suggestions to make it generic.
====DVFS table node=========This node defines the voltage configuration for the DVFS which includes
the regulator and voltage array.
Required properties:
reg_id : <regulator phandle>;
voltage-table : <voltage array, values in mV>;
#address-cells and #size-cells : To identify correct frequency table
using process id (or some other vendor specific way).
====Frequency table node=======
This node defines frequency configuration for the device DVFS.
Required properties:
In device node need a reference to the DVFS table node.
dvfs : the phandle for the DVFS table node
frequency-table@n
reg = <n>; dependent on address-cells and size-cells in DVFS
table node.
frequencies = <frequency array, values in MHz>;
}
Example:
-------------------------------------------------------------------------
cpu-dvfs-table : dvfs-table {
compatible = "nvidia,tegra30-dvfs-table";
reg_id = <&sm0>;
#address-cells = <1>;
#size-cells = <0>;
voltage-array = <750 775 800 825 850 875 900 925 950 975
1000 1025 1050 1100 1125>;
};
device {
dvfs = <&cpu-dvfs-table>;
frequency-table@102 {
reg = <0x102>;
frequencies = <314 314 314 456 456 456 608 608
608 760 817 817 912 1000>;
};
frequency-table@002 {
reg = <0x002>;
frequencies = <598 598 750 750 893 893 1000>;
};
};
Thanks & Regards,
Prashant G
^ permalink raw reply
* Re: Device tree binding for DVFS table
From: 함명주 @ 2012-07-11 13:08 UTC (permalink / raw)
To: linux-arm-kernel
PiBIaSwNCj4NCj4gSSBhbSB3b3JraW5nIG9uIERUIGJpbmRpbmcgZm9yIFRlZ3JhIERWRlMuDQo+
DQo+IEZvciBUZWdyYSwgRFZGUyBub2RlIG1haW5seSBjb25zaXN0cyBvZiBmcmVxdWVuY3kgYW5k
IHZvbHRhZ2UgcGFpcnMuIA0KPiBGcmVxdWVuY3kgaW4gdGhlIHBhaXIgbWF5IGNoYW5nZSBmb3Ig
ZGlmZmVyZW50IHByb2Nlc3MuIEUuZy4gZm9yIHByb2Nlc3MgDQo+IDEgQ1BVIGNsb2NrIGZyZXF1
ZW5jeSBjb3VsZCBiZSA5MDBNSHogYXQgMVYgd2hpbGUgZm9yIHByb2Nlc3MgMiBpdCBjb3VsZCAN
Cj4gYmUgMUdIeiBhdCAxVi4NCj4gVGVncmEgdXNlcyB2ZW5kb3Igc3BlY2lmaWMgaWRzIHRvIGlk
ZW50aWZ5IHRoZSBjb3JyZWN0IGZyZXF1ZW5jeSB0YWJsZS4NCg0KSGVsbG8sDQoNCkl0IHNlZW1z
IHRoYXQgaW4gdGhlIGV4YW1wbGUsIHRoZSB2YWx1ZXMgaW4gInZvbHRhZ2UtYXJyYXkiIGFuZA0K
ImZyZXF1ZW5jaWVzIiBhcmUgc3dpdGNoZWQuDQoNCkFueXdheSwgd2hhdCBhYm91dCBTb0NzIHRo
YXQgcmVhZHMgaW5mb3JtYXRpb24gZnJvbSBJRU0gKG9yIGFueSBvdGhlciBtb2R1bGUpDQogdG8g
bWVhc3VyZSBnYXRlIGRlbGF5cyBvciBzb21lIG90aGVyIHZhbHVlIHRvIHNldCB0aGUgYXBwcmlv
cmF0ZSB2b2x0YWdlIHZhbHVlcw0KIGZvciBldmVyeSBwb3NzaWJsZSBmcmVxdWVuY3k/IEkgcmVt
ZW1iZXIgc29tZSBvZiBFeHlub3MgU29DcyBoYXZlIGJlZW4gZG9pbmcNCiBpdDsgZHluYW1pY2Fs
bHkgbWVhc3VyZSB0aGUgY2hhcmFjdGVyaXN0aWNzIGF0IGJvb3QtdXAgdGltZSBhbmQgYXBwbHkg
dm9sdGFnZXMNCiBhY2NvcmRpbmdseTsgdGhleSBjb3VsZG4ndCBpZGVudGlmeSBpdCBiYXNlZCBv
biB0aGUgY2hpcC1pZCBvciBzaW1wbHkgYnkgcmVhZGluZw0KIGEgc2luZ2xlIHJlZ2lzdGVyLg0K
DQoNCkNoZWVycyENCk15dW5nSm9vLg0KDQo+IA0KPiBGb2xsb3dpbmcgaXMgdGhlIHByb3Bvc2Vk
IGJpbmRpbmcgZm9yIHZvbHRhZ2UgYW5kIGZyZXF1ZW5jeSB0YWJsZXMgdXNlZCANCj4gaW4gRFZG
Uy4gTG9va2luZyBmb3IgY29tbWVudHMvc3VnZ2VzdGlvbnMgdG8gbWFrZSBpdCBnZW5lcmljLg0K
DQo
^ permalink raw reply
* Re: [PATCH v2] of: Add videomode helper
From: Guennadi Liakhovetski @ 2012-07-11 8:34 UTC (permalink / raw)
To: Sascha Hauer
Cc: linux-fbdev, devicetree-discuss, dri-devel, Grant Likely,
Laurent Pinchart, kernel, Mitch Bradley, Anatolij Gustschin
In-Reply-To: <1341388595-30672-1-git-send-email-s.hauer@pengutronix.de>
Hi Sascha
On Wed, 4 Jul 2012, Sascha Hauer wrote:
> This patch adds a helper function for parsing videomodes from the devicetree.
> The videomode can be either converted to a struct drm_display_mode or a
> struct fb_videomode.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
>
> changes since v1:
> - use hyphens instead of underscores for property names
>
> .../devicetree/bindings/video/displaymode | 40 ++++++++
> drivers/of/Kconfig | 5 +
> drivers/of/Makefile | 1 +
> drivers/of/of_videomode.c | 108 ++++++++++++++++++++
> include/linux/of_videomode.h | 19 ++++
> 5 files changed, 173 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/video/displaymode
> create mode 100644 drivers/of/of_videomode.c
> create mode 100644 include/linux/of_videomode.h
>
> diff --git a/Documentation/devicetree/bindings/video/displaymode b/Documentation/devicetree/bindings/video/displaymode
> new file mode 100644
> index 0000000..43cc17d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/video/displaymode
> @@ -0,0 +1,40 @@
> +videomode bindings
> +=========
> +
> +Required properties:
> + - xres, yres: Display resolution
> + - left-margin, right-margin, hsync-len: Horizontal Display timing parameters
> + in pixels
> + upper-margin, lower-margin, vsync-len: Vertical display timing parameters in
> + lines
> + - clock: displayclock in Hz
> +
> +Optional properties:
> + - width-mm, height-mm: Display dimensions in mm
> + - hsync-active-high (bool): Hsync pulse is active high
> + - vsync-active-high (bool): Vsync pulse is active high
How about
+ - hsync-active: Hsync pulse polarity: 1 for high, 0 for low
and similar for vsync-active? Which would then become
> + - interlaced (bool): This is an interlaced mode
> + - doublescan (bool): This is a doublescan mode
> +
> +There are different ways of describing a display mode. The devicetree representation
> +corresponds to the one used by the Linux Framebuffer framework described here in
> +Documentation/fb/framebuffer.txt. This representation has been chosen because it's
> +the only format which does not allow for inconsistent parameters.Unlike the Framebuffer
> +framework the devicetree has the clock in Hz instead of ps.
> +
> +Example:
> +
> + display@0 {
> + /* 1920x1080p24 */
> + clock = <52000000>;
> + xres = <1920>;
> + yres = <1080>;
> + left-margin = <25>;
> + right-margin = <25>;
> + hsync-len = <25>;
> + lower-margin = <2>;
> + upper-margin = <2>;
> + vsync-len = <2>;
> + hsync-active-high;
+ hsync-active = <1>;
> + };
> +
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
^ permalink raw reply
* Re: [PATCH v2 11/11] MAINTAINERS: add fblog entry
From: David Herrmann @ 2012-07-09 18:38 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-serial, linux-kernel, florianschandinat, linux-fbdev,
gregkh, alan, bonbons
In-Reply-To: <CAMuHMdX_aC1hzKf1eRqoSsQ4oALBev8p77v7++aoB2KrkOUaEw@mail.gmail.com>
Hi Geert
On Mon, Jul 9, 2012 at 9:33 AM, Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> On Sun, Jul 8, 2012 at 11:56 PM, David Herrmann
> <dh.herrmann@googlemail.com> wrote:
>> Add myself as maintainer for the fblog driver to the MAINTAINERS file.
>>
>> Signed-off-by: David Herrmann <dh.herrmann@googlemail.com>
>> ---
>> MAINTAINERS | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index ae8fe46..249b02a 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -2854,6 +2854,12 @@ F: drivers/video/
>> F: include/video/
>> F: include/linux/fb.h
>>
>> +FRAMEBUFFER LOG DRIVER
>> +M: David Herrmann <dh.herrmann@googlemail.com>
>> +L: linux-serial@vger.kernel.org
>
> Why linux-serial, and not linux-fbdev?
I thought fbcon was maintained on linux-serial as it is very related
to the vt/tty layer. If linux-fbdev is the better place, I can move
this. I CC'ed both lists, anyway.
I have actually no idea where it fits in best.
Thanks
David
^ permalink raw reply
* Re: [PATCH v2 09/11] fblog: register console driver
From: David Herrmann @ 2012-07-09 18:25 UTC (permalink / raw)
To: Joe Perches
Cc: linux-serial, linux-kernel, florianschandinat, linux-fbdev,
gregkh, alan, bonbons
In-Reply-To: <1341785361.13174.25.camel@joe2Laptop>
Hi Joe
On Mon, Jul 9, 2012 at 12:09 AM, Joe Perches <joe@perches.com> wrote:
> On Sun, 2012-07-08 at 23:56 +0200, David Herrmann wrote:
>> We want to print the kernel log to all FBs so we need a console driver.
>> This registers the driver on startup and writes all messages to all
>> registered fblog instances.
>
> Hi David. Trivia only:
>
>> diff --git a/drivers/video/console/fblog.c b/drivers/video/console/fblog.c
> []
>> @@ -47,6 +71,107 @@ static struct fblog_fb *fblog_fbs[FB_MAX];
>> static bool active = 1;
>>
>> #define to_fblog_dev(_d) container_of(_d, struct fblog_fb, dev)
>> +#define FBLOG_STR(x) x, sizeof(x) - 1
>
> That's a rather ugly macro.
But handy ;) I've removed it and replaced the call below with a local
variable which works fine too and seems to be even shorter than with
this macro.
>> +static void fblog_buf_resize(struct fblog_buf *buf, size_t width,
>> + size_t height)
>> +{
>> + u16 **lines = NULL;
>> + size_t i, j, minw, minh;
>> +
>> + if (buf->height = height && buf->width = width)
>> + return;
>> +
>> + if (width && height) {
>> + lines = kzalloc(height * sizeof(char*), GFP_KERNEL);
>
> sizeof(char *) is a bit more kernel style like.
Thanks, both fixed.
David
^ permalink raw reply
* Re: [PATCH v2 05/11] fblog: register one fblog object per framebuffer
From: David Herrmann @ 2012-07-09 17:55 UTC (permalink / raw)
To: Joe Perches
Cc: linux-serial, linux-kernel, florianschandinat, linux-fbdev,
gregkh, alan, bonbons
In-Reply-To: <1341785628.13174.28.camel@joe2Laptop>
Hi Joe
On Mon, Jul 9, 2012 at 12:13 AM, Joe Perches <joe@perches.com> wrote:
> On Sun, 2012-07-08 at 23:56 +0200, David Herrmann wrote:
>>
>
> Hi David. Trivial comments only:
>
>> diff --git a/drivers/video/console/fblog.c b/drivers/video/console/fblog.c
> []
>> @@ -23,15 +23,204 @@
>> * all fblog instances before running other graphics applications.
>> */
>
> Please add
> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
> before any #include and...
Thanks, I've added it.
>> static int __init fblog_init(void)
>> {
>> + int ret;
>> +
>> + ret = fb_register_client(&fblog_notifier);
>> + if (ret) {
>> + pr_err("fblog: cannot register framebuffer notifier");
>
> Missing newline, pr_fmt would add module name.
>
> pr_err("cannot register framebuffer notifier\n");
Fixed, too. Thanks!
David
^ permalink raw reply
* Re: [PATCH v2 04/11] fbdev: export get_fb_info()/put_fb_info()
From: David Herrmann @ 2012-07-09 17:34 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-serial, linux-kernel, florianschandinat, linux-fbdev,
gregkh, alan, bonbons
In-Reply-To: <CAMuHMdWsSqMjqDuE_qgNUjc1eCWZqLLo1GNxwLYZNih=YBFh0g@mail.gmail.com>
Hi Geert
On Mon, Jul 9, 2012 at 9:34 AM, Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> On Sun, Jul 8, 2012 at 11:56 PM, David Herrmann
> <dh.herrmann@googlemail.com> wrote:
>> --- a/drivers/video/fbmem.c
>> +++ b/drivers/video/fbmem.c
>> @@ -46,7 +46,7 @@ static DEFINE_MUTEX(registration_lock);
>> struct fb_info *registered_fb[FB_MAX] __read_mostly;
>> int num_registered_fb __read_mostly;
>>
>> -static struct fb_info *get_fb_info(unsigned int idx)
>> +struct fb_info *get_fb_info(unsigned int idx)
>> {
>> struct fb_info *fb_info;
>>
>> @@ -61,14 +61,16 @@ static struct fb_info *get_fb_info(unsigned int idx)
>>
>> return fb_info;
>> }
>> +EXPORT_SYMBOL(get_fb_info);
>
> EXPORT_SYMBOL_GPL?
Thanks, that seems more appropriate here. I've fixed it.
>> -static void put_fb_info(struct fb_info *fb_info)
>> +void put_fb_info(struct fb_info *fb_info)
>> {
>> if (!atomic_dec_and_test(&fb_info->count))
>> return;
>> if (fb_info->fbops->fb_destroy)
>> fb_info->fbops->fb_destroy(fb_info);
>> }
>> +EXPORT_SYMBOL(put_fb_info);
>
> EXPORT_SYMBOL_GPL?
Thanks
David
^ permalink raw reply
* Re: [PATCH 0/2] OMAPDSS: PM runtime fixes for 3.5-rc
From: Archit Taneja @ 2012-07-09 7:59 UTC (permalink / raw)
To: Florian Tobias Schandinat
Cc: tomi.valkeinen, jaswinder.singh, jw, linux-fbdev, linux-omap
In-Reply-To: <4FFA0549.9020802@gmx.de>
Hi Florian,
On Monday 09 July 2012 03:40 AM, Florian Tobias Schandinat wrote:
> Hi Archit,
>
> On 07/04/2012 12:43 PM, Archit Taneja wrote:
>> Hi Florian,
>>
>> These are 2 fixes which Tomi had intended to push for the coming rcs. He is
>> currently on vacation and asked me to post the patches on his behalf.
>>
>> The first patch ensures that system suspend doesn't break on OMAP if DSS is
>> enabled. The second patch prevents some warning backtraces when the kernel is
>> not built with PM runtime.
>>
>> Could you please queue these for the upcoming rc?
>
> as you sent me those patches you should have added your Signed-off-by as
> well, I added it.
> Also the first patch of this series contained 2 coding style issues
> related to braces that checkpatch complained about and also differed
> from the coding style used in those files, I fixed those as well.
> I applied both patches.
>
Thanks for the fixes and the pull. I'll be more careful the next time.
Thanks,
Archit
^ permalink raw reply
* Re: [RFC][PATCH V2 2/3] pwm_backlight: use power sequences
From: Alex Courbot @ 2012-07-09 7:48 UTC (permalink / raw)
To: Alexandre Courbot
Cc: Thierry Reding,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-fbdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
In-Reply-To: <1341814105-20690-3-git-send-email-acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Sorry, I just noticed a mistake in this patch I made while merging
another one. The following also needs to be changed, otherwise the
power-on sequence will never be executed:
diff --git a/drivers/video/backlight/pwm_bl.c
b/drivers/video/backlight/pwm_bl.c
index 1a38953..4546d23 100644
--- a/drivers/video/backlight/pwm_bl.c
+++ b/drivers/video/backlight/pwm_bl.c
@@ -65,7 +98,7 @@ static int pwm_backlight_update_status(struct
backlight_device *bl)
duty_cycle = pb->lth_brightness +
(duty_cycle * (pb->period - pb->lth_brightness) /
max);
pwm_config(pb->pwm, duty_cycle, pb->period);
- pwm_enable(pb->pwm);
+ pwm_backlight_on(bl);
}
Apologies for the inconvenience.
Alex.
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