From: Bagas Sanjaya <bagasdotme@gmail.com>
To: Tianfei Zhang <tianfei.zhang@intel.com>,
hao.wu@intel.com, trix@redhat.com, mdf@kernel.org,
yilun.xu@intel.com, linux-fpga@vger.kernel.org,
linux-doc@vger.kernel.org
Cc: corbet@lwn.net, rdunlap@infradead.org
Subject: Re: [PATCH v5 2/2] Documentation: fpga: dfl: add description of Feature ID
Date: Wed, 23 Mar 2022 19:12:13 +0700 [thread overview]
Message-ID: <08baab49-e6da-31ac-612f-df3f462df7a3@gmail.com> (raw)
In-Reply-To: <20220323085102.2297964-3-tianfei.zhang@intel.com>
On 23/03/22 15.51, Tianfei Zhang wrote:
> +Individual DFL drivers are bound DFL devices based on Feature Type and Feature ID.
> +The definition of Feature Type and Feature ID can be found:
> +
> +https://github.com/OPAE/linux-dfl-feature-id/blob/master/dfl-feature-ids.rst
> +
This doesn't answer "What is Feature Type and Feature ID?" question.
I would like to see the answer and the feature list above in the kernel
documentation.
> +If you want to add a new feature ID for FPGA DFL feature device, you must submit a pull
> +request to register a feature ID for DFL. Here is the DFL Feature ID Registry:
> +
> +https://github.com/OPAE/linux-dfl-feature-id
> +
Please explain, in this document, the PR procedure regarding feature ID
registration.
--
An old man doll... just what I always wanted! - Clara
next prev parent reply other threads:[~2022-03-23 12:14 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-23 8:51 [PATCH v5 0/2] check feature type for DFL irq parsing Tianfei Zhang
2022-03-23 8:51 ` [PATCH v5 1/2] fpga: dfl: check feature type before parse irq info Tianfei Zhang
2022-03-23 17:47 ` matthew.gerlach
2022-03-23 8:51 ` [PATCH v5 2/2] Documentation: fpga: dfl: add description of Feature ID Tianfei Zhang
2022-03-23 12:12 ` Bagas Sanjaya [this message]
2022-03-24 3:02 ` Zhang, Tianfei
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