From: Wu Hao <hao.wu@intel.com>
To: atull@kernel.org, mdf@kernel.org, linux-fpga@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: linux-api@vger.kernel.org, luwei.kang@intel.com,
yi.z.zhang@intel.com, hao.wu@intel.com
Subject: [PATCH v6 03/29] fpga: mgr: add status for fpga-manager
Date: Tue, 12 Jun 2018 18:10:17 +0800 [thread overview]
Message-ID: <1528798243-2029-4-git-send-email-hao.wu@intel.com> (raw)
In-Reply-To: <1528798243-2029-1-git-send-email-hao.wu@intel.com>
This patch adds status sysfs interface for fpga manager, it's a
read only interface which allows user to get fpga manager status,
including full/partial reconfiguration error and other status
information. It adds a status callback to fpga_manager_ops too,
allows each fpga_manager driver to define its own method to
collect latest status from hardware.
The following sysfs file is created:
* /sys/class/fpga_manager/<fpga>/status
Return status of fpga manager, including reconfiguration errors.
Signed-off-by: Wu Hao <hao.wu@intel.com>
Acked-by: Alan Tull <atull@kernel.org>
Acked-by: Moritz Fischer <mdf@kernel.org>
---
v3: add one line description for status
add status callback function to fpga_manager_ops
update fpga-mgr status if any failure or during initialization
s/INCOMPATIBLE_BS_ERR/INCOMPATIBLE_IMAGE_ERR/
v4: simply code per suggestion from Alan.
add supported status strings (and descriptions) in sysfs document.
remove unused error code (SECURE_LOAD_ERR).
v5: fix the wrong commit message and add Acked-by from Alan and Moritz.
v6: rebase.
---
Documentation/ABI/testing/sysfs-class-fpga-manager | 24 +++++++++++++++++++
drivers/fpga/fpga-mgr.c | 28 ++++++++++++++++++++++
include/linux/fpga/fpga-mgr.h | 9 +++++++
3 files changed, 61 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-class-fpga-manager b/Documentation/ABI/testing/sysfs-class-fpga-manager
index 23056c5..2aadf59 100644
--- a/Documentation/ABI/testing/sysfs-class-fpga-manager
+++ b/Documentation/ABI/testing/sysfs-class-fpga-manager
@@ -35,3 +35,27 @@ Description: Read fpga manager state as a string.
* write complete = Doing post programming steps
* write complete error = Error while doing post programming
* operating = FPGA is programmed and operating
+
+What: /sys/class/fpga_manager/<fpga>/status
+Date: June 2018
+KernelVersion: 4.18
+Contact: Wu Hao <hao.wu@intel.com>
+Description: Read fpga manager status as a string.
+ If FPGA programming operation fails, it could be caused by crc
+ error or incompatible bitstream image. The intent of this
+ interface is to provide more detailed information for FPGA
+ programming errors to userspace. This is a list of strings for
+ the supported status.
+
+ * reconfig operation error - invalid operations detected by
+ reconfiguration hardware.
+ e.g start reconfiguration
+ with errors not cleared
+ * reconfig CRC error - CRC error detected by
+ reconfiguration hardware.
+ * reconfig incompatible image - reconfiguration image is
+ incompatible with hardware
+ * reconfig IP protocol error - protocol errors detected by
+ reconfiguration hardware
+ * reconfig fifo overflow error - FIFO overflow detected by
+ reconfiguration hardware
diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c
index c1564cf..a41b07e 100644
--- a/drivers/fpga/fpga-mgr.c
+++ b/drivers/fpga/fpga-mgr.c
@@ -406,12 +406,40 @@ static ssize_t state_show(struct device *dev,
return sprintf(buf, "%s\n", state_str[mgr->state]);
}
+static ssize_t status_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct fpga_manager *mgr = to_fpga_manager(dev);
+ u64 status;
+ int len = 0;
+
+ if (!mgr->mops->status)
+ return -ENOENT;
+
+ status = mgr->mops->status(mgr);
+
+ if (status & FPGA_MGR_STATUS_OPERATION_ERR)
+ len += sprintf(buf + len, "reconfig operation error\n");
+ if (status & FPGA_MGR_STATUS_CRC_ERR)
+ len += sprintf(buf + len, "reconfig CRC error\n");
+ if (status & FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR)
+ len += sprintf(buf + len, "reconfig incompatible image\n");
+ if (status & FPGA_MGR_STATUS_IP_PROTOCOL_ERR)
+ len += sprintf(buf + len, "reconfig IP protocol error\n");
+ if (status & FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR)
+ len += sprintf(buf + len, "reconfig fifo overflow error\n");
+
+ return len;
+}
+
static DEVICE_ATTR_RO(name);
static DEVICE_ATTR_RO(state);
+static DEVICE_ATTR_RO(status);
static struct attribute *fpga_mgr_attrs[] = {
&dev_attr_name.attr,
&dev_attr_state.attr,
+ &dev_attr_status.attr,
NULL,
};
ATTRIBUTE_GROUPS(fpga_mgr);
diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
index 3eb6b9d..e249b72 100644
--- a/include/linux/fpga/fpga-mgr.h
+++ b/include/linux/fpga/fpga-mgr.h
@@ -101,6 +101,7 @@ struct fpga_image_info {
* struct fpga_manager_ops - ops for low level fpga manager drivers
* @initial_header_size: Maximum number of bytes that should be passed into write_init
* @state: returns an enum value of the FPGA's state
+ * @status: returns status of the FPGA, including reconfiguration error code
* @write_init: prepare the FPGA to receive confuration data
* @write: write count bytes of configuration data to the FPGA
* @write_sg: write the scatter list of configuration data to the FPGA
@@ -115,6 +116,7 @@ struct fpga_image_info {
struct fpga_manager_ops {
size_t initial_header_size;
enum fpga_mgr_states (*state)(struct fpga_manager *mgr);
+ u64 (*status)(struct fpga_manager *mgr);
int (*write_init)(struct fpga_manager *mgr,
struct fpga_image_info *info,
const char *buf, size_t count);
@@ -126,6 +128,13 @@ struct fpga_manager_ops {
const struct attribute_group **groups;
};
+/* FPGA manager status: Partial/Full Reconfiguration errors */
+#define FPGA_MGR_STATUS_OPERATION_ERR BIT(0)
+#define FPGA_MGR_STATUS_CRC_ERR BIT(1)
+#define FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR BIT(2)
+#define FPGA_MGR_STATUS_IP_PROTOCOL_ERR BIT(3)
+#define FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR BIT(4)
+
/**
* struct fpga_manager - fpga manager structure
* @name: name of low level fpga manager
--
1.8.3.1
next prev parent reply other threads:[~2018-06-12 10:10 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-12 10:10 [PATCH v6 00/29] FPGA Device Feature List (DFL) Device Drivers Wu Hao
2018-06-12 10:10 ` [PATCH v6 01/29] docs: fpga: add a document for FPGA Device Feature List (DFL) Framework Overview Wu Hao
2018-06-12 10:10 ` [PATCH v6 02/29] fpga: mgr: add region_id to fpga_image_info Wu Hao
2018-06-12 10:10 ` Wu Hao [this message]
2018-06-12 15:57 ` [PATCH v6 03/29] fpga: mgr: add status for fpga-manager Alan Tull
2018-06-12 10:10 ` [PATCH v6 04/29] fpga: mgr: add compat_id support Wu Hao
2018-06-12 10:10 ` [PATCH v6 05/29] fpga: region: " Wu Hao
2018-06-13 14:44 ` Moritz Fischer
2018-06-12 10:10 ` [PATCH v6 06/29] fpga: add device feature list support Wu Hao
2018-06-12 15:27 ` Randy Dunlap
2018-06-12 15:42 ` Alan Tull
2018-06-12 10:10 ` [PATCH v6 07/29] fpga: dfl: add chardev support for feature devices Wu Hao
2018-06-12 15:55 ` Alan Tull
2018-06-12 10:10 ` [PATCH v6 08/29] fpga: dfl: add dfl_fpga_cdev_find_port Wu Hao
2018-06-12 10:10 ` [PATCH v6 09/29] fpga: dfl: add feature device infrastructure Wu Hao
2018-06-12 10:10 ` [PATCH v6 10/29] fpga: dfl: add dfl_fpga_port_ops support Wu Hao
2018-06-12 10:10 ` [PATCH v6 11/29] fpga: dfl: add dfl_fpga_check_port_id function Wu Hao
2018-06-12 10:10 ` [PATCH v6 12/29] fpga: add FPGA DFL PCIe device driver Wu Hao
2018-06-12 15:27 ` Randy Dunlap
2018-06-12 23:42 ` Wu Hao
2018-06-13 13:54 ` Moritz Fischer
2018-06-13 16:34 ` Wu Hao
2018-06-12 10:10 ` [PATCH v6 13/29] fpga: dfl-pci: add enumeration for feature devices Wu Hao
2018-06-12 10:10 ` [PATCH v6 14/29] fpga: dfl: add FPGA Management Engine driver basic framework Wu Hao
2018-06-12 15:27 ` Randy Dunlap
2018-06-13 14:13 ` Moritz Fischer
2018-06-12 10:10 ` [PATCH v6 15/29] fpga: dfl: fme: add header sub feature support Wu Hao
2018-06-12 10:10 ` [PATCH v6 16/29] fpga: dfl: fme: add DFL_FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2018-06-12 10:10 ` [PATCH v6 17/29] fpga: dfl: fme: add partial reconfiguration sub feature support Wu Hao
2018-06-14 1:07 ` Moritz Fischer
2018-06-14 16:33 ` Alan Tull
2018-06-15 5:52 ` Wu Hao
2018-06-12 10:10 ` [PATCH v6 18/29] fpga: dfl: add fpga manager platform driver for FME Wu Hao
2018-06-14 1:16 ` Moritz Fischer
2018-06-14 13:50 ` Wu Hao
2018-06-12 10:10 ` [PATCH v6 19/29] fpga: dfl: fme-mgr: add compat_id support Wu Hao
2018-06-13 20:08 ` Moritz Fischer
2018-06-12 10:10 ` [PATCH v6 20/29] fpga: dfl: add fpga bridge platform driver for FME Wu Hao
2018-06-12 10:10 ` [PATCH v6 21/29] fpga: dfl: add fpga region " Wu Hao
2018-06-12 10:10 ` [PATCH v6 22/29] fpga: dfl: fme-region: add support for compat_id Wu Hao
2018-06-13 14:18 ` Moritz Fischer
2018-06-12 10:10 ` [PATCH v6 23/29] fpga: dfl: add FPGA Accelerated Function Unit driver basic framework Wu Hao
2018-06-12 15:27 ` Randy Dunlap
2018-06-12 10:10 ` [PATCH v6 24/29] fpga: dfl: afu: add port ops support Wu Hao
2018-06-12 10:10 ` [PATCH v6 25/29] fpga: dfl: afu: add header sub feature support Wu Hao
2018-06-12 10:10 ` [PATCH v6 26/29] fpga: dfl: afu: add DFL_FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2018-06-12 10:10 ` [PATCH v6 27/29] fpga: dfl: afu: add afu sub feature support Wu Hao
2018-06-12 10:10 ` [PATCH v6 28/29] fpga: dfl: afu: add DFL_FPGA_PORT_DMA_MAP/UNMAP ioctls support Wu Hao
2018-06-12 10:10 ` [PATCH v6 29/29] MAINTAINERS: add entry for FPGA DFL drivers Wu Hao
2018-06-13 0:56 ` Alan Tull
2018-06-13 13:50 ` Moritz Fischer
2018-06-12 17:33 ` [PATCH v6 00/29] FPGA Device Feature List (DFL) Device Drivers Alan Tull
2018-06-12 23:37 ` Wu Hao
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1528798243-2029-4-git-send-email-hao.wu@intel.com \
--to=hao.wu@intel.com \
--cc=atull@kernel.org \
--cc=linux-api@vger.kernel.org \
--cc=linux-fpga@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=luwei.kang@intel.com \
--cc=mdf@kernel.org \
--cc=yi.z.zhang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).